| commit | 4d52b2acefdfceae0e47ed08324a96f511dc80b1 | [log] [tgz] |
|---|---|---|
| author | Boris Brezillon <boris.brezillon@free-electrons.com> | Tue May 26 14:42:57 2015 +0200 |
| committer | Michael Turquette <mturquette@linaro.org> | Wed Jun 03 15:17:07 2015 -0700 |
| tree | 7348889850e9f896bda2842ad0e3c15165832fad | |
| parent | 5343325ff3dd299f459fa9dacbd95dca5c9bf215 [diff] |
clk: mvebu: add missing CESA gate clk Even if not documented in the datasheet, the Armada 370 SoC can actually gate the CESA (crypto engine) clock. Add an entry in the gating_desc table to be able to reference the CESA gateclk in the crypto node. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Michael Turquette <mturquette@linaro.org>