Greg Ungerer | cd3dd40 | 2009-04-27 15:09:29 +1000 | [diff] [blame] | 1 | /* |
| 2 | * intc-simr.c |
| 3 | * |
Philippe De Muyter | 03cbc385 | 2010-08-19 19:04:58 +0200 | [diff] [blame^] | 4 | * Interrupt controller code for the ColdFire 5208, 5207 & 532x parts. |
| 5 | * |
Greg Ungerer | cd3dd40 | 2009-04-27 15:09:29 +1000 | [diff] [blame] | 6 | * (C) Copyright 2009, Greg Ungerer <gerg@snapgear.com> |
| 7 | * |
| 8 | * This file is subject to the terms and conditions of the GNU General Public |
| 9 | * License. See the file COPYING in the main directory of this archive |
| 10 | * for more details. |
| 11 | */ |
| 12 | |
| 13 | #include <linux/types.h> |
| 14 | #include <linux/init.h> |
| 15 | #include <linux/kernel.h> |
| 16 | #include <linux/interrupt.h> |
| 17 | #include <linux/irq.h> |
| 18 | #include <linux/io.h> |
| 19 | #include <asm/coldfire.h> |
| 20 | #include <asm/mcfsim.h> |
| 21 | #include <asm/traps.h> |
| 22 | |
| 23 | static void intc_irq_mask(unsigned int irq) |
| 24 | { |
Greg Ungerer | 277c5e3 | 2009-04-29 12:07:13 +1000 | [diff] [blame] | 25 | if (irq >= MCFINT_VECBASE) { |
| 26 | if (irq < MCFINT_VECBASE + 64) |
| 27 | __raw_writeb(irq - MCFINT_VECBASE, MCFINTC0_SIMR); |
| 28 | else if ((irq < MCFINT_VECBASE + 128) && MCFINTC1_SIMR) |
| 29 | __raw_writeb(irq - MCFINT_VECBASE - 64, MCFINTC1_SIMR); |
| 30 | } |
Greg Ungerer | cd3dd40 | 2009-04-27 15:09:29 +1000 | [diff] [blame] | 31 | } |
| 32 | |
| 33 | static void intc_irq_unmask(unsigned int irq) |
| 34 | { |
Greg Ungerer | 277c5e3 | 2009-04-29 12:07:13 +1000 | [diff] [blame] | 35 | if (irq >= MCFINT_VECBASE) { |
| 36 | if (irq < MCFINT_VECBASE + 64) |
| 37 | __raw_writeb(irq - MCFINT_VECBASE, MCFINTC0_CIMR); |
| 38 | else if ((irq < MCFINT_VECBASE + 128) && MCFINTC1_CIMR) |
| 39 | __raw_writeb(irq - MCFINT_VECBASE - 64, MCFINTC1_CIMR); |
| 40 | } |
Greg Ungerer | cd3dd40 | 2009-04-27 15:09:29 +1000 | [diff] [blame] | 41 | } |
| 42 | |
| 43 | static int intc_irq_set_type(unsigned int irq, unsigned int type) |
| 44 | { |
Greg Ungerer | 277c5e3 | 2009-04-29 12:07:13 +1000 | [diff] [blame] | 45 | if (irq >= MCFINT_VECBASE) { |
| 46 | if (irq < MCFINT_VECBASE + 64) |
| 47 | __raw_writeb(5, MCFINTC0_ICR0 + irq - MCFINT_VECBASE); |
| 48 | else if ((irq < MCFINT_VECBASE) && MCFINTC1_ICR0) |
| 49 | __raw_writeb(5, MCFINTC1_ICR0 + irq - MCFINT_VECBASE - 64); |
| 50 | } |
Greg Ungerer | cd3dd40 | 2009-04-27 15:09:29 +1000 | [diff] [blame] | 51 | return 0; |
| 52 | } |
| 53 | |
| 54 | static struct irq_chip intc_irq_chip = { |
| 55 | .name = "CF-INTC", |
| 56 | .mask = intc_irq_mask, |
| 57 | .unmask = intc_irq_unmask, |
| 58 | .set_type = intc_irq_set_type, |
| 59 | }; |
| 60 | |
| 61 | void __init init_IRQ(void) |
| 62 | { |
| 63 | int irq; |
| 64 | |
| 65 | init_vectors(); |
| 66 | |
Greg Ungerer | e47cc3d | 2009-05-06 14:28:25 +1000 | [diff] [blame] | 67 | /* Mask all interrupt sources */ |
| 68 | __raw_writeb(0xff, MCFINTC0_SIMR); |
| 69 | if (MCFINTC1_SIMR) |
| 70 | __raw_writeb(0xff, MCFINTC1_SIMR); |
| 71 | |
Greg Ungerer | cd3dd40 | 2009-04-27 15:09:29 +1000 | [diff] [blame] | 72 | for (irq = 0; (irq < NR_IRQS); irq++) { |
| 73 | irq_desc[irq].status = IRQ_DISABLED; |
| 74 | irq_desc[irq].action = NULL; |
| 75 | irq_desc[irq].depth = 1; |
| 76 | irq_desc[irq].chip = &intc_irq_chip; |
| 77 | intc_irq_set_type(irq, 0); |
| 78 | } |
| 79 | } |
| 80 | |