blob: 484ec22ca6f420bcb15c3b1d275686718cdc0ff4 [file] [log] [blame]
Mark Browna2342ae2009-07-29 21:21:49 +01001/*
2 * wm_hubs.c -- WM8993/4 common code
3 *
4 * Copyright 2009 Wolfson Microelectronics plc
5 *
6 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
7 *
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 */
13
14#include <linux/module.h>
15#include <linux/moduleparam.h>
16#include <linux/init.h>
17#include <linux/delay.h>
18#include <linux/pm.h>
19#include <linux/i2c.h>
Mark Brown79ef0ab2011-08-01 13:02:17 +090020#include <linux/mfd/wm8994/registers.h>
Mark Browna2342ae2009-07-29 21:21:49 +010021#include <sound/core.h>
22#include <sound/pcm.h>
23#include <sound/pcm_params.h>
24#include <sound/soc.h>
Mark Browna2342ae2009-07-29 21:21:49 +010025#include <sound/initval.h>
26#include <sound/tlv.h>
27
28#include "wm8993.h"
29#include "wm_hubs.h"
30
31const DECLARE_TLV_DB_SCALE(wm_hubs_spkmix_tlv, -300, 300, 0);
32EXPORT_SYMBOL_GPL(wm_hubs_spkmix_tlv);
33
34static const DECLARE_TLV_DB_SCALE(inpga_tlv, -1650, 150, 0);
35static const DECLARE_TLV_DB_SCALE(inmix_sw_tlv, 0, 3000, 0);
36static const DECLARE_TLV_DB_SCALE(inmix_tlv, -1500, 300, 1);
37static const DECLARE_TLV_DB_SCALE(earpiece_tlv, -600, 600, 0);
38static const DECLARE_TLV_DB_SCALE(outmix_tlv, -2100, 300, 0);
39static const DECLARE_TLV_DB_SCALE(spkmixout_tlv, -1800, 600, 1);
40static const DECLARE_TLV_DB_SCALE(outpga_tlv, -5700, 100, 0);
41static const unsigned int spkboost_tlv[] = {
Clemens Ladisch028aa632011-11-20 15:15:31 +010042 TLV_DB_RANGE_HEAD(2),
Mark Browna2342ae2009-07-29 21:21:49 +010043 0, 6, TLV_DB_SCALE_ITEM(0, 150, 0),
44 7, 7, TLV_DB_SCALE_ITEM(1200, 0, 0),
45};
46static const DECLARE_TLV_DB_SCALE(line_tlv, -600, 600, 0);
47
48static const char *speaker_ref_text[] = {
49 "SPKVDD/2",
50 "VMID",
51};
52
53static const struct soc_enum speaker_ref =
54 SOC_ENUM_SINGLE(WM8993_SPEAKER_MIXER, 8, 2, speaker_ref_text);
55
56static const char *speaker_mode_text[] = {
57 "Class D",
58 "Class AB",
59};
60
61static const struct soc_enum speaker_mode =
62 SOC_ENUM_SINGLE(WM8993_SPKMIXR_ATTENUATION, 8, 2, speaker_mode_text);
63
Mark Brown4dcc93d2010-03-29 17:18:41 +010064static void wait_for_dc_servo(struct snd_soc_codec *codec, unsigned int op)
Mark Browna2342ae2009-07-29 21:21:49 +010065{
Mark Brownd96ca3c2011-07-12 15:25:03 +090066 struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec);
Mark Browna2342ae2009-07-29 21:21:49 +010067 unsigned int reg;
68 int count = 0;
Mark Brown1479c3f2011-07-15 17:33:26 +090069 int timeout;
Mark Brown4dcc93d2010-03-29 17:18:41 +010070 unsigned int val;
71
72 val = op | WM8993_DCS_ENA_CHAN_0 | WM8993_DCS_ENA_CHAN_1;
73
74 /* Trigger the command */
75 snd_soc_write(codec, WM8993_DC_SERVO_0, val);
Mark Browna2342ae2009-07-29 21:21:49 +010076
77 dev_dbg(codec->dev, "Waiting for DC servo...\n");
Mark Brown3ed70742010-01-20 17:39:45 +000078
Mark Brown1479c3f2011-07-15 17:33:26 +090079 if (hubs->dcs_done_irq)
80 timeout = 4;
81 else
82 timeout = 400;
83
84 do {
85 count++;
86
87 if (hubs->dcs_done_irq)
88 wait_for_completion_timeout(&hubs->dcs_done,
89 msecs_to_jiffies(250));
90 else
91 msleep(1);
Mark Brownd96ca3c2011-07-12 15:25:03 +090092
Mark Brown4dcc93d2010-03-29 17:18:41 +010093 reg = snd_soc_read(codec, WM8993_DC_SERVO_0);
Mark Brown1479c3f2011-07-15 17:33:26 +090094 dev_dbg(codec->dev, "DC servo: %x\n", reg);
95 } while (reg & op && count < timeout);
Mark Browna2342ae2009-07-29 21:21:49 +010096
Mark Brown4dcc93d2010-03-29 17:18:41 +010097 if (reg & op)
Mark Brown5a9f91c2011-02-17 12:05:46 -080098 dev_err(codec->dev, "Timed out waiting for DC Servo %x\n",
99 op);
Mark Browna2342ae2009-07-29 21:21:49 +0100100}
101
Mark Brownd96ca3c2011-07-12 15:25:03 +0900102irqreturn_t wm_hubs_dcs_done(int irq, void *data)
103{
104 struct wm_hubs_data *hubs = data;
105
106 complete(&hubs->dcs_done);
107
108 return IRQ_HANDLED;
109}
110EXPORT_SYMBOL_GPL(wm_hubs_dcs_done);
111
Mark Brownaf31a222012-04-26 20:06:56 +0100112static bool wm_hubs_dac_hp_direct(struct snd_soc_codec *codec)
113{
114 int reg;
115
116 /* If we're going via the mixer we'll need to do additional checks */
117 reg = snd_soc_read(codec, WM8993_OUTPUT_MIXER1);
118 if (!(reg & WM8993_DACL_TO_HPOUT1L)) {
119 if (reg & ~WM8993_DACL_TO_MIXOUTL) {
120 dev_vdbg(codec->dev, "Analogue paths connected: %x\n",
121 reg & ~WM8993_DACL_TO_HPOUT1L);
122 return false;
123 } else {
124 dev_vdbg(codec->dev, "HPL connected to mixer\n");
Mark Brownaf31a222012-04-26 20:06:56 +0100125 }
126 } else {
127 dev_vdbg(codec->dev, "HPL connected to DAC\n");
128 }
129
130 reg = snd_soc_read(codec, WM8993_OUTPUT_MIXER2);
131 if (!(reg & WM8993_DACR_TO_HPOUT1R)) {
132 if (reg & ~WM8993_DACR_TO_MIXOUTR) {
133 dev_vdbg(codec->dev, "Analogue paths connected: %x\n",
134 reg & ~WM8993_DACR_TO_HPOUT1R);
135 return false;
136 } else {
137 dev_vdbg(codec->dev, "HPR connected to mixer\n");
Mark Brownaf31a222012-04-26 20:06:56 +0100138 }
139 } else {
140 dev_vdbg(codec->dev, "HPR connected to DAC\n");
141 }
142
143 return true;
144}
145
Mark Browna2342ae2009-07-29 21:21:49 +0100146/*
Mark Brown3ed70742010-01-20 17:39:45 +0000147 * Startup calibration of the DC servo
148 */
149static void calibrate_dc_servo(struct snd_soc_codec *codec)
150{
Mark Brownb2c812e2010-04-14 15:35:19 +0900151 struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec);
Mark Brown20a4e7f2011-01-21 12:47:33 +0000152 s8 offset;
Mark Brown79ef0ab2011-08-01 13:02:17 +0900153 u16 reg, reg_l, reg_r, dcs_cfg, dcs_reg;
154
155 switch (hubs->dcs_readback_mode) {
156 case 2:
157 dcs_reg = WM8994_DC_SERVO_4E;
158 break;
159 default:
160 dcs_reg = WM8993_DC_SERVO_3;
161 break;
162 }
Mark Brown3ed70742010-01-20 17:39:45 +0000163
Mark Brownfec6dd82010-10-27 13:48:36 -0700164 /* If we're using a digital only path and have a previously
165 * callibrated DC servo offset stored then use that. */
Mark Brownaf31a222012-04-26 20:06:56 +0100166 if (wm_hubs_dac_hp_direct(codec) && hubs->dac_hp_direct_dcs) {
Mark Brownfec6dd82010-10-27 13:48:36 -0700167 dev_dbg(codec->dev, "Using cached DC servo offset %x\n",
Mark Brownaf31a222012-04-26 20:06:56 +0100168 hubs->dac_hp_direct_dcs);
169 snd_soc_write(codec, dcs_reg, hubs->dac_hp_direct_dcs);
Mark Brownfec6dd82010-10-27 13:48:36 -0700170 wait_for_dc_servo(codec,
171 WM8993_DCS_TRIG_DAC_WR_0 |
172 WM8993_DCS_TRIG_DAC_WR_1);
173 return;
174 }
175
Mark Brownf9acf9f2011-06-07 23:23:52 +0100176 if (hubs->series_startup) {
Mark Brown11cef5f2010-11-26 17:23:44 +0000177 /* Set for 32 series updates */
178 snd_soc_update_bits(codec, WM8993_DC_SERVO_1,
179 WM8993_DCS_SERIES_NO_01_MASK,
180 32 << WM8993_DCS_SERIES_NO_01_SHIFT);
181 wait_for_dc_servo(codec,
182 WM8993_DCS_TRIG_SERIES_0 |
183 WM8993_DCS_TRIG_SERIES_1);
184 } else {
185 wait_for_dc_servo(codec,
186 WM8993_DCS_TRIG_STARTUP_0 |
187 WM8993_DCS_TRIG_STARTUP_1);
188 }
Mark Brown3ed70742010-01-20 17:39:45 +0000189
Mark Brownfec6dd82010-10-27 13:48:36 -0700190 /* Different chips in the family support different readback
191 * methods.
192 */
193 switch (hubs->dcs_readback_mode) {
194 case 0:
195 reg_l = snd_soc_read(codec, WM8993_DC_SERVO_READBACK_1)
Joe Perchesef995e32010-11-15 09:09:17 -0800196 & WM8993_DCS_INTEG_CHAN_0_MASK;
Mark Brownfec6dd82010-10-27 13:48:36 -0700197 reg_r = snd_soc_read(codec, WM8993_DC_SERVO_READBACK_2)
198 & WM8993_DCS_INTEG_CHAN_1_MASK;
199 break;
Mark Brown79ef0ab2011-08-01 13:02:17 +0900200 case 2:
Mark Brownfec6dd82010-10-27 13:48:36 -0700201 case 1:
Mark Brown79ef0ab2011-08-01 13:02:17 +0900202 reg = snd_soc_read(codec, dcs_reg);
Mark Brownd5b040c2011-06-07 23:28:45 +0100203 reg_r = (reg & WM8993_DCS_DAC_WR_VAL_1_MASK)
Mark Brownfec6dd82010-10-27 13:48:36 -0700204 >> WM8993_DCS_DAC_WR_VAL_1_SHIFT;
Mark Brownd5b040c2011-06-07 23:28:45 +0100205 reg_l = reg & WM8993_DCS_DAC_WR_VAL_0_MASK;
Mark Brownfec6dd82010-10-27 13:48:36 -0700206 break;
207 default:
Mark Brown9e3be1e2010-11-02 09:58:49 -0400208 WARN(1, "Unknown DCS readback method\n");
Mark Browne778ba02012-02-29 15:39:56 +0000209 return;
Mark Brownfec6dd82010-10-27 13:48:36 -0700210 }
211
212 dev_dbg(codec->dev, "DCS input: %x %x\n", reg_l, reg_r);
213
Mark Brown3ed70742010-01-20 17:39:45 +0000214 /* Apply correction to DC servo result */
Mark Brown4537c4e2011-08-01 13:10:16 +0900215 if (hubs->dcs_codes_l || hubs->dcs_codes_r) {
216 dev_dbg(codec->dev,
217 "Applying %d/%d code DC servo correction\n",
218 hubs->dcs_codes_l, hubs->dcs_codes_r);
Mark Brown3ed70742010-01-20 17:39:45 +0000219
Mark Brownd5b040c2011-06-07 23:28:45 +0100220 /* HPOUT1R */
221 offset = reg_r;
Mark Brown4537c4e2011-08-01 13:10:16 +0900222 offset += hubs->dcs_codes_r;
Mark Brown20a4e7f2011-01-21 12:47:33 +0000223 dcs_cfg = (u8)offset << WM8993_DCS_DAC_WR_VAL_1_SHIFT;
Mark Brown3ed70742010-01-20 17:39:45 +0000224
Mark Brownd5b040c2011-06-07 23:28:45 +0100225 /* HPOUT1L */
226 offset = reg_l;
Mark Brown4537c4e2011-08-01 13:10:16 +0900227 offset += hubs->dcs_codes_l;
Mark Brown20a4e7f2011-01-21 12:47:33 +0000228 dcs_cfg |= (u8)offset;
Mark Brown3ed70742010-01-20 17:39:45 +0000229
Mark Brown3254d282010-05-10 14:56:03 +0100230 dev_dbg(codec->dev, "DCS result: %x\n", dcs_cfg);
231
Mark Brown3ed70742010-01-20 17:39:45 +0000232 /* Do it */
Mark Brown79ef0ab2011-08-01 13:02:17 +0900233 snd_soc_write(codec, dcs_reg, dcs_cfg);
Mark Brown4dcc93d2010-03-29 17:18:41 +0100234 wait_for_dc_servo(codec,
235 WM8993_DCS_TRIG_DAC_WR_0 |
236 WM8993_DCS_TRIG_DAC_WR_1);
Mark Brownfec6dd82010-10-27 13:48:36 -0700237 } else {
Mark Brownd5b040c2011-06-07 23:28:45 +0100238 dcs_cfg = reg_r << WM8993_DCS_DAC_WR_VAL_1_SHIFT;
239 dcs_cfg |= reg_l;
Mark Brown3ed70742010-01-20 17:39:45 +0000240 }
Mark Brownfec6dd82010-10-27 13:48:36 -0700241
242 /* Save the callibrated offset if we're in class W mode and
243 * therefore don't have any analogue signal mixed in. */
Mark Brownaf31a222012-04-26 20:06:56 +0100244 if (wm_hubs_dac_hp_direct(codec) && !hubs->no_cache_dac_hp_direct)
245 hubs->dac_hp_direct_dcs = dcs_cfg;
Mark Brown3ed70742010-01-20 17:39:45 +0000246}
247
248/*
Mark Browna2342ae2009-07-29 21:21:49 +0100249 * Update the DC servo calibration on gain changes
250 */
251static int wm8993_put_dc_servo(struct snd_kcontrol *kcontrol,
Mark Brown3ed70742010-01-20 17:39:45 +0000252 struct snd_ctl_elem_value *ucontrol)
Mark Browna2342ae2009-07-29 21:21:49 +0100253{
254 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
Mark Brownb2c812e2010-04-14 15:35:19 +0900255 struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec);
Mark Browna2342ae2009-07-29 21:21:49 +0100256 int ret;
257
Peter Ujfalusic4671a92011-10-06 09:59:12 +0300258 ret = snd_soc_put_volsw(kcontrol, ucontrol);
Mark Browna2342ae2009-07-29 21:21:49 +0100259
Mark Brownfec6dd82010-10-27 13:48:36 -0700260 /* Updating the analogue gains invalidates the DC servo cache */
Mark Brownaf31a222012-04-26 20:06:56 +0100261 hubs->dac_hp_direct_dcs = 0;
Mark Brownfec6dd82010-10-27 13:48:36 -0700262
Mark Brownae9d8602010-03-29 16:34:42 +0100263 /* If we're applying an offset correction then updating the
264 * callibration would be likely to introduce further offsets. */
Mark Brown4537c4e2011-08-01 13:10:16 +0900265 if (hubs->dcs_codes_l || hubs->dcs_codes_r || hubs->no_series_update)
Mark Brownae9d8602010-03-29 16:34:42 +0100266 return ret;
267
Mark Browna2342ae2009-07-29 21:21:49 +0100268 /* Only need to do this if the outputs are active */
269 if (snd_soc_read(codec, WM8993_POWER_MANAGEMENT_1)
270 & (WM8993_HPOUT1L_ENA | WM8993_HPOUT1R_ENA))
271 snd_soc_update_bits(codec,
272 WM8993_DC_SERVO_0,
273 WM8993_DCS_TRIG_SINGLE_0 |
274 WM8993_DCS_TRIG_SINGLE_1,
275 WM8993_DCS_TRIG_SINGLE_0 |
276 WM8993_DCS_TRIG_SINGLE_1);
277
278 return ret;
279}
280
281static const struct snd_kcontrol_new analogue_snd_controls[] = {
282SOC_SINGLE_TLV("IN1L Volume", WM8993_LEFT_LINE_INPUT_1_2_VOLUME, 0, 31, 0,
283 inpga_tlv),
284SOC_SINGLE("IN1L Switch", WM8993_LEFT_LINE_INPUT_1_2_VOLUME, 7, 1, 1),
Mark Brownea02c632011-05-27 21:56:16 +0800285SOC_SINGLE("IN1L ZC Switch", WM8993_LEFT_LINE_INPUT_1_2_VOLUME, 6, 1, 0),
Mark Browna2342ae2009-07-29 21:21:49 +0100286
287SOC_SINGLE_TLV("IN1R Volume", WM8993_RIGHT_LINE_INPUT_1_2_VOLUME, 0, 31, 0,
288 inpga_tlv),
289SOC_SINGLE("IN1R Switch", WM8993_RIGHT_LINE_INPUT_1_2_VOLUME, 7, 1, 1),
Mark Brownea02c632011-05-27 21:56:16 +0800290SOC_SINGLE("IN1R ZC Switch", WM8993_RIGHT_LINE_INPUT_1_2_VOLUME, 6, 1, 0),
Mark Browna2342ae2009-07-29 21:21:49 +0100291
292
293SOC_SINGLE_TLV("IN2L Volume", WM8993_LEFT_LINE_INPUT_3_4_VOLUME, 0, 31, 0,
294 inpga_tlv),
295SOC_SINGLE("IN2L Switch", WM8993_LEFT_LINE_INPUT_3_4_VOLUME, 7, 1, 1),
Mark Brownea02c632011-05-27 21:56:16 +0800296SOC_SINGLE("IN2L ZC Switch", WM8993_LEFT_LINE_INPUT_3_4_VOLUME, 6, 1, 0),
Mark Browna2342ae2009-07-29 21:21:49 +0100297
298SOC_SINGLE_TLV("IN2R Volume", WM8993_RIGHT_LINE_INPUT_3_4_VOLUME, 0, 31, 0,
299 inpga_tlv),
300SOC_SINGLE("IN2R Switch", WM8993_RIGHT_LINE_INPUT_3_4_VOLUME, 7, 1, 1),
Mark Brownea02c632011-05-27 21:56:16 +0800301SOC_SINGLE("IN2R ZC Switch", WM8993_RIGHT_LINE_INPUT_3_4_VOLUME, 6, 1, 0),
Mark Browna2342ae2009-07-29 21:21:49 +0100302
303SOC_SINGLE_TLV("MIXINL IN2L Volume", WM8993_INPUT_MIXER3, 7, 1, 0,
304 inmix_sw_tlv),
305SOC_SINGLE_TLV("MIXINL IN1L Volume", WM8993_INPUT_MIXER3, 4, 1, 0,
306 inmix_sw_tlv),
307SOC_SINGLE_TLV("MIXINL Output Record Volume", WM8993_INPUT_MIXER3, 0, 7, 0,
308 inmix_tlv),
309SOC_SINGLE_TLV("MIXINL IN1LP Volume", WM8993_INPUT_MIXER5, 6, 7, 0, inmix_tlv),
310SOC_SINGLE_TLV("MIXINL Direct Voice Volume", WM8993_INPUT_MIXER5, 0, 6, 0,
311 inmix_tlv),
312
313SOC_SINGLE_TLV("MIXINR IN2R Volume", WM8993_INPUT_MIXER4, 7, 1, 0,
314 inmix_sw_tlv),
315SOC_SINGLE_TLV("MIXINR IN1R Volume", WM8993_INPUT_MIXER4, 4, 1, 0,
316 inmix_sw_tlv),
317SOC_SINGLE_TLV("MIXINR Output Record Volume", WM8993_INPUT_MIXER4, 0, 7, 0,
318 inmix_tlv),
319SOC_SINGLE_TLV("MIXINR IN1RP Volume", WM8993_INPUT_MIXER6, 6, 7, 0, inmix_tlv),
320SOC_SINGLE_TLV("MIXINR Direct Voice Volume", WM8993_INPUT_MIXER6, 0, 6, 0,
321 inmix_tlv),
322
323SOC_SINGLE_TLV("Left Output Mixer IN2RN Volume", WM8993_OUTPUT_MIXER5, 6, 7, 1,
324 outmix_tlv),
325SOC_SINGLE_TLV("Left Output Mixer IN2LN Volume", WM8993_OUTPUT_MIXER3, 6, 7, 1,
326 outmix_tlv),
327SOC_SINGLE_TLV("Left Output Mixer IN2LP Volume", WM8993_OUTPUT_MIXER3, 9, 7, 1,
328 outmix_tlv),
329SOC_SINGLE_TLV("Left Output Mixer IN1L Volume", WM8993_OUTPUT_MIXER3, 0, 7, 1,
330 outmix_tlv),
331SOC_SINGLE_TLV("Left Output Mixer IN1R Volume", WM8993_OUTPUT_MIXER3, 3, 7, 1,
332 outmix_tlv),
333SOC_SINGLE_TLV("Left Output Mixer Right Input Volume",
334 WM8993_OUTPUT_MIXER5, 3, 7, 1, outmix_tlv),
335SOC_SINGLE_TLV("Left Output Mixer Left Input Volume",
336 WM8993_OUTPUT_MIXER5, 0, 7, 1, outmix_tlv),
337SOC_SINGLE_TLV("Left Output Mixer DAC Volume", WM8993_OUTPUT_MIXER5, 9, 7, 1,
338 outmix_tlv),
339
340SOC_SINGLE_TLV("Right Output Mixer IN2LN Volume",
341 WM8993_OUTPUT_MIXER6, 6, 7, 1, outmix_tlv),
342SOC_SINGLE_TLV("Right Output Mixer IN2RN Volume",
343 WM8993_OUTPUT_MIXER4, 6, 7, 1, outmix_tlv),
344SOC_SINGLE_TLV("Right Output Mixer IN1L Volume",
345 WM8993_OUTPUT_MIXER4, 3, 7, 1, outmix_tlv),
346SOC_SINGLE_TLV("Right Output Mixer IN1R Volume",
347 WM8993_OUTPUT_MIXER4, 0, 7, 1, outmix_tlv),
348SOC_SINGLE_TLV("Right Output Mixer IN2RP Volume",
349 WM8993_OUTPUT_MIXER4, 9, 7, 1, outmix_tlv),
350SOC_SINGLE_TLV("Right Output Mixer Left Input Volume",
351 WM8993_OUTPUT_MIXER6, 3, 7, 1, outmix_tlv),
352SOC_SINGLE_TLV("Right Output Mixer Right Input Volume",
353 WM8993_OUTPUT_MIXER6, 6, 7, 1, outmix_tlv),
354SOC_SINGLE_TLV("Right Output Mixer DAC Volume",
355 WM8993_OUTPUT_MIXER6, 9, 7, 1, outmix_tlv),
356
357SOC_DOUBLE_R_TLV("Output Volume", WM8993_LEFT_OPGA_VOLUME,
358 WM8993_RIGHT_OPGA_VOLUME, 0, 63, 0, outpga_tlv),
359SOC_DOUBLE_R("Output Switch", WM8993_LEFT_OPGA_VOLUME,
360 WM8993_RIGHT_OPGA_VOLUME, 6, 1, 0),
361SOC_DOUBLE_R("Output ZC Switch", WM8993_LEFT_OPGA_VOLUME,
362 WM8993_RIGHT_OPGA_VOLUME, 7, 1, 0),
363
364SOC_SINGLE("Earpiece Switch", WM8993_HPOUT2_VOLUME, 5, 1, 1),
365SOC_SINGLE_TLV("Earpiece Volume", WM8993_HPOUT2_VOLUME, 4, 1, 1, earpiece_tlv),
366
367SOC_SINGLE_TLV("SPKL Input Volume", WM8993_SPKMIXL_ATTENUATION,
368 5, 1, 1, wm_hubs_spkmix_tlv),
369SOC_SINGLE_TLV("SPKL IN1LP Volume", WM8993_SPKMIXL_ATTENUATION,
370 4, 1, 1, wm_hubs_spkmix_tlv),
371SOC_SINGLE_TLV("SPKL Output Volume", WM8993_SPKMIXL_ATTENUATION,
372 3, 1, 1, wm_hubs_spkmix_tlv),
373
374SOC_SINGLE_TLV("SPKR Input Volume", WM8993_SPKMIXR_ATTENUATION,
375 5, 1, 1, wm_hubs_spkmix_tlv),
376SOC_SINGLE_TLV("SPKR IN1RP Volume", WM8993_SPKMIXR_ATTENUATION,
377 4, 1, 1, wm_hubs_spkmix_tlv),
378SOC_SINGLE_TLV("SPKR Output Volume", WM8993_SPKMIXR_ATTENUATION,
379 3, 1, 1, wm_hubs_spkmix_tlv),
380
381SOC_DOUBLE_R_TLV("Speaker Mixer Volume",
382 WM8993_SPKMIXL_ATTENUATION, WM8993_SPKMIXR_ATTENUATION,
383 0, 3, 1, spkmixout_tlv),
384SOC_DOUBLE_R_TLV("Speaker Volume",
385 WM8993_SPEAKER_VOLUME_LEFT, WM8993_SPEAKER_VOLUME_RIGHT,
386 0, 63, 0, outpga_tlv),
387SOC_DOUBLE_R("Speaker Switch",
388 WM8993_SPEAKER_VOLUME_LEFT, WM8993_SPEAKER_VOLUME_RIGHT,
389 6, 1, 0),
390SOC_DOUBLE_R("Speaker ZC Switch",
391 WM8993_SPEAKER_VOLUME_LEFT, WM8993_SPEAKER_VOLUME_RIGHT,
392 7, 1, 0),
Uk Kimed8cc472010-12-05 17:26:07 +0900393SOC_DOUBLE_TLV("Speaker Boost Volume", WM8993_SPKOUT_BOOST, 3, 0, 7, 0,
Mark Browna2342ae2009-07-29 21:21:49 +0100394 spkboost_tlv),
395SOC_ENUM("Speaker Reference", speaker_ref),
396SOC_ENUM("Speaker Mode", speaker_mode),
397
Peter Ujfalusi0f9887d2011-10-05 10:29:19 +0300398SOC_DOUBLE_R_EXT_TLV("Headphone Volume",
399 WM8993_LEFT_OUTPUT_VOLUME, WM8993_RIGHT_OUTPUT_VOLUME,
Peter Ujfalusic4671a92011-10-06 09:59:12 +0300400 0, 63, 0, snd_soc_get_volsw, wm8993_put_dc_servo,
Peter Ujfalusi0f9887d2011-10-05 10:29:19 +0300401 outpga_tlv),
402
Mark Browna2342ae2009-07-29 21:21:49 +0100403SOC_DOUBLE_R("Headphone Switch", WM8993_LEFT_OUTPUT_VOLUME,
404 WM8993_RIGHT_OUTPUT_VOLUME, 6, 1, 0),
405SOC_DOUBLE_R("Headphone ZC Switch", WM8993_LEFT_OUTPUT_VOLUME,
406 WM8993_RIGHT_OUTPUT_VOLUME, 7, 1, 0),
407
408SOC_SINGLE("LINEOUT1N Switch", WM8993_LINE_OUTPUTS_VOLUME, 6, 1, 1),
409SOC_SINGLE("LINEOUT1P Switch", WM8993_LINE_OUTPUTS_VOLUME, 5, 1, 1),
410SOC_SINGLE_TLV("LINEOUT1 Volume", WM8993_LINE_OUTPUTS_VOLUME, 4, 1, 1,
411 line_tlv),
412
413SOC_SINGLE("LINEOUT2N Switch", WM8993_LINE_OUTPUTS_VOLUME, 2, 1, 1),
414SOC_SINGLE("LINEOUT2P Switch", WM8993_LINE_OUTPUTS_VOLUME, 1, 1, 1),
415SOC_SINGLE_TLV("LINEOUT2 Volume", WM8993_LINE_OUTPUTS_VOLUME, 0, 1, 1,
416 line_tlv),
417};
418
Mark Brown3ed70742010-01-20 17:39:45 +0000419static int hp_supply_event(struct snd_soc_dapm_widget *w,
420 struct snd_kcontrol *kcontrol, int event)
421{
422 struct snd_soc_codec *codec = w->codec;
Mark Brownb2c812e2010-04-14 15:35:19 +0900423 struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec);
Mark Brown3ed70742010-01-20 17:39:45 +0000424
425 switch (event) {
426 case SND_SOC_DAPM_PRE_PMU:
427 switch (hubs->hp_startup_mode) {
428 case 0:
429 break;
430 case 1:
431 /* Enable the headphone amp */
432 snd_soc_update_bits(codec, WM8993_POWER_MANAGEMENT_1,
433 WM8993_HPOUT1L_ENA |
434 WM8993_HPOUT1R_ENA,
435 WM8993_HPOUT1L_ENA |
436 WM8993_HPOUT1R_ENA);
437
438 /* Enable the second stage */
439 snd_soc_update_bits(codec, WM8993_ANALOGUE_HP_0,
440 WM8993_HPOUT1L_DLY |
441 WM8993_HPOUT1R_DLY,
442 WM8993_HPOUT1L_DLY |
443 WM8993_HPOUT1R_DLY);
444 break;
445 default:
446 dev_err(codec->dev, "Unknown HP startup mode %d\n",
447 hubs->hp_startup_mode);
448 break;
449 }
450
451 case SND_SOC_DAPM_PRE_PMD:
452 snd_soc_update_bits(codec, WM8993_CHARGE_PUMP_1,
453 WM8993_CP_ENA, 0);
454 break;
455 }
456
457 return 0;
458}
459
Mark Browna2342ae2009-07-29 21:21:49 +0100460static int hp_event(struct snd_soc_dapm_widget *w,
461 struct snd_kcontrol *kcontrol, int event)
462{
463 struct snd_soc_codec *codec = w->codec;
464 unsigned int reg = snd_soc_read(codec, WM8993_ANALOGUE_HP_0);
465
466 switch (event) {
467 case SND_SOC_DAPM_POST_PMU:
468 snd_soc_update_bits(codec, WM8993_CHARGE_PUMP_1,
469 WM8993_CP_ENA, WM8993_CP_ENA);
470
471 msleep(5);
472
473 snd_soc_update_bits(codec, WM8993_POWER_MANAGEMENT_1,
474 WM8993_HPOUT1L_ENA | WM8993_HPOUT1R_ENA,
475 WM8993_HPOUT1L_ENA | WM8993_HPOUT1R_ENA);
476
477 reg |= WM8993_HPOUT1L_DLY | WM8993_HPOUT1R_DLY;
478 snd_soc_write(codec, WM8993_ANALOGUE_HP_0, reg);
479
Mark Brown3ed70742010-01-20 17:39:45 +0000480 snd_soc_update_bits(codec, WM8993_DC_SERVO_1,
Mark Brownf9925d42011-07-28 12:44:44 +0100481 WM8993_DCS_TIMER_PERIOD_01_MASK, 0);
Mark Brown3ed70742010-01-20 17:39:45 +0000482
483 calibrate_dc_servo(codec);
Mark Browna2342ae2009-07-29 21:21:49 +0100484
485 reg |= WM8993_HPOUT1R_OUTP | WM8993_HPOUT1R_RMV_SHORT |
486 WM8993_HPOUT1L_OUTP | WM8993_HPOUT1L_RMV_SHORT;
487 snd_soc_write(codec, WM8993_ANALOGUE_HP_0, reg);
488 break;
489
490 case SND_SOC_DAPM_PRE_PMD:
Mark Brown3ed70742010-01-20 17:39:45 +0000491 snd_soc_update_bits(codec, WM8993_ANALOGUE_HP_0,
Mark Brown6adb26b2010-05-10 16:13:11 +0100492 WM8993_HPOUT1L_OUTP |
493 WM8993_HPOUT1R_OUTP |
Mark Brown3ed70742010-01-20 17:39:45 +0000494 WM8993_HPOUT1L_RMV_SHORT |
495 WM8993_HPOUT1R_RMV_SHORT, 0);
Mark Browna2342ae2009-07-29 21:21:49 +0100496
Mark Brown3ed70742010-01-20 17:39:45 +0000497 snd_soc_update_bits(codec, WM8993_ANALOGUE_HP_0,
Mark Brown6adb26b2010-05-10 16:13:11 +0100498 WM8993_HPOUT1L_DLY |
499 WM8993_HPOUT1R_DLY, 0);
Mark Browna2342ae2009-07-29 21:21:49 +0100500
Mark Brown395e4b72010-05-10 21:06:14 +0100501 snd_soc_write(codec, WM8993_DC_SERVO_0, 0);
502
Mark Browna2342ae2009-07-29 21:21:49 +0100503 snd_soc_update_bits(codec, WM8993_POWER_MANAGEMENT_1,
504 WM8993_HPOUT1L_ENA | WM8993_HPOUT1R_ENA,
505 0);
Mark Browna2342ae2009-07-29 21:21:49 +0100506 break;
507 }
508
509 return 0;
510}
511
512static int earpiece_event(struct snd_soc_dapm_widget *w,
513 struct snd_kcontrol *control, int event)
514{
515 struct snd_soc_codec *codec = w->codec;
516 u16 reg = snd_soc_read(codec, WM8993_ANTIPOP1) & ~WM8993_HPOUT2_IN_ENA;
517
518 switch (event) {
519 case SND_SOC_DAPM_PRE_PMU:
520 reg |= WM8993_HPOUT2_IN_ENA;
521 snd_soc_write(codec, WM8993_ANTIPOP1, reg);
522 udelay(50);
523 break;
524
525 case SND_SOC_DAPM_POST_PMD:
526 snd_soc_write(codec, WM8993_ANTIPOP1, reg);
527 break;
528
529 default:
530 BUG();
531 break;
532 }
533
534 return 0;
535}
536
Mark Brown5f2f3892012-02-08 18:51:42 +0000537static int lineout_event(struct snd_soc_dapm_widget *w,
538 struct snd_kcontrol *control, int event)
539{
540 struct snd_soc_codec *codec = w->codec;
541 struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec);
542 bool *flag;
543
544 switch (w->shift) {
545 case WM8993_LINEOUT1N_ENA_SHIFT:
546 flag = &hubs->lineout1n_ena;
547 break;
548 case WM8993_LINEOUT1P_ENA_SHIFT:
549 flag = &hubs->lineout1p_ena;
550 break;
551 case WM8993_LINEOUT2N_ENA_SHIFT:
552 flag = &hubs->lineout2n_ena;
553 break;
554 case WM8993_LINEOUT2P_ENA_SHIFT:
555 flag = &hubs->lineout2p_ena;
556 break;
557 default:
558 WARN(1, "Unknown line output");
559 return -EINVAL;
560 }
561
562 *flag = SND_SOC_DAPM_EVENT_ON(event);
563
564 return 0;
565}
566
Mark Brownc3403042012-04-26 21:29:29 +0100567void wm_hubs_update_class_w(struct snd_soc_codec *codec)
568{
569 struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec);
570 int enable = WM8993_CP_DYN_V | WM8993_CP_DYN_FREQ;
571
572 if (!wm_hubs_dac_hp_direct(codec))
573 enable = false;
574
575 if (hubs->check_class_w_digital && !hubs->check_class_w_digital(codec))
576 enable = false;
577
578 dev_vdbg(codec->dev, "Class W %s\n", enable ? "enabled" : "disabled");
579
580 snd_soc_update_bits(codec, WM8993_CLASS_W_0,
581 WM8993_CP_DYN_V | WM8993_CP_DYN_FREQ, enable);
582}
583EXPORT_SYMBOL_GPL(wm_hubs_update_class_w);
584
Mark Brown04de57c2012-04-26 22:08:50 +0100585#define WM_HUBS_SINGLE_W(xname, reg, shift, max, invert) \
586{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
587 .info = snd_soc_info_volsw, \
588 .get = snd_soc_dapm_get_volsw, .put = class_w_put_volsw, \
589 .private_value = SOC_SINGLE_VALUE(reg, shift, max, invert) }
590
591static int class_w_put_volsw(struct snd_kcontrol *kcontrol,
592 struct snd_ctl_elem_value *ucontrol)
593{
594 struct snd_soc_dapm_widget_list *wlist = snd_kcontrol_chip(kcontrol);
595 struct snd_soc_dapm_widget *widget = wlist->widgets[0];
596 struct snd_soc_codec *codec = widget->codec;
597 int ret;
598
599 ret = snd_soc_dapm_put_volsw(kcontrol, ucontrol);
600
601 wm_hubs_update_class_w(codec);
602
603 return ret;
604}
605
Mark Brownc3403042012-04-26 21:29:29 +0100606#define WM_HUBS_ENUM_W(xname, xenum) \
607{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
608 .info = snd_soc_info_enum_double, \
609 .get = snd_soc_dapm_get_enum_double, \
Mark Brown04de57c2012-04-26 22:08:50 +0100610 .put = class_w_put_double, \
Mark Brownc3403042012-04-26 21:29:29 +0100611 .private_value = (unsigned long)&xenum }
612
Mark Brown04de57c2012-04-26 22:08:50 +0100613static int class_w_put_double(struct snd_kcontrol *kcontrol,
614 struct snd_ctl_elem_value *ucontrol)
Mark Brownc3403042012-04-26 21:29:29 +0100615{
616 struct snd_soc_dapm_widget_list *wlist = snd_kcontrol_chip(kcontrol);
617 struct snd_soc_dapm_widget *widget = wlist->widgets[0];
618 struct snd_soc_codec *codec = widget->codec;
619 int ret;
620
621 ret = snd_soc_dapm_put_enum_double(kcontrol, ucontrol);
622
623 wm_hubs_update_class_w(codec);
624
625 return ret;
626}
627
628static const char *hp_mux_text[] = {
629 "Mixer",
630 "DAC",
631};
632
633static const struct soc_enum hpl_enum =
634 SOC_ENUM_SINGLE(WM8993_OUTPUT_MIXER1, 8, 2, hp_mux_text);
635
636const struct snd_kcontrol_new wm_hubs_hpl_mux =
637 WM_HUBS_ENUM_W("Left Headphone Mux", hpl_enum);
638EXPORT_SYMBOL_GPL(wm_hubs_hpl_mux);
639
640static const struct soc_enum hpr_enum =
641 SOC_ENUM_SINGLE(WM8993_OUTPUT_MIXER2, 8, 2, hp_mux_text);
642
643const struct snd_kcontrol_new wm_hubs_hpr_mux =
644 WM_HUBS_ENUM_W("Right Headphone Mux", hpr_enum);
645EXPORT_SYMBOL_GPL(wm_hubs_hpr_mux);
646
Mark Browna2342ae2009-07-29 21:21:49 +0100647static const struct snd_kcontrol_new in1l_pga[] = {
648SOC_DAPM_SINGLE("IN1LP Switch", WM8993_INPUT_MIXER2, 5, 1, 0),
649SOC_DAPM_SINGLE("IN1LN Switch", WM8993_INPUT_MIXER2, 4, 1, 0),
650};
651
652static const struct snd_kcontrol_new in1r_pga[] = {
653SOC_DAPM_SINGLE("IN1RP Switch", WM8993_INPUT_MIXER2, 1, 1, 0),
654SOC_DAPM_SINGLE("IN1RN Switch", WM8993_INPUT_MIXER2, 0, 1, 0),
655};
656
657static const struct snd_kcontrol_new in2l_pga[] = {
658SOC_DAPM_SINGLE("IN2LP Switch", WM8993_INPUT_MIXER2, 7, 1, 0),
659SOC_DAPM_SINGLE("IN2LN Switch", WM8993_INPUT_MIXER2, 6, 1, 0),
660};
661
662static const struct snd_kcontrol_new in2r_pga[] = {
663SOC_DAPM_SINGLE("IN2RP Switch", WM8993_INPUT_MIXER2, 3, 1, 0),
664SOC_DAPM_SINGLE("IN2RN Switch", WM8993_INPUT_MIXER2, 2, 1, 0),
665};
666
667static const struct snd_kcontrol_new mixinl[] = {
668SOC_DAPM_SINGLE("IN2L Switch", WM8993_INPUT_MIXER3, 8, 1, 0),
669SOC_DAPM_SINGLE("IN1L Switch", WM8993_INPUT_MIXER3, 5, 1, 0),
670};
671
672static const struct snd_kcontrol_new mixinr[] = {
673SOC_DAPM_SINGLE("IN2R Switch", WM8993_INPUT_MIXER4, 8, 1, 0),
674SOC_DAPM_SINGLE("IN1R Switch", WM8993_INPUT_MIXER4, 5, 1, 0),
675};
676
677static const struct snd_kcontrol_new left_output_mixer[] = {
Mark Brown04de57c2012-04-26 22:08:50 +0100678WM_HUBS_SINGLE_W("Right Input Switch", WM8993_OUTPUT_MIXER1, 7, 1, 0),
679WM_HUBS_SINGLE_W("Left Input Switch", WM8993_OUTPUT_MIXER1, 6, 1, 0),
680WM_HUBS_SINGLE_W("IN2RN Switch", WM8993_OUTPUT_MIXER1, 5, 1, 0),
681WM_HUBS_SINGLE_W("IN2LN Switch", WM8993_OUTPUT_MIXER1, 4, 1, 0),
682WM_HUBS_SINGLE_W("IN2LP Switch", WM8993_OUTPUT_MIXER1, 1, 1, 0),
683WM_HUBS_SINGLE_W("IN1R Switch", WM8993_OUTPUT_MIXER1, 3, 1, 0),
684WM_HUBS_SINGLE_W("IN1L Switch", WM8993_OUTPUT_MIXER1, 2, 1, 0),
685WM_HUBS_SINGLE_W("DAC Switch", WM8993_OUTPUT_MIXER1, 0, 1, 0),
Mark Browna2342ae2009-07-29 21:21:49 +0100686};
687
688static const struct snd_kcontrol_new right_output_mixer[] = {
Mark Brown04de57c2012-04-26 22:08:50 +0100689WM_HUBS_SINGLE_W("Left Input Switch", WM8993_OUTPUT_MIXER2, 7, 1, 0),
690WM_HUBS_SINGLE_W("Right Input Switch", WM8993_OUTPUT_MIXER2, 6, 1, 0),
691WM_HUBS_SINGLE_W("IN2LN Switch", WM8993_OUTPUT_MIXER2, 5, 1, 0),
692WM_HUBS_SINGLE_W("IN2RN Switch", WM8993_OUTPUT_MIXER2, 4, 1, 0),
693WM_HUBS_SINGLE_W("IN1L Switch", WM8993_OUTPUT_MIXER2, 3, 1, 0),
694WM_HUBS_SINGLE_W("IN1R Switch", WM8993_OUTPUT_MIXER2, 2, 1, 0),
695WM_HUBS_SINGLE_W("IN2RP Switch", WM8993_OUTPUT_MIXER2, 1, 1, 0),
696WM_HUBS_SINGLE_W("DAC Switch", WM8993_OUTPUT_MIXER2, 0, 1, 0),
Mark Browna2342ae2009-07-29 21:21:49 +0100697};
698
699static const struct snd_kcontrol_new earpiece_mixer[] = {
700SOC_DAPM_SINGLE("Direct Voice Switch", WM8993_HPOUT2_MIXER, 5, 1, 0),
701SOC_DAPM_SINGLE("Left Output Switch", WM8993_HPOUT2_MIXER, 4, 1, 0),
702SOC_DAPM_SINGLE("Right Output Switch", WM8993_HPOUT2_MIXER, 3, 1, 0),
703};
704
705static const struct snd_kcontrol_new left_speaker_boost[] = {
706SOC_DAPM_SINGLE("Direct Voice Switch", WM8993_SPKOUT_MIXERS, 5, 1, 0),
707SOC_DAPM_SINGLE("SPKL Switch", WM8993_SPKOUT_MIXERS, 4, 1, 0),
708SOC_DAPM_SINGLE("SPKR Switch", WM8993_SPKOUT_MIXERS, 3, 1, 0),
709};
710
711static const struct snd_kcontrol_new right_speaker_boost[] = {
712SOC_DAPM_SINGLE("Direct Voice Switch", WM8993_SPKOUT_MIXERS, 2, 1, 0),
713SOC_DAPM_SINGLE("SPKL Switch", WM8993_SPKOUT_MIXERS, 1, 1, 0),
714SOC_DAPM_SINGLE("SPKR Switch", WM8993_SPKOUT_MIXERS, 0, 1, 0),
715};
716
717static const struct snd_kcontrol_new line1_mix[] = {
718SOC_DAPM_SINGLE("IN1R Switch", WM8993_LINE_MIXER1, 2, 1, 0),
719SOC_DAPM_SINGLE("IN1L Switch", WM8993_LINE_MIXER1, 1, 1, 0),
720SOC_DAPM_SINGLE("Output Switch", WM8993_LINE_MIXER1, 0, 1, 0),
721};
722
723static const struct snd_kcontrol_new line1n_mix[] = {
724SOC_DAPM_SINGLE("Left Output Switch", WM8993_LINE_MIXER1, 6, 1, 0),
725SOC_DAPM_SINGLE("Right Output Switch", WM8993_LINE_MIXER1, 5, 1, 0),
726};
727
728static const struct snd_kcontrol_new line1p_mix[] = {
729SOC_DAPM_SINGLE("Left Output Switch", WM8993_LINE_MIXER1, 0, 1, 0),
730};
731
732static const struct snd_kcontrol_new line2_mix[] = {
Mark Brown43b6cec2012-02-01 23:46:58 +0000733SOC_DAPM_SINGLE("IN1L Switch", WM8993_LINE_MIXER2, 2, 1, 0),
734SOC_DAPM_SINGLE("IN1R Switch", WM8993_LINE_MIXER2, 1, 1, 0),
Mark Browna2342ae2009-07-29 21:21:49 +0100735SOC_DAPM_SINGLE("Output Switch", WM8993_LINE_MIXER2, 0, 1, 0),
736};
737
738static const struct snd_kcontrol_new line2n_mix[] = {
UK KIM114395c2012-01-28 01:52:22 +0900739SOC_DAPM_SINGLE("Left Output Switch", WM8993_LINE_MIXER2, 5, 1, 0),
740SOC_DAPM_SINGLE("Right Output Switch", WM8993_LINE_MIXER2, 6, 1, 0),
Mark Browna2342ae2009-07-29 21:21:49 +0100741};
742
743static const struct snd_kcontrol_new line2p_mix[] = {
744SOC_DAPM_SINGLE("Right Output Switch", WM8993_LINE_MIXER2, 0, 1, 0),
745};
746
747static const struct snd_soc_dapm_widget analogue_dapm_widgets[] = {
748SND_SOC_DAPM_INPUT("IN1LN"),
749SND_SOC_DAPM_INPUT("IN1LP"),
750SND_SOC_DAPM_INPUT("IN2LN"),
Joonyoung Shim34825942009-12-04 15:12:10 +0900751SND_SOC_DAPM_INPUT("IN2LP:VXRN"),
Mark Browna2342ae2009-07-29 21:21:49 +0100752SND_SOC_DAPM_INPUT("IN1RN"),
753SND_SOC_DAPM_INPUT("IN1RP"),
754SND_SOC_DAPM_INPUT("IN2RN"),
Joonyoung Shim34825942009-12-04 15:12:10 +0900755SND_SOC_DAPM_INPUT("IN2RP:VXRP"),
Mark Browna2342ae2009-07-29 21:21:49 +0100756
Mark Brown91e20852011-12-02 16:01:41 +0000757SND_SOC_DAPM_SUPPLY("MICBIAS2", WM8993_POWER_MANAGEMENT_1, 5, 0, NULL, 0),
758SND_SOC_DAPM_SUPPLY("MICBIAS1", WM8993_POWER_MANAGEMENT_1, 4, 0, NULL, 0),
Mark Browna2342ae2009-07-29 21:21:49 +0100759
760SND_SOC_DAPM_MIXER("IN1L PGA", WM8993_POWER_MANAGEMENT_2, 6, 0,
761 in1l_pga, ARRAY_SIZE(in1l_pga)),
762SND_SOC_DAPM_MIXER("IN1R PGA", WM8993_POWER_MANAGEMENT_2, 4, 0,
763 in1r_pga, ARRAY_SIZE(in1r_pga)),
764
765SND_SOC_DAPM_MIXER("IN2L PGA", WM8993_POWER_MANAGEMENT_2, 7, 0,
766 in2l_pga, ARRAY_SIZE(in2l_pga)),
767SND_SOC_DAPM_MIXER("IN2R PGA", WM8993_POWER_MANAGEMENT_2, 5, 0,
768 in2r_pga, ARRAY_SIZE(in2r_pga)),
769
Mark Browna2342ae2009-07-29 21:21:49 +0100770SND_SOC_DAPM_MIXER("MIXINL", WM8993_POWER_MANAGEMENT_2, 9, 0,
771 mixinl, ARRAY_SIZE(mixinl)),
772SND_SOC_DAPM_MIXER("MIXINR", WM8993_POWER_MANAGEMENT_2, 8, 0,
773 mixinr, ARRAY_SIZE(mixinr)),
774
Mark Browna2342ae2009-07-29 21:21:49 +0100775SND_SOC_DAPM_MIXER("Left Output Mixer", WM8993_POWER_MANAGEMENT_3, 5, 0,
776 left_output_mixer, ARRAY_SIZE(left_output_mixer)),
777SND_SOC_DAPM_MIXER("Right Output Mixer", WM8993_POWER_MANAGEMENT_3, 4, 0,
778 right_output_mixer, ARRAY_SIZE(right_output_mixer)),
779
780SND_SOC_DAPM_PGA("Left Output PGA", WM8993_POWER_MANAGEMENT_3, 7, 0, NULL, 0),
781SND_SOC_DAPM_PGA("Right Output PGA", WM8993_POWER_MANAGEMENT_3, 6, 0, NULL, 0),
782
Mark Brown3ed70742010-01-20 17:39:45 +0000783SND_SOC_DAPM_SUPPLY("Headphone Supply", SND_SOC_NOPM, 0, 0, hp_supply_event,
784 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_PRE_PMD),
Mark Brown26422622012-02-21 09:36:49 +0000785SND_SOC_DAPM_OUT_DRV_E("Headphone PGA", SND_SOC_NOPM, 0, 0, NULL, 0,
786 hp_event, SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
Mark Browna2342ae2009-07-29 21:21:49 +0100787
788SND_SOC_DAPM_MIXER("Earpiece Mixer", SND_SOC_NOPM, 0, 0,
789 earpiece_mixer, ARRAY_SIZE(earpiece_mixer)),
790SND_SOC_DAPM_PGA_E("Earpiece Driver", WM8993_POWER_MANAGEMENT_1, 11, 0,
791 NULL, 0, earpiece_event,
792 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
793
794SND_SOC_DAPM_MIXER("SPKL Boost", SND_SOC_NOPM, 0, 0,
795 left_speaker_boost, ARRAY_SIZE(left_speaker_boost)),
796SND_SOC_DAPM_MIXER("SPKR Boost", SND_SOC_NOPM, 0, 0,
797 right_speaker_boost, ARRAY_SIZE(right_speaker_boost)),
798
Mark Brown03431972011-11-04 17:11:54 +0000799SND_SOC_DAPM_SUPPLY("TSHUT", WM8993_POWER_MANAGEMENT_2, 14, 0, NULL, 0),
Mark Browndc9c7452012-02-07 14:24:57 +0000800SND_SOC_DAPM_OUT_DRV("SPKL Driver", WM8993_POWER_MANAGEMENT_1, 12, 0,
801 NULL, 0),
802SND_SOC_DAPM_OUT_DRV("SPKR Driver", WM8993_POWER_MANAGEMENT_1, 13, 0,
803 NULL, 0),
Mark Browna2342ae2009-07-29 21:21:49 +0100804
805SND_SOC_DAPM_MIXER("LINEOUT1 Mixer", SND_SOC_NOPM, 0, 0,
806 line1_mix, ARRAY_SIZE(line1_mix)),
807SND_SOC_DAPM_MIXER("LINEOUT2 Mixer", SND_SOC_NOPM, 0, 0,
808 line2_mix, ARRAY_SIZE(line2_mix)),
809
810SND_SOC_DAPM_MIXER("LINEOUT1N Mixer", SND_SOC_NOPM, 0, 0,
811 line1n_mix, ARRAY_SIZE(line1n_mix)),
812SND_SOC_DAPM_MIXER("LINEOUT1P Mixer", SND_SOC_NOPM, 0, 0,
813 line1p_mix, ARRAY_SIZE(line1p_mix)),
814SND_SOC_DAPM_MIXER("LINEOUT2N Mixer", SND_SOC_NOPM, 0, 0,
815 line2n_mix, ARRAY_SIZE(line2n_mix)),
816SND_SOC_DAPM_MIXER("LINEOUT2P Mixer", SND_SOC_NOPM, 0, 0,
817 line2p_mix, ARRAY_SIZE(line2p_mix)),
818
Mark Brown5f2f3892012-02-08 18:51:42 +0000819SND_SOC_DAPM_OUT_DRV_E("LINEOUT1N Driver", WM8993_POWER_MANAGEMENT_3, 13, 0,
820 NULL, 0, lineout_event,
821 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
822SND_SOC_DAPM_OUT_DRV_E("LINEOUT1P Driver", WM8993_POWER_MANAGEMENT_3, 12, 0,
823 NULL, 0, lineout_event,
824 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
825SND_SOC_DAPM_OUT_DRV_E("LINEOUT2N Driver", WM8993_POWER_MANAGEMENT_3, 11, 0,
826 NULL, 0, lineout_event,
827 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
828SND_SOC_DAPM_OUT_DRV_E("LINEOUT2P Driver", WM8993_POWER_MANAGEMENT_3, 10, 0,
829 NULL, 0, lineout_event,
830 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
Mark Browna2342ae2009-07-29 21:21:49 +0100831
832SND_SOC_DAPM_OUTPUT("SPKOUTLP"),
833SND_SOC_DAPM_OUTPUT("SPKOUTLN"),
834SND_SOC_DAPM_OUTPUT("SPKOUTRP"),
835SND_SOC_DAPM_OUTPUT("SPKOUTRN"),
836SND_SOC_DAPM_OUTPUT("HPOUT1L"),
837SND_SOC_DAPM_OUTPUT("HPOUT1R"),
838SND_SOC_DAPM_OUTPUT("HPOUT2P"),
839SND_SOC_DAPM_OUTPUT("HPOUT2N"),
840SND_SOC_DAPM_OUTPUT("LINEOUT1P"),
841SND_SOC_DAPM_OUTPUT("LINEOUT1N"),
842SND_SOC_DAPM_OUTPUT("LINEOUT2P"),
843SND_SOC_DAPM_OUTPUT("LINEOUT2N"),
844};
845
846static const struct snd_soc_dapm_route analogue_routes[] = {
Mark Brown4baafdd2011-02-18 15:05:53 -0800847 { "MICBIAS1", NULL, "CLK_SYS" },
848 { "MICBIAS2", NULL, "CLK_SYS" },
849
Mark Browna2342ae2009-07-29 21:21:49 +0100850 { "IN1L PGA", "IN1LP Switch", "IN1LP" },
851 { "IN1L PGA", "IN1LN Switch", "IN1LN" },
852
Mark Brown4e04ada2011-07-15 15:12:31 +0900853 { "IN1L PGA", NULL, "VMID" },
854 { "IN1R PGA", NULL, "VMID" },
855 { "IN2L PGA", NULL, "VMID" },
856 { "IN2R PGA", NULL, "VMID" },
857
Mark Browna2342ae2009-07-29 21:21:49 +0100858 { "IN1R PGA", "IN1RP Switch", "IN1RP" },
859 { "IN1R PGA", "IN1RN Switch", "IN1RN" },
860
Joonyoung Shim34825942009-12-04 15:12:10 +0900861 { "IN2L PGA", "IN2LP Switch", "IN2LP:VXRN" },
Mark Browna2342ae2009-07-29 21:21:49 +0100862 { "IN2L PGA", "IN2LN Switch", "IN2LN" },
863
Joonyoung Shim34825942009-12-04 15:12:10 +0900864 { "IN2R PGA", "IN2RP Switch", "IN2RP:VXRP" },
Mark Browna2342ae2009-07-29 21:21:49 +0100865 { "IN2R PGA", "IN2RN Switch", "IN2RN" },
866
Joonyoung Shim34825942009-12-04 15:12:10 +0900867 { "Direct Voice", NULL, "IN2LP:VXRN" },
868 { "Direct Voice", NULL, "IN2RP:VXRP" },
Mark Browna2342ae2009-07-29 21:21:49 +0100869
870 { "MIXINL", "IN1L Switch", "IN1L PGA" },
871 { "MIXINL", "IN2L Switch", "IN2L PGA" },
872 { "MIXINL", NULL, "Direct Voice" },
873 { "MIXINL", NULL, "IN1LP" },
874 { "MIXINL", NULL, "Left Output Mixer" },
Mark Brown4e04ada2011-07-15 15:12:31 +0900875 { "MIXINL", NULL, "VMID" },
Mark Browna2342ae2009-07-29 21:21:49 +0100876
877 { "MIXINR", "IN1R Switch", "IN1R PGA" },
878 { "MIXINR", "IN2R Switch", "IN2R PGA" },
879 { "MIXINR", NULL, "Direct Voice" },
880 { "MIXINR", NULL, "IN1RP" },
881 { "MIXINR", NULL, "Right Output Mixer" },
Mark Brown4e04ada2011-07-15 15:12:31 +0900882 { "MIXINR", NULL, "VMID" },
Mark Browna2342ae2009-07-29 21:21:49 +0100883
884 { "ADCL", NULL, "MIXINL" },
885 { "ADCR", NULL, "MIXINR" },
886
887 { "Left Output Mixer", "Left Input Switch", "MIXINL" },
888 { "Left Output Mixer", "Right Input Switch", "MIXINR" },
889 { "Left Output Mixer", "IN2RN Switch", "IN2RN" },
890 { "Left Output Mixer", "IN2LN Switch", "IN2LN" },
Joonyoung Shim34825942009-12-04 15:12:10 +0900891 { "Left Output Mixer", "IN2LP Switch", "IN2LP:VXRN" },
Mark Browna2342ae2009-07-29 21:21:49 +0100892 { "Left Output Mixer", "IN1L Switch", "IN1L PGA" },
893 { "Left Output Mixer", "IN1R Switch", "IN1R PGA" },
894
895 { "Right Output Mixer", "Left Input Switch", "MIXINL" },
896 { "Right Output Mixer", "Right Input Switch", "MIXINR" },
897 { "Right Output Mixer", "IN2LN Switch", "IN2LN" },
898 { "Right Output Mixer", "IN2RN Switch", "IN2RN" },
Joonyoung Shim34825942009-12-04 15:12:10 +0900899 { "Right Output Mixer", "IN2RP Switch", "IN2RP:VXRP" },
Mark Browna2342ae2009-07-29 21:21:49 +0100900 { "Right Output Mixer", "IN1L Switch", "IN1L PGA" },
901 { "Right Output Mixer", "IN1R Switch", "IN1R PGA" },
902
903 { "Left Output PGA", NULL, "Left Output Mixer" },
904 { "Left Output PGA", NULL, "TOCLK" },
905
906 { "Right Output PGA", NULL, "Right Output Mixer" },
907 { "Right Output PGA", NULL, "TOCLK" },
908
909 { "Earpiece Mixer", "Direct Voice Switch", "Direct Voice" },
910 { "Earpiece Mixer", "Left Output Switch", "Left Output PGA" },
911 { "Earpiece Mixer", "Right Output Switch", "Right Output PGA" },
912
Mark Brown4e04ada2011-07-15 15:12:31 +0900913 { "Earpiece Driver", NULL, "VMID" },
Mark Browna2342ae2009-07-29 21:21:49 +0100914 { "Earpiece Driver", NULL, "Earpiece Mixer" },
915 { "HPOUT2N", NULL, "Earpiece Driver" },
916 { "HPOUT2P", NULL, "Earpiece Driver" },
917
918 { "SPKL", "Input Switch", "MIXINL" },
919 { "SPKL", "IN1LP Switch", "IN1LP" },
Mark Brown39cca162011-04-08 16:32:16 +0900920 { "SPKL", "Output Switch", "Left Output PGA" },
Mark Browna2342ae2009-07-29 21:21:49 +0100921 { "SPKL", NULL, "TOCLK" },
922
923 { "SPKR", "Input Switch", "MIXINR" },
924 { "SPKR", "IN1RP Switch", "IN1RP" },
Mark Brown39cca162011-04-08 16:32:16 +0900925 { "SPKR", "Output Switch", "Right Output PGA" },
Mark Browna2342ae2009-07-29 21:21:49 +0100926 { "SPKR", NULL, "TOCLK" },
927
928 { "SPKL Boost", "Direct Voice Switch", "Direct Voice" },
929 { "SPKL Boost", "SPKL Switch", "SPKL" },
930 { "SPKL Boost", "SPKR Switch", "SPKR" },
931
932 { "SPKR Boost", "Direct Voice Switch", "Direct Voice" },
933 { "SPKR Boost", "SPKR Switch", "SPKR" },
934 { "SPKR Boost", "SPKL Switch", "SPKL" },
935
Mark Brown4e04ada2011-07-15 15:12:31 +0900936 { "SPKL Driver", NULL, "VMID" },
Mark Browna2342ae2009-07-29 21:21:49 +0100937 { "SPKL Driver", NULL, "SPKL Boost" },
938 { "SPKL Driver", NULL, "CLK_SYS" },
Mark Brown03431972011-11-04 17:11:54 +0000939 { "SPKL Driver", NULL, "TSHUT" },
Mark Browna2342ae2009-07-29 21:21:49 +0100940
Mark Brown4e04ada2011-07-15 15:12:31 +0900941 { "SPKR Driver", NULL, "VMID" },
Mark Browna2342ae2009-07-29 21:21:49 +0100942 { "SPKR Driver", NULL, "SPKR Boost" },
943 { "SPKR Driver", NULL, "CLK_SYS" },
Mark Brown03431972011-11-04 17:11:54 +0000944 { "SPKR Driver", NULL, "TSHUT" },
Mark Browna2342ae2009-07-29 21:21:49 +0100945
946 { "SPKOUTLP", NULL, "SPKL Driver" },
947 { "SPKOUTLN", NULL, "SPKL Driver" },
948 { "SPKOUTRP", NULL, "SPKR Driver" },
949 { "SPKOUTRN", NULL, "SPKR Driver" },
950
Mark Brown39cca162011-04-08 16:32:16 +0900951 { "Left Headphone Mux", "Mixer", "Left Output PGA" },
952 { "Right Headphone Mux", "Mixer", "Right Output PGA" },
Mark Browna2342ae2009-07-29 21:21:49 +0100953
954 { "Headphone PGA", NULL, "Left Headphone Mux" },
955 { "Headphone PGA", NULL, "Right Headphone Mux" },
Mark Brown4e04ada2011-07-15 15:12:31 +0900956 { "Headphone PGA", NULL, "VMID" },
Mark Browna2342ae2009-07-29 21:21:49 +0100957 { "Headphone PGA", NULL, "CLK_SYS" },
Mark Brown3ed70742010-01-20 17:39:45 +0000958 { "Headphone PGA", NULL, "Headphone Supply" },
Mark Browna2342ae2009-07-29 21:21:49 +0100959
960 { "HPOUT1L", NULL, "Headphone PGA" },
961 { "HPOUT1R", NULL, "Headphone PGA" },
962
Mark Brown4e04ada2011-07-15 15:12:31 +0900963 { "LINEOUT1N Driver", NULL, "VMID" },
964 { "LINEOUT1P Driver", NULL, "VMID" },
965 { "LINEOUT2N Driver", NULL, "VMID" },
966 { "LINEOUT2P Driver", NULL, "VMID" },
967
Mark Browna2342ae2009-07-29 21:21:49 +0100968 { "LINEOUT1N", NULL, "LINEOUT1N Driver" },
969 { "LINEOUT1P", NULL, "LINEOUT1P Driver" },
970 { "LINEOUT2N", NULL, "LINEOUT2N Driver" },
971 { "LINEOUT2P", NULL, "LINEOUT2P Driver" },
972};
973
974static const struct snd_soc_dapm_route lineout1_diff_routes[] = {
975 { "LINEOUT1 Mixer", "IN1L Switch", "IN1L PGA" },
976 { "LINEOUT1 Mixer", "IN1R Switch", "IN1R PGA" },
Mark Brownd0b48af2011-05-14 17:21:28 -0700977 { "LINEOUT1 Mixer", "Output Switch", "Left Output PGA" },
Mark Browna2342ae2009-07-29 21:21:49 +0100978
979 { "LINEOUT1N Driver", NULL, "LINEOUT1 Mixer" },
980 { "LINEOUT1P Driver", NULL, "LINEOUT1 Mixer" },
981};
982
983static const struct snd_soc_dapm_route lineout1_se_routes[] = {
Mark Brownd0b48af2011-05-14 17:21:28 -0700984 { "LINEOUT1N Mixer", "Left Output Switch", "Left Output PGA" },
985 { "LINEOUT1N Mixer", "Right Output Switch", "Right Output PGA" },
Mark Browna2342ae2009-07-29 21:21:49 +0100986
Mark Brownd0b48af2011-05-14 17:21:28 -0700987 { "LINEOUT1P Mixer", "Left Output Switch", "Left Output PGA" },
Mark Browna2342ae2009-07-29 21:21:49 +0100988
989 { "LINEOUT1N Driver", NULL, "LINEOUT1N Mixer" },
990 { "LINEOUT1P Driver", NULL, "LINEOUT1P Mixer" },
991};
992
993static const struct snd_soc_dapm_route lineout2_diff_routes[] = {
Mark Brownee767442012-01-31 11:55:32 +0000994 { "LINEOUT2 Mixer", "IN1L Switch", "IN1L PGA" },
995 { "LINEOUT2 Mixer", "IN1R Switch", "IN1R PGA" },
Mark Brownd0b48af2011-05-14 17:21:28 -0700996 { "LINEOUT2 Mixer", "Output Switch", "Right Output PGA" },
Mark Browna2342ae2009-07-29 21:21:49 +0100997
998 { "LINEOUT2N Driver", NULL, "LINEOUT2 Mixer" },
999 { "LINEOUT2P Driver", NULL, "LINEOUT2 Mixer" },
1000};
1001
1002static const struct snd_soc_dapm_route lineout2_se_routes[] = {
Mark Brownd0b48af2011-05-14 17:21:28 -07001003 { "LINEOUT2N Mixer", "Left Output Switch", "Left Output PGA" },
1004 { "LINEOUT2N Mixer", "Right Output Switch", "Right Output PGA" },
Mark Browna2342ae2009-07-29 21:21:49 +01001005
Mark Brownd0b48af2011-05-14 17:21:28 -07001006 { "LINEOUT2P Mixer", "Right Output Switch", "Right Output PGA" },
Mark Browna2342ae2009-07-29 21:21:49 +01001007
1008 { "LINEOUT2N Driver", NULL, "LINEOUT2N Mixer" },
1009 { "LINEOUT2P Driver", NULL, "LINEOUT2P Mixer" },
1010};
1011
1012int wm_hubs_add_analogue_controls(struct snd_soc_codec *codec)
1013{
Liam Girdwoodce6120c2010-11-05 15:53:46 +02001014 struct snd_soc_dapm_context *dapm = &codec->dapm;
1015
Mark Browna2342ae2009-07-29 21:21:49 +01001016 /* Latch volume update bits & default ZC on */
1017 snd_soc_update_bits(codec, WM8993_LEFT_LINE_INPUT_1_2_VOLUME,
1018 WM8993_IN1_VU, WM8993_IN1_VU);
1019 snd_soc_update_bits(codec, WM8993_RIGHT_LINE_INPUT_1_2_VOLUME,
1020 WM8993_IN1_VU, WM8993_IN1_VU);
1021 snd_soc_update_bits(codec, WM8993_LEFT_LINE_INPUT_3_4_VOLUME,
1022 WM8993_IN2_VU, WM8993_IN2_VU);
1023 snd_soc_update_bits(codec, WM8993_RIGHT_LINE_INPUT_3_4_VOLUME,
1024 WM8993_IN2_VU, WM8993_IN2_VU);
1025
Mark Brownfb5af532011-05-15 12:18:38 -07001026 snd_soc_update_bits(codec, WM8993_SPEAKER_VOLUME_LEFT,
1027 WM8993_SPKOUT_VU, WM8993_SPKOUT_VU);
Mark Browna2342ae2009-07-29 21:21:49 +01001028 snd_soc_update_bits(codec, WM8993_SPEAKER_VOLUME_RIGHT,
1029 WM8993_SPKOUT_VU, WM8993_SPKOUT_VU);
1030
1031 snd_soc_update_bits(codec, WM8993_LEFT_OUTPUT_VOLUME,
Mark Brownfb5af532011-05-15 12:18:38 -07001032 WM8993_HPOUT1_VU | WM8993_HPOUT1L_ZC,
1033 WM8993_HPOUT1_VU | WM8993_HPOUT1L_ZC);
Mark Browna2342ae2009-07-29 21:21:49 +01001034 snd_soc_update_bits(codec, WM8993_RIGHT_OUTPUT_VOLUME,
1035 WM8993_HPOUT1_VU | WM8993_HPOUT1R_ZC,
1036 WM8993_HPOUT1_VU | WM8993_HPOUT1R_ZC);
1037
1038 snd_soc_update_bits(codec, WM8993_LEFT_OPGA_VOLUME,
Mark Brownfb5af532011-05-15 12:18:38 -07001039 WM8993_MIXOUTL_ZC | WM8993_MIXOUT_VU,
1040 WM8993_MIXOUTL_ZC | WM8993_MIXOUT_VU);
Mark Browna2342ae2009-07-29 21:21:49 +01001041 snd_soc_update_bits(codec, WM8993_RIGHT_OPGA_VOLUME,
1042 WM8993_MIXOUTR_ZC | WM8993_MIXOUT_VU,
1043 WM8993_MIXOUTR_ZC | WM8993_MIXOUT_VU);
1044
Liam Girdwood022658b2012-02-03 17:43:09 +00001045 snd_soc_add_codec_controls(codec, analogue_snd_controls,
Mark Browna2342ae2009-07-29 21:21:49 +01001046 ARRAY_SIZE(analogue_snd_controls));
1047
Liam Girdwoodce6120c2010-11-05 15:53:46 +02001048 snd_soc_dapm_new_controls(dapm, analogue_dapm_widgets,
Mark Browna2342ae2009-07-29 21:21:49 +01001049 ARRAY_SIZE(analogue_dapm_widgets));
1050 return 0;
1051}
1052EXPORT_SYMBOL_GPL(wm_hubs_add_analogue_controls);
1053
1054int wm_hubs_add_analogue_routes(struct snd_soc_codec *codec,
1055 int lineout1_diff, int lineout2_diff)
1056{
Mark Brownd96ca3c2011-07-12 15:25:03 +09001057 struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec);
Liam Girdwoodce6120c2010-11-05 15:53:46 +02001058 struct snd_soc_dapm_context *dapm = &codec->dapm;
1059
Mark Brownd96ca3c2011-07-12 15:25:03 +09001060 init_completion(&hubs->dcs_done);
1061
Liam Girdwoodce6120c2010-11-05 15:53:46 +02001062 snd_soc_dapm_add_routes(dapm, analogue_routes,
Mark Browna2342ae2009-07-29 21:21:49 +01001063 ARRAY_SIZE(analogue_routes));
1064
1065 if (lineout1_diff)
Liam Girdwoodce6120c2010-11-05 15:53:46 +02001066 snd_soc_dapm_add_routes(dapm,
Mark Browna2342ae2009-07-29 21:21:49 +01001067 lineout1_diff_routes,
1068 ARRAY_SIZE(lineout1_diff_routes));
1069 else
Liam Girdwoodce6120c2010-11-05 15:53:46 +02001070 snd_soc_dapm_add_routes(dapm,
Mark Browna2342ae2009-07-29 21:21:49 +01001071 lineout1_se_routes,
1072 ARRAY_SIZE(lineout1_se_routes));
1073
1074 if (lineout2_diff)
Liam Girdwoodce6120c2010-11-05 15:53:46 +02001075 snd_soc_dapm_add_routes(dapm,
Mark Browna2342ae2009-07-29 21:21:49 +01001076 lineout2_diff_routes,
1077 ARRAY_SIZE(lineout2_diff_routes));
1078 else
Liam Girdwoodce6120c2010-11-05 15:53:46 +02001079 snd_soc_dapm_add_routes(dapm,
Mark Browna2342ae2009-07-29 21:21:49 +01001080 lineout2_se_routes,
1081 ARRAY_SIZE(lineout2_se_routes));
1082
1083 return 0;
1084}
1085EXPORT_SYMBOL_GPL(wm_hubs_add_analogue_routes);
1086
Mark Brownaa983d92009-09-30 14:16:11 +01001087int wm_hubs_handle_analogue_pdata(struct snd_soc_codec *codec,
1088 int lineout1_diff, int lineout2_diff,
1089 int lineout1fb, int lineout2fb,
1090 int jd_scthr, int jd_thr, int micbias1_lvl,
1091 int micbias2_lvl)
1092{
Mark Brown5f2f3892012-02-08 18:51:42 +00001093 struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec);
1094
1095 hubs->lineout1_se = !lineout1_diff;
1096 hubs->lineout2_se = !lineout2_diff;
1097
Mark Brownaa983d92009-09-30 14:16:11 +01001098 if (!lineout1_diff)
1099 snd_soc_update_bits(codec, WM8993_LINE_MIXER1,
1100 WM8993_LINEOUT1_MODE,
1101 WM8993_LINEOUT1_MODE);
1102 if (!lineout2_diff)
1103 snd_soc_update_bits(codec, WM8993_LINE_MIXER2,
1104 WM8993_LINEOUT2_MODE,
1105 WM8993_LINEOUT2_MODE);
1106
Mark Brown5472bbc2012-03-19 17:31:56 +00001107 if (!lineout1_diff && !lineout2_diff)
1108 snd_soc_update_bits(codec, WM8993_ANTIPOP1,
1109 WM8993_LINEOUT_VMID_BUF_ENA,
1110 WM8993_LINEOUT_VMID_BUF_ENA);
1111
Mark Brownaa983d92009-09-30 14:16:11 +01001112 if (lineout1fb)
1113 snd_soc_update_bits(codec, WM8993_ADDITIONAL_CONTROL,
1114 WM8993_LINEOUT1_FB, WM8993_LINEOUT1_FB);
1115
1116 if (lineout2fb)
1117 snd_soc_update_bits(codec, WM8993_ADDITIONAL_CONTROL,
1118 WM8993_LINEOUT2_FB, WM8993_LINEOUT2_FB);
1119
1120 snd_soc_update_bits(codec, WM8993_MICBIAS,
1121 WM8993_JD_SCTHR_MASK | WM8993_JD_THR_MASK |
1122 WM8993_MICB1_LVL | WM8993_MICB2_LVL,
1123 jd_scthr << WM8993_JD_SCTHR_SHIFT |
1124 jd_thr << WM8993_JD_THR_SHIFT |
1125 micbias1_lvl |
1126 micbias2_lvl << WM8993_MICB2_LVL_SHIFT);
1127
1128 return 0;
1129}
1130EXPORT_SYMBOL_GPL(wm_hubs_handle_analogue_pdata);
1131
Mark Brown5f2f3892012-02-08 18:51:42 +00001132void wm_hubs_vmid_ena(struct snd_soc_codec *codec)
1133{
1134 struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec);
1135 int val = 0;
1136
1137 if (hubs->lineout1_se)
1138 val |= WM8993_LINEOUT1N_ENA | WM8993_LINEOUT1P_ENA;
1139
1140 if (hubs->lineout2_se)
1141 val |= WM8993_LINEOUT2N_ENA | WM8993_LINEOUT2P_ENA;
1142
1143 /* Enable the line outputs while we power up */
1144 snd_soc_update_bits(codec, WM8993_POWER_MANAGEMENT_3, val, val);
1145}
1146EXPORT_SYMBOL_GPL(wm_hubs_vmid_ena);
1147
1148void wm_hubs_set_bias_level(struct snd_soc_codec *codec,
1149 enum snd_soc_bias_level level)
1150{
1151 struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec);
1152 int val;
1153
1154 switch (level) {
Mark Brownd60d6c32012-02-10 18:09:42 +00001155 case SND_SOC_BIAS_STANDBY:
1156 /* Clamp the inputs to VMID while we ramp to charge caps */
1157 snd_soc_update_bits(codec, WM8993_INPUTS_CLAMP_REG,
1158 WM8993_INPUTS_CLAMP, WM8993_INPUTS_CLAMP);
1159 break;
1160
Mark Brown5f2f3892012-02-08 18:51:42 +00001161 case SND_SOC_BIAS_ON:
1162 /* Turn off any unneded single ended outputs */
1163 val = 0;
1164
1165 if (hubs->lineout1_se && hubs->lineout1n_ena)
1166 val |= WM8993_LINEOUT1N_ENA;
1167
1168 if (hubs->lineout1_se && hubs->lineout1p_ena)
1169 val |= WM8993_LINEOUT1P_ENA;
1170
1171 if (hubs->lineout2_se && hubs->lineout2n_ena)
1172 val |= WM8993_LINEOUT2N_ENA;
1173
1174 if (hubs->lineout2_se && hubs->lineout2p_ena)
1175 val |= WM8993_LINEOUT2P_ENA;
1176
1177 snd_soc_update_bits(codec, WM8993_POWER_MANAGEMENT_3,
1178 WM8993_LINEOUT1N_ENA |
1179 WM8993_LINEOUT1P_ENA |
1180 WM8993_LINEOUT2N_ENA |
1181 WM8993_LINEOUT2P_ENA,
1182 val);
1183
Mark Brownd60d6c32012-02-10 18:09:42 +00001184 /* Remove the input clamps */
1185 snd_soc_update_bits(codec, WM8993_INPUTS_CLAMP_REG,
1186 WM8993_INPUTS_CLAMP, 0);
Mark Brown5f2f3892012-02-08 18:51:42 +00001187 break;
1188
1189 default:
1190 break;
1191 }
1192}
1193EXPORT_SYMBOL_GPL(wm_hubs_set_bias_level);
1194
Mark Browna2342ae2009-07-29 21:21:49 +01001195MODULE_DESCRIPTION("Shared support for Wolfson hubs products");
1196MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>");
1197MODULE_LICENSE("GPL");