blob: f3aad61e6394f91a44252b261439d98c282d80f9 [file] [log] [blame]
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001/* QLogic qed NIC Driver
Mintz, Yuvale8f1cb52017-01-01 13:57:00 +02002 * Copyright (c) 2015-2017 QLogic Corporation
Yuval Mintz0a7fb112016-10-01 21:59:55 +03003 *
Mintz, Yuvale8f1cb52017-01-01 13:57:00 +02004 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
Yuval Mintz0a7fb112016-10-01 21:59:55 +03009 *
Mintz, Yuvale8f1cb52017-01-01 13:57:00 +020010 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
12 * conditions are met:
13 *
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
16 * disclaimer.
17 *
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and /or other materials
21 * provided with the distribution.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
Yuval Mintz0a7fb112016-10-01 21:59:55 +030031 */
32
33#include <linux/types.h>
34#include <asm/byteorder.h>
35#include <linux/dma-mapping.h>
36#include <linux/if_vlan.h>
37#include <linux/kernel.h>
38#include <linux/pci.h>
39#include <linux/slab.h>
40#include <linux/stddef.h>
Yuval Mintz0a7fb112016-10-01 21:59:55 +030041#include <linux/workqueue.h>
42#include <net/ipv6.h>
43#include <linux/bitops.h>
44#include <linux/delay.h>
45#include <linux/errno.h>
46#include <linux/etherdevice.h>
47#include <linux/io.h>
48#include <linux/list.h>
49#include <linux/mutex.h>
50#include <linux/spinlock.h>
51#include <linux/string.h>
52#include <linux/qed/qed_ll2_if.h>
53#include "qed.h"
54#include "qed_cxt.h"
55#include "qed_dev_api.h"
56#include "qed_hsi.h"
57#include "qed_hw.h"
58#include "qed_int.h"
59#include "qed_ll2.h"
60#include "qed_mcp.h"
Yuval Mintz1d6cff42016-12-01 00:21:07 -080061#include "qed_ooo.h"
Yuval Mintz0a7fb112016-10-01 21:59:55 +030062#include "qed_reg_addr.h"
63#include "qed_sp.h"
Yuval Mintz0189efb2016-10-13 22:57:02 +030064#include "qed_roce.h"
Yuval Mintz0a7fb112016-10-01 21:59:55 +030065
66#define QED_LL2_RX_REGISTERED(ll2) ((ll2)->rx_queue.b_cb_registred)
67#define QED_LL2_TX_REGISTERED(ll2) ((ll2)->tx_queue.b_cb_registred)
68
69#define QED_LL2_TX_SIZE (256)
70#define QED_LL2_RX_SIZE (4096)
71
72struct qed_cb_ll2_info {
73 int rx_cnt;
74 u32 rx_size;
75 u8 handle;
76 bool frags_mapped;
77
78 /* Lock protecting LL2 buffer lists in sleepless context */
79 spinlock_t lock;
80 struct list_head list;
81
82 const struct qed_ll2_cb_ops *cbs;
83 void *cb_cookie;
84};
85
86struct qed_ll2_buffer {
87 struct list_head list;
88 void *data;
89 dma_addr_t phys_addr;
90};
91
92static void qed_ll2b_complete_tx_packet(struct qed_hwfn *p_hwfn,
93 u8 connection_handle,
94 void *cookie,
95 dma_addr_t first_frag_addr,
96 bool b_last_fragment,
97 bool b_last_packet)
98{
99 struct qed_dev *cdev = p_hwfn->cdev;
100 struct sk_buff *skb = cookie;
101
102 /* All we need to do is release the mapping */
103 dma_unmap_single(&p_hwfn->cdev->pdev->dev, first_frag_addr,
104 skb_headlen(skb), DMA_TO_DEVICE);
105
106 if (cdev->ll2->cbs && cdev->ll2->cbs->tx_cb)
107 cdev->ll2->cbs->tx_cb(cdev->ll2->cb_cookie, skb,
108 b_last_fragment);
109
110 if (cdev->ll2->frags_mapped)
111 /* Case where mapped frags were received, need to
112 * free skb with nr_frags marked as 0
113 */
114 skb_shinfo(skb)->nr_frags = 0;
115
116 dev_kfree_skb_any(skb);
117}
118
119static int qed_ll2_alloc_buffer(struct qed_dev *cdev,
120 u8 **data, dma_addr_t *phys_addr)
121{
122 *data = kmalloc(cdev->ll2->rx_size, GFP_ATOMIC);
123 if (!(*data)) {
124 DP_INFO(cdev, "Failed to allocate LL2 buffer data\n");
125 return -ENOMEM;
126 }
127
128 *phys_addr = dma_map_single(&cdev->pdev->dev,
129 ((*data) + NET_SKB_PAD),
130 cdev->ll2->rx_size, DMA_FROM_DEVICE);
131 if (dma_mapping_error(&cdev->pdev->dev, *phys_addr)) {
132 DP_INFO(cdev, "Failed to map LL2 buffer data\n");
133 kfree((*data));
134 return -ENOMEM;
135 }
136
137 return 0;
138}
139
140static int qed_ll2_dealloc_buffer(struct qed_dev *cdev,
141 struct qed_ll2_buffer *buffer)
142{
143 spin_lock_bh(&cdev->ll2->lock);
144
145 dma_unmap_single(&cdev->pdev->dev, buffer->phys_addr,
146 cdev->ll2->rx_size, DMA_FROM_DEVICE);
147 kfree(buffer->data);
148 list_del(&buffer->list);
149
150 cdev->ll2->rx_cnt--;
151 if (!cdev->ll2->rx_cnt)
152 DP_INFO(cdev, "All LL2 entries were removed\n");
153
154 spin_unlock_bh(&cdev->ll2->lock);
155
156 return 0;
157}
158
159static void qed_ll2_kill_buffers(struct qed_dev *cdev)
160{
161 struct qed_ll2_buffer *buffer, *tmp_buffer;
162
163 list_for_each_entry_safe(buffer, tmp_buffer, &cdev->ll2->list, list)
164 qed_ll2_dealloc_buffer(cdev, buffer);
165}
166
Yuval Mintz8c93bea2016-10-13 22:57:03 +0300167static void qed_ll2b_complete_rx_packet(struct qed_hwfn *p_hwfn,
Mintz, Yuval68be9102017-06-09 17:13:19 +0300168 struct qed_ll2_comp_rx_data *data)
Yuval Mintz0a7fb112016-10-01 21:59:55 +0300169{
Mintz, Yuval68be9102017-06-09 17:13:19 +0300170 struct qed_ll2_buffer *buffer = data->cookie;
Yuval Mintz0a7fb112016-10-01 21:59:55 +0300171 struct qed_dev *cdev = p_hwfn->cdev;
Yuval Mintz0a7fb112016-10-01 21:59:55 +0300172 dma_addr_t new_phys_addr;
173 struct sk_buff *skb;
174 bool reuse = false;
175 int rc = -EINVAL;
176 u8 *new_data;
177
Yuval Mintz0a7fb112016-10-01 21:59:55 +0300178 DP_VERBOSE(p_hwfn,
179 (NETIF_MSG_RX_STATUS | QED_MSG_STORAGE | NETIF_MSG_PKTDATA),
180 "Got an LL2 Rx completion: [Buffer at phys 0x%llx, offset 0x%02x] Length 0x%04x Parse_flags 0x%04x vlan 0x%04x Opaque data [0x%08x:0x%08x]\n",
Mintz, Yuval68be9102017-06-09 17:13:19 +0300181 (u64)data->rx_buf_addr,
182 data->u.placement_offset,
183 data->length.packet_length,
184 data->parse_flags,
185 data->vlan, data->opaque_data_0, data->opaque_data_1);
Yuval Mintz0a7fb112016-10-01 21:59:55 +0300186
187 if ((cdev->dp_module & NETIF_MSG_PKTDATA) && buffer->data) {
188 print_hex_dump(KERN_INFO, "",
189 DUMP_PREFIX_OFFSET, 16, 1,
Mintz, Yuval68be9102017-06-09 17:13:19 +0300190 buffer->data, data->length.packet_length, false);
Yuval Mintz0a7fb112016-10-01 21:59:55 +0300191 }
192
193 /* Determine if data is valid */
Mintz, Yuval68be9102017-06-09 17:13:19 +0300194 if (data->length.packet_length < ETH_HLEN)
Yuval Mintz0a7fb112016-10-01 21:59:55 +0300195 reuse = true;
196
197 /* Allocate a replacement for buffer; Reuse upon failure */
198 if (!reuse)
199 rc = qed_ll2_alloc_buffer(p_hwfn->cdev, &new_data,
200 &new_phys_addr);
201
202 /* If need to reuse or there's no replacement buffer, repost this */
203 if (rc)
204 goto out_post;
Mintz, Yuval752ecb22017-03-14 15:26:00 +0200205 dma_unmap_single(&cdev->pdev->dev, buffer->phys_addr,
206 cdev->ll2->rx_size, DMA_FROM_DEVICE);
Yuval Mintz0a7fb112016-10-01 21:59:55 +0300207
208 skb = build_skb(buffer->data, 0);
209 if (!skb) {
210 rc = -ENOMEM;
211 goto out_post;
212 }
213
Mintz, Yuval68be9102017-06-09 17:13:19 +0300214 data->u.placement_offset += NET_SKB_PAD;
215 skb_reserve(skb, data->u.placement_offset);
216 skb_put(skb, data->length.packet_length);
Yuval Mintz0a7fb112016-10-01 21:59:55 +0300217 skb_checksum_none_assert(skb);
218
219 /* Get parital ethernet information instead of eth_type_trans(),
220 * Since we don't have an associated net_device.
221 */
222 skb_reset_mac_header(skb);
223 skb->protocol = eth_hdr(skb)->h_proto;
224
225 /* Pass SKB onward */
226 if (cdev->ll2->cbs && cdev->ll2->cbs->rx_cb) {
Mintz, Yuval68be9102017-06-09 17:13:19 +0300227 if (data->vlan)
228 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q),
229 data->vlan);
Yuval Mintz0a7fb112016-10-01 21:59:55 +0300230 cdev->ll2->cbs->rx_cb(cdev->ll2->cb_cookie, skb,
Mintz, Yuval68be9102017-06-09 17:13:19 +0300231 data->opaque_data_0,
232 data->opaque_data_1);
Yuval Mintz0a7fb112016-10-01 21:59:55 +0300233 }
234
235 /* Update Buffer information and update FW producer */
236 buffer->data = new_data;
237 buffer->phys_addr = new_phys_addr;
238
239out_post:
240 rc = qed_ll2_post_rx_buffer(QED_LEADING_HWFN(cdev), cdev->ll2->handle,
241 buffer->phys_addr, 0, buffer, 1);
242
243 if (rc)
244 qed_ll2_dealloc_buffer(cdev, buffer);
245}
246
247static struct qed_ll2_info *__qed_ll2_handle_sanity(struct qed_hwfn *p_hwfn,
248 u8 connection_handle,
249 bool b_lock,
250 bool b_only_active)
251{
252 struct qed_ll2_info *p_ll2_conn, *p_ret = NULL;
253
254 if (connection_handle >= QED_MAX_NUM_OF_LL2_CONNECTIONS)
255 return NULL;
256
257 if (!p_hwfn->p_ll2_info)
258 return NULL;
259
260 p_ll2_conn = &p_hwfn->p_ll2_info[connection_handle];
261
262 if (b_only_active) {
263 if (b_lock)
264 mutex_lock(&p_ll2_conn->mutex);
265 if (p_ll2_conn->b_active)
266 p_ret = p_ll2_conn;
267 if (b_lock)
268 mutex_unlock(&p_ll2_conn->mutex);
269 } else {
270 p_ret = p_ll2_conn;
271 }
272
273 return p_ret;
274}
275
276static struct qed_ll2_info *qed_ll2_handle_sanity(struct qed_hwfn *p_hwfn,
277 u8 connection_handle)
278{
279 return __qed_ll2_handle_sanity(p_hwfn, connection_handle, false, true);
280}
281
282static struct qed_ll2_info *qed_ll2_handle_sanity_lock(struct qed_hwfn *p_hwfn,
283 u8 connection_handle)
284{
285 return __qed_ll2_handle_sanity(p_hwfn, connection_handle, true, true);
286}
287
288static struct qed_ll2_info *qed_ll2_handle_sanity_inactive(struct qed_hwfn
289 *p_hwfn,
290 u8 connection_handle)
291{
292 return __qed_ll2_handle_sanity(p_hwfn, connection_handle, false, false);
293}
294
295static void qed_ll2_txq_flush(struct qed_hwfn *p_hwfn, u8 connection_handle)
296{
297 bool b_last_packet = false, b_last_frag = false;
298 struct qed_ll2_tx_packet *p_pkt = NULL;
299 struct qed_ll2_info *p_ll2_conn;
300 struct qed_ll2_tx_queue *p_tx;
Ram Amraniabd49672016-10-01 22:00:01 +0300301 dma_addr_t tx_frag;
Yuval Mintz0a7fb112016-10-01 21:59:55 +0300302
303 p_ll2_conn = qed_ll2_handle_sanity_inactive(p_hwfn, connection_handle);
304 if (!p_ll2_conn)
305 return;
306
307 p_tx = &p_ll2_conn->tx_queue;
308
309 while (!list_empty(&p_tx->active_descq)) {
310 p_pkt = list_first_entry(&p_tx->active_descq,
311 struct qed_ll2_tx_packet, list_entry);
312 if (!p_pkt)
313 break;
314
315 list_del(&p_pkt->list_entry);
316 b_last_packet = list_empty(&p_tx->active_descq);
317 list_add_tail(&p_pkt->list_entry, &p_tx->free_descq);
Mintz, Yuval13c54772017-06-09 17:13:20 +0300318 if (p_ll2_conn->input.conn_type == QED_LL2_TYPE_ISCSI_OOO) {
Yuval Mintz1d6cff42016-12-01 00:21:07 -0800319 struct qed_ooo_buffer *p_buffer;
Yuval Mintz0a7fb112016-10-01 21:59:55 +0300320
Yuval Mintz1d6cff42016-12-01 00:21:07 -0800321 p_buffer = (struct qed_ooo_buffer *)p_pkt->cookie;
322 qed_ooo_put_free_buffer(p_hwfn, p_hwfn->p_ooo_info,
323 p_buffer);
324 } else {
325 p_tx->cur_completing_packet = *p_pkt;
326 p_tx->cur_completing_bd_idx = 1;
327 b_last_frag =
328 p_tx->cur_completing_bd_idx == p_pkt->bd_used;
329 tx_frag = p_pkt->bds_set[0].tx_frag;
Mintz, Yuval13c54772017-06-09 17:13:20 +0300330 if (p_ll2_conn->input.gsi_enable)
Yuval Mintz1d6cff42016-12-01 00:21:07 -0800331 qed_ll2b_release_tx_gsi_packet(p_hwfn,
332 p_ll2_conn->
333 my_id,
334 p_pkt->cookie,
335 tx_frag,
336 b_last_frag,
337 b_last_packet);
338 else
339 qed_ll2b_complete_tx_packet(p_hwfn,
340 p_ll2_conn->my_id,
341 p_pkt->cookie,
342 tx_frag,
343 b_last_frag,
344 b_last_packet);
345 }
Yuval Mintz0a7fb112016-10-01 21:59:55 +0300346 }
347}
348
349static int qed_ll2_txq_completion(struct qed_hwfn *p_hwfn, void *p_cookie)
350{
351 struct qed_ll2_info *p_ll2_conn = p_cookie;
352 struct qed_ll2_tx_queue *p_tx = &p_ll2_conn->tx_queue;
353 u16 new_idx = 0, num_bds = 0, num_bds_in_packet = 0;
354 struct qed_ll2_tx_packet *p_pkt;
355 bool b_last_frag = false;
356 unsigned long flags;
Ram Amraniabd49672016-10-01 22:00:01 +0300357 dma_addr_t tx_frag;
Yuval Mintz0a7fb112016-10-01 21:59:55 +0300358 int rc = -EINVAL;
359
360 spin_lock_irqsave(&p_tx->lock, flags);
361 if (p_tx->b_completing_packet) {
362 rc = -EBUSY;
363 goto out;
364 }
365
366 new_idx = le16_to_cpu(*p_tx->p_fw_cons);
367 num_bds = ((s16)new_idx - (s16)p_tx->bds_idx);
368 while (num_bds) {
369 if (list_empty(&p_tx->active_descq))
370 goto out;
371
372 p_pkt = list_first_entry(&p_tx->active_descq,
373 struct qed_ll2_tx_packet, list_entry);
374 if (!p_pkt)
375 goto out;
376
377 p_tx->b_completing_packet = true;
378 p_tx->cur_completing_packet = *p_pkt;
379 num_bds_in_packet = p_pkt->bd_used;
380 list_del(&p_pkt->list_entry);
381
382 if (num_bds < num_bds_in_packet) {
383 DP_NOTICE(p_hwfn,
384 "Rest of BDs does not cover whole packet\n");
385 goto out;
386 }
387
388 num_bds -= num_bds_in_packet;
389 p_tx->bds_idx += num_bds_in_packet;
390 while (num_bds_in_packet--)
391 qed_chain_consume(&p_tx->txq_chain);
392
393 p_tx->cur_completing_bd_idx = 1;
394 b_last_frag = p_tx->cur_completing_bd_idx == p_pkt->bd_used;
395 list_add_tail(&p_pkt->list_entry, &p_tx->free_descq);
396
397 spin_unlock_irqrestore(&p_tx->lock, flags);
Ram Amraniabd49672016-10-01 22:00:01 +0300398 tx_frag = p_pkt->bds_set[0].tx_frag;
Mintz, Yuval13c54772017-06-09 17:13:20 +0300399 if (p_ll2_conn->input.gsi_enable)
Ram Amraniabd49672016-10-01 22:00:01 +0300400 qed_ll2b_complete_tx_gsi_packet(p_hwfn,
401 p_ll2_conn->my_id,
402 p_pkt->cookie,
403 tx_frag,
404 b_last_frag, !num_bds);
405 else
406 qed_ll2b_complete_tx_packet(p_hwfn,
407 p_ll2_conn->my_id,
408 p_pkt->cookie,
409 tx_frag,
410 b_last_frag, !num_bds);
Yuval Mintz0a7fb112016-10-01 21:59:55 +0300411 spin_lock_irqsave(&p_tx->lock, flags);
412 }
413
414 p_tx->b_completing_packet = false;
415 rc = 0;
416out:
417 spin_unlock_irqrestore(&p_tx->lock, flags);
418 return rc;
419}
420
Ram Amraniabd49672016-10-01 22:00:01 +0300421static int
422qed_ll2_rxq_completion_gsi(struct qed_hwfn *p_hwfn,
423 struct qed_ll2_info *p_ll2_info,
424 union core_rx_cqe_union *p_cqe,
425 unsigned long lock_flags, bool b_last_cqe)
426{
427 struct qed_ll2_rx_queue *p_rx = &p_ll2_info->rx_queue;
428 struct qed_ll2_rx_packet *p_pkt = NULL;
429 u16 packet_length, parse_flags, vlan;
430 u32 src_mac_addrhi;
431 u16 src_mac_addrlo;
432
433 if (!list_empty(&p_rx->active_descq))
434 p_pkt = list_first_entry(&p_rx->active_descq,
435 struct qed_ll2_rx_packet, list_entry);
436 if (!p_pkt) {
437 DP_NOTICE(p_hwfn,
438 "GSI Rx completion but active_descq is empty\n");
439 return -EIO;
440 }
441
442 list_del(&p_pkt->list_entry);
443 parse_flags = le16_to_cpu(p_cqe->rx_cqe_gsi.parse_flags.flags);
444 packet_length = le16_to_cpu(p_cqe->rx_cqe_gsi.data_length);
445 vlan = le16_to_cpu(p_cqe->rx_cqe_gsi.vlan);
446 src_mac_addrhi = le32_to_cpu(p_cqe->rx_cqe_gsi.src_mac_addrhi);
447 src_mac_addrlo = le16_to_cpu(p_cqe->rx_cqe_gsi.src_mac_addrlo);
448 if (qed_chain_consume(&p_rx->rxq_chain) != p_pkt->rxq_bd)
449 DP_NOTICE(p_hwfn,
450 "Mismatch between active_descq and the LL2 Rx chain\n");
451 list_add_tail(&p_pkt->list_entry, &p_rx->free_descq);
452
453 spin_unlock_irqrestore(&p_rx->lock, lock_flags);
454 qed_ll2b_complete_rx_gsi_packet(p_hwfn,
455 p_ll2_info->my_id,
456 p_pkt->cookie,
457 p_pkt->rx_buf_addr,
458 packet_length,
459 p_cqe->rx_cqe_gsi.data_length_error,
460 parse_flags,
461 vlan,
462 src_mac_addrhi,
463 src_mac_addrlo, b_last_cqe);
464 spin_lock_irqsave(&p_rx->lock, lock_flags);
465
466 return 0;
467}
468
Mintz, Yuval68be9102017-06-09 17:13:19 +0300469static void qed_ll2_rxq_parse_reg(struct qed_hwfn *p_hwfn,
470 union core_rx_cqe_union *p_cqe,
471 struct qed_ll2_comp_rx_data *data)
472{
473 data->parse_flags = le16_to_cpu(p_cqe->rx_cqe_fp.parse_flags.flags);
474 data->length.packet_length =
475 le16_to_cpu(p_cqe->rx_cqe_fp.packet_length);
476 data->vlan = le16_to_cpu(p_cqe->rx_cqe_fp.vlan);
477 data->opaque_data_0 = le32_to_cpu(p_cqe->rx_cqe_fp.opaque_data.data[0]);
478 data->opaque_data_1 = le32_to_cpu(p_cqe->rx_cqe_fp.opaque_data.data[1]);
479 data->u.placement_offset = p_cqe->rx_cqe_fp.placement_offset;
480}
481
482static int
483qed_ll2_rxq_handle_completion(struct qed_hwfn *p_hwfn,
484 struct qed_ll2_info *p_ll2_conn,
485 union core_rx_cqe_union *p_cqe,
486 unsigned long *p_lock_flags, bool b_last_cqe)
Yuval Mintz0a7fb112016-10-01 21:59:55 +0300487{
488 struct qed_ll2_rx_queue *p_rx = &p_ll2_conn->rx_queue;
489 struct qed_ll2_rx_packet *p_pkt = NULL;
Mintz, Yuval68be9102017-06-09 17:13:19 +0300490 struct qed_ll2_comp_rx_data data;
Yuval Mintz0a7fb112016-10-01 21:59:55 +0300491
492 if (!list_empty(&p_rx->active_descq))
493 p_pkt = list_first_entry(&p_rx->active_descq,
494 struct qed_ll2_rx_packet, list_entry);
495 if (!p_pkt) {
496 DP_NOTICE(p_hwfn,
Mintz, Yuval68be9102017-06-09 17:13:19 +0300497 "[%d] LL2 Rx completion but active_descq is empty\n",
Mintz, Yuval13c54772017-06-09 17:13:20 +0300498 p_ll2_conn->input.conn_type);
Mintz, Yuval68be9102017-06-09 17:13:19 +0300499
Yuval Mintz0a7fb112016-10-01 21:59:55 +0300500 return -EIO;
501 }
502 list_del(&p_pkt->list_entry);
503
Mintz, Yuval68be9102017-06-09 17:13:19 +0300504 qed_ll2_rxq_parse_reg(p_hwfn, p_cqe, &data);
Yuval Mintz0a7fb112016-10-01 21:59:55 +0300505 if (qed_chain_consume(&p_rx->rxq_chain) != p_pkt->rxq_bd)
506 DP_NOTICE(p_hwfn,
507 "Mismatch between active_descq and the LL2 Rx chain\n");
Mintz, Yuval68be9102017-06-09 17:13:19 +0300508
Yuval Mintz0a7fb112016-10-01 21:59:55 +0300509 list_add_tail(&p_pkt->list_entry, &p_rx->free_descq);
510
Mintz, Yuval68be9102017-06-09 17:13:19 +0300511 data.connection_handle = p_ll2_conn->my_id;
512 data.cookie = p_pkt->cookie;
513 data.rx_buf_addr = p_pkt->rx_buf_addr;
514 data.b_last_packet = b_last_cqe;
515
Ram Amrani1df2ade2017-03-14 15:26:02 +0200516 spin_unlock_irqrestore(&p_rx->lock, *p_lock_flags);
Mintz, Yuval68be9102017-06-09 17:13:19 +0300517 qed_ll2b_complete_rx_packet(p_hwfn, &data);
Ram Amrani1df2ade2017-03-14 15:26:02 +0200518 spin_lock_irqsave(&p_rx->lock, *p_lock_flags);
Yuval Mintz0a7fb112016-10-01 21:59:55 +0300519
520 return 0;
521}
522
523static int qed_ll2_rxq_completion(struct qed_hwfn *p_hwfn, void *cookie)
524{
Mintz, Yuval13c54772017-06-09 17:13:20 +0300525 struct qed_ll2_info *p_ll2_conn = (struct qed_ll2_info *)cookie;
Yuval Mintz0a7fb112016-10-01 21:59:55 +0300526 struct qed_ll2_rx_queue *p_rx = &p_ll2_conn->rx_queue;
527 union core_rx_cqe_union *cqe = NULL;
528 u16 cq_new_idx = 0, cq_old_idx = 0;
529 unsigned long flags = 0;
530 int rc = 0;
531
532 spin_lock_irqsave(&p_rx->lock, flags);
533 cq_new_idx = le16_to_cpu(*p_rx->p_fw_cons);
534 cq_old_idx = qed_chain_get_cons_idx(&p_rx->rcq_chain);
535
536 while (cq_new_idx != cq_old_idx) {
537 bool b_last_cqe = (cq_new_idx == cq_old_idx);
538
Mintz, Yuval13c54772017-06-09 17:13:20 +0300539 cqe =
540 (union core_rx_cqe_union *)
541 qed_chain_consume(&p_rx->rcq_chain);
Yuval Mintz0a7fb112016-10-01 21:59:55 +0300542 cq_old_idx = qed_chain_get_cons_idx(&p_rx->rcq_chain);
543
544 DP_VERBOSE(p_hwfn,
545 QED_MSG_LL2,
546 "LL2 [sw. cons %04x, fw. at %04x] - Got Packet of type %02x\n",
547 cq_old_idx, cq_new_idx, cqe->rx_cqe_sp.type);
548
549 switch (cqe->rx_cqe_sp.type) {
550 case CORE_RX_CQE_TYPE_SLOW_PATH:
551 DP_NOTICE(p_hwfn, "LL2 - unexpected Rx CQE slowpath\n");
552 rc = -EINVAL;
553 break;
Ram Amraniabd49672016-10-01 22:00:01 +0300554 case CORE_RX_CQE_TYPE_GSI_OFFLOAD:
555 rc = qed_ll2_rxq_completion_gsi(p_hwfn, p_ll2_conn,
556 cqe, flags, b_last_cqe);
557 break;
Yuval Mintz0a7fb112016-10-01 21:59:55 +0300558 case CORE_RX_CQE_TYPE_REGULAR:
Mintz, Yuval68be9102017-06-09 17:13:19 +0300559 rc = qed_ll2_rxq_handle_completion(p_hwfn, p_ll2_conn,
560 cqe, &flags,
561 b_last_cqe);
Yuval Mintz0a7fb112016-10-01 21:59:55 +0300562 break;
563 default:
564 rc = -EIO;
565 }
566 }
567
568 spin_unlock_irqrestore(&p_rx->lock, flags);
569 return rc;
570}
571
Yuval Mintz8c93bea2016-10-13 22:57:03 +0300572static void qed_ll2_rxq_flush(struct qed_hwfn *p_hwfn, u8 connection_handle)
Yuval Mintz0a7fb112016-10-01 21:59:55 +0300573{
574 struct qed_ll2_info *p_ll2_conn = NULL;
575 struct qed_ll2_rx_packet *p_pkt = NULL;
576 struct qed_ll2_rx_queue *p_rx;
577
578 p_ll2_conn = qed_ll2_handle_sanity_inactive(p_hwfn, connection_handle);
579 if (!p_ll2_conn)
580 return;
581
582 p_rx = &p_ll2_conn->rx_queue;
583
584 while (!list_empty(&p_rx->active_descq)) {
585 dma_addr_t rx_buf_addr;
586 void *cookie;
587 bool b_last;
588
589 p_pkt = list_first_entry(&p_rx->active_descq,
590 struct qed_ll2_rx_packet, list_entry);
591 if (!p_pkt)
592 break;
593
Wei Yongjunb4f0fd42016-10-17 15:17:51 +0000594 list_move_tail(&p_pkt->list_entry, &p_rx->free_descq);
Yuval Mintz0a7fb112016-10-01 21:59:55 +0300595
Mintz, Yuval13c54772017-06-09 17:13:20 +0300596 if (p_ll2_conn->input.conn_type == QED_LL2_TYPE_ISCSI_OOO) {
Yuval Mintz1d6cff42016-12-01 00:21:07 -0800597 struct qed_ooo_buffer *p_buffer;
Yuval Mintz0a7fb112016-10-01 21:59:55 +0300598
Yuval Mintz1d6cff42016-12-01 00:21:07 -0800599 p_buffer = (struct qed_ooo_buffer *)p_pkt->cookie;
600 qed_ooo_put_free_buffer(p_hwfn, p_hwfn->p_ooo_info,
601 p_buffer);
602 } else {
603 rx_buf_addr = p_pkt->rx_buf_addr;
604 cookie = p_pkt->cookie;
605
606 b_last = list_empty(&p_rx->active_descq);
607 }
Yuval Mintz0a7fb112016-10-01 21:59:55 +0300608 }
609}
610
Yuval Mintz1d6cff42016-12-01 00:21:07 -0800611static u8 qed_ll2_convert_rx_parse_to_tx_flags(u16 parse_flags)
612{
613 u8 bd_flags = 0;
614
615 if (GET_FIELD(parse_flags, PARSING_AND_ERR_FLAGS_TAG8021QEXIST))
Mintz, Yuvalbe086e72017-03-11 18:39:18 +0200616 SET_FIELD(bd_flags, CORE_TX_BD_DATA_VLAN_INSERTION, 1);
Yuval Mintz1d6cff42016-12-01 00:21:07 -0800617
618 return bd_flags;
619}
620
621static int qed_ll2_lb_rxq_handler(struct qed_hwfn *p_hwfn,
622 struct qed_ll2_info *p_ll2_conn)
623{
624 struct qed_ll2_rx_queue *p_rx = &p_ll2_conn->rx_queue;
625 u16 packet_length = 0, parse_flags = 0, vlan = 0;
626 struct qed_ll2_rx_packet *p_pkt = NULL;
627 u32 num_ooo_add_to_peninsula = 0, cid;
628 union core_rx_cqe_union *cqe = NULL;
629 u16 cq_new_idx = 0, cq_old_idx = 0;
630 struct qed_ooo_buffer *p_buffer;
631 struct ooo_opaque *iscsi_ooo;
632 u8 placement_offset = 0;
633 u8 cqe_type;
634
635 cq_new_idx = le16_to_cpu(*p_rx->p_fw_cons);
636 cq_old_idx = qed_chain_get_cons_idx(&p_rx->rcq_chain);
637 if (cq_new_idx == cq_old_idx)
638 return 0;
639
640 while (cq_new_idx != cq_old_idx) {
641 struct core_rx_fast_path_cqe *p_cqe_fp;
642
643 cqe = qed_chain_consume(&p_rx->rcq_chain);
644 cq_old_idx = qed_chain_get_cons_idx(&p_rx->rcq_chain);
645 cqe_type = cqe->rx_cqe_sp.type;
646
647 if (cqe_type != CORE_RX_CQE_TYPE_REGULAR) {
648 DP_NOTICE(p_hwfn,
649 "Got a non-regular LB LL2 completion [type 0x%02x]\n",
650 cqe_type);
651 return -EINVAL;
652 }
653 p_cqe_fp = &cqe->rx_cqe_fp;
654
655 placement_offset = p_cqe_fp->placement_offset;
656 parse_flags = le16_to_cpu(p_cqe_fp->parse_flags.flags);
657 packet_length = le16_to_cpu(p_cqe_fp->packet_length);
658 vlan = le16_to_cpu(p_cqe_fp->vlan);
659 iscsi_ooo = (struct ooo_opaque *)&p_cqe_fp->opaque_data;
660 qed_ooo_save_history_entry(p_hwfn, p_hwfn->p_ooo_info,
661 iscsi_ooo);
662 cid = le32_to_cpu(iscsi_ooo->cid);
663
664 /* Process delete isle first */
665 if (iscsi_ooo->drop_size)
666 qed_ooo_delete_isles(p_hwfn, p_hwfn->p_ooo_info, cid,
667 iscsi_ooo->drop_isle,
668 iscsi_ooo->drop_size);
669
670 if (iscsi_ooo->ooo_opcode == TCP_EVENT_NOP)
671 continue;
672
673 /* Now process create/add/join isles */
674 if (list_empty(&p_rx->active_descq)) {
675 DP_NOTICE(p_hwfn,
676 "LL2 OOO RX chain has no submitted buffers\n"
677 );
678 return -EIO;
679 }
680
681 p_pkt = list_first_entry(&p_rx->active_descq,
682 struct qed_ll2_rx_packet, list_entry);
683
684 if ((iscsi_ooo->ooo_opcode == TCP_EVENT_ADD_NEW_ISLE) ||
685 (iscsi_ooo->ooo_opcode == TCP_EVENT_ADD_ISLE_RIGHT) ||
686 (iscsi_ooo->ooo_opcode == TCP_EVENT_ADD_ISLE_LEFT) ||
687 (iscsi_ooo->ooo_opcode == TCP_EVENT_ADD_PEN) ||
688 (iscsi_ooo->ooo_opcode == TCP_EVENT_JOIN)) {
689 if (!p_pkt) {
690 DP_NOTICE(p_hwfn,
691 "LL2 OOO RX packet is not valid\n");
692 return -EIO;
693 }
694 list_del(&p_pkt->list_entry);
695 p_buffer = (struct qed_ooo_buffer *)p_pkt->cookie;
696 p_buffer->packet_length = packet_length;
697 p_buffer->parse_flags = parse_flags;
698 p_buffer->vlan = vlan;
699 p_buffer->placement_offset = placement_offset;
700 qed_chain_consume(&p_rx->rxq_chain);
701 list_add_tail(&p_pkt->list_entry, &p_rx->free_descq);
702
703 switch (iscsi_ooo->ooo_opcode) {
704 case TCP_EVENT_ADD_NEW_ISLE:
705 qed_ooo_add_new_isle(p_hwfn,
706 p_hwfn->p_ooo_info,
707 cid,
708 iscsi_ooo->ooo_isle,
709 p_buffer);
710 break;
711 case TCP_EVENT_ADD_ISLE_RIGHT:
712 qed_ooo_add_new_buffer(p_hwfn,
713 p_hwfn->p_ooo_info,
714 cid,
715 iscsi_ooo->ooo_isle,
716 p_buffer,
717 QED_OOO_RIGHT_BUF);
718 break;
719 case TCP_EVENT_ADD_ISLE_LEFT:
720 qed_ooo_add_new_buffer(p_hwfn,
721 p_hwfn->p_ooo_info,
722 cid,
723 iscsi_ooo->ooo_isle,
724 p_buffer,
725 QED_OOO_LEFT_BUF);
726 break;
727 case TCP_EVENT_JOIN:
728 qed_ooo_add_new_buffer(p_hwfn,
729 p_hwfn->p_ooo_info,
730 cid,
731 iscsi_ooo->ooo_isle +
732 1,
733 p_buffer,
734 QED_OOO_LEFT_BUF);
735 qed_ooo_join_isles(p_hwfn,
736 p_hwfn->p_ooo_info,
737 cid, iscsi_ooo->ooo_isle);
738 break;
739 case TCP_EVENT_ADD_PEN:
740 num_ooo_add_to_peninsula++;
741 qed_ooo_put_ready_buffer(p_hwfn,
742 p_hwfn->p_ooo_info,
743 p_buffer, true);
744 break;
745 }
746 } else {
747 DP_NOTICE(p_hwfn,
748 "Unexpected event (%d) TX OOO completion\n",
749 iscsi_ooo->ooo_opcode);
750 }
751 }
752
753 return 0;
754}
755
756static void
757qed_ooo_submit_tx_buffers(struct qed_hwfn *p_hwfn,
758 struct qed_ll2_info *p_ll2_conn)
759{
Mintz, Yuval7c7973b2017-06-09 17:13:18 +0300760 struct qed_ll2_tx_pkt_info tx_pkt;
Yuval Mintz1d6cff42016-12-01 00:21:07 -0800761 struct qed_ooo_buffer *p_buffer;
Yuval Mintz1d6cff42016-12-01 00:21:07 -0800762 u16 l4_hdr_offset_w;
763 dma_addr_t first_frag;
764 u16 parse_flags;
765 u8 bd_flags;
Mintz, Yuval7c7973b2017-06-09 17:13:18 +0300766 int rc;
Yuval Mintz1d6cff42016-12-01 00:21:07 -0800767
768 /* Submit Tx buffers here */
769 while ((p_buffer = qed_ooo_get_ready_buffer(p_hwfn,
770 p_hwfn->p_ooo_info))) {
771 l4_hdr_offset_w = 0;
772 bd_flags = 0;
773
774 first_frag = p_buffer->rx_buffer_phys_addr +
775 p_buffer->placement_offset;
776 parse_flags = p_buffer->parse_flags;
777 bd_flags = qed_ll2_convert_rx_parse_to_tx_flags(parse_flags);
Mintz, Yuvalbe086e72017-03-11 18:39:18 +0200778 SET_FIELD(bd_flags, CORE_TX_BD_DATA_FORCE_VLAN_MODE, 1);
779 SET_FIELD(bd_flags, CORE_TX_BD_DATA_L4_PROTOCOL, 1);
Yuval Mintz1d6cff42016-12-01 00:21:07 -0800780
Mintz, Yuval7c7973b2017-06-09 17:13:18 +0300781 memset(&tx_pkt, 0, sizeof(tx_pkt));
782 tx_pkt.num_of_bds = 1;
783 tx_pkt.vlan = p_buffer->vlan;
784 tx_pkt.bd_flags = bd_flags;
785 tx_pkt.l4_hdr_offset_w = l4_hdr_offset_w;
Mintz, Yuval13c54772017-06-09 17:13:20 +0300786 tx_pkt.tx_dest = p_ll2_conn->tx_dest;
Mintz, Yuval7c7973b2017-06-09 17:13:18 +0300787 tx_pkt.first_frag = first_frag;
788 tx_pkt.first_frag_len = p_buffer->packet_length;
789 tx_pkt.cookie = p_buffer;
790
791 rc = qed_ll2_prepare_tx_packet(p_hwfn, p_ll2_conn->my_id,
792 &tx_pkt, true);
Yuval Mintz1d6cff42016-12-01 00:21:07 -0800793 if (rc) {
794 qed_ooo_put_ready_buffer(p_hwfn, p_hwfn->p_ooo_info,
795 p_buffer, false);
796 break;
797 }
798 }
799}
800
801static void
802qed_ooo_submit_rx_buffers(struct qed_hwfn *p_hwfn,
803 struct qed_ll2_info *p_ll2_conn)
804{
805 struct qed_ooo_buffer *p_buffer;
806 int rc;
807
808 while ((p_buffer = qed_ooo_get_free_buffer(p_hwfn,
809 p_hwfn->p_ooo_info))) {
810 rc = qed_ll2_post_rx_buffer(p_hwfn,
811 p_ll2_conn->my_id,
812 p_buffer->rx_buffer_phys_addr,
813 0, p_buffer, true);
814 if (rc) {
815 qed_ooo_put_free_buffer(p_hwfn,
816 p_hwfn->p_ooo_info, p_buffer);
817 break;
818 }
819 }
820}
821
822static int qed_ll2_lb_rxq_completion(struct qed_hwfn *p_hwfn, void *p_cookie)
823{
824 struct qed_ll2_info *p_ll2_conn = (struct qed_ll2_info *)p_cookie;
825 int rc;
826
827 rc = qed_ll2_lb_rxq_handler(p_hwfn, p_ll2_conn);
828 if (rc)
829 return rc;
830
831 qed_ooo_submit_rx_buffers(p_hwfn, p_ll2_conn);
832 qed_ooo_submit_tx_buffers(p_hwfn, p_ll2_conn);
833
834 return 0;
835}
836
837static int qed_ll2_lb_txq_completion(struct qed_hwfn *p_hwfn, void *p_cookie)
838{
839 struct qed_ll2_info *p_ll2_conn = (struct qed_ll2_info *)p_cookie;
840 struct qed_ll2_tx_queue *p_tx = &p_ll2_conn->tx_queue;
841 struct qed_ll2_tx_packet *p_pkt = NULL;
842 struct qed_ooo_buffer *p_buffer;
843 bool b_dont_submit_rx = false;
844 u16 new_idx = 0, num_bds = 0;
845 int rc;
846
847 new_idx = le16_to_cpu(*p_tx->p_fw_cons);
848 num_bds = ((s16)new_idx - (s16)p_tx->bds_idx);
849
850 if (!num_bds)
851 return 0;
852
853 while (num_bds) {
854 if (list_empty(&p_tx->active_descq))
855 return -EINVAL;
856
857 p_pkt = list_first_entry(&p_tx->active_descq,
858 struct qed_ll2_tx_packet, list_entry);
859 if (!p_pkt)
860 return -EINVAL;
861
862 if (p_pkt->bd_used != 1) {
863 DP_NOTICE(p_hwfn,
864 "Unexpectedly many BDs(%d) in TX OOO completion\n",
865 p_pkt->bd_used);
866 return -EINVAL;
867 }
868
869 list_del(&p_pkt->list_entry);
870
871 num_bds--;
872 p_tx->bds_idx++;
873 qed_chain_consume(&p_tx->txq_chain);
874
875 p_buffer = (struct qed_ooo_buffer *)p_pkt->cookie;
876 list_add_tail(&p_pkt->list_entry, &p_tx->free_descq);
877
878 if (b_dont_submit_rx) {
879 qed_ooo_put_free_buffer(p_hwfn, p_hwfn->p_ooo_info,
880 p_buffer);
881 continue;
882 }
883
884 rc = qed_ll2_post_rx_buffer(p_hwfn, p_ll2_conn->my_id,
885 p_buffer->rx_buffer_phys_addr, 0,
886 p_buffer, true);
887 if (rc != 0) {
888 qed_ooo_put_free_buffer(p_hwfn,
889 p_hwfn->p_ooo_info, p_buffer);
890 b_dont_submit_rx = true;
891 }
892 }
893
894 qed_ooo_submit_tx_buffers(p_hwfn, p_ll2_conn);
895
896 return 0;
897}
898
Yuval Mintz1d6cff42016-12-01 00:21:07 -0800899static void qed_ll2_stop_ooo(struct qed_dev *cdev)
900{
901 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
902 u8 *handle = &hwfn->pf_params.iscsi_pf_params.ll2_ooo_queue_id;
903
904 DP_VERBOSE(cdev, QED_MSG_STORAGE, "Stopping LL2 OOO queue [%02x]\n",
905 *handle);
906
907 qed_ll2_terminate_connection(hwfn, *handle);
908 qed_ll2_release_connection(hwfn, *handle);
909 *handle = QED_LL2_UNUSED_HANDLE;
910}
911
Yuval Mintz0a7fb112016-10-01 21:59:55 +0300912static int qed_sp_ll2_rx_queue_start(struct qed_hwfn *p_hwfn,
913 struct qed_ll2_info *p_ll2_conn,
914 u8 action_on_error)
915{
Mintz, Yuval13c54772017-06-09 17:13:20 +0300916 enum qed_ll2_conn_type conn_type = p_ll2_conn->input.conn_type;
Yuval Mintz0a7fb112016-10-01 21:59:55 +0300917 struct qed_ll2_rx_queue *p_rx = &p_ll2_conn->rx_queue;
918 struct core_rx_start_ramrod_data *p_ramrod = NULL;
919 struct qed_spq_entry *p_ent = NULL;
920 struct qed_sp_init_data init_data;
921 u16 cqe_pbl_size;
922 int rc = 0;
923
924 /* Get SPQ entry */
925 memset(&init_data, 0, sizeof(init_data));
926 init_data.cid = p_ll2_conn->cid;
927 init_data.opaque_fid = p_hwfn->hw_info.opaque_fid;
928 init_data.comp_mode = QED_SPQ_MODE_EBLOCK;
929
930 rc = qed_sp_init_request(p_hwfn, &p_ent,
931 CORE_RAMROD_RX_QUEUE_START,
932 PROTOCOLID_CORE, &init_data);
933 if (rc)
934 return rc;
935
936 p_ramrod = &p_ent->ramrod.core_rx_queue_start;
937
938 p_ramrod->sb_id = cpu_to_le16(qed_int_get_sp_sb_id(p_hwfn));
939 p_ramrod->sb_index = p_rx->rx_sb_index;
940 p_ramrod->complete_event_flg = 1;
941
Mintz, Yuval13c54772017-06-09 17:13:20 +0300942 p_ramrod->mtu = cpu_to_le16(p_ll2_conn->input.mtu);
943 DMA_REGPAIR_LE(p_ramrod->bd_base, p_rx->rxq_chain.p_phys_addr);
Yuval Mintz0a7fb112016-10-01 21:59:55 +0300944 cqe_pbl_size = (u16)qed_chain_get_page_cnt(&p_rx->rcq_chain);
945 p_ramrod->num_of_pbl_pages = cpu_to_le16(cqe_pbl_size);
946 DMA_REGPAIR_LE(p_ramrod->cqe_pbl_addr,
947 qed_chain_get_pbl_phys(&p_rx->rcq_chain));
948
Mintz, Yuval13c54772017-06-09 17:13:20 +0300949 p_ramrod->drop_ttl0_flg = p_ll2_conn->input.rx_drop_ttl0_flg;
950 p_ramrod->inner_vlan_removal_en = p_ll2_conn->input.rx_vlan_removal_en;
Yuval Mintz0a7fb112016-10-01 21:59:55 +0300951 p_ramrod->queue_id = p_ll2_conn->queue_id;
Yuval Mintz1d6cff42016-12-01 00:21:07 -0800952 p_ramrod->main_func_queue = (conn_type == QED_LL2_TYPE_ISCSI_OOO) ? 0
953 : 1;
Yuval Mintz0a7fb112016-10-01 21:59:55 +0300954
955 if ((IS_MF_DEFAULT(p_hwfn) || IS_MF_SI(p_hwfn)) &&
956 p_ramrod->main_func_queue && (conn_type != QED_LL2_TYPE_ROCE)) {
957 p_ramrod->mf_si_bcast_accept_all = 1;
958 p_ramrod->mf_si_mcast_accept_all = 1;
959 } else {
960 p_ramrod->mf_si_bcast_accept_all = 0;
961 p_ramrod->mf_si_mcast_accept_all = 0;
962 }
963
964 p_ramrod->action_on_error.error_type = action_on_error;
Mintz, Yuval13c54772017-06-09 17:13:20 +0300965 p_ramrod->gsi_offload_flag = p_ll2_conn->input.gsi_enable;
Yuval Mintz0a7fb112016-10-01 21:59:55 +0300966 return qed_spq_post(p_hwfn, p_ent, NULL);
967}
968
969static int qed_sp_ll2_tx_queue_start(struct qed_hwfn *p_hwfn,
970 struct qed_ll2_info *p_ll2_conn)
971{
Mintz, Yuval13c54772017-06-09 17:13:20 +0300972 enum qed_ll2_conn_type conn_type = p_ll2_conn->input.conn_type;
Yuval Mintz0a7fb112016-10-01 21:59:55 +0300973 struct qed_ll2_tx_queue *p_tx = &p_ll2_conn->tx_queue;
974 struct core_tx_start_ramrod_data *p_ramrod = NULL;
975 struct qed_spq_entry *p_ent = NULL;
976 struct qed_sp_init_data init_data;
Yuval Mintz0a7fb112016-10-01 21:59:55 +0300977 u16 pq_id = 0, pbl_size;
978 int rc = -EINVAL;
979
980 if (!QED_LL2_TX_REGISTERED(p_ll2_conn))
981 return 0;
982
Mintz, Yuval13c54772017-06-09 17:13:20 +0300983 if (p_ll2_conn->input.conn_type == QED_LL2_TYPE_ISCSI_OOO)
Yuval Mintz1d6cff42016-12-01 00:21:07 -0800984 p_ll2_conn->tx_stats_en = 0;
985 else
986 p_ll2_conn->tx_stats_en = 1;
987
Yuval Mintz0a7fb112016-10-01 21:59:55 +0300988 /* Get SPQ entry */
989 memset(&init_data, 0, sizeof(init_data));
990 init_data.cid = p_ll2_conn->cid;
991 init_data.opaque_fid = p_hwfn->hw_info.opaque_fid;
992 init_data.comp_mode = QED_SPQ_MODE_EBLOCK;
993
994 rc = qed_sp_init_request(p_hwfn, &p_ent,
995 CORE_RAMROD_TX_QUEUE_START,
996 PROTOCOLID_CORE, &init_data);
997 if (rc)
998 return rc;
999
1000 p_ramrod = &p_ent->ramrod.core_tx_queue_start;
1001
1002 p_ramrod->sb_id = cpu_to_le16(qed_int_get_sp_sb_id(p_hwfn));
1003 p_ramrod->sb_index = p_tx->tx_sb_index;
Mintz, Yuval13c54772017-06-09 17:13:20 +03001004 p_ramrod->mtu = cpu_to_le16(p_ll2_conn->input.mtu);
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001005 p_ramrod->stats_en = p_ll2_conn->tx_stats_en;
1006 p_ramrod->stats_id = p_ll2_conn->tx_stats_id;
1007
1008 DMA_REGPAIR_LE(p_ramrod->pbl_base_addr,
1009 qed_chain_get_pbl_phys(&p_tx->txq_chain));
1010 pbl_size = qed_chain_get_page_cnt(&p_tx->txq_chain);
1011 p_ramrod->pbl_size = cpu_to_le16(pbl_size);
1012
Mintz, Yuval13c54772017-06-09 17:13:20 +03001013 switch (p_ll2_conn->input.tx_tc) {
Ariel Eliorb5a9ee72017-04-03 12:21:09 +03001014 case LB_TC:
1015 pq_id = qed_get_cm_pq_idx(p_hwfn, PQ_FLAGS_LB);
1016 break;
1017 case OOO_LB_TC:
1018 pq_id = qed_get_cm_pq_idx(p_hwfn, PQ_FLAGS_OOO);
Colin Ian King827d2402017-04-05 13:35:44 +01001019 break;
Ariel Eliorb5a9ee72017-04-03 12:21:09 +03001020 default:
1021 pq_id = qed_get_cm_pq_idx(p_hwfn, PQ_FLAGS_OFLD);
1022 break;
1023 }
1024
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001025 p_ramrod->qm_pq_id = cpu_to_le16(pq_id);
1026
1027 switch (conn_type) {
Arun Easi1e128c82017-02-15 06:28:22 -08001028 case QED_LL2_TYPE_FCOE:
1029 p_ramrod->conn_type = PROTOCOLID_FCOE;
1030 break;
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001031 case QED_LL2_TYPE_ISCSI:
1032 case QED_LL2_TYPE_ISCSI_OOO:
1033 p_ramrod->conn_type = PROTOCOLID_ISCSI;
1034 break;
1035 case QED_LL2_TYPE_ROCE:
1036 p_ramrod->conn_type = PROTOCOLID_ROCE;
1037 break;
1038 default:
1039 p_ramrod->conn_type = PROTOCOLID_ETH;
1040 DP_NOTICE(p_hwfn, "Unknown connection type: %d\n", conn_type);
1041 }
1042
Mintz, Yuval13c54772017-06-09 17:13:20 +03001043 p_ramrod->gsi_offload_flag = p_ll2_conn->input.gsi_enable;
1044
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001045 return qed_spq_post(p_hwfn, p_ent, NULL);
1046}
1047
1048static int qed_sp_ll2_rx_queue_stop(struct qed_hwfn *p_hwfn,
1049 struct qed_ll2_info *p_ll2_conn)
1050{
1051 struct core_rx_stop_ramrod_data *p_ramrod = NULL;
1052 struct qed_spq_entry *p_ent = NULL;
1053 struct qed_sp_init_data init_data;
1054 int rc = -EINVAL;
1055
1056 /* Get SPQ entry */
1057 memset(&init_data, 0, sizeof(init_data));
1058 init_data.cid = p_ll2_conn->cid;
1059 init_data.opaque_fid = p_hwfn->hw_info.opaque_fid;
1060 init_data.comp_mode = QED_SPQ_MODE_EBLOCK;
1061
1062 rc = qed_sp_init_request(p_hwfn, &p_ent,
1063 CORE_RAMROD_RX_QUEUE_STOP,
1064 PROTOCOLID_CORE, &init_data);
1065 if (rc)
1066 return rc;
1067
1068 p_ramrod = &p_ent->ramrod.core_rx_queue_stop;
1069
1070 p_ramrod->complete_event_flg = 1;
1071 p_ramrod->queue_id = p_ll2_conn->queue_id;
1072
1073 return qed_spq_post(p_hwfn, p_ent, NULL);
1074}
1075
1076static int qed_sp_ll2_tx_queue_stop(struct qed_hwfn *p_hwfn,
1077 struct qed_ll2_info *p_ll2_conn)
1078{
1079 struct qed_spq_entry *p_ent = NULL;
1080 struct qed_sp_init_data init_data;
1081 int rc = -EINVAL;
1082
1083 /* Get SPQ entry */
1084 memset(&init_data, 0, sizeof(init_data));
1085 init_data.cid = p_ll2_conn->cid;
1086 init_data.opaque_fid = p_hwfn->hw_info.opaque_fid;
1087 init_data.comp_mode = QED_SPQ_MODE_EBLOCK;
1088
1089 rc = qed_sp_init_request(p_hwfn, &p_ent,
1090 CORE_RAMROD_TX_QUEUE_STOP,
1091 PROTOCOLID_CORE, &init_data);
1092 if (rc)
1093 return rc;
1094
1095 return qed_spq_post(p_hwfn, p_ent, NULL);
1096}
1097
1098static int
1099qed_ll2_acquire_connection_rx(struct qed_hwfn *p_hwfn,
Mintz, Yuval13c54772017-06-09 17:13:20 +03001100 struct qed_ll2_info *p_ll2_info)
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001101{
1102 struct qed_ll2_rx_packet *p_descq;
1103 u32 capacity;
1104 int rc = 0;
1105
Mintz, Yuval13c54772017-06-09 17:13:20 +03001106 if (!p_ll2_info->input.rx_num_desc)
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001107 goto out;
1108
1109 rc = qed_chain_alloc(p_hwfn->cdev,
1110 QED_CHAIN_USE_TO_CONSUME_PRODUCE,
1111 QED_CHAIN_MODE_NEXT_PTR,
1112 QED_CHAIN_CNT_TYPE_U16,
Mintz, Yuval13c54772017-06-09 17:13:20 +03001113 p_ll2_info->input.rx_num_desc,
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001114 sizeof(struct core_rx_bd),
1115 &p_ll2_info->rx_queue.rxq_chain);
1116 if (rc) {
1117 DP_NOTICE(p_hwfn, "Failed to allocate ll2 rxq chain\n");
1118 goto out;
1119 }
1120
1121 capacity = qed_chain_get_capacity(&p_ll2_info->rx_queue.rxq_chain);
1122 p_descq = kcalloc(capacity, sizeof(struct qed_ll2_rx_packet),
1123 GFP_KERNEL);
1124 if (!p_descq) {
1125 rc = -ENOMEM;
1126 DP_NOTICE(p_hwfn, "Failed to allocate ll2 Rx desc\n");
1127 goto out;
1128 }
1129 p_ll2_info->rx_queue.descq_array = p_descq;
1130
1131 rc = qed_chain_alloc(p_hwfn->cdev,
1132 QED_CHAIN_USE_TO_CONSUME_PRODUCE,
1133 QED_CHAIN_MODE_PBL,
1134 QED_CHAIN_CNT_TYPE_U16,
Mintz, Yuval13c54772017-06-09 17:13:20 +03001135 p_ll2_info->input.rx_num_desc,
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001136 sizeof(struct core_rx_fast_path_cqe),
1137 &p_ll2_info->rx_queue.rcq_chain);
1138 if (rc) {
1139 DP_NOTICE(p_hwfn, "Failed to allocate ll2 rcq chain\n");
1140 goto out;
1141 }
1142
1143 DP_VERBOSE(p_hwfn, QED_MSG_LL2,
1144 "Allocated LL2 Rxq [Type %08x] with 0x%08x buffers\n",
Mintz, Yuval13c54772017-06-09 17:13:20 +03001145 p_ll2_info->input.conn_type, p_ll2_info->input.rx_num_desc);
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001146
1147out:
1148 return rc;
1149}
1150
1151static int qed_ll2_acquire_connection_tx(struct qed_hwfn *p_hwfn,
Mintz, Yuval13c54772017-06-09 17:13:20 +03001152 struct qed_ll2_info *p_ll2_info)
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001153{
1154 struct qed_ll2_tx_packet *p_descq;
1155 u32 capacity;
1156 int rc = 0;
1157
Mintz, Yuval13c54772017-06-09 17:13:20 +03001158 if (!p_ll2_info->input.tx_num_desc)
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001159 goto out;
1160
1161 rc = qed_chain_alloc(p_hwfn->cdev,
1162 QED_CHAIN_USE_TO_CONSUME_PRODUCE,
1163 QED_CHAIN_MODE_PBL,
1164 QED_CHAIN_CNT_TYPE_U16,
Mintz, Yuval13c54772017-06-09 17:13:20 +03001165 p_ll2_info->input.tx_num_desc,
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001166 sizeof(struct core_tx_bd),
1167 &p_ll2_info->tx_queue.txq_chain);
1168 if (rc)
1169 goto out;
1170
1171 capacity = qed_chain_get_capacity(&p_ll2_info->tx_queue.txq_chain);
1172 p_descq = kcalloc(capacity, sizeof(struct qed_ll2_tx_packet),
1173 GFP_KERNEL);
1174 if (!p_descq) {
1175 rc = -ENOMEM;
1176 goto out;
1177 }
1178 p_ll2_info->tx_queue.descq_array = p_descq;
1179
1180 DP_VERBOSE(p_hwfn, QED_MSG_LL2,
1181 "Allocated LL2 Txq [Type %08x] with 0x%08x buffers\n",
Mintz, Yuval13c54772017-06-09 17:13:20 +03001182 p_ll2_info->input.conn_type, p_ll2_info->input.tx_num_desc);
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001183
1184out:
1185 if (rc)
1186 DP_NOTICE(p_hwfn,
1187 "Can't allocate memory for Tx LL2 with 0x%08x buffers\n",
Mintz, Yuval13c54772017-06-09 17:13:20 +03001188 p_ll2_info->input.tx_num_desc);
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001189 return rc;
1190}
1191
Mintz, Yuval13c54772017-06-09 17:13:20 +03001192static int
1193qed_ll2_acquire_connection_ooo(struct qed_hwfn *p_hwfn,
1194 struct qed_ll2_info *p_ll2_info, u16 mtu)
1195{
1196 struct qed_ooo_buffer *p_buf = NULL;
1197 void *p_virt;
1198 u16 buf_idx;
1199 int rc = 0;
1200
1201 if (p_ll2_info->input.conn_type != QED_LL2_TYPE_ISCSI_OOO)
1202 return rc;
1203
1204 /* Correct number of requested OOO buffers if needed */
1205 if (!p_ll2_info->input.rx_num_ooo_buffers) {
1206 u16 num_desc = p_ll2_info->input.rx_num_desc;
1207
1208 if (!num_desc)
1209 return -EINVAL;
1210 p_ll2_info->input.rx_num_ooo_buffers = num_desc * 2;
1211 }
1212
1213 for (buf_idx = 0; buf_idx < p_ll2_info->input.rx_num_ooo_buffers;
1214 buf_idx++) {
1215 p_buf = kzalloc(sizeof(*p_buf), GFP_KERNEL);
1216 if (!p_buf) {
1217 rc = -ENOMEM;
1218 goto out;
1219 }
1220
1221 p_buf->rx_buffer_size = mtu + 26 + ETH_CACHE_LINE_SIZE;
1222 p_buf->rx_buffer_size = (p_buf->rx_buffer_size +
1223 ETH_CACHE_LINE_SIZE - 1) &
1224 ~(ETH_CACHE_LINE_SIZE - 1);
1225 p_virt = dma_alloc_coherent(&p_hwfn->cdev->pdev->dev,
1226 p_buf->rx_buffer_size,
1227 &p_buf->rx_buffer_phys_addr,
1228 GFP_KERNEL);
1229 if (!p_virt) {
1230 kfree(p_buf);
1231 rc = -ENOMEM;
1232 goto out;
1233 }
1234
1235 p_buf->rx_buffer_virt_addr = p_virt;
1236 qed_ooo_put_free_buffer(p_hwfn, p_hwfn->p_ooo_info, p_buf);
1237 }
1238
1239 DP_VERBOSE(p_hwfn, QED_MSG_LL2,
1240 "Allocated [%04x] LL2 OOO buffers [each of size 0x%08x]\n",
1241 p_ll2_info->input.rx_num_ooo_buffers, p_buf->rx_buffer_size);
1242
1243out:
1244 return rc;
1245}
1246
1247static enum core_error_handle
1248qed_ll2_get_error_choice(enum qed_ll2_error_handle err)
1249{
1250 switch (err) {
1251 case QED_LL2_DROP_PACKET:
1252 return LL2_DROP_PACKET;
1253 case QED_LL2_DO_NOTHING:
1254 return LL2_DO_NOTHING;
1255 case QED_LL2_ASSERT:
1256 return LL2_ASSERT;
1257 default:
1258 return LL2_DO_NOTHING;
1259 }
1260}
1261
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001262int qed_ll2_acquire_connection(struct qed_hwfn *p_hwfn,
Mintz, Yuval13c54772017-06-09 17:13:20 +03001263 struct qed_ll2_acquire_data *data)
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001264{
1265 qed_int_comp_cb_t comp_rx_cb, comp_tx_cb;
1266 struct qed_ll2_info *p_ll2_info = NULL;
Mintz, Yuval13c54772017-06-09 17:13:20 +03001267 u8 i, *p_tx_max;
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001268 int rc;
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001269
Mintz, Yuval13c54772017-06-09 17:13:20 +03001270 if (!data->p_connection_handle || !p_hwfn->p_ll2_info)
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001271 return -EINVAL;
1272
1273 /* Find a free connection to be used */
1274 for (i = 0; (i < QED_MAX_NUM_OF_LL2_CONNECTIONS); i++) {
1275 mutex_lock(&p_hwfn->p_ll2_info[i].mutex);
1276 if (p_hwfn->p_ll2_info[i].b_active) {
1277 mutex_unlock(&p_hwfn->p_ll2_info[i].mutex);
1278 continue;
1279 }
1280
1281 p_hwfn->p_ll2_info[i].b_active = true;
1282 p_ll2_info = &p_hwfn->p_ll2_info[i];
1283 mutex_unlock(&p_hwfn->p_ll2_info[i].mutex);
1284 break;
1285 }
1286 if (!p_ll2_info)
1287 return -EBUSY;
1288
Mintz, Yuval13c54772017-06-09 17:13:20 +03001289 memcpy(&p_ll2_info->input, &data->input, sizeof(p_ll2_info->input));
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001290
Mintz, Yuval13c54772017-06-09 17:13:20 +03001291 p_ll2_info->tx_dest = (data->input.tx_dest == QED_LL2_TX_DEST_NW) ?
1292 CORE_TX_DEST_NW : CORE_TX_DEST_LB;
1293
1294 /* Correct maximum number of Tx BDs */
1295 p_tx_max = &p_ll2_info->input.tx_max_bds_per_packet;
1296 if (*p_tx_max == 0)
1297 *p_tx_max = CORE_LL2_TX_MAX_BDS_PER_PACKET;
1298 else
1299 *p_tx_max = min_t(u8, *p_tx_max,
1300 CORE_LL2_TX_MAX_BDS_PER_PACKET);
1301 rc = qed_ll2_acquire_connection_rx(p_hwfn, p_ll2_info);
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001302 if (rc)
1303 goto q_allocate_fail;
1304
Mintz, Yuval13c54772017-06-09 17:13:20 +03001305 rc = qed_ll2_acquire_connection_tx(p_hwfn, p_ll2_info);
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001306 if (rc)
1307 goto q_allocate_fail;
1308
Yuval Mintz1d6cff42016-12-01 00:21:07 -08001309 rc = qed_ll2_acquire_connection_ooo(p_hwfn, p_ll2_info,
Mintz, Yuval13c54772017-06-09 17:13:20 +03001310 data->input.mtu);
Yuval Mintz1d6cff42016-12-01 00:21:07 -08001311 if (rc)
1312 goto q_allocate_fail;
1313
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001314 /* Register callbacks for the Rx/Tx queues */
Mintz, Yuval13c54772017-06-09 17:13:20 +03001315 if (data->input.conn_type == QED_LL2_TYPE_ISCSI_OOO) {
Yuval Mintz1d6cff42016-12-01 00:21:07 -08001316 comp_rx_cb = qed_ll2_lb_rxq_completion;
1317 comp_tx_cb = qed_ll2_lb_txq_completion;
1318 } else {
1319 comp_rx_cb = qed_ll2_rxq_completion;
1320 comp_tx_cb = qed_ll2_txq_completion;
1321 }
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001322
Mintz, Yuval13c54772017-06-09 17:13:20 +03001323 if (data->input.rx_num_desc) {
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001324 qed_int_register_cb(p_hwfn, comp_rx_cb,
1325 &p_hwfn->p_ll2_info[i],
1326 &p_ll2_info->rx_queue.rx_sb_index,
1327 &p_ll2_info->rx_queue.p_fw_cons);
1328 p_ll2_info->rx_queue.b_cb_registred = true;
1329 }
1330
Mintz, Yuval13c54772017-06-09 17:13:20 +03001331 if (data->input.tx_num_desc) {
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001332 qed_int_register_cb(p_hwfn,
1333 comp_tx_cb,
1334 &p_hwfn->p_ll2_info[i],
1335 &p_ll2_info->tx_queue.tx_sb_index,
1336 &p_ll2_info->tx_queue.p_fw_cons);
1337 p_ll2_info->tx_queue.b_cb_registred = true;
1338 }
1339
Mintz, Yuval13c54772017-06-09 17:13:20 +03001340 *data->p_connection_handle = i;
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001341 return rc;
1342
1343q_allocate_fail:
1344 qed_ll2_release_connection(p_hwfn, i);
1345 return -ENOMEM;
1346}
1347
1348static int qed_ll2_establish_connection_rx(struct qed_hwfn *p_hwfn,
1349 struct qed_ll2_info *p_ll2_conn)
1350{
Mintz, Yuval13c54772017-06-09 17:13:20 +03001351 enum qed_ll2_error_handle error_input;
1352 enum core_error_handle error_mode;
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001353 u8 action_on_error = 0;
1354
1355 if (!QED_LL2_RX_REGISTERED(p_ll2_conn))
1356 return 0;
1357
1358 DIRECT_REG_WR(p_ll2_conn->rx_queue.set_prod_addr, 0x0);
Mintz, Yuval13c54772017-06-09 17:13:20 +03001359 error_input = p_ll2_conn->input.ai_err_packet_too_big;
1360 error_mode = qed_ll2_get_error_choice(error_input);
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001361 SET_FIELD(action_on_error,
Mintz, Yuval13c54772017-06-09 17:13:20 +03001362 CORE_RX_ACTION_ON_ERROR_PACKET_TOO_BIG, error_mode);
1363 error_input = p_ll2_conn->input.ai_err_no_buf;
1364 error_mode = qed_ll2_get_error_choice(error_input);
1365 SET_FIELD(action_on_error, CORE_RX_ACTION_ON_ERROR_NO_BUFF, error_mode);
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001366
1367 return qed_sp_ll2_rx_queue_start(p_hwfn, p_ll2_conn, action_on_error);
1368}
1369
Mintz, Yuval58de2892017-06-09 17:13:21 +03001370static void
1371qed_ll2_establish_connection_ooo(struct qed_hwfn *p_hwfn,
1372 struct qed_ll2_info *p_ll2_conn)
1373{
1374 if (p_ll2_conn->input.conn_type != QED_LL2_TYPE_ISCSI_OOO)
1375 return;
1376
1377 qed_ooo_release_all_isles(p_hwfn, p_hwfn->p_ooo_info);
1378 qed_ooo_submit_rx_buffers(p_hwfn, p_ll2_conn);
1379}
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001380int qed_ll2_establish_connection(struct qed_hwfn *p_hwfn, u8 connection_handle)
1381{
1382 struct qed_ll2_info *p_ll2_conn;
1383 struct qed_ll2_rx_queue *p_rx;
1384 struct qed_ll2_tx_queue *p_tx;
Rahul Verma15582962017-04-06 15:58:29 +03001385 struct qed_ptt *p_ptt;
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001386 int rc = -EINVAL;
1387 u32 i, capacity;
1388 u8 qid;
1389
Rahul Verma15582962017-04-06 15:58:29 +03001390 p_ptt = qed_ptt_acquire(p_hwfn);
1391 if (!p_ptt)
1392 return -EAGAIN;
1393
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001394 p_ll2_conn = qed_ll2_handle_sanity_lock(p_hwfn, connection_handle);
Rahul Verma15582962017-04-06 15:58:29 +03001395 if (!p_ll2_conn) {
1396 rc = -EINVAL;
1397 goto out;
1398 }
1399
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001400 p_rx = &p_ll2_conn->rx_queue;
1401 p_tx = &p_ll2_conn->tx_queue;
1402
1403 qed_chain_reset(&p_rx->rxq_chain);
1404 qed_chain_reset(&p_rx->rcq_chain);
1405 INIT_LIST_HEAD(&p_rx->active_descq);
1406 INIT_LIST_HEAD(&p_rx->free_descq);
1407 INIT_LIST_HEAD(&p_rx->posting_descq);
1408 spin_lock_init(&p_rx->lock);
1409 capacity = qed_chain_get_capacity(&p_rx->rxq_chain);
1410 for (i = 0; i < capacity; i++)
1411 list_add_tail(&p_rx->descq_array[i].list_entry,
1412 &p_rx->free_descq);
1413 *p_rx->p_fw_cons = 0;
1414
1415 qed_chain_reset(&p_tx->txq_chain);
1416 INIT_LIST_HEAD(&p_tx->active_descq);
1417 INIT_LIST_HEAD(&p_tx->free_descq);
1418 INIT_LIST_HEAD(&p_tx->sending_descq);
1419 spin_lock_init(&p_tx->lock);
1420 capacity = qed_chain_get_capacity(&p_tx->txq_chain);
1421 for (i = 0; i < capacity; i++)
1422 list_add_tail(&p_tx->descq_array[i].list_entry,
1423 &p_tx->free_descq);
1424 p_tx->cur_completing_bd_idx = 0;
1425 p_tx->bds_idx = 0;
1426 p_tx->b_completing_packet = false;
1427 p_tx->cur_send_packet = NULL;
1428 p_tx->cur_send_frag_num = 0;
1429 p_tx->cur_completing_frag_num = 0;
1430 *p_tx->p_fw_cons = 0;
1431
Rahul Verma15582962017-04-06 15:58:29 +03001432 rc = qed_cxt_acquire_cid(p_hwfn, PROTOCOLID_CORE, &p_ll2_conn->cid);
1433 if (rc)
1434 goto out;
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001435
1436 qid = p_hwfn->hw_info.resc_start[QED_LL2_QUEUE] + connection_handle;
1437 p_ll2_conn->queue_id = qid;
1438 p_ll2_conn->tx_stats_id = qid;
1439 p_rx->set_prod_addr = (u8 __iomem *)p_hwfn->regview +
1440 GTT_BAR0_MAP_REG_TSDM_RAM +
1441 TSTORM_LL2_RX_PRODS_OFFSET(qid);
1442 p_tx->doorbell_addr = (u8 __iomem *)p_hwfn->doorbells +
1443 qed_db_addr(p_ll2_conn->cid,
1444 DQ_DEMS_LEGACY);
1445
1446 rc = qed_ll2_establish_connection_rx(p_hwfn, p_ll2_conn);
1447 if (rc)
Rahul Verma15582962017-04-06 15:58:29 +03001448 goto out;
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001449
1450 rc = qed_sp_ll2_tx_queue_start(p_hwfn, p_ll2_conn);
1451 if (rc)
Rahul Verma15582962017-04-06 15:58:29 +03001452 goto out;
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001453
1454 if (p_hwfn->hw_info.personality != QED_PCI_ETH_ROCE)
Rahul Verma15582962017-04-06 15:58:29 +03001455 qed_wr(p_hwfn, p_ptt, PRS_REG_USE_LIGHT_L2, 1);
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001456
Yuval Mintz1d6cff42016-12-01 00:21:07 -08001457 qed_ll2_establish_connection_ooo(p_hwfn, p_ll2_conn);
1458
Mintz, Yuval13c54772017-06-09 17:13:20 +03001459 if (p_ll2_conn->input.conn_type == QED_LL2_TYPE_FCOE) {
Rahul Verma15582962017-04-06 15:58:29 +03001460 qed_llh_add_protocol_filter(p_hwfn, p_ptt,
Arun Easi1e128c82017-02-15 06:28:22 -08001461 0x8906, 0,
1462 QED_LLH_FILTER_ETHERTYPE);
Rahul Verma15582962017-04-06 15:58:29 +03001463 qed_llh_add_protocol_filter(p_hwfn, p_ptt,
Arun Easi1e128c82017-02-15 06:28:22 -08001464 0x8914, 0,
1465 QED_LLH_FILTER_ETHERTYPE);
1466 }
1467
Rahul Verma15582962017-04-06 15:58:29 +03001468out:
1469 qed_ptt_release(p_hwfn, p_ptt);
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001470 return rc;
1471}
1472
1473static void qed_ll2_post_rx_buffer_notify_fw(struct qed_hwfn *p_hwfn,
1474 struct qed_ll2_rx_queue *p_rx,
1475 struct qed_ll2_rx_packet *p_curp)
1476{
1477 struct qed_ll2_rx_packet *p_posting_packet = NULL;
1478 struct core_ll2_rx_prod rx_prod = { 0, 0, 0 };
1479 bool b_notify_fw = false;
1480 u16 bd_prod, cq_prod;
1481
1482 /* This handles the flushing of already posted buffers */
1483 while (!list_empty(&p_rx->posting_descq)) {
1484 p_posting_packet = list_first_entry(&p_rx->posting_descq,
1485 struct qed_ll2_rx_packet,
1486 list_entry);
Wei Yongjunb4f0fd42016-10-17 15:17:51 +00001487 list_move_tail(&p_posting_packet->list_entry,
1488 &p_rx->active_descq);
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001489 b_notify_fw = true;
1490 }
1491
1492 /* This handles the supplied packet [if there is one] */
1493 if (p_curp) {
1494 list_add_tail(&p_curp->list_entry, &p_rx->active_descq);
1495 b_notify_fw = true;
1496 }
1497
1498 if (!b_notify_fw)
1499 return;
1500
1501 bd_prod = qed_chain_get_prod_idx(&p_rx->rxq_chain);
1502 cq_prod = qed_chain_get_prod_idx(&p_rx->rcq_chain);
1503 rx_prod.bd_prod = cpu_to_le16(bd_prod);
1504 rx_prod.cqe_prod = cpu_to_le16(cq_prod);
1505 DIRECT_REG_WR(p_rx->set_prod_addr, *((u32 *)&rx_prod));
1506}
1507
1508int qed_ll2_post_rx_buffer(struct qed_hwfn *p_hwfn,
1509 u8 connection_handle,
1510 dma_addr_t addr,
1511 u16 buf_len, void *cookie, u8 notify_fw)
1512{
1513 struct core_rx_bd_with_buff_len *p_curb = NULL;
1514 struct qed_ll2_rx_packet *p_curp = NULL;
1515 struct qed_ll2_info *p_ll2_conn;
1516 struct qed_ll2_rx_queue *p_rx;
1517 unsigned long flags;
1518 void *p_data;
1519 int rc = 0;
1520
1521 p_ll2_conn = qed_ll2_handle_sanity(p_hwfn, connection_handle);
1522 if (!p_ll2_conn)
1523 return -EINVAL;
1524 p_rx = &p_ll2_conn->rx_queue;
1525
1526 spin_lock_irqsave(&p_rx->lock, flags);
1527 if (!list_empty(&p_rx->free_descq))
1528 p_curp = list_first_entry(&p_rx->free_descq,
1529 struct qed_ll2_rx_packet, list_entry);
1530 if (p_curp) {
1531 if (qed_chain_get_elem_left(&p_rx->rxq_chain) &&
1532 qed_chain_get_elem_left(&p_rx->rcq_chain)) {
1533 p_data = qed_chain_produce(&p_rx->rxq_chain);
1534 p_curb = (struct core_rx_bd_with_buff_len *)p_data;
1535 qed_chain_produce(&p_rx->rcq_chain);
1536 }
1537 }
1538
1539 /* If we're lacking entires, let's try to flush buffers to FW */
1540 if (!p_curp || !p_curb) {
1541 rc = -EBUSY;
1542 p_curp = NULL;
1543 goto out_notify;
1544 }
1545
1546 /* We have an Rx packet we can fill */
1547 DMA_REGPAIR_LE(p_curb->addr, addr);
1548 p_curb->buff_length = cpu_to_le16(buf_len);
1549 p_curp->rx_buf_addr = addr;
1550 p_curp->cookie = cookie;
1551 p_curp->rxq_bd = p_curb;
1552 p_curp->buf_length = buf_len;
1553 list_del(&p_curp->list_entry);
1554
1555 /* Check if we only want to enqueue this packet without informing FW */
1556 if (!notify_fw) {
1557 list_add_tail(&p_curp->list_entry, &p_rx->posting_descq);
1558 goto out;
1559 }
1560
1561out_notify:
1562 qed_ll2_post_rx_buffer_notify_fw(p_hwfn, p_rx, p_curp);
1563out:
1564 spin_unlock_irqrestore(&p_rx->lock, flags);
1565 return rc;
1566}
1567
1568static void qed_ll2_prepare_tx_packet_set(struct qed_hwfn *p_hwfn,
1569 struct qed_ll2_tx_queue *p_tx,
1570 struct qed_ll2_tx_packet *p_curp,
Mintz, Yuval7c7973b2017-06-09 17:13:18 +03001571 struct qed_ll2_tx_pkt_info *pkt,
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001572 u8 notify_fw)
1573{
1574 list_del(&p_curp->list_entry);
Mintz, Yuval7c7973b2017-06-09 17:13:18 +03001575 p_curp->cookie = pkt->cookie;
1576 p_curp->bd_used = pkt->num_of_bds;
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001577 p_curp->notify_fw = notify_fw;
1578 p_tx->cur_send_packet = p_curp;
1579 p_tx->cur_send_frag_num = 0;
1580
Mintz, Yuval7c7973b2017-06-09 17:13:18 +03001581 p_curp->bds_set[p_tx->cur_send_frag_num].tx_frag = pkt->first_frag;
1582 p_curp->bds_set[p_tx->cur_send_frag_num].frag_len = pkt->first_frag_len;
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001583 p_tx->cur_send_frag_num++;
1584}
1585
Mintz, Yuvalbe086e72017-03-11 18:39:18 +02001586static void
1587qed_ll2_prepare_tx_packet_set_bd(struct qed_hwfn *p_hwfn,
1588 struct qed_ll2_info *p_ll2,
1589 struct qed_ll2_tx_packet *p_curp,
Mintz, Yuval7c7973b2017-06-09 17:13:18 +03001590 struct qed_ll2_tx_pkt_info *pkt)
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001591{
1592 struct qed_chain *p_tx_chain = &p_ll2->tx_queue.txq_chain;
1593 u16 prod_idx = qed_chain_get_prod_idx(p_tx_chain);
1594 struct core_tx_bd *start_bd = NULL;
Mintz, Yuval7c7973b2017-06-09 17:13:18 +03001595 enum core_roce_flavor_type roce_flavor;
1596 enum core_tx_dest tx_dest;
Mintz, Yuvalbe086e72017-03-11 18:39:18 +02001597 u16 bd_data = 0, frag_idx;
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001598
Mintz, Yuval7c7973b2017-06-09 17:13:18 +03001599 roce_flavor = (pkt->qed_roce_flavor == QED_LL2_ROCE) ? CORE_ROCE
1600 : CORE_RROCE;
1601
1602 tx_dest = (pkt->tx_dest == QED_LL2_TX_DEST_NW) ? CORE_TX_DEST_NW
1603 : CORE_TX_DEST_LB;
1604
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001605 start_bd = (struct core_tx_bd *)qed_chain_produce(p_tx_chain);
Mintz, Yuval7c7973b2017-06-09 17:13:18 +03001606 start_bd->nw_vlan_or_lb_echo = cpu_to_le16(pkt->vlan);
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001607 SET_FIELD(start_bd->bitfield1, CORE_TX_BD_L4_HDR_OFFSET_W,
Mintz, Yuval7c7973b2017-06-09 17:13:18 +03001608 cpu_to_le16(pkt->l4_hdr_offset_w));
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001609 SET_FIELD(start_bd->bitfield1, CORE_TX_BD_TX_DST, tx_dest);
Mintz, Yuval7c7973b2017-06-09 17:13:18 +03001610 bd_data |= pkt->bd_flags;
Mintz, Yuvalbe086e72017-03-11 18:39:18 +02001611 SET_FIELD(bd_data, CORE_TX_BD_DATA_START_BD, 0x1);
Mintz, Yuval7c7973b2017-06-09 17:13:18 +03001612 SET_FIELD(bd_data, CORE_TX_BD_DATA_NBDS, pkt->num_of_bds);
Mintz, Yuvalbe086e72017-03-11 18:39:18 +02001613 SET_FIELD(bd_data, CORE_TX_BD_DATA_ROCE_FLAV, roce_flavor);
1614 start_bd->bd_data.as_bitfield = cpu_to_le16(bd_data);
Mintz, Yuval7c7973b2017-06-09 17:13:18 +03001615 DMA_REGPAIR_LE(start_bd->addr, pkt->first_frag);
1616 start_bd->nbytes = cpu_to_le16(pkt->first_frag_len);
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001617
1618 DP_VERBOSE(p_hwfn,
1619 (NETIF_MSG_TX_QUEUED | QED_MSG_LL2),
1620 "LL2 [q 0x%02x cid 0x%08x type 0x%08x] Tx Producer at [0x%04x] - set with a %04x bytes %02x BDs buffer at %08x:%08x\n",
1621 p_ll2->queue_id,
1622 p_ll2->cid,
Mintz, Yuval13c54772017-06-09 17:13:20 +03001623 p_ll2->input.conn_type,
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001624 prod_idx,
Mintz, Yuval7c7973b2017-06-09 17:13:18 +03001625 pkt->first_frag_len,
1626 pkt->num_of_bds,
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001627 le32_to_cpu(start_bd->addr.hi),
1628 le32_to_cpu(start_bd->addr.lo));
1629
Mintz, Yuval7c7973b2017-06-09 17:13:18 +03001630 if (p_ll2->tx_queue.cur_send_frag_num == pkt->num_of_bds)
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001631 return;
1632
1633 /* Need to provide the packet with additional BDs for frags */
1634 for (frag_idx = p_ll2->tx_queue.cur_send_frag_num;
Mintz, Yuval7c7973b2017-06-09 17:13:18 +03001635 frag_idx < pkt->num_of_bds; frag_idx++) {
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001636 struct core_tx_bd **p_bd = &p_curp->bds_set[frag_idx].txq_bd;
1637
1638 *p_bd = (struct core_tx_bd *)qed_chain_produce(p_tx_chain);
Mintz, Yuvalbe086e72017-03-11 18:39:18 +02001639 (*p_bd)->bd_data.as_bitfield = 0;
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001640 (*p_bd)->bitfield1 = 0;
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001641 p_curp->bds_set[frag_idx].tx_frag = 0;
1642 p_curp->bds_set[frag_idx].frag_len = 0;
1643 }
1644}
1645
1646/* This should be called while the Txq spinlock is being held */
1647static void qed_ll2_tx_packet_notify(struct qed_hwfn *p_hwfn,
1648 struct qed_ll2_info *p_ll2_conn)
1649{
1650 bool b_notify = p_ll2_conn->tx_queue.cur_send_packet->notify_fw;
1651 struct qed_ll2_tx_queue *p_tx = &p_ll2_conn->tx_queue;
1652 struct qed_ll2_tx_packet *p_pkt = NULL;
1653 struct core_db_data db_msg = { 0, 0, 0 };
1654 u16 bd_prod;
1655
1656 /* If there are missing BDs, don't do anything now */
1657 if (p_ll2_conn->tx_queue.cur_send_frag_num !=
1658 p_ll2_conn->tx_queue.cur_send_packet->bd_used)
1659 return;
1660
1661 /* Push the current packet to the list and clean after it */
1662 list_add_tail(&p_ll2_conn->tx_queue.cur_send_packet->list_entry,
1663 &p_ll2_conn->tx_queue.sending_descq);
1664 p_ll2_conn->tx_queue.cur_send_packet = NULL;
1665 p_ll2_conn->tx_queue.cur_send_frag_num = 0;
1666
1667 /* Notify FW of packet only if requested to */
1668 if (!b_notify)
1669 return;
1670
1671 bd_prod = qed_chain_get_prod_idx(&p_ll2_conn->tx_queue.txq_chain);
1672
1673 while (!list_empty(&p_tx->sending_descq)) {
1674 p_pkt = list_first_entry(&p_tx->sending_descq,
1675 struct qed_ll2_tx_packet, list_entry);
1676 if (!p_pkt)
1677 break;
1678
Wei Yongjunb4f0fd42016-10-17 15:17:51 +00001679 list_move_tail(&p_pkt->list_entry, &p_tx->active_descq);
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001680 }
1681
1682 SET_FIELD(db_msg.params, CORE_DB_DATA_DEST, DB_DEST_XCM);
1683 SET_FIELD(db_msg.params, CORE_DB_DATA_AGG_CMD, DB_AGG_CMD_SET);
1684 SET_FIELD(db_msg.params, CORE_DB_DATA_AGG_VAL_SEL,
1685 DQ_XCM_CORE_TX_BD_PROD_CMD);
1686 db_msg.agg_flags = DQ_XCM_CORE_DQ_CF_CMD;
1687 db_msg.spq_prod = cpu_to_le16(bd_prod);
1688
1689 /* Make sure the BDs data is updated before ringing the doorbell */
1690 wmb();
1691
1692 DIRECT_REG_WR(p_tx->doorbell_addr, *((u32 *)&db_msg));
1693
1694 DP_VERBOSE(p_hwfn,
1695 (NETIF_MSG_TX_QUEUED | QED_MSG_LL2),
1696 "LL2 [q 0x%02x cid 0x%08x type 0x%08x] Doorbelled [producer 0x%04x]\n",
1697 p_ll2_conn->queue_id,
Mintz, Yuval13c54772017-06-09 17:13:20 +03001698 p_ll2_conn->cid,
1699 p_ll2_conn->input.conn_type, db_msg.spq_prod);
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001700}
1701
1702int qed_ll2_prepare_tx_packet(struct qed_hwfn *p_hwfn,
1703 u8 connection_handle,
Mintz, Yuval7c7973b2017-06-09 17:13:18 +03001704 struct qed_ll2_tx_pkt_info *pkt,
1705 bool notify_fw)
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001706{
1707 struct qed_ll2_tx_packet *p_curp = NULL;
1708 struct qed_ll2_info *p_ll2_conn = NULL;
1709 struct qed_ll2_tx_queue *p_tx;
1710 struct qed_chain *p_tx_chain;
1711 unsigned long flags;
1712 int rc = 0;
1713
1714 p_ll2_conn = qed_ll2_handle_sanity(p_hwfn, connection_handle);
1715 if (!p_ll2_conn)
1716 return -EINVAL;
1717 p_tx = &p_ll2_conn->tx_queue;
1718 p_tx_chain = &p_tx->txq_chain;
1719
Mintz, Yuval7c7973b2017-06-09 17:13:18 +03001720 if (pkt->num_of_bds > CORE_LL2_TX_MAX_BDS_PER_PACKET)
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001721 return -EIO;
1722
1723 spin_lock_irqsave(&p_tx->lock, flags);
1724 if (p_tx->cur_send_packet) {
1725 rc = -EEXIST;
1726 goto out;
1727 }
1728
1729 /* Get entry, but only if we have tx elements for it */
1730 if (!list_empty(&p_tx->free_descq))
1731 p_curp = list_first_entry(&p_tx->free_descq,
1732 struct qed_ll2_tx_packet, list_entry);
Mintz, Yuval7c7973b2017-06-09 17:13:18 +03001733 if (p_curp && qed_chain_get_elem_left(p_tx_chain) < pkt->num_of_bds)
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001734 p_curp = NULL;
1735
1736 if (!p_curp) {
1737 rc = -EBUSY;
1738 goto out;
1739 }
1740
1741 /* Prepare packet and BD, and perhaps send a doorbell to FW */
Mintz, Yuval7c7973b2017-06-09 17:13:18 +03001742 qed_ll2_prepare_tx_packet_set(p_hwfn, p_tx, p_curp, pkt, notify_fw);
1743
1744 qed_ll2_prepare_tx_packet_set_bd(p_hwfn, p_ll2_conn, p_curp, pkt);
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001745
1746 qed_ll2_tx_packet_notify(p_hwfn, p_ll2_conn);
1747
1748out:
1749 spin_unlock_irqrestore(&p_tx->lock, flags);
1750 return rc;
1751}
1752
1753int qed_ll2_set_fragment_of_tx_packet(struct qed_hwfn *p_hwfn,
1754 u8 connection_handle,
1755 dma_addr_t addr, u16 nbytes)
1756{
1757 struct qed_ll2_tx_packet *p_cur_send_packet = NULL;
1758 struct qed_ll2_info *p_ll2_conn = NULL;
1759 u16 cur_send_frag_num = 0;
1760 struct core_tx_bd *p_bd;
1761 unsigned long flags;
1762
1763 p_ll2_conn = qed_ll2_handle_sanity(p_hwfn, connection_handle);
1764 if (!p_ll2_conn)
1765 return -EINVAL;
1766
1767 if (!p_ll2_conn->tx_queue.cur_send_packet)
1768 return -EINVAL;
1769
1770 p_cur_send_packet = p_ll2_conn->tx_queue.cur_send_packet;
1771 cur_send_frag_num = p_ll2_conn->tx_queue.cur_send_frag_num;
1772
1773 if (cur_send_frag_num >= p_cur_send_packet->bd_used)
1774 return -EINVAL;
1775
1776 /* Fill the BD information, and possibly notify FW */
1777 p_bd = p_cur_send_packet->bds_set[cur_send_frag_num].txq_bd;
1778 DMA_REGPAIR_LE(p_bd->addr, addr);
1779 p_bd->nbytes = cpu_to_le16(nbytes);
1780 p_cur_send_packet->bds_set[cur_send_frag_num].tx_frag = addr;
1781 p_cur_send_packet->bds_set[cur_send_frag_num].frag_len = nbytes;
1782
1783 p_ll2_conn->tx_queue.cur_send_frag_num++;
1784
1785 spin_lock_irqsave(&p_ll2_conn->tx_queue.lock, flags);
1786 qed_ll2_tx_packet_notify(p_hwfn, p_ll2_conn);
1787 spin_unlock_irqrestore(&p_ll2_conn->tx_queue.lock, flags);
1788
1789 return 0;
1790}
1791
1792int qed_ll2_terminate_connection(struct qed_hwfn *p_hwfn, u8 connection_handle)
1793{
1794 struct qed_ll2_info *p_ll2_conn = NULL;
1795 int rc = -EINVAL;
Rahul Verma15582962017-04-06 15:58:29 +03001796 struct qed_ptt *p_ptt;
1797
1798 p_ptt = qed_ptt_acquire(p_hwfn);
1799 if (!p_ptt)
1800 return -EAGAIN;
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001801
1802 p_ll2_conn = qed_ll2_handle_sanity_lock(p_hwfn, connection_handle);
Rahul Verma15582962017-04-06 15:58:29 +03001803 if (!p_ll2_conn) {
1804 rc = -EINVAL;
1805 goto out;
1806 }
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001807
1808 /* Stop Tx & Rx of connection, if needed */
1809 if (QED_LL2_TX_REGISTERED(p_ll2_conn)) {
1810 rc = qed_sp_ll2_tx_queue_stop(p_hwfn, p_ll2_conn);
1811 if (rc)
Rahul Verma15582962017-04-06 15:58:29 +03001812 goto out;
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001813 qed_ll2_txq_flush(p_hwfn, connection_handle);
1814 }
1815
1816 if (QED_LL2_RX_REGISTERED(p_ll2_conn)) {
1817 rc = qed_sp_ll2_rx_queue_stop(p_hwfn, p_ll2_conn);
1818 if (rc)
Rahul Verma15582962017-04-06 15:58:29 +03001819 goto out;
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001820 qed_ll2_rxq_flush(p_hwfn, connection_handle);
1821 }
1822
Mintz, Yuval13c54772017-06-09 17:13:20 +03001823 if (p_ll2_conn->input.conn_type == QED_LL2_TYPE_ISCSI_OOO)
Yuval Mintz1d6cff42016-12-01 00:21:07 -08001824 qed_ooo_release_all_isles(p_hwfn, p_hwfn->p_ooo_info);
1825
Mintz, Yuval13c54772017-06-09 17:13:20 +03001826 if (p_ll2_conn->input.conn_type == QED_LL2_TYPE_FCOE) {
Rahul Verma15582962017-04-06 15:58:29 +03001827 qed_llh_remove_protocol_filter(p_hwfn, p_ptt,
Arun Easi1e128c82017-02-15 06:28:22 -08001828 0x8906, 0,
1829 QED_LLH_FILTER_ETHERTYPE);
Rahul Verma15582962017-04-06 15:58:29 +03001830 qed_llh_remove_protocol_filter(p_hwfn, p_ptt,
Arun Easi1e128c82017-02-15 06:28:22 -08001831 0x8914, 0,
1832 QED_LLH_FILTER_ETHERTYPE);
1833 }
1834
Rahul Verma15582962017-04-06 15:58:29 +03001835out:
1836 qed_ptt_release(p_hwfn, p_ptt);
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001837 return rc;
1838}
1839
Mintz, Yuval58de2892017-06-09 17:13:21 +03001840static void qed_ll2_release_connection_ooo(struct qed_hwfn *p_hwfn,
1841 struct qed_ll2_info *p_ll2_conn)
1842{
1843 struct qed_ooo_buffer *p_buffer;
1844
1845 if (p_ll2_conn->input.conn_type != QED_LL2_TYPE_ISCSI_OOO)
1846 return;
1847
1848 qed_ooo_release_all_isles(p_hwfn, p_hwfn->p_ooo_info);
1849 while ((p_buffer = qed_ooo_get_free_buffer(p_hwfn,
1850 p_hwfn->p_ooo_info))) {
1851 dma_free_coherent(&p_hwfn->cdev->pdev->dev,
1852 p_buffer->rx_buffer_size,
1853 p_buffer->rx_buffer_virt_addr,
1854 p_buffer->rx_buffer_phys_addr);
1855 kfree(p_buffer);
1856 }
1857}
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001858void qed_ll2_release_connection(struct qed_hwfn *p_hwfn, u8 connection_handle)
1859{
1860 struct qed_ll2_info *p_ll2_conn = NULL;
1861
1862 p_ll2_conn = qed_ll2_handle_sanity(p_hwfn, connection_handle);
1863 if (!p_ll2_conn)
1864 return;
1865
1866 if (QED_LL2_RX_REGISTERED(p_ll2_conn)) {
1867 p_ll2_conn->rx_queue.b_cb_registred = false;
1868 qed_int_unregister_cb(p_hwfn, p_ll2_conn->rx_queue.rx_sb_index);
1869 }
1870
1871 if (QED_LL2_TX_REGISTERED(p_ll2_conn)) {
1872 p_ll2_conn->tx_queue.b_cb_registred = false;
1873 qed_int_unregister_cb(p_hwfn, p_ll2_conn->tx_queue.tx_sb_index);
1874 }
1875
1876 kfree(p_ll2_conn->tx_queue.descq_array);
1877 qed_chain_free(p_hwfn->cdev, &p_ll2_conn->tx_queue.txq_chain);
1878
1879 kfree(p_ll2_conn->rx_queue.descq_array);
1880 qed_chain_free(p_hwfn->cdev, &p_ll2_conn->rx_queue.rxq_chain);
1881 qed_chain_free(p_hwfn->cdev, &p_ll2_conn->rx_queue.rcq_chain);
1882
1883 qed_cxt_release_cid(p_hwfn, p_ll2_conn->cid);
1884
Yuval Mintz1d6cff42016-12-01 00:21:07 -08001885 qed_ll2_release_connection_ooo(p_hwfn, p_ll2_conn);
1886
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001887 mutex_lock(&p_ll2_conn->mutex);
1888 p_ll2_conn->b_active = false;
1889 mutex_unlock(&p_ll2_conn->mutex);
1890}
1891
Tomer Tayar3587cb82017-05-21 12:10:56 +03001892int qed_ll2_alloc(struct qed_hwfn *p_hwfn)
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001893{
1894 struct qed_ll2_info *p_ll2_connections;
1895 u8 i;
1896
1897 /* Allocate LL2's set struct */
1898 p_ll2_connections = kcalloc(QED_MAX_NUM_OF_LL2_CONNECTIONS,
1899 sizeof(struct qed_ll2_info), GFP_KERNEL);
1900 if (!p_ll2_connections) {
1901 DP_NOTICE(p_hwfn, "Failed to allocate `struct qed_ll2'\n");
Tomer Tayar3587cb82017-05-21 12:10:56 +03001902 return -ENOMEM;
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001903 }
1904
1905 for (i = 0; i < QED_MAX_NUM_OF_LL2_CONNECTIONS; i++)
1906 p_ll2_connections[i].my_id = i;
1907
Tomer Tayar3587cb82017-05-21 12:10:56 +03001908 p_hwfn->p_ll2_info = p_ll2_connections;
1909 return 0;
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001910}
1911
Tomer Tayar3587cb82017-05-21 12:10:56 +03001912void qed_ll2_setup(struct qed_hwfn *p_hwfn)
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001913{
1914 int i;
1915
1916 for (i = 0; i < QED_MAX_NUM_OF_LL2_CONNECTIONS; i++)
Tomer Tayar3587cb82017-05-21 12:10:56 +03001917 mutex_init(&p_hwfn->p_ll2_info[i].mutex);
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001918}
1919
Tomer Tayar3587cb82017-05-21 12:10:56 +03001920void qed_ll2_free(struct qed_hwfn *p_hwfn)
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001921{
Tomer Tayar3587cb82017-05-21 12:10:56 +03001922 if (!p_hwfn->p_ll2_info)
1923 return;
1924
1925 kfree(p_hwfn->p_ll2_info);
1926 p_hwfn->p_ll2_info = NULL;
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001927}
1928
1929static void _qed_ll2_get_tstats(struct qed_hwfn *p_hwfn,
1930 struct qed_ptt *p_ptt,
1931 struct qed_ll2_info *p_ll2_conn,
1932 struct qed_ll2_stats *p_stats)
1933{
1934 struct core_ll2_tstorm_per_queue_stat tstats;
1935 u8 qid = p_ll2_conn->queue_id;
1936 u32 tstats_addr;
1937
1938 memset(&tstats, 0, sizeof(tstats));
1939 tstats_addr = BAR0_MAP_REG_TSDM_RAM +
1940 CORE_LL2_TSTORM_PER_QUEUE_STAT_OFFSET(qid);
1941 qed_memcpy_from(p_hwfn, p_ptt, &tstats, tstats_addr, sizeof(tstats));
1942
1943 p_stats->packet_too_big_discard =
1944 HILO_64_REGPAIR(tstats.packet_too_big_discard);
1945 p_stats->no_buff_discard = HILO_64_REGPAIR(tstats.no_buff_discard);
1946}
1947
1948static void _qed_ll2_get_ustats(struct qed_hwfn *p_hwfn,
1949 struct qed_ptt *p_ptt,
1950 struct qed_ll2_info *p_ll2_conn,
1951 struct qed_ll2_stats *p_stats)
1952{
1953 struct core_ll2_ustorm_per_queue_stat ustats;
1954 u8 qid = p_ll2_conn->queue_id;
1955 u32 ustats_addr;
1956
1957 memset(&ustats, 0, sizeof(ustats));
1958 ustats_addr = BAR0_MAP_REG_USDM_RAM +
1959 CORE_LL2_USTORM_PER_QUEUE_STAT_OFFSET(qid);
1960 qed_memcpy_from(p_hwfn, p_ptt, &ustats, ustats_addr, sizeof(ustats));
1961
1962 p_stats->rcv_ucast_bytes = HILO_64_REGPAIR(ustats.rcv_ucast_bytes);
1963 p_stats->rcv_mcast_bytes = HILO_64_REGPAIR(ustats.rcv_mcast_bytes);
1964 p_stats->rcv_bcast_bytes = HILO_64_REGPAIR(ustats.rcv_bcast_bytes);
1965 p_stats->rcv_ucast_pkts = HILO_64_REGPAIR(ustats.rcv_ucast_pkts);
1966 p_stats->rcv_mcast_pkts = HILO_64_REGPAIR(ustats.rcv_mcast_pkts);
1967 p_stats->rcv_bcast_pkts = HILO_64_REGPAIR(ustats.rcv_bcast_pkts);
1968}
1969
1970static void _qed_ll2_get_pstats(struct qed_hwfn *p_hwfn,
1971 struct qed_ptt *p_ptt,
1972 struct qed_ll2_info *p_ll2_conn,
1973 struct qed_ll2_stats *p_stats)
1974{
1975 struct core_ll2_pstorm_per_queue_stat pstats;
1976 u8 stats_id = p_ll2_conn->tx_stats_id;
1977 u32 pstats_addr;
1978
1979 memset(&pstats, 0, sizeof(pstats));
1980 pstats_addr = BAR0_MAP_REG_PSDM_RAM +
1981 CORE_LL2_PSTORM_PER_QUEUE_STAT_OFFSET(stats_id);
1982 qed_memcpy_from(p_hwfn, p_ptt, &pstats, pstats_addr, sizeof(pstats));
1983
1984 p_stats->sent_ucast_bytes = HILO_64_REGPAIR(pstats.sent_ucast_bytes);
1985 p_stats->sent_mcast_bytes = HILO_64_REGPAIR(pstats.sent_mcast_bytes);
1986 p_stats->sent_bcast_bytes = HILO_64_REGPAIR(pstats.sent_bcast_bytes);
1987 p_stats->sent_ucast_pkts = HILO_64_REGPAIR(pstats.sent_ucast_pkts);
1988 p_stats->sent_mcast_pkts = HILO_64_REGPAIR(pstats.sent_mcast_pkts);
1989 p_stats->sent_bcast_pkts = HILO_64_REGPAIR(pstats.sent_bcast_pkts);
1990}
1991
1992int qed_ll2_get_stats(struct qed_hwfn *p_hwfn,
1993 u8 connection_handle, struct qed_ll2_stats *p_stats)
1994{
1995 struct qed_ll2_info *p_ll2_conn = NULL;
1996 struct qed_ptt *p_ptt;
1997
1998 memset(p_stats, 0, sizeof(*p_stats));
1999
2000 if ((connection_handle >= QED_MAX_NUM_OF_LL2_CONNECTIONS) ||
2001 !p_hwfn->p_ll2_info)
2002 return -EINVAL;
2003
2004 p_ll2_conn = &p_hwfn->p_ll2_info[connection_handle];
2005
2006 p_ptt = qed_ptt_acquire(p_hwfn);
2007 if (!p_ptt) {
2008 DP_ERR(p_hwfn, "Failed to acquire ptt\n");
2009 return -EINVAL;
2010 }
2011
2012 _qed_ll2_get_tstats(p_hwfn, p_ptt, p_ll2_conn, p_stats);
2013 _qed_ll2_get_ustats(p_hwfn, p_ptt, p_ll2_conn, p_stats);
2014 if (p_ll2_conn->tx_stats_en)
2015 _qed_ll2_get_pstats(p_hwfn, p_ptt, p_ll2_conn, p_stats);
2016
2017 qed_ptt_release(p_hwfn, p_ptt);
2018 return 0;
2019}
2020
2021static void qed_ll2_register_cb_ops(struct qed_dev *cdev,
2022 const struct qed_ll2_cb_ops *ops,
2023 void *cookie)
2024{
2025 cdev->ll2->cbs = ops;
2026 cdev->ll2->cb_cookie = cookie;
2027}
2028
Mintz, Yuval13c54772017-06-09 17:13:20 +03002029static void qed_ll2_set_conn_data(struct qed_dev *cdev,
2030 struct qed_ll2_acquire_data *data,
2031 struct qed_ll2_params *params,
2032 enum qed_ll2_conn_type conn_type,
2033 u8 *handle, bool lb, u8 gsi_enable)
2034{
2035 memset(data, 0, sizeof(*data));
2036
2037 data->input.conn_type = conn_type;
2038 data->input.mtu = params->mtu;
2039 data->input.rx_num_desc = QED_LL2_RX_SIZE;
2040 data->input.rx_drop_ttl0_flg = params->drop_ttl0_packets;
2041 data->input.rx_vlan_removal_en = params->rx_vlan_stripping;
2042 data->input.tx_num_desc = QED_LL2_TX_SIZE;
2043 data->input.gsi_enable = gsi_enable;
2044 data->p_connection_handle = handle;
2045 if (lb) {
2046 data->input.tx_tc = OOO_LB_TC;
2047 data->input.tx_dest = QED_LL2_TX_DEST_LB;
2048 } else {
2049 data->input.tx_tc = 0;
2050 data->input.tx_dest = QED_LL2_TX_DEST_NW;
2051 }
2052}
2053
2054static int qed_ll2_start_ooo(struct qed_dev *cdev,
2055 struct qed_ll2_params *params)
2056{
2057 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
2058 u8 *handle = &hwfn->pf_params.iscsi_pf_params.ll2_ooo_queue_id;
2059 struct qed_ll2_acquire_data data;
2060 int rc;
2061
2062 qed_ll2_set_conn_data(cdev, &data, params,
2063 QED_LL2_TYPE_ISCSI_OOO, handle, true, 0);
2064
2065 rc = qed_ll2_acquire_connection(hwfn, &data);
2066 if (rc) {
2067 DP_INFO(cdev, "Failed to acquire LL2 OOO connection\n");
2068 goto out;
2069 }
2070
2071 rc = qed_ll2_establish_connection(hwfn, *handle);
2072 if (rc) {
2073 DP_INFO(cdev, "Failed to establist LL2 OOO connection\n");
2074 goto fail;
2075 }
2076
2077 return 0;
2078
2079fail:
2080 qed_ll2_release_connection(hwfn, *handle);
2081out:
2082 *handle = QED_LL2_UNUSED_HANDLE;
2083 return rc;
2084}
2085
Yuval Mintz0a7fb112016-10-01 21:59:55 +03002086static int qed_ll2_start(struct qed_dev *cdev, struct qed_ll2_params *params)
2087{
Wei Yongjun88a24282016-10-10 14:08:28 +00002088 struct qed_ll2_buffer *buffer, *tmp_buffer;
Yuval Mintz0a7fb112016-10-01 21:59:55 +03002089 enum qed_ll2_conn_type conn_type;
Mintz, Yuval13c54772017-06-09 17:13:20 +03002090 struct qed_ll2_acquire_data data;
Yuval Mintz0a7fb112016-10-01 21:59:55 +03002091 struct qed_ptt *p_ptt;
2092 int rc, i;
Yuval Mintzfc831822016-12-01 00:21:06 -08002093 u8 gsi_enable = 1;
Yuval Mintz0a7fb112016-10-01 21:59:55 +03002094
2095 /* Initialize LL2 locks & lists */
2096 INIT_LIST_HEAD(&cdev->ll2->list);
2097 spin_lock_init(&cdev->ll2->lock);
2098 cdev->ll2->rx_size = NET_SKB_PAD + ETH_HLEN +
2099 L1_CACHE_BYTES + params->mtu;
2100 cdev->ll2->frags_mapped = params->frags_mapped;
2101
2102 /*Allocate memory for LL2 */
2103 DP_INFO(cdev, "Allocating LL2 buffers of size %08x bytes\n",
2104 cdev->ll2->rx_size);
2105 for (i = 0; i < QED_LL2_RX_SIZE; i++) {
2106 buffer = kzalloc(sizeof(*buffer), GFP_KERNEL);
2107 if (!buffer) {
2108 DP_INFO(cdev, "Failed to allocate LL2 buffers\n");
2109 goto fail;
2110 }
2111
2112 rc = qed_ll2_alloc_buffer(cdev, (u8 **)&buffer->data,
2113 &buffer->phys_addr);
2114 if (rc) {
2115 kfree(buffer);
2116 goto fail;
2117 }
2118
2119 list_add_tail(&buffer->list, &cdev->ll2->list);
2120 }
2121
2122 switch (QED_LEADING_HWFN(cdev)->hw_info.personality) {
Arun Easi1e128c82017-02-15 06:28:22 -08002123 case QED_PCI_FCOE:
2124 conn_type = QED_LL2_TYPE_FCOE;
2125 gsi_enable = 0;
2126 break;
Yuval Mintz0a7fb112016-10-01 21:59:55 +03002127 case QED_PCI_ISCSI:
2128 conn_type = QED_LL2_TYPE_ISCSI;
Yuval Mintzfc831822016-12-01 00:21:06 -08002129 gsi_enable = 0;
Yuval Mintz0a7fb112016-10-01 21:59:55 +03002130 break;
2131 case QED_PCI_ETH_ROCE:
2132 conn_type = QED_LL2_TYPE_ROCE;
2133 break;
2134 default:
2135 conn_type = QED_LL2_TYPE_TEST;
2136 }
2137
Mintz, Yuval13c54772017-06-09 17:13:20 +03002138 qed_ll2_set_conn_data(cdev, &data, params, conn_type,
2139 &cdev->ll2->handle, false, gsi_enable);
Arnd Bergmann0629a332017-01-18 15:52:52 +01002140
Mintz, Yuval13c54772017-06-09 17:13:20 +03002141 rc = qed_ll2_acquire_connection(QED_LEADING_HWFN(cdev), &data);
Yuval Mintz0a7fb112016-10-01 21:59:55 +03002142 if (rc) {
2143 DP_INFO(cdev, "Failed to acquire LL2 connection\n");
2144 goto fail;
2145 }
2146
2147 rc = qed_ll2_establish_connection(QED_LEADING_HWFN(cdev),
2148 cdev->ll2->handle);
2149 if (rc) {
2150 DP_INFO(cdev, "Failed to establish LL2 connection\n");
2151 goto release_fail;
2152 }
2153
2154 /* Post all Rx buffers to FW */
2155 spin_lock_bh(&cdev->ll2->lock);
Wei Yongjun88a24282016-10-10 14:08:28 +00002156 list_for_each_entry_safe(buffer, tmp_buffer, &cdev->ll2->list, list) {
Yuval Mintz0a7fb112016-10-01 21:59:55 +03002157 rc = qed_ll2_post_rx_buffer(QED_LEADING_HWFN(cdev),
2158 cdev->ll2->handle,
2159 buffer->phys_addr, 0, buffer, 1);
2160 if (rc) {
2161 DP_INFO(cdev,
2162 "Failed to post an Rx buffer; Deleting it\n");
2163 dma_unmap_single(&cdev->pdev->dev, buffer->phys_addr,
2164 cdev->ll2->rx_size, DMA_FROM_DEVICE);
2165 kfree(buffer->data);
2166 list_del(&buffer->list);
2167 kfree(buffer);
2168 } else {
2169 cdev->ll2->rx_cnt++;
2170 }
2171 }
2172 spin_unlock_bh(&cdev->ll2->lock);
2173
2174 if (!cdev->ll2->rx_cnt) {
2175 DP_INFO(cdev, "Failed passing even a single Rx buffer\n");
2176 goto release_terminate;
2177 }
2178
2179 if (!is_valid_ether_addr(params->ll2_mac_address)) {
2180 DP_INFO(cdev, "Invalid Ethernet address\n");
2181 goto release_terminate;
2182 }
2183
Yuval Mintz1d6cff42016-12-01 00:21:07 -08002184 if (cdev->hwfns[0].hw_info.personality == QED_PCI_ISCSI &&
2185 cdev->hwfns[0].pf_params.iscsi_pf_params.ooo_enable) {
2186 DP_VERBOSE(cdev, QED_MSG_STORAGE, "Starting OOO LL2 queue\n");
2187 rc = qed_ll2_start_ooo(cdev, params);
2188 if (rc) {
2189 DP_INFO(cdev,
2190 "Failed to initialize the OOO LL2 queue\n");
2191 goto release_terminate;
2192 }
2193 }
2194
Yuval Mintz0a7fb112016-10-01 21:59:55 +03002195 p_ptt = qed_ptt_acquire(QED_LEADING_HWFN(cdev));
2196 if (!p_ptt) {
2197 DP_INFO(cdev, "Failed to acquire PTT\n");
2198 goto release_terminate;
2199 }
2200
2201 rc = qed_llh_add_mac_filter(QED_LEADING_HWFN(cdev), p_ptt,
2202 params->ll2_mac_address);
2203 qed_ptt_release(QED_LEADING_HWFN(cdev), p_ptt);
2204 if (rc) {
2205 DP_ERR(cdev, "Failed to allocate LLH filter\n");
2206 goto release_terminate_all;
2207 }
2208
2209 ether_addr_copy(cdev->ll2_mac_address, params->ll2_mac_address);
Yuval Mintz0a7fb112016-10-01 21:59:55 +03002210 return 0;
2211
2212release_terminate_all:
2213
2214release_terminate:
2215 qed_ll2_terminate_connection(QED_LEADING_HWFN(cdev), cdev->ll2->handle);
2216release_fail:
2217 qed_ll2_release_connection(QED_LEADING_HWFN(cdev), cdev->ll2->handle);
2218fail:
2219 qed_ll2_kill_buffers(cdev);
2220 cdev->ll2->handle = QED_LL2_UNUSED_HANDLE;
2221 return -EINVAL;
2222}
2223
2224static int qed_ll2_stop(struct qed_dev *cdev)
2225{
2226 struct qed_ptt *p_ptt;
2227 int rc;
2228
2229 if (cdev->ll2->handle == QED_LL2_UNUSED_HANDLE)
2230 return 0;
2231
2232 p_ptt = qed_ptt_acquire(QED_LEADING_HWFN(cdev));
2233 if (!p_ptt) {
2234 DP_INFO(cdev, "Failed to acquire PTT\n");
2235 goto fail;
2236 }
2237
2238 qed_llh_remove_mac_filter(QED_LEADING_HWFN(cdev), p_ptt,
2239 cdev->ll2_mac_address);
2240 qed_ptt_release(QED_LEADING_HWFN(cdev), p_ptt);
2241 eth_zero_addr(cdev->ll2_mac_address);
2242
Yuval Mintz1d6cff42016-12-01 00:21:07 -08002243 if (cdev->hwfns[0].hw_info.personality == QED_PCI_ISCSI &&
2244 cdev->hwfns[0].pf_params.iscsi_pf_params.ooo_enable)
2245 qed_ll2_stop_ooo(cdev);
2246
Yuval Mintz0a7fb112016-10-01 21:59:55 +03002247 rc = qed_ll2_terminate_connection(QED_LEADING_HWFN(cdev),
2248 cdev->ll2->handle);
2249 if (rc)
2250 DP_INFO(cdev, "Failed to terminate LL2 connection\n");
2251
2252 qed_ll2_kill_buffers(cdev);
2253
2254 qed_ll2_release_connection(QED_LEADING_HWFN(cdev), cdev->ll2->handle);
2255 cdev->ll2->handle = QED_LL2_UNUSED_HANDLE;
2256
2257 return rc;
2258fail:
2259 return -EINVAL;
2260}
2261
2262static int qed_ll2_start_xmit(struct qed_dev *cdev, struct sk_buff *skb)
2263{
Mintz, Yuval7c7973b2017-06-09 17:13:18 +03002264 struct qed_ll2_tx_pkt_info pkt;
Yuval Mintz0a7fb112016-10-01 21:59:55 +03002265 const skb_frag_t *frag;
2266 int rc = -EINVAL, i;
2267 dma_addr_t mapping;
2268 u16 vlan = 0;
2269 u8 flags = 0;
2270
2271 if (unlikely(skb->ip_summed != CHECKSUM_NONE)) {
2272 DP_INFO(cdev, "Cannot transmit a checksumed packet\n");
2273 return -EINVAL;
2274 }
2275
2276 if (1 + skb_shinfo(skb)->nr_frags > CORE_LL2_TX_MAX_BDS_PER_PACKET) {
2277 DP_ERR(cdev, "Cannot transmit a packet with %d fragments\n",
2278 1 + skb_shinfo(skb)->nr_frags);
2279 return -EINVAL;
2280 }
2281
2282 mapping = dma_map_single(&cdev->pdev->dev, skb->data,
2283 skb->len, DMA_TO_DEVICE);
2284 if (unlikely(dma_mapping_error(&cdev->pdev->dev, mapping))) {
2285 DP_NOTICE(cdev, "SKB mapping failed\n");
2286 return -EINVAL;
2287 }
2288
2289 /* Request HW to calculate IP csum */
2290 if (!((vlan_get_protocol(skb) == htons(ETH_P_IPV6)) &&
2291 ipv6_hdr(skb)->nexthdr == NEXTHDR_IPV6))
Mintz, Yuvalbe086e72017-03-11 18:39:18 +02002292 flags |= BIT(CORE_TX_BD_DATA_IP_CSUM_SHIFT);
Yuval Mintz0a7fb112016-10-01 21:59:55 +03002293
2294 if (skb_vlan_tag_present(skb)) {
2295 vlan = skb_vlan_tag_get(skb);
Mintz, Yuvalbe086e72017-03-11 18:39:18 +02002296 flags |= BIT(CORE_TX_BD_DATA_VLAN_INSERTION_SHIFT);
Yuval Mintz0a7fb112016-10-01 21:59:55 +03002297 }
2298
Mintz, Yuval7c7973b2017-06-09 17:13:18 +03002299 memset(&pkt, 0, sizeof(pkt));
2300 pkt.num_of_bds = 1 + skb_shinfo(skb)->nr_frags;
2301 pkt.vlan = vlan;
2302 pkt.bd_flags = flags;
2303 pkt.tx_dest = QED_LL2_TX_DEST_NW;
2304 pkt.first_frag = mapping;
2305 pkt.first_frag_len = skb->len;
2306 pkt.cookie = skb;
2307
2308 rc = qed_ll2_prepare_tx_packet(&cdev->hwfns[0], cdev->ll2->handle,
2309 &pkt, 1);
Yuval Mintz0a7fb112016-10-01 21:59:55 +03002310 if (rc)
2311 goto err;
2312
2313 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
2314 frag = &skb_shinfo(skb)->frags[i];
2315 if (!cdev->ll2->frags_mapped) {
2316 mapping = skb_frag_dma_map(&cdev->pdev->dev, frag, 0,
2317 skb_frag_size(frag),
2318 DMA_TO_DEVICE);
2319
2320 if (unlikely(dma_mapping_error(&cdev->pdev->dev,
2321 mapping))) {
2322 DP_NOTICE(cdev,
2323 "Unable to map frag - dropping packet\n");
Pan Bian0ff18d22016-12-04 13:53:53 +08002324 rc = -ENOMEM;
Yuval Mintz0a7fb112016-10-01 21:59:55 +03002325 goto err;
2326 }
2327 } else {
2328 mapping = page_to_phys(skb_frag_page(frag)) |
2329 frag->page_offset;
2330 }
2331
2332 rc = qed_ll2_set_fragment_of_tx_packet(QED_LEADING_HWFN(cdev),
2333 cdev->ll2->handle,
2334 mapping,
2335 skb_frag_size(frag));
2336
2337 /* if failed not much to do here, partial packet has been posted
2338 * we can't free memory, will need to wait for completion.
2339 */
2340 if (rc)
2341 goto err2;
2342 }
2343
2344 return 0;
2345
2346err:
2347 dma_unmap_single(&cdev->pdev->dev, mapping, skb->len, DMA_TO_DEVICE);
2348
2349err2:
2350 return rc;
2351}
2352
2353static int qed_ll2_stats(struct qed_dev *cdev, struct qed_ll2_stats *stats)
2354{
2355 if (!cdev->ll2)
2356 return -EINVAL;
2357
2358 return qed_ll2_get_stats(QED_LEADING_HWFN(cdev),
2359 cdev->ll2->handle, stats);
2360}
2361
2362const struct qed_ll2_ops qed_ll2_ops_pass = {
2363 .start = &qed_ll2_start,
2364 .stop = &qed_ll2_stop,
2365 .start_xmit = &qed_ll2_start_xmit,
2366 .register_cb_ops = &qed_ll2_register_cb_ops,
2367 .get_stats = &qed_ll2_stats,
2368};
2369
2370int qed_ll2_alloc_if(struct qed_dev *cdev)
2371{
2372 cdev->ll2 = kzalloc(sizeof(*cdev->ll2), GFP_KERNEL);
2373 return cdev->ll2 ? 0 : -ENOMEM;
2374}
2375
2376void qed_ll2_dealloc_if(struct qed_dev *cdev)
2377{
2378 kfree(cdev->ll2);
2379 cdev->ll2 = NULL;
2380}