blob: 8e5cb7605b0fa92d8d778e2c16cae49cdc2570db [file] [log] [blame]
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001/* QLogic qed NIC Driver
2 *
3 * Copyright (c) 2015 QLogic Corporation
4 *
5 * This software is available under the terms of the GNU General Public License
6 * (GPL) Version 2, available from the file COPYING in the main directory of
7 * this source tree.
8 */
9
10#include <linux/types.h>
11#include <asm/byteorder.h>
12#include <linux/dma-mapping.h>
13#include <linux/if_vlan.h>
14#include <linux/kernel.h>
15#include <linux/pci.h>
16#include <linux/slab.h>
17#include <linux/stddef.h>
18#include <linux/version.h>
19#include <linux/workqueue.h>
20#include <net/ipv6.h>
21#include <linux/bitops.h>
22#include <linux/delay.h>
23#include <linux/errno.h>
24#include <linux/etherdevice.h>
25#include <linux/io.h>
26#include <linux/list.h>
27#include <linux/mutex.h>
28#include <linux/spinlock.h>
29#include <linux/string.h>
30#include <linux/qed/qed_ll2_if.h>
31#include "qed.h"
32#include "qed_cxt.h"
33#include "qed_dev_api.h"
34#include "qed_hsi.h"
35#include "qed_hw.h"
36#include "qed_int.h"
37#include "qed_ll2.h"
38#include "qed_mcp.h"
Yuval Mintz1d6cff42016-12-01 00:21:07 -080039#include "qed_ooo.h"
Yuval Mintz0a7fb112016-10-01 21:59:55 +030040#include "qed_reg_addr.h"
41#include "qed_sp.h"
Yuval Mintz0189efb2016-10-13 22:57:02 +030042#include "qed_roce.h"
Yuval Mintz0a7fb112016-10-01 21:59:55 +030043
44#define QED_LL2_RX_REGISTERED(ll2) ((ll2)->rx_queue.b_cb_registred)
45#define QED_LL2_TX_REGISTERED(ll2) ((ll2)->tx_queue.b_cb_registred)
46
47#define QED_LL2_TX_SIZE (256)
48#define QED_LL2_RX_SIZE (4096)
49
50struct qed_cb_ll2_info {
51 int rx_cnt;
52 u32 rx_size;
53 u8 handle;
54 bool frags_mapped;
55
56 /* Lock protecting LL2 buffer lists in sleepless context */
57 spinlock_t lock;
58 struct list_head list;
59
60 const struct qed_ll2_cb_ops *cbs;
61 void *cb_cookie;
62};
63
64struct qed_ll2_buffer {
65 struct list_head list;
66 void *data;
67 dma_addr_t phys_addr;
68};
69
70static void qed_ll2b_complete_tx_packet(struct qed_hwfn *p_hwfn,
71 u8 connection_handle,
72 void *cookie,
73 dma_addr_t first_frag_addr,
74 bool b_last_fragment,
75 bool b_last_packet)
76{
77 struct qed_dev *cdev = p_hwfn->cdev;
78 struct sk_buff *skb = cookie;
79
80 /* All we need to do is release the mapping */
81 dma_unmap_single(&p_hwfn->cdev->pdev->dev, first_frag_addr,
82 skb_headlen(skb), DMA_TO_DEVICE);
83
84 if (cdev->ll2->cbs && cdev->ll2->cbs->tx_cb)
85 cdev->ll2->cbs->tx_cb(cdev->ll2->cb_cookie, skb,
86 b_last_fragment);
87
88 if (cdev->ll2->frags_mapped)
89 /* Case where mapped frags were received, need to
90 * free skb with nr_frags marked as 0
91 */
92 skb_shinfo(skb)->nr_frags = 0;
93
94 dev_kfree_skb_any(skb);
95}
96
97static int qed_ll2_alloc_buffer(struct qed_dev *cdev,
98 u8 **data, dma_addr_t *phys_addr)
99{
100 *data = kmalloc(cdev->ll2->rx_size, GFP_ATOMIC);
101 if (!(*data)) {
102 DP_INFO(cdev, "Failed to allocate LL2 buffer data\n");
103 return -ENOMEM;
104 }
105
106 *phys_addr = dma_map_single(&cdev->pdev->dev,
107 ((*data) + NET_SKB_PAD),
108 cdev->ll2->rx_size, DMA_FROM_DEVICE);
109 if (dma_mapping_error(&cdev->pdev->dev, *phys_addr)) {
110 DP_INFO(cdev, "Failed to map LL2 buffer data\n");
111 kfree((*data));
112 return -ENOMEM;
113 }
114
115 return 0;
116}
117
118static int qed_ll2_dealloc_buffer(struct qed_dev *cdev,
119 struct qed_ll2_buffer *buffer)
120{
121 spin_lock_bh(&cdev->ll2->lock);
122
123 dma_unmap_single(&cdev->pdev->dev, buffer->phys_addr,
124 cdev->ll2->rx_size, DMA_FROM_DEVICE);
125 kfree(buffer->data);
126 list_del(&buffer->list);
127
128 cdev->ll2->rx_cnt--;
129 if (!cdev->ll2->rx_cnt)
130 DP_INFO(cdev, "All LL2 entries were removed\n");
131
132 spin_unlock_bh(&cdev->ll2->lock);
133
134 return 0;
135}
136
137static void qed_ll2_kill_buffers(struct qed_dev *cdev)
138{
139 struct qed_ll2_buffer *buffer, *tmp_buffer;
140
141 list_for_each_entry_safe(buffer, tmp_buffer, &cdev->ll2->list, list)
142 qed_ll2_dealloc_buffer(cdev, buffer);
143}
144
Yuval Mintz8c93bea2016-10-13 22:57:03 +0300145static void qed_ll2b_complete_rx_packet(struct qed_hwfn *p_hwfn,
146 u8 connection_handle,
147 struct qed_ll2_rx_packet *p_pkt,
148 struct core_rx_fast_path_cqe *p_cqe,
149 bool b_last_packet)
Yuval Mintz0a7fb112016-10-01 21:59:55 +0300150{
151 u16 packet_length = le16_to_cpu(p_cqe->packet_length);
152 struct qed_ll2_buffer *buffer = p_pkt->cookie;
153 struct qed_dev *cdev = p_hwfn->cdev;
154 u16 vlan = le16_to_cpu(p_cqe->vlan);
155 u32 opaque_data_0, opaque_data_1;
156 u8 pad = p_cqe->placement_offset;
157 dma_addr_t new_phys_addr;
158 struct sk_buff *skb;
159 bool reuse = false;
160 int rc = -EINVAL;
161 u8 *new_data;
162
163 opaque_data_0 = le32_to_cpu(p_cqe->opaque_data.data[0]);
164 opaque_data_1 = le32_to_cpu(p_cqe->opaque_data.data[1]);
165
166 DP_VERBOSE(p_hwfn,
167 (NETIF_MSG_RX_STATUS | QED_MSG_STORAGE | NETIF_MSG_PKTDATA),
168 "Got an LL2 Rx completion: [Buffer at phys 0x%llx, offset 0x%02x] Length 0x%04x Parse_flags 0x%04x vlan 0x%04x Opaque data [0x%08x:0x%08x]\n",
169 (u64)p_pkt->rx_buf_addr, pad, packet_length,
170 le16_to_cpu(p_cqe->parse_flags.flags), vlan,
171 opaque_data_0, opaque_data_1);
172
173 if ((cdev->dp_module & NETIF_MSG_PKTDATA) && buffer->data) {
174 print_hex_dump(KERN_INFO, "",
175 DUMP_PREFIX_OFFSET, 16, 1,
176 buffer->data, packet_length, false);
177 }
178
179 /* Determine if data is valid */
180 if (packet_length < ETH_HLEN)
181 reuse = true;
182
183 /* Allocate a replacement for buffer; Reuse upon failure */
184 if (!reuse)
185 rc = qed_ll2_alloc_buffer(p_hwfn->cdev, &new_data,
186 &new_phys_addr);
187
188 /* If need to reuse or there's no replacement buffer, repost this */
189 if (rc)
190 goto out_post;
191
192 skb = build_skb(buffer->data, 0);
193 if (!skb) {
194 rc = -ENOMEM;
195 goto out_post;
196 }
197
198 pad += NET_SKB_PAD;
199 skb_reserve(skb, pad);
200 skb_put(skb, packet_length);
201 skb_checksum_none_assert(skb);
202
203 /* Get parital ethernet information instead of eth_type_trans(),
204 * Since we don't have an associated net_device.
205 */
206 skb_reset_mac_header(skb);
207 skb->protocol = eth_hdr(skb)->h_proto;
208
209 /* Pass SKB onward */
210 if (cdev->ll2->cbs && cdev->ll2->cbs->rx_cb) {
211 if (vlan)
212 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vlan);
213 cdev->ll2->cbs->rx_cb(cdev->ll2->cb_cookie, skb,
214 opaque_data_0, opaque_data_1);
215 }
216
217 /* Update Buffer information and update FW producer */
218 buffer->data = new_data;
219 buffer->phys_addr = new_phys_addr;
220
221out_post:
222 rc = qed_ll2_post_rx_buffer(QED_LEADING_HWFN(cdev), cdev->ll2->handle,
223 buffer->phys_addr, 0, buffer, 1);
224
225 if (rc)
226 qed_ll2_dealloc_buffer(cdev, buffer);
227}
228
229static struct qed_ll2_info *__qed_ll2_handle_sanity(struct qed_hwfn *p_hwfn,
230 u8 connection_handle,
231 bool b_lock,
232 bool b_only_active)
233{
234 struct qed_ll2_info *p_ll2_conn, *p_ret = NULL;
235
236 if (connection_handle >= QED_MAX_NUM_OF_LL2_CONNECTIONS)
237 return NULL;
238
239 if (!p_hwfn->p_ll2_info)
240 return NULL;
241
242 p_ll2_conn = &p_hwfn->p_ll2_info[connection_handle];
243
244 if (b_only_active) {
245 if (b_lock)
246 mutex_lock(&p_ll2_conn->mutex);
247 if (p_ll2_conn->b_active)
248 p_ret = p_ll2_conn;
249 if (b_lock)
250 mutex_unlock(&p_ll2_conn->mutex);
251 } else {
252 p_ret = p_ll2_conn;
253 }
254
255 return p_ret;
256}
257
258static struct qed_ll2_info *qed_ll2_handle_sanity(struct qed_hwfn *p_hwfn,
259 u8 connection_handle)
260{
261 return __qed_ll2_handle_sanity(p_hwfn, connection_handle, false, true);
262}
263
264static struct qed_ll2_info *qed_ll2_handle_sanity_lock(struct qed_hwfn *p_hwfn,
265 u8 connection_handle)
266{
267 return __qed_ll2_handle_sanity(p_hwfn, connection_handle, true, true);
268}
269
270static struct qed_ll2_info *qed_ll2_handle_sanity_inactive(struct qed_hwfn
271 *p_hwfn,
272 u8 connection_handle)
273{
274 return __qed_ll2_handle_sanity(p_hwfn, connection_handle, false, false);
275}
276
277static void qed_ll2_txq_flush(struct qed_hwfn *p_hwfn, u8 connection_handle)
278{
279 bool b_last_packet = false, b_last_frag = false;
280 struct qed_ll2_tx_packet *p_pkt = NULL;
281 struct qed_ll2_info *p_ll2_conn;
282 struct qed_ll2_tx_queue *p_tx;
Ram Amraniabd49672016-10-01 22:00:01 +0300283 dma_addr_t tx_frag;
Yuval Mintz0a7fb112016-10-01 21:59:55 +0300284
285 p_ll2_conn = qed_ll2_handle_sanity_inactive(p_hwfn, connection_handle);
286 if (!p_ll2_conn)
287 return;
288
289 p_tx = &p_ll2_conn->tx_queue;
290
291 while (!list_empty(&p_tx->active_descq)) {
292 p_pkt = list_first_entry(&p_tx->active_descq,
293 struct qed_ll2_tx_packet, list_entry);
294 if (!p_pkt)
295 break;
296
297 list_del(&p_pkt->list_entry);
298 b_last_packet = list_empty(&p_tx->active_descq);
299 list_add_tail(&p_pkt->list_entry, &p_tx->free_descq);
Yuval Mintz1d6cff42016-12-01 00:21:07 -0800300 if (p_ll2_conn->conn_type == QED_LL2_TYPE_ISCSI_OOO) {
301 struct qed_ooo_buffer *p_buffer;
Yuval Mintz0a7fb112016-10-01 21:59:55 +0300302
Yuval Mintz1d6cff42016-12-01 00:21:07 -0800303 p_buffer = (struct qed_ooo_buffer *)p_pkt->cookie;
304 qed_ooo_put_free_buffer(p_hwfn, p_hwfn->p_ooo_info,
305 p_buffer);
306 } else {
307 p_tx->cur_completing_packet = *p_pkt;
308 p_tx->cur_completing_bd_idx = 1;
309 b_last_frag =
310 p_tx->cur_completing_bd_idx == p_pkt->bd_used;
311 tx_frag = p_pkt->bds_set[0].tx_frag;
312 if (p_ll2_conn->gsi_enable)
313 qed_ll2b_release_tx_gsi_packet(p_hwfn,
314 p_ll2_conn->
315 my_id,
316 p_pkt->cookie,
317 tx_frag,
318 b_last_frag,
319 b_last_packet);
320 else
321 qed_ll2b_complete_tx_packet(p_hwfn,
322 p_ll2_conn->my_id,
323 p_pkt->cookie,
324 tx_frag,
325 b_last_frag,
326 b_last_packet);
327 }
Yuval Mintz0a7fb112016-10-01 21:59:55 +0300328 }
329}
330
331static int qed_ll2_txq_completion(struct qed_hwfn *p_hwfn, void *p_cookie)
332{
333 struct qed_ll2_info *p_ll2_conn = p_cookie;
334 struct qed_ll2_tx_queue *p_tx = &p_ll2_conn->tx_queue;
335 u16 new_idx = 0, num_bds = 0, num_bds_in_packet = 0;
336 struct qed_ll2_tx_packet *p_pkt;
337 bool b_last_frag = false;
338 unsigned long flags;
Ram Amraniabd49672016-10-01 22:00:01 +0300339 dma_addr_t tx_frag;
Yuval Mintz0a7fb112016-10-01 21:59:55 +0300340 int rc = -EINVAL;
341
342 spin_lock_irqsave(&p_tx->lock, flags);
343 if (p_tx->b_completing_packet) {
344 rc = -EBUSY;
345 goto out;
346 }
347
348 new_idx = le16_to_cpu(*p_tx->p_fw_cons);
349 num_bds = ((s16)new_idx - (s16)p_tx->bds_idx);
350 while (num_bds) {
351 if (list_empty(&p_tx->active_descq))
352 goto out;
353
354 p_pkt = list_first_entry(&p_tx->active_descq,
355 struct qed_ll2_tx_packet, list_entry);
356 if (!p_pkt)
357 goto out;
358
359 p_tx->b_completing_packet = true;
360 p_tx->cur_completing_packet = *p_pkt;
361 num_bds_in_packet = p_pkt->bd_used;
362 list_del(&p_pkt->list_entry);
363
364 if (num_bds < num_bds_in_packet) {
365 DP_NOTICE(p_hwfn,
366 "Rest of BDs does not cover whole packet\n");
367 goto out;
368 }
369
370 num_bds -= num_bds_in_packet;
371 p_tx->bds_idx += num_bds_in_packet;
372 while (num_bds_in_packet--)
373 qed_chain_consume(&p_tx->txq_chain);
374
375 p_tx->cur_completing_bd_idx = 1;
376 b_last_frag = p_tx->cur_completing_bd_idx == p_pkt->bd_used;
377 list_add_tail(&p_pkt->list_entry, &p_tx->free_descq);
378
379 spin_unlock_irqrestore(&p_tx->lock, flags);
Ram Amraniabd49672016-10-01 22:00:01 +0300380 tx_frag = p_pkt->bds_set[0].tx_frag;
381 if (p_ll2_conn->gsi_enable)
382 qed_ll2b_complete_tx_gsi_packet(p_hwfn,
383 p_ll2_conn->my_id,
384 p_pkt->cookie,
385 tx_frag,
386 b_last_frag, !num_bds);
387 else
388 qed_ll2b_complete_tx_packet(p_hwfn,
389 p_ll2_conn->my_id,
390 p_pkt->cookie,
391 tx_frag,
392 b_last_frag, !num_bds);
Yuval Mintz0a7fb112016-10-01 21:59:55 +0300393 spin_lock_irqsave(&p_tx->lock, flags);
394 }
395
396 p_tx->b_completing_packet = false;
397 rc = 0;
398out:
399 spin_unlock_irqrestore(&p_tx->lock, flags);
400 return rc;
401}
402
Ram Amraniabd49672016-10-01 22:00:01 +0300403static int
404qed_ll2_rxq_completion_gsi(struct qed_hwfn *p_hwfn,
405 struct qed_ll2_info *p_ll2_info,
406 union core_rx_cqe_union *p_cqe,
407 unsigned long lock_flags, bool b_last_cqe)
408{
409 struct qed_ll2_rx_queue *p_rx = &p_ll2_info->rx_queue;
410 struct qed_ll2_rx_packet *p_pkt = NULL;
411 u16 packet_length, parse_flags, vlan;
412 u32 src_mac_addrhi;
413 u16 src_mac_addrlo;
414
415 if (!list_empty(&p_rx->active_descq))
416 p_pkt = list_first_entry(&p_rx->active_descq,
417 struct qed_ll2_rx_packet, list_entry);
418 if (!p_pkt) {
419 DP_NOTICE(p_hwfn,
420 "GSI Rx completion but active_descq is empty\n");
421 return -EIO;
422 }
423
424 list_del(&p_pkt->list_entry);
425 parse_flags = le16_to_cpu(p_cqe->rx_cqe_gsi.parse_flags.flags);
426 packet_length = le16_to_cpu(p_cqe->rx_cqe_gsi.data_length);
427 vlan = le16_to_cpu(p_cqe->rx_cqe_gsi.vlan);
428 src_mac_addrhi = le32_to_cpu(p_cqe->rx_cqe_gsi.src_mac_addrhi);
429 src_mac_addrlo = le16_to_cpu(p_cqe->rx_cqe_gsi.src_mac_addrlo);
430 if (qed_chain_consume(&p_rx->rxq_chain) != p_pkt->rxq_bd)
431 DP_NOTICE(p_hwfn,
432 "Mismatch between active_descq and the LL2 Rx chain\n");
433 list_add_tail(&p_pkt->list_entry, &p_rx->free_descq);
434
435 spin_unlock_irqrestore(&p_rx->lock, lock_flags);
436 qed_ll2b_complete_rx_gsi_packet(p_hwfn,
437 p_ll2_info->my_id,
438 p_pkt->cookie,
439 p_pkt->rx_buf_addr,
440 packet_length,
441 p_cqe->rx_cqe_gsi.data_length_error,
442 parse_flags,
443 vlan,
444 src_mac_addrhi,
445 src_mac_addrlo, b_last_cqe);
446 spin_lock_irqsave(&p_rx->lock, lock_flags);
447
448 return 0;
449}
450
Yuval Mintz0a7fb112016-10-01 21:59:55 +0300451static int qed_ll2_rxq_completion_reg(struct qed_hwfn *p_hwfn,
452 struct qed_ll2_info *p_ll2_conn,
453 union core_rx_cqe_union *p_cqe,
454 unsigned long lock_flags,
455 bool b_last_cqe)
456{
457 struct qed_ll2_rx_queue *p_rx = &p_ll2_conn->rx_queue;
458 struct qed_ll2_rx_packet *p_pkt = NULL;
459
460 if (!list_empty(&p_rx->active_descq))
461 p_pkt = list_first_entry(&p_rx->active_descq,
462 struct qed_ll2_rx_packet, list_entry);
463 if (!p_pkt) {
464 DP_NOTICE(p_hwfn,
465 "LL2 Rx completion but active_descq is empty\n");
466 return -EIO;
467 }
468 list_del(&p_pkt->list_entry);
469
470 if (qed_chain_consume(&p_rx->rxq_chain) != p_pkt->rxq_bd)
471 DP_NOTICE(p_hwfn,
472 "Mismatch between active_descq and the LL2 Rx chain\n");
473 list_add_tail(&p_pkt->list_entry, &p_rx->free_descq);
474
475 spin_unlock_irqrestore(&p_rx->lock, lock_flags);
476 qed_ll2b_complete_rx_packet(p_hwfn, p_ll2_conn->my_id,
477 p_pkt, &p_cqe->rx_cqe_fp, b_last_cqe);
478 spin_lock_irqsave(&p_rx->lock, lock_flags);
479
480 return 0;
481}
482
483static int qed_ll2_rxq_completion(struct qed_hwfn *p_hwfn, void *cookie)
484{
485 struct qed_ll2_info *p_ll2_conn = cookie;
486 struct qed_ll2_rx_queue *p_rx = &p_ll2_conn->rx_queue;
487 union core_rx_cqe_union *cqe = NULL;
488 u16 cq_new_idx = 0, cq_old_idx = 0;
489 unsigned long flags = 0;
490 int rc = 0;
491
492 spin_lock_irqsave(&p_rx->lock, flags);
493 cq_new_idx = le16_to_cpu(*p_rx->p_fw_cons);
494 cq_old_idx = qed_chain_get_cons_idx(&p_rx->rcq_chain);
495
496 while (cq_new_idx != cq_old_idx) {
497 bool b_last_cqe = (cq_new_idx == cq_old_idx);
498
499 cqe = qed_chain_consume(&p_rx->rcq_chain);
500 cq_old_idx = qed_chain_get_cons_idx(&p_rx->rcq_chain);
501
502 DP_VERBOSE(p_hwfn,
503 QED_MSG_LL2,
504 "LL2 [sw. cons %04x, fw. at %04x] - Got Packet of type %02x\n",
505 cq_old_idx, cq_new_idx, cqe->rx_cqe_sp.type);
506
507 switch (cqe->rx_cqe_sp.type) {
508 case CORE_RX_CQE_TYPE_SLOW_PATH:
509 DP_NOTICE(p_hwfn, "LL2 - unexpected Rx CQE slowpath\n");
510 rc = -EINVAL;
511 break;
Ram Amraniabd49672016-10-01 22:00:01 +0300512 case CORE_RX_CQE_TYPE_GSI_OFFLOAD:
513 rc = qed_ll2_rxq_completion_gsi(p_hwfn, p_ll2_conn,
514 cqe, flags, b_last_cqe);
515 break;
Yuval Mintz0a7fb112016-10-01 21:59:55 +0300516 case CORE_RX_CQE_TYPE_REGULAR:
517 rc = qed_ll2_rxq_completion_reg(p_hwfn, p_ll2_conn,
518 cqe, flags, b_last_cqe);
519 break;
520 default:
521 rc = -EIO;
522 }
523 }
524
525 spin_unlock_irqrestore(&p_rx->lock, flags);
526 return rc;
527}
528
Yuval Mintz8c93bea2016-10-13 22:57:03 +0300529static void qed_ll2_rxq_flush(struct qed_hwfn *p_hwfn, u8 connection_handle)
Yuval Mintz0a7fb112016-10-01 21:59:55 +0300530{
531 struct qed_ll2_info *p_ll2_conn = NULL;
532 struct qed_ll2_rx_packet *p_pkt = NULL;
533 struct qed_ll2_rx_queue *p_rx;
534
535 p_ll2_conn = qed_ll2_handle_sanity_inactive(p_hwfn, connection_handle);
536 if (!p_ll2_conn)
537 return;
538
539 p_rx = &p_ll2_conn->rx_queue;
540
541 while (!list_empty(&p_rx->active_descq)) {
542 dma_addr_t rx_buf_addr;
543 void *cookie;
544 bool b_last;
545
546 p_pkt = list_first_entry(&p_rx->active_descq,
547 struct qed_ll2_rx_packet, list_entry);
548 if (!p_pkt)
549 break;
550
Wei Yongjunb4f0fd42016-10-17 15:17:51 +0000551 list_move_tail(&p_pkt->list_entry, &p_rx->free_descq);
Yuval Mintz0a7fb112016-10-01 21:59:55 +0300552
Yuval Mintz1d6cff42016-12-01 00:21:07 -0800553 if (p_ll2_conn->conn_type == QED_LL2_TYPE_ISCSI_OOO) {
554 struct qed_ooo_buffer *p_buffer;
Yuval Mintz0a7fb112016-10-01 21:59:55 +0300555
Yuval Mintz1d6cff42016-12-01 00:21:07 -0800556 p_buffer = (struct qed_ooo_buffer *)p_pkt->cookie;
557 qed_ooo_put_free_buffer(p_hwfn, p_hwfn->p_ooo_info,
558 p_buffer);
559 } else {
560 rx_buf_addr = p_pkt->rx_buf_addr;
561 cookie = p_pkt->cookie;
562
563 b_last = list_empty(&p_rx->active_descq);
564 }
Yuval Mintz0a7fb112016-10-01 21:59:55 +0300565 }
566}
567
Yuval Mintz1d6cff42016-12-01 00:21:07 -0800568#if IS_ENABLED(CONFIG_QED_ISCSI)
569static u8 qed_ll2_convert_rx_parse_to_tx_flags(u16 parse_flags)
570{
571 u8 bd_flags = 0;
572
573 if (GET_FIELD(parse_flags, PARSING_AND_ERR_FLAGS_TAG8021QEXIST))
574 SET_FIELD(bd_flags, CORE_TX_BD_FLAGS_VLAN_INSERTION, 1);
575
576 return bd_flags;
577}
578
579static int qed_ll2_lb_rxq_handler(struct qed_hwfn *p_hwfn,
580 struct qed_ll2_info *p_ll2_conn)
581{
582 struct qed_ll2_rx_queue *p_rx = &p_ll2_conn->rx_queue;
583 u16 packet_length = 0, parse_flags = 0, vlan = 0;
584 struct qed_ll2_rx_packet *p_pkt = NULL;
585 u32 num_ooo_add_to_peninsula = 0, cid;
586 union core_rx_cqe_union *cqe = NULL;
587 u16 cq_new_idx = 0, cq_old_idx = 0;
588 struct qed_ooo_buffer *p_buffer;
589 struct ooo_opaque *iscsi_ooo;
590 u8 placement_offset = 0;
591 u8 cqe_type;
592
593 cq_new_idx = le16_to_cpu(*p_rx->p_fw_cons);
594 cq_old_idx = qed_chain_get_cons_idx(&p_rx->rcq_chain);
595 if (cq_new_idx == cq_old_idx)
596 return 0;
597
598 while (cq_new_idx != cq_old_idx) {
599 struct core_rx_fast_path_cqe *p_cqe_fp;
600
601 cqe = qed_chain_consume(&p_rx->rcq_chain);
602 cq_old_idx = qed_chain_get_cons_idx(&p_rx->rcq_chain);
603 cqe_type = cqe->rx_cqe_sp.type;
604
605 if (cqe_type != CORE_RX_CQE_TYPE_REGULAR) {
606 DP_NOTICE(p_hwfn,
607 "Got a non-regular LB LL2 completion [type 0x%02x]\n",
608 cqe_type);
609 return -EINVAL;
610 }
611 p_cqe_fp = &cqe->rx_cqe_fp;
612
613 placement_offset = p_cqe_fp->placement_offset;
614 parse_flags = le16_to_cpu(p_cqe_fp->parse_flags.flags);
615 packet_length = le16_to_cpu(p_cqe_fp->packet_length);
616 vlan = le16_to_cpu(p_cqe_fp->vlan);
617 iscsi_ooo = (struct ooo_opaque *)&p_cqe_fp->opaque_data;
618 qed_ooo_save_history_entry(p_hwfn, p_hwfn->p_ooo_info,
619 iscsi_ooo);
620 cid = le32_to_cpu(iscsi_ooo->cid);
621
622 /* Process delete isle first */
623 if (iscsi_ooo->drop_size)
624 qed_ooo_delete_isles(p_hwfn, p_hwfn->p_ooo_info, cid,
625 iscsi_ooo->drop_isle,
626 iscsi_ooo->drop_size);
627
628 if (iscsi_ooo->ooo_opcode == TCP_EVENT_NOP)
629 continue;
630
631 /* Now process create/add/join isles */
632 if (list_empty(&p_rx->active_descq)) {
633 DP_NOTICE(p_hwfn,
634 "LL2 OOO RX chain has no submitted buffers\n"
635 );
636 return -EIO;
637 }
638
639 p_pkt = list_first_entry(&p_rx->active_descq,
640 struct qed_ll2_rx_packet, list_entry);
641
642 if ((iscsi_ooo->ooo_opcode == TCP_EVENT_ADD_NEW_ISLE) ||
643 (iscsi_ooo->ooo_opcode == TCP_EVENT_ADD_ISLE_RIGHT) ||
644 (iscsi_ooo->ooo_opcode == TCP_EVENT_ADD_ISLE_LEFT) ||
645 (iscsi_ooo->ooo_opcode == TCP_EVENT_ADD_PEN) ||
646 (iscsi_ooo->ooo_opcode == TCP_EVENT_JOIN)) {
647 if (!p_pkt) {
648 DP_NOTICE(p_hwfn,
649 "LL2 OOO RX packet is not valid\n");
650 return -EIO;
651 }
652 list_del(&p_pkt->list_entry);
653 p_buffer = (struct qed_ooo_buffer *)p_pkt->cookie;
654 p_buffer->packet_length = packet_length;
655 p_buffer->parse_flags = parse_flags;
656 p_buffer->vlan = vlan;
657 p_buffer->placement_offset = placement_offset;
658 qed_chain_consume(&p_rx->rxq_chain);
659 list_add_tail(&p_pkt->list_entry, &p_rx->free_descq);
660
661 switch (iscsi_ooo->ooo_opcode) {
662 case TCP_EVENT_ADD_NEW_ISLE:
663 qed_ooo_add_new_isle(p_hwfn,
664 p_hwfn->p_ooo_info,
665 cid,
666 iscsi_ooo->ooo_isle,
667 p_buffer);
668 break;
669 case TCP_EVENT_ADD_ISLE_RIGHT:
670 qed_ooo_add_new_buffer(p_hwfn,
671 p_hwfn->p_ooo_info,
672 cid,
673 iscsi_ooo->ooo_isle,
674 p_buffer,
675 QED_OOO_RIGHT_BUF);
676 break;
677 case TCP_EVENT_ADD_ISLE_LEFT:
678 qed_ooo_add_new_buffer(p_hwfn,
679 p_hwfn->p_ooo_info,
680 cid,
681 iscsi_ooo->ooo_isle,
682 p_buffer,
683 QED_OOO_LEFT_BUF);
684 break;
685 case TCP_EVENT_JOIN:
686 qed_ooo_add_new_buffer(p_hwfn,
687 p_hwfn->p_ooo_info,
688 cid,
689 iscsi_ooo->ooo_isle +
690 1,
691 p_buffer,
692 QED_OOO_LEFT_BUF);
693 qed_ooo_join_isles(p_hwfn,
694 p_hwfn->p_ooo_info,
695 cid, iscsi_ooo->ooo_isle);
696 break;
697 case TCP_EVENT_ADD_PEN:
698 num_ooo_add_to_peninsula++;
699 qed_ooo_put_ready_buffer(p_hwfn,
700 p_hwfn->p_ooo_info,
701 p_buffer, true);
702 break;
703 }
704 } else {
705 DP_NOTICE(p_hwfn,
706 "Unexpected event (%d) TX OOO completion\n",
707 iscsi_ooo->ooo_opcode);
708 }
709 }
710
711 return 0;
712}
713
714static void
715qed_ooo_submit_tx_buffers(struct qed_hwfn *p_hwfn,
716 struct qed_ll2_info *p_ll2_conn)
717{
718 struct qed_ooo_buffer *p_buffer;
719 int rc;
720 u16 l4_hdr_offset_w;
721 dma_addr_t first_frag;
722 u16 parse_flags;
723 u8 bd_flags;
724
725 /* Submit Tx buffers here */
726 while ((p_buffer = qed_ooo_get_ready_buffer(p_hwfn,
727 p_hwfn->p_ooo_info))) {
728 l4_hdr_offset_w = 0;
729 bd_flags = 0;
730
731 first_frag = p_buffer->rx_buffer_phys_addr +
732 p_buffer->placement_offset;
733 parse_flags = p_buffer->parse_flags;
734 bd_flags = qed_ll2_convert_rx_parse_to_tx_flags(parse_flags);
735 SET_FIELD(bd_flags, CORE_TX_BD_FLAGS_FORCE_VLAN_MODE, 1);
736 SET_FIELD(bd_flags, CORE_TX_BD_FLAGS_L4_PROTOCOL, 1);
737
738 rc = qed_ll2_prepare_tx_packet(p_hwfn, p_ll2_conn->my_id, 1,
739 p_buffer->vlan, bd_flags,
740 l4_hdr_offset_w,
741 p_ll2_conn->tx_dest, 0,
742 first_frag,
743 p_buffer->packet_length,
744 p_buffer, true);
745 if (rc) {
746 qed_ooo_put_ready_buffer(p_hwfn, p_hwfn->p_ooo_info,
747 p_buffer, false);
748 break;
749 }
750 }
751}
752
753static void
754qed_ooo_submit_rx_buffers(struct qed_hwfn *p_hwfn,
755 struct qed_ll2_info *p_ll2_conn)
756{
757 struct qed_ooo_buffer *p_buffer;
758 int rc;
759
760 while ((p_buffer = qed_ooo_get_free_buffer(p_hwfn,
761 p_hwfn->p_ooo_info))) {
762 rc = qed_ll2_post_rx_buffer(p_hwfn,
763 p_ll2_conn->my_id,
764 p_buffer->rx_buffer_phys_addr,
765 0, p_buffer, true);
766 if (rc) {
767 qed_ooo_put_free_buffer(p_hwfn,
768 p_hwfn->p_ooo_info, p_buffer);
769 break;
770 }
771 }
772}
773
774static int qed_ll2_lb_rxq_completion(struct qed_hwfn *p_hwfn, void *p_cookie)
775{
776 struct qed_ll2_info *p_ll2_conn = (struct qed_ll2_info *)p_cookie;
777 int rc;
778
779 rc = qed_ll2_lb_rxq_handler(p_hwfn, p_ll2_conn);
780 if (rc)
781 return rc;
782
783 qed_ooo_submit_rx_buffers(p_hwfn, p_ll2_conn);
784 qed_ooo_submit_tx_buffers(p_hwfn, p_ll2_conn);
785
786 return 0;
787}
788
789static int qed_ll2_lb_txq_completion(struct qed_hwfn *p_hwfn, void *p_cookie)
790{
791 struct qed_ll2_info *p_ll2_conn = (struct qed_ll2_info *)p_cookie;
792 struct qed_ll2_tx_queue *p_tx = &p_ll2_conn->tx_queue;
793 struct qed_ll2_tx_packet *p_pkt = NULL;
794 struct qed_ooo_buffer *p_buffer;
795 bool b_dont_submit_rx = false;
796 u16 new_idx = 0, num_bds = 0;
797 int rc;
798
799 new_idx = le16_to_cpu(*p_tx->p_fw_cons);
800 num_bds = ((s16)new_idx - (s16)p_tx->bds_idx);
801
802 if (!num_bds)
803 return 0;
804
805 while (num_bds) {
806 if (list_empty(&p_tx->active_descq))
807 return -EINVAL;
808
809 p_pkt = list_first_entry(&p_tx->active_descq,
810 struct qed_ll2_tx_packet, list_entry);
811 if (!p_pkt)
812 return -EINVAL;
813
814 if (p_pkt->bd_used != 1) {
815 DP_NOTICE(p_hwfn,
816 "Unexpectedly many BDs(%d) in TX OOO completion\n",
817 p_pkt->bd_used);
818 return -EINVAL;
819 }
820
821 list_del(&p_pkt->list_entry);
822
823 num_bds--;
824 p_tx->bds_idx++;
825 qed_chain_consume(&p_tx->txq_chain);
826
827 p_buffer = (struct qed_ooo_buffer *)p_pkt->cookie;
828 list_add_tail(&p_pkt->list_entry, &p_tx->free_descq);
829
830 if (b_dont_submit_rx) {
831 qed_ooo_put_free_buffer(p_hwfn, p_hwfn->p_ooo_info,
832 p_buffer);
833 continue;
834 }
835
836 rc = qed_ll2_post_rx_buffer(p_hwfn, p_ll2_conn->my_id,
837 p_buffer->rx_buffer_phys_addr, 0,
838 p_buffer, true);
839 if (rc != 0) {
840 qed_ooo_put_free_buffer(p_hwfn,
841 p_hwfn->p_ooo_info, p_buffer);
842 b_dont_submit_rx = true;
843 }
844 }
845
846 qed_ooo_submit_tx_buffers(p_hwfn, p_ll2_conn);
847
848 return 0;
849}
850
851static int
852qed_ll2_acquire_connection_ooo(struct qed_hwfn *p_hwfn,
853 struct qed_ll2_info *p_ll2_info,
854 u16 rx_num_ooo_buffers, u16 mtu)
855{
856 struct qed_ooo_buffer *p_buf = NULL;
857 void *p_virt;
858 u16 buf_idx;
859 int rc = 0;
860
861 if (p_ll2_info->conn_type != QED_LL2_TYPE_ISCSI_OOO)
862 return rc;
863
864 if (!rx_num_ooo_buffers)
865 return -EINVAL;
866
867 for (buf_idx = 0; buf_idx < rx_num_ooo_buffers; buf_idx++) {
868 p_buf = kzalloc(sizeof(*p_buf), GFP_KERNEL);
869 if (!p_buf) {
870 rc = -ENOMEM;
871 goto out;
872 }
873
874 p_buf->rx_buffer_size = mtu + 26 + ETH_CACHE_LINE_SIZE;
875 p_buf->rx_buffer_size = (p_buf->rx_buffer_size +
876 ETH_CACHE_LINE_SIZE - 1) &
877 ~(ETH_CACHE_LINE_SIZE - 1);
878 p_virt = dma_alloc_coherent(&p_hwfn->cdev->pdev->dev,
879 p_buf->rx_buffer_size,
880 &p_buf->rx_buffer_phys_addr,
881 GFP_KERNEL);
882 if (!p_virt) {
883 kfree(p_buf);
884 rc = -ENOMEM;
885 goto out;
886 }
887
888 p_buf->rx_buffer_virt_addr = p_virt;
889 qed_ooo_put_free_buffer(p_hwfn, p_hwfn->p_ooo_info, p_buf);
890 }
891
892 DP_VERBOSE(p_hwfn, QED_MSG_LL2,
893 "Allocated [%04x] LL2 OOO buffers [each of size 0x%08x]\n",
894 rx_num_ooo_buffers, p_buf->rx_buffer_size);
895
896out:
897 return rc;
898}
899
900static void
901qed_ll2_establish_connection_ooo(struct qed_hwfn *p_hwfn,
902 struct qed_ll2_info *p_ll2_conn)
903{
904 if (p_ll2_conn->conn_type != QED_LL2_TYPE_ISCSI_OOO)
905 return;
906
907 qed_ooo_release_all_isles(p_hwfn, p_hwfn->p_ooo_info);
908 qed_ooo_submit_rx_buffers(p_hwfn, p_ll2_conn);
909}
910
911static void qed_ll2_release_connection_ooo(struct qed_hwfn *p_hwfn,
912 struct qed_ll2_info *p_ll2_conn)
913{
914 struct qed_ooo_buffer *p_buffer;
915
916 if (p_ll2_conn->conn_type != QED_LL2_TYPE_ISCSI_OOO)
917 return;
918
919 qed_ooo_release_all_isles(p_hwfn, p_hwfn->p_ooo_info);
920 while ((p_buffer = qed_ooo_get_free_buffer(p_hwfn,
921 p_hwfn->p_ooo_info))) {
922 dma_free_coherent(&p_hwfn->cdev->pdev->dev,
923 p_buffer->rx_buffer_size,
924 p_buffer->rx_buffer_virt_addr,
925 p_buffer->rx_buffer_phys_addr);
926 kfree(p_buffer);
927 }
928}
929
930static void qed_ll2_stop_ooo(struct qed_dev *cdev)
931{
932 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
933 u8 *handle = &hwfn->pf_params.iscsi_pf_params.ll2_ooo_queue_id;
934
935 DP_VERBOSE(cdev, QED_MSG_STORAGE, "Stopping LL2 OOO queue [%02x]\n",
936 *handle);
937
938 qed_ll2_terminate_connection(hwfn, *handle);
939 qed_ll2_release_connection(hwfn, *handle);
940 *handle = QED_LL2_UNUSED_HANDLE;
941}
942
943static int qed_ll2_start_ooo(struct qed_dev *cdev,
944 struct qed_ll2_params *params)
945{
946 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
947 u8 *handle = &hwfn->pf_params.iscsi_pf_params.ll2_ooo_queue_id;
948 struct qed_ll2_info *ll2_info;
949 int rc;
950
951 ll2_info = kzalloc(sizeof(*ll2_info), GFP_KERNEL);
952 if (!ll2_info)
953 return -ENOMEM;
954 ll2_info->conn_type = QED_LL2_TYPE_ISCSI_OOO;
955 ll2_info->mtu = params->mtu;
956 ll2_info->rx_drop_ttl0_flg = params->drop_ttl0_packets;
957 ll2_info->rx_vlan_removal_en = params->rx_vlan_stripping;
958 ll2_info->tx_tc = OOO_LB_TC;
959 ll2_info->tx_dest = CORE_TX_DEST_LB;
960
961 rc = qed_ll2_acquire_connection(hwfn, ll2_info,
962 QED_LL2_RX_SIZE, QED_LL2_TX_SIZE,
963 handle);
964 kfree(ll2_info);
965 if (rc) {
966 DP_INFO(cdev, "Failed to acquire LL2 OOO connection\n");
967 goto out;
968 }
969
970 rc = qed_ll2_establish_connection(hwfn, *handle);
971 if (rc) {
972 DP_INFO(cdev, "Failed to establist LL2 OOO connection\n");
973 goto fail;
974 }
975
976 return 0;
977
978fail:
979 qed_ll2_release_connection(hwfn, *handle);
980out:
981 *handle = QED_LL2_UNUSED_HANDLE;
982 return rc;
983}
984#else /* IS_ENABLED(CONFIG_QED_ISCSI) */
985static int qed_ll2_lb_rxq_completion(struct qed_hwfn *p_hwfn,
986 void *p_cookie) { return -EINVAL; }
987static int qed_ll2_lb_txq_completion(struct qed_hwfn *p_hwfn,
988 void *p_cookie) { return -EINVAL; }
989static inline int
990qed_ll2_acquire_connection_ooo(struct qed_hwfn *p_hwfn,
991 struct qed_ll2_info *p_ll2_info,
992 u16 rx_num_ooo_buffers, u16 mtu) { return 0; }
993static inline void
994qed_ll2_establish_connection_ooo(struct qed_hwfn *p_hwfn,
995 struct qed_ll2_info *p_ll2_conn) { return; }
996static inline void
997qed_ll2_release_connection_ooo(struct qed_hwfn *p_hwfn,
998 struct qed_ll2_info *p_ll2_conn) { return; }
999static inline void qed_ll2_stop_ooo(struct qed_dev *cdev) { return; }
1000static inline int qed_ll2_start_ooo(struct qed_dev *cdev,
1001 struct qed_ll2_params *params)
1002 { return -EINVAL; }
1003#endif /* IS_ENABLED(CONFIG_QED_ISCSI) */
1004
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001005static int qed_sp_ll2_rx_queue_start(struct qed_hwfn *p_hwfn,
1006 struct qed_ll2_info *p_ll2_conn,
1007 u8 action_on_error)
1008{
1009 enum qed_ll2_conn_type conn_type = p_ll2_conn->conn_type;
1010 struct qed_ll2_rx_queue *p_rx = &p_ll2_conn->rx_queue;
1011 struct core_rx_start_ramrod_data *p_ramrod = NULL;
1012 struct qed_spq_entry *p_ent = NULL;
1013 struct qed_sp_init_data init_data;
1014 u16 cqe_pbl_size;
1015 int rc = 0;
1016
1017 /* Get SPQ entry */
1018 memset(&init_data, 0, sizeof(init_data));
1019 init_data.cid = p_ll2_conn->cid;
1020 init_data.opaque_fid = p_hwfn->hw_info.opaque_fid;
1021 init_data.comp_mode = QED_SPQ_MODE_EBLOCK;
1022
1023 rc = qed_sp_init_request(p_hwfn, &p_ent,
1024 CORE_RAMROD_RX_QUEUE_START,
1025 PROTOCOLID_CORE, &init_data);
1026 if (rc)
1027 return rc;
1028
1029 p_ramrod = &p_ent->ramrod.core_rx_queue_start;
1030
1031 p_ramrod->sb_id = cpu_to_le16(qed_int_get_sp_sb_id(p_hwfn));
1032 p_ramrod->sb_index = p_rx->rx_sb_index;
1033 p_ramrod->complete_event_flg = 1;
1034
1035 p_ramrod->mtu = cpu_to_le16(p_ll2_conn->mtu);
1036 DMA_REGPAIR_LE(p_ramrod->bd_base,
1037 p_rx->rxq_chain.p_phys_addr);
1038 cqe_pbl_size = (u16)qed_chain_get_page_cnt(&p_rx->rcq_chain);
1039 p_ramrod->num_of_pbl_pages = cpu_to_le16(cqe_pbl_size);
1040 DMA_REGPAIR_LE(p_ramrod->cqe_pbl_addr,
1041 qed_chain_get_pbl_phys(&p_rx->rcq_chain));
1042
1043 p_ramrod->drop_ttl0_flg = p_ll2_conn->rx_drop_ttl0_flg;
1044 p_ramrod->inner_vlan_removal_en = p_ll2_conn->rx_vlan_removal_en;
1045 p_ramrod->queue_id = p_ll2_conn->queue_id;
Yuval Mintz1d6cff42016-12-01 00:21:07 -08001046 p_ramrod->main_func_queue = (conn_type == QED_LL2_TYPE_ISCSI_OOO) ? 0
1047 : 1;
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001048
1049 if ((IS_MF_DEFAULT(p_hwfn) || IS_MF_SI(p_hwfn)) &&
1050 p_ramrod->main_func_queue && (conn_type != QED_LL2_TYPE_ROCE)) {
1051 p_ramrod->mf_si_bcast_accept_all = 1;
1052 p_ramrod->mf_si_mcast_accept_all = 1;
1053 } else {
1054 p_ramrod->mf_si_bcast_accept_all = 0;
1055 p_ramrod->mf_si_mcast_accept_all = 0;
1056 }
1057
1058 p_ramrod->action_on_error.error_type = action_on_error;
Ram Amraniabd49672016-10-01 22:00:01 +03001059 p_ramrod->gsi_offload_flag = p_ll2_conn->gsi_enable;
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001060 return qed_spq_post(p_hwfn, p_ent, NULL);
1061}
1062
1063static int qed_sp_ll2_tx_queue_start(struct qed_hwfn *p_hwfn,
1064 struct qed_ll2_info *p_ll2_conn)
1065{
1066 enum qed_ll2_conn_type conn_type = p_ll2_conn->conn_type;
1067 struct qed_ll2_tx_queue *p_tx = &p_ll2_conn->tx_queue;
1068 struct core_tx_start_ramrod_data *p_ramrod = NULL;
1069 struct qed_spq_entry *p_ent = NULL;
1070 struct qed_sp_init_data init_data;
1071 union qed_qm_pq_params pq_params;
1072 u16 pq_id = 0, pbl_size;
1073 int rc = -EINVAL;
1074
1075 if (!QED_LL2_TX_REGISTERED(p_ll2_conn))
1076 return 0;
1077
Yuval Mintz1d6cff42016-12-01 00:21:07 -08001078 if (p_ll2_conn->conn_type == QED_LL2_TYPE_ISCSI_OOO)
1079 p_ll2_conn->tx_stats_en = 0;
1080 else
1081 p_ll2_conn->tx_stats_en = 1;
1082
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001083 /* Get SPQ entry */
1084 memset(&init_data, 0, sizeof(init_data));
1085 init_data.cid = p_ll2_conn->cid;
1086 init_data.opaque_fid = p_hwfn->hw_info.opaque_fid;
1087 init_data.comp_mode = QED_SPQ_MODE_EBLOCK;
1088
1089 rc = qed_sp_init_request(p_hwfn, &p_ent,
1090 CORE_RAMROD_TX_QUEUE_START,
1091 PROTOCOLID_CORE, &init_data);
1092 if (rc)
1093 return rc;
1094
1095 p_ramrod = &p_ent->ramrod.core_tx_queue_start;
1096
1097 p_ramrod->sb_id = cpu_to_le16(qed_int_get_sp_sb_id(p_hwfn));
1098 p_ramrod->sb_index = p_tx->tx_sb_index;
1099 p_ramrod->mtu = cpu_to_le16(p_ll2_conn->mtu);
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001100 p_ramrod->stats_en = p_ll2_conn->tx_stats_en;
1101 p_ramrod->stats_id = p_ll2_conn->tx_stats_id;
1102
1103 DMA_REGPAIR_LE(p_ramrod->pbl_base_addr,
1104 qed_chain_get_pbl_phys(&p_tx->txq_chain));
1105 pbl_size = qed_chain_get_page_cnt(&p_tx->txq_chain);
1106 p_ramrod->pbl_size = cpu_to_le16(pbl_size);
1107
1108 memset(&pq_params, 0, sizeof(pq_params));
1109 pq_params.core.tc = p_ll2_conn->tx_tc;
1110 pq_id = qed_get_qm_pq(p_hwfn, PROTOCOLID_CORE, &pq_params);
1111 p_ramrod->qm_pq_id = cpu_to_le16(pq_id);
1112
1113 switch (conn_type) {
1114 case QED_LL2_TYPE_ISCSI:
1115 case QED_LL2_TYPE_ISCSI_OOO:
1116 p_ramrod->conn_type = PROTOCOLID_ISCSI;
1117 break;
1118 case QED_LL2_TYPE_ROCE:
1119 p_ramrod->conn_type = PROTOCOLID_ROCE;
1120 break;
1121 default:
1122 p_ramrod->conn_type = PROTOCOLID_ETH;
1123 DP_NOTICE(p_hwfn, "Unknown connection type: %d\n", conn_type);
1124 }
1125
Ram Amraniabd49672016-10-01 22:00:01 +03001126 p_ramrod->gsi_offload_flag = p_ll2_conn->gsi_enable;
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001127 return qed_spq_post(p_hwfn, p_ent, NULL);
1128}
1129
1130static int qed_sp_ll2_rx_queue_stop(struct qed_hwfn *p_hwfn,
1131 struct qed_ll2_info *p_ll2_conn)
1132{
1133 struct core_rx_stop_ramrod_data *p_ramrod = NULL;
1134 struct qed_spq_entry *p_ent = NULL;
1135 struct qed_sp_init_data init_data;
1136 int rc = -EINVAL;
1137
1138 /* Get SPQ entry */
1139 memset(&init_data, 0, sizeof(init_data));
1140 init_data.cid = p_ll2_conn->cid;
1141 init_data.opaque_fid = p_hwfn->hw_info.opaque_fid;
1142 init_data.comp_mode = QED_SPQ_MODE_EBLOCK;
1143
1144 rc = qed_sp_init_request(p_hwfn, &p_ent,
1145 CORE_RAMROD_RX_QUEUE_STOP,
1146 PROTOCOLID_CORE, &init_data);
1147 if (rc)
1148 return rc;
1149
1150 p_ramrod = &p_ent->ramrod.core_rx_queue_stop;
1151
1152 p_ramrod->complete_event_flg = 1;
1153 p_ramrod->queue_id = p_ll2_conn->queue_id;
1154
1155 return qed_spq_post(p_hwfn, p_ent, NULL);
1156}
1157
1158static int qed_sp_ll2_tx_queue_stop(struct qed_hwfn *p_hwfn,
1159 struct qed_ll2_info *p_ll2_conn)
1160{
1161 struct qed_spq_entry *p_ent = NULL;
1162 struct qed_sp_init_data init_data;
1163 int rc = -EINVAL;
1164
1165 /* Get SPQ entry */
1166 memset(&init_data, 0, sizeof(init_data));
1167 init_data.cid = p_ll2_conn->cid;
1168 init_data.opaque_fid = p_hwfn->hw_info.opaque_fid;
1169 init_data.comp_mode = QED_SPQ_MODE_EBLOCK;
1170
1171 rc = qed_sp_init_request(p_hwfn, &p_ent,
1172 CORE_RAMROD_TX_QUEUE_STOP,
1173 PROTOCOLID_CORE, &init_data);
1174 if (rc)
1175 return rc;
1176
1177 return qed_spq_post(p_hwfn, p_ent, NULL);
1178}
1179
1180static int
1181qed_ll2_acquire_connection_rx(struct qed_hwfn *p_hwfn,
1182 struct qed_ll2_info *p_ll2_info, u16 rx_num_desc)
1183{
1184 struct qed_ll2_rx_packet *p_descq;
1185 u32 capacity;
1186 int rc = 0;
1187
1188 if (!rx_num_desc)
1189 goto out;
1190
1191 rc = qed_chain_alloc(p_hwfn->cdev,
1192 QED_CHAIN_USE_TO_CONSUME_PRODUCE,
1193 QED_CHAIN_MODE_NEXT_PTR,
1194 QED_CHAIN_CNT_TYPE_U16,
1195 rx_num_desc,
1196 sizeof(struct core_rx_bd),
1197 &p_ll2_info->rx_queue.rxq_chain);
1198 if (rc) {
1199 DP_NOTICE(p_hwfn, "Failed to allocate ll2 rxq chain\n");
1200 goto out;
1201 }
1202
1203 capacity = qed_chain_get_capacity(&p_ll2_info->rx_queue.rxq_chain);
1204 p_descq = kcalloc(capacity, sizeof(struct qed_ll2_rx_packet),
1205 GFP_KERNEL);
1206 if (!p_descq) {
1207 rc = -ENOMEM;
1208 DP_NOTICE(p_hwfn, "Failed to allocate ll2 Rx desc\n");
1209 goto out;
1210 }
1211 p_ll2_info->rx_queue.descq_array = p_descq;
1212
1213 rc = qed_chain_alloc(p_hwfn->cdev,
1214 QED_CHAIN_USE_TO_CONSUME_PRODUCE,
1215 QED_CHAIN_MODE_PBL,
1216 QED_CHAIN_CNT_TYPE_U16,
1217 rx_num_desc,
1218 sizeof(struct core_rx_fast_path_cqe),
1219 &p_ll2_info->rx_queue.rcq_chain);
1220 if (rc) {
1221 DP_NOTICE(p_hwfn, "Failed to allocate ll2 rcq chain\n");
1222 goto out;
1223 }
1224
1225 DP_VERBOSE(p_hwfn, QED_MSG_LL2,
1226 "Allocated LL2 Rxq [Type %08x] with 0x%08x buffers\n",
1227 p_ll2_info->conn_type, rx_num_desc);
1228
1229out:
1230 return rc;
1231}
1232
1233static int qed_ll2_acquire_connection_tx(struct qed_hwfn *p_hwfn,
1234 struct qed_ll2_info *p_ll2_info,
1235 u16 tx_num_desc)
1236{
1237 struct qed_ll2_tx_packet *p_descq;
1238 u32 capacity;
1239 int rc = 0;
1240
1241 if (!tx_num_desc)
1242 goto out;
1243
1244 rc = qed_chain_alloc(p_hwfn->cdev,
1245 QED_CHAIN_USE_TO_CONSUME_PRODUCE,
1246 QED_CHAIN_MODE_PBL,
1247 QED_CHAIN_CNT_TYPE_U16,
1248 tx_num_desc,
1249 sizeof(struct core_tx_bd),
1250 &p_ll2_info->tx_queue.txq_chain);
1251 if (rc)
1252 goto out;
1253
1254 capacity = qed_chain_get_capacity(&p_ll2_info->tx_queue.txq_chain);
1255 p_descq = kcalloc(capacity, sizeof(struct qed_ll2_tx_packet),
1256 GFP_KERNEL);
1257 if (!p_descq) {
1258 rc = -ENOMEM;
1259 goto out;
1260 }
1261 p_ll2_info->tx_queue.descq_array = p_descq;
1262
1263 DP_VERBOSE(p_hwfn, QED_MSG_LL2,
1264 "Allocated LL2 Txq [Type %08x] with 0x%08x buffers\n",
1265 p_ll2_info->conn_type, tx_num_desc);
1266
1267out:
1268 if (rc)
1269 DP_NOTICE(p_hwfn,
1270 "Can't allocate memory for Tx LL2 with 0x%08x buffers\n",
1271 tx_num_desc);
1272 return rc;
1273}
1274
1275int qed_ll2_acquire_connection(struct qed_hwfn *p_hwfn,
1276 struct qed_ll2_info *p_params,
1277 u16 rx_num_desc,
1278 u16 tx_num_desc,
1279 u8 *p_connection_handle)
1280{
1281 qed_int_comp_cb_t comp_rx_cb, comp_tx_cb;
1282 struct qed_ll2_info *p_ll2_info = NULL;
1283 int rc;
1284 u8 i;
1285
1286 if (!p_connection_handle || !p_hwfn->p_ll2_info)
1287 return -EINVAL;
1288
1289 /* Find a free connection to be used */
1290 for (i = 0; (i < QED_MAX_NUM_OF_LL2_CONNECTIONS); i++) {
1291 mutex_lock(&p_hwfn->p_ll2_info[i].mutex);
1292 if (p_hwfn->p_ll2_info[i].b_active) {
1293 mutex_unlock(&p_hwfn->p_ll2_info[i].mutex);
1294 continue;
1295 }
1296
1297 p_hwfn->p_ll2_info[i].b_active = true;
1298 p_ll2_info = &p_hwfn->p_ll2_info[i];
1299 mutex_unlock(&p_hwfn->p_ll2_info[i].mutex);
1300 break;
1301 }
1302 if (!p_ll2_info)
1303 return -EBUSY;
1304
1305 p_ll2_info->conn_type = p_params->conn_type;
1306 p_ll2_info->mtu = p_params->mtu;
1307 p_ll2_info->rx_drop_ttl0_flg = p_params->rx_drop_ttl0_flg;
1308 p_ll2_info->rx_vlan_removal_en = p_params->rx_vlan_removal_en;
1309 p_ll2_info->tx_tc = p_params->tx_tc;
1310 p_ll2_info->tx_dest = p_params->tx_dest;
1311 p_ll2_info->ai_err_packet_too_big = p_params->ai_err_packet_too_big;
1312 p_ll2_info->ai_err_no_buf = p_params->ai_err_no_buf;
Ram Amraniabd49672016-10-01 22:00:01 +03001313 p_ll2_info->gsi_enable = p_params->gsi_enable;
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001314
1315 rc = qed_ll2_acquire_connection_rx(p_hwfn, p_ll2_info, rx_num_desc);
1316 if (rc)
1317 goto q_allocate_fail;
1318
1319 rc = qed_ll2_acquire_connection_tx(p_hwfn, p_ll2_info, tx_num_desc);
1320 if (rc)
1321 goto q_allocate_fail;
1322
Yuval Mintz1d6cff42016-12-01 00:21:07 -08001323 rc = qed_ll2_acquire_connection_ooo(p_hwfn, p_ll2_info,
1324 rx_num_desc * 2, p_params->mtu);
1325 if (rc)
1326 goto q_allocate_fail;
1327
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001328 /* Register callbacks for the Rx/Tx queues */
Yuval Mintz1d6cff42016-12-01 00:21:07 -08001329 if (p_params->conn_type == QED_LL2_TYPE_ISCSI_OOO) {
1330 comp_rx_cb = qed_ll2_lb_rxq_completion;
1331 comp_tx_cb = qed_ll2_lb_txq_completion;
1332 } else {
1333 comp_rx_cb = qed_ll2_rxq_completion;
1334 comp_tx_cb = qed_ll2_txq_completion;
1335 }
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001336
1337 if (rx_num_desc) {
1338 qed_int_register_cb(p_hwfn, comp_rx_cb,
1339 &p_hwfn->p_ll2_info[i],
1340 &p_ll2_info->rx_queue.rx_sb_index,
1341 &p_ll2_info->rx_queue.p_fw_cons);
1342 p_ll2_info->rx_queue.b_cb_registred = true;
1343 }
1344
1345 if (tx_num_desc) {
1346 qed_int_register_cb(p_hwfn,
1347 comp_tx_cb,
1348 &p_hwfn->p_ll2_info[i],
1349 &p_ll2_info->tx_queue.tx_sb_index,
1350 &p_ll2_info->tx_queue.p_fw_cons);
1351 p_ll2_info->tx_queue.b_cb_registred = true;
1352 }
1353
1354 *p_connection_handle = i;
1355 return rc;
1356
1357q_allocate_fail:
1358 qed_ll2_release_connection(p_hwfn, i);
1359 return -ENOMEM;
1360}
1361
1362static int qed_ll2_establish_connection_rx(struct qed_hwfn *p_hwfn,
1363 struct qed_ll2_info *p_ll2_conn)
1364{
1365 u8 action_on_error = 0;
1366
1367 if (!QED_LL2_RX_REGISTERED(p_ll2_conn))
1368 return 0;
1369
1370 DIRECT_REG_WR(p_ll2_conn->rx_queue.set_prod_addr, 0x0);
1371
1372 SET_FIELD(action_on_error,
1373 CORE_RX_ACTION_ON_ERROR_PACKET_TOO_BIG,
1374 p_ll2_conn->ai_err_packet_too_big);
1375 SET_FIELD(action_on_error,
1376 CORE_RX_ACTION_ON_ERROR_NO_BUFF, p_ll2_conn->ai_err_no_buf);
1377
1378 return qed_sp_ll2_rx_queue_start(p_hwfn, p_ll2_conn, action_on_error);
1379}
1380
1381int qed_ll2_establish_connection(struct qed_hwfn *p_hwfn, u8 connection_handle)
1382{
1383 struct qed_ll2_info *p_ll2_conn;
1384 struct qed_ll2_rx_queue *p_rx;
1385 struct qed_ll2_tx_queue *p_tx;
1386 int rc = -EINVAL;
1387 u32 i, capacity;
1388 u8 qid;
1389
1390 p_ll2_conn = qed_ll2_handle_sanity_lock(p_hwfn, connection_handle);
1391 if (!p_ll2_conn)
1392 return -EINVAL;
1393 p_rx = &p_ll2_conn->rx_queue;
1394 p_tx = &p_ll2_conn->tx_queue;
1395
1396 qed_chain_reset(&p_rx->rxq_chain);
1397 qed_chain_reset(&p_rx->rcq_chain);
1398 INIT_LIST_HEAD(&p_rx->active_descq);
1399 INIT_LIST_HEAD(&p_rx->free_descq);
1400 INIT_LIST_HEAD(&p_rx->posting_descq);
1401 spin_lock_init(&p_rx->lock);
1402 capacity = qed_chain_get_capacity(&p_rx->rxq_chain);
1403 for (i = 0; i < capacity; i++)
1404 list_add_tail(&p_rx->descq_array[i].list_entry,
1405 &p_rx->free_descq);
1406 *p_rx->p_fw_cons = 0;
1407
1408 qed_chain_reset(&p_tx->txq_chain);
1409 INIT_LIST_HEAD(&p_tx->active_descq);
1410 INIT_LIST_HEAD(&p_tx->free_descq);
1411 INIT_LIST_HEAD(&p_tx->sending_descq);
1412 spin_lock_init(&p_tx->lock);
1413 capacity = qed_chain_get_capacity(&p_tx->txq_chain);
1414 for (i = 0; i < capacity; i++)
1415 list_add_tail(&p_tx->descq_array[i].list_entry,
1416 &p_tx->free_descq);
1417 p_tx->cur_completing_bd_idx = 0;
1418 p_tx->bds_idx = 0;
1419 p_tx->b_completing_packet = false;
1420 p_tx->cur_send_packet = NULL;
1421 p_tx->cur_send_frag_num = 0;
1422 p_tx->cur_completing_frag_num = 0;
1423 *p_tx->p_fw_cons = 0;
1424
1425 qed_cxt_acquire_cid(p_hwfn, PROTOCOLID_CORE, &p_ll2_conn->cid);
1426
1427 qid = p_hwfn->hw_info.resc_start[QED_LL2_QUEUE] + connection_handle;
1428 p_ll2_conn->queue_id = qid;
1429 p_ll2_conn->tx_stats_id = qid;
1430 p_rx->set_prod_addr = (u8 __iomem *)p_hwfn->regview +
1431 GTT_BAR0_MAP_REG_TSDM_RAM +
1432 TSTORM_LL2_RX_PRODS_OFFSET(qid);
1433 p_tx->doorbell_addr = (u8 __iomem *)p_hwfn->doorbells +
1434 qed_db_addr(p_ll2_conn->cid,
1435 DQ_DEMS_LEGACY);
1436
1437 rc = qed_ll2_establish_connection_rx(p_hwfn, p_ll2_conn);
1438 if (rc)
1439 return rc;
1440
1441 rc = qed_sp_ll2_tx_queue_start(p_hwfn, p_ll2_conn);
1442 if (rc)
1443 return rc;
1444
1445 if (p_hwfn->hw_info.personality != QED_PCI_ETH_ROCE)
1446 qed_wr(p_hwfn, p_hwfn->p_main_ptt, PRS_REG_USE_LIGHT_L2, 1);
1447
Yuval Mintz1d6cff42016-12-01 00:21:07 -08001448 qed_ll2_establish_connection_ooo(p_hwfn, p_ll2_conn);
1449
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001450 return rc;
1451}
1452
1453static void qed_ll2_post_rx_buffer_notify_fw(struct qed_hwfn *p_hwfn,
1454 struct qed_ll2_rx_queue *p_rx,
1455 struct qed_ll2_rx_packet *p_curp)
1456{
1457 struct qed_ll2_rx_packet *p_posting_packet = NULL;
1458 struct core_ll2_rx_prod rx_prod = { 0, 0, 0 };
1459 bool b_notify_fw = false;
1460 u16 bd_prod, cq_prod;
1461
1462 /* This handles the flushing of already posted buffers */
1463 while (!list_empty(&p_rx->posting_descq)) {
1464 p_posting_packet = list_first_entry(&p_rx->posting_descq,
1465 struct qed_ll2_rx_packet,
1466 list_entry);
Wei Yongjunb4f0fd42016-10-17 15:17:51 +00001467 list_move_tail(&p_posting_packet->list_entry,
1468 &p_rx->active_descq);
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001469 b_notify_fw = true;
1470 }
1471
1472 /* This handles the supplied packet [if there is one] */
1473 if (p_curp) {
1474 list_add_tail(&p_curp->list_entry, &p_rx->active_descq);
1475 b_notify_fw = true;
1476 }
1477
1478 if (!b_notify_fw)
1479 return;
1480
1481 bd_prod = qed_chain_get_prod_idx(&p_rx->rxq_chain);
1482 cq_prod = qed_chain_get_prod_idx(&p_rx->rcq_chain);
1483 rx_prod.bd_prod = cpu_to_le16(bd_prod);
1484 rx_prod.cqe_prod = cpu_to_le16(cq_prod);
1485 DIRECT_REG_WR(p_rx->set_prod_addr, *((u32 *)&rx_prod));
1486}
1487
1488int qed_ll2_post_rx_buffer(struct qed_hwfn *p_hwfn,
1489 u8 connection_handle,
1490 dma_addr_t addr,
1491 u16 buf_len, void *cookie, u8 notify_fw)
1492{
1493 struct core_rx_bd_with_buff_len *p_curb = NULL;
1494 struct qed_ll2_rx_packet *p_curp = NULL;
1495 struct qed_ll2_info *p_ll2_conn;
1496 struct qed_ll2_rx_queue *p_rx;
1497 unsigned long flags;
1498 void *p_data;
1499 int rc = 0;
1500
1501 p_ll2_conn = qed_ll2_handle_sanity(p_hwfn, connection_handle);
1502 if (!p_ll2_conn)
1503 return -EINVAL;
1504 p_rx = &p_ll2_conn->rx_queue;
1505
1506 spin_lock_irqsave(&p_rx->lock, flags);
1507 if (!list_empty(&p_rx->free_descq))
1508 p_curp = list_first_entry(&p_rx->free_descq,
1509 struct qed_ll2_rx_packet, list_entry);
1510 if (p_curp) {
1511 if (qed_chain_get_elem_left(&p_rx->rxq_chain) &&
1512 qed_chain_get_elem_left(&p_rx->rcq_chain)) {
1513 p_data = qed_chain_produce(&p_rx->rxq_chain);
1514 p_curb = (struct core_rx_bd_with_buff_len *)p_data;
1515 qed_chain_produce(&p_rx->rcq_chain);
1516 }
1517 }
1518
1519 /* If we're lacking entires, let's try to flush buffers to FW */
1520 if (!p_curp || !p_curb) {
1521 rc = -EBUSY;
1522 p_curp = NULL;
1523 goto out_notify;
1524 }
1525
1526 /* We have an Rx packet we can fill */
1527 DMA_REGPAIR_LE(p_curb->addr, addr);
1528 p_curb->buff_length = cpu_to_le16(buf_len);
1529 p_curp->rx_buf_addr = addr;
1530 p_curp->cookie = cookie;
1531 p_curp->rxq_bd = p_curb;
1532 p_curp->buf_length = buf_len;
1533 list_del(&p_curp->list_entry);
1534
1535 /* Check if we only want to enqueue this packet without informing FW */
1536 if (!notify_fw) {
1537 list_add_tail(&p_curp->list_entry, &p_rx->posting_descq);
1538 goto out;
1539 }
1540
1541out_notify:
1542 qed_ll2_post_rx_buffer_notify_fw(p_hwfn, p_rx, p_curp);
1543out:
1544 spin_unlock_irqrestore(&p_rx->lock, flags);
1545 return rc;
1546}
1547
1548static void qed_ll2_prepare_tx_packet_set(struct qed_hwfn *p_hwfn,
1549 struct qed_ll2_tx_queue *p_tx,
1550 struct qed_ll2_tx_packet *p_curp,
1551 u8 num_of_bds,
1552 dma_addr_t first_frag,
1553 u16 first_frag_len, void *p_cookie,
1554 u8 notify_fw)
1555{
1556 list_del(&p_curp->list_entry);
1557 p_curp->cookie = p_cookie;
1558 p_curp->bd_used = num_of_bds;
1559 p_curp->notify_fw = notify_fw;
1560 p_tx->cur_send_packet = p_curp;
1561 p_tx->cur_send_frag_num = 0;
1562
1563 p_curp->bds_set[p_tx->cur_send_frag_num].tx_frag = first_frag;
1564 p_curp->bds_set[p_tx->cur_send_frag_num].frag_len = first_frag_len;
1565 p_tx->cur_send_frag_num++;
1566}
1567
1568static void qed_ll2_prepare_tx_packet_set_bd(struct qed_hwfn *p_hwfn,
1569 struct qed_ll2_info *p_ll2,
1570 struct qed_ll2_tx_packet *p_curp,
1571 u8 num_of_bds,
1572 enum core_tx_dest tx_dest,
1573 u16 vlan,
1574 u8 bd_flags,
1575 u16 l4_hdr_offset_w,
Ram Amraniabd49672016-10-01 22:00:01 +03001576 enum core_roce_flavor_type type,
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001577 dma_addr_t first_frag,
1578 u16 first_frag_len)
1579{
1580 struct qed_chain *p_tx_chain = &p_ll2->tx_queue.txq_chain;
1581 u16 prod_idx = qed_chain_get_prod_idx(p_tx_chain);
1582 struct core_tx_bd *start_bd = NULL;
1583 u16 frag_idx;
1584
1585 start_bd = (struct core_tx_bd *)qed_chain_produce(p_tx_chain);
1586 start_bd->nw_vlan_or_lb_echo = cpu_to_le16(vlan);
1587 SET_FIELD(start_bd->bitfield1, CORE_TX_BD_L4_HDR_OFFSET_W,
1588 cpu_to_le16(l4_hdr_offset_w));
1589 SET_FIELD(start_bd->bitfield1, CORE_TX_BD_TX_DST, tx_dest);
1590 start_bd->bd_flags.as_bitfield = bd_flags;
1591 start_bd->bd_flags.as_bitfield |= CORE_TX_BD_FLAGS_START_BD_MASK <<
1592 CORE_TX_BD_FLAGS_START_BD_SHIFT;
1593 SET_FIELD(start_bd->bitfield0, CORE_TX_BD_NBDS, num_of_bds);
Ram Amrani8d1d8fc2016-11-09 22:48:43 +02001594 SET_FIELD(start_bd->bitfield0, CORE_TX_BD_ROCE_FLAV, type);
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001595 DMA_REGPAIR_LE(start_bd->addr, first_frag);
1596 start_bd->nbytes = cpu_to_le16(first_frag_len);
1597
1598 DP_VERBOSE(p_hwfn,
1599 (NETIF_MSG_TX_QUEUED | QED_MSG_LL2),
1600 "LL2 [q 0x%02x cid 0x%08x type 0x%08x] Tx Producer at [0x%04x] - set with a %04x bytes %02x BDs buffer at %08x:%08x\n",
1601 p_ll2->queue_id,
1602 p_ll2->cid,
1603 p_ll2->conn_type,
1604 prod_idx,
1605 first_frag_len,
1606 num_of_bds,
1607 le32_to_cpu(start_bd->addr.hi),
1608 le32_to_cpu(start_bd->addr.lo));
1609
1610 if (p_ll2->tx_queue.cur_send_frag_num == num_of_bds)
1611 return;
1612
1613 /* Need to provide the packet with additional BDs for frags */
1614 for (frag_idx = p_ll2->tx_queue.cur_send_frag_num;
1615 frag_idx < num_of_bds; frag_idx++) {
1616 struct core_tx_bd **p_bd = &p_curp->bds_set[frag_idx].txq_bd;
1617
1618 *p_bd = (struct core_tx_bd *)qed_chain_produce(p_tx_chain);
1619 (*p_bd)->bd_flags.as_bitfield = 0;
1620 (*p_bd)->bitfield1 = 0;
1621 (*p_bd)->bitfield0 = 0;
1622 p_curp->bds_set[frag_idx].tx_frag = 0;
1623 p_curp->bds_set[frag_idx].frag_len = 0;
1624 }
1625}
1626
1627/* This should be called while the Txq spinlock is being held */
1628static void qed_ll2_tx_packet_notify(struct qed_hwfn *p_hwfn,
1629 struct qed_ll2_info *p_ll2_conn)
1630{
1631 bool b_notify = p_ll2_conn->tx_queue.cur_send_packet->notify_fw;
1632 struct qed_ll2_tx_queue *p_tx = &p_ll2_conn->tx_queue;
1633 struct qed_ll2_tx_packet *p_pkt = NULL;
1634 struct core_db_data db_msg = { 0, 0, 0 };
1635 u16 bd_prod;
1636
1637 /* If there are missing BDs, don't do anything now */
1638 if (p_ll2_conn->tx_queue.cur_send_frag_num !=
1639 p_ll2_conn->tx_queue.cur_send_packet->bd_used)
1640 return;
1641
1642 /* Push the current packet to the list and clean after it */
1643 list_add_tail(&p_ll2_conn->tx_queue.cur_send_packet->list_entry,
1644 &p_ll2_conn->tx_queue.sending_descq);
1645 p_ll2_conn->tx_queue.cur_send_packet = NULL;
1646 p_ll2_conn->tx_queue.cur_send_frag_num = 0;
1647
1648 /* Notify FW of packet only if requested to */
1649 if (!b_notify)
1650 return;
1651
1652 bd_prod = qed_chain_get_prod_idx(&p_ll2_conn->tx_queue.txq_chain);
1653
1654 while (!list_empty(&p_tx->sending_descq)) {
1655 p_pkt = list_first_entry(&p_tx->sending_descq,
1656 struct qed_ll2_tx_packet, list_entry);
1657 if (!p_pkt)
1658 break;
1659
Wei Yongjunb4f0fd42016-10-17 15:17:51 +00001660 list_move_tail(&p_pkt->list_entry, &p_tx->active_descq);
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001661 }
1662
1663 SET_FIELD(db_msg.params, CORE_DB_DATA_DEST, DB_DEST_XCM);
1664 SET_FIELD(db_msg.params, CORE_DB_DATA_AGG_CMD, DB_AGG_CMD_SET);
1665 SET_FIELD(db_msg.params, CORE_DB_DATA_AGG_VAL_SEL,
1666 DQ_XCM_CORE_TX_BD_PROD_CMD);
1667 db_msg.agg_flags = DQ_XCM_CORE_DQ_CF_CMD;
1668 db_msg.spq_prod = cpu_to_le16(bd_prod);
1669
1670 /* Make sure the BDs data is updated before ringing the doorbell */
1671 wmb();
1672
1673 DIRECT_REG_WR(p_tx->doorbell_addr, *((u32 *)&db_msg));
1674
1675 DP_VERBOSE(p_hwfn,
1676 (NETIF_MSG_TX_QUEUED | QED_MSG_LL2),
1677 "LL2 [q 0x%02x cid 0x%08x type 0x%08x] Doorbelled [producer 0x%04x]\n",
1678 p_ll2_conn->queue_id,
1679 p_ll2_conn->cid, p_ll2_conn->conn_type, db_msg.spq_prod);
1680}
1681
1682int qed_ll2_prepare_tx_packet(struct qed_hwfn *p_hwfn,
1683 u8 connection_handle,
1684 u8 num_of_bds,
1685 u16 vlan,
1686 u8 bd_flags,
1687 u16 l4_hdr_offset_w,
Yuval Mintz1d6cff42016-12-01 00:21:07 -08001688 enum qed_ll2_tx_dest e_tx_dest,
Ram Amraniabd49672016-10-01 22:00:01 +03001689 enum qed_ll2_roce_flavor_type qed_roce_flavor,
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001690 dma_addr_t first_frag,
1691 u16 first_frag_len, void *cookie, u8 notify_fw)
1692{
1693 struct qed_ll2_tx_packet *p_curp = NULL;
1694 struct qed_ll2_info *p_ll2_conn = NULL;
Ram Amraniabd49672016-10-01 22:00:01 +03001695 enum core_roce_flavor_type roce_flavor;
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001696 struct qed_ll2_tx_queue *p_tx;
1697 struct qed_chain *p_tx_chain;
Yuval Mintz1d6cff42016-12-01 00:21:07 -08001698 enum core_tx_dest tx_dest;
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001699 unsigned long flags;
1700 int rc = 0;
1701
1702 p_ll2_conn = qed_ll2_handle_sanity(p_hwfn, connection_handle);
1703 if (!p_ll2_conn)
1704 return -EINVAL;
1705 p_tx = &p_ll2_conn->tx_queue;
1706 p_tx_chain = &p_tx->txq_chain;
1707
1708 if (num_of_bds > CORE_LL2_TX_MAX_BDS_PER_PACKET)
1709 return -EIO;
1710
1711 spin_lock_irqsave(&p_tx->lock, flags);
1712 if (p_tx->cur_send_packet) {
1713 rc = -EEXIST;
1714 goto out;
1715 }
1716
1717 /* Get entry, but only if we have tx elements for it */
1718 if (!list_empty(&p_tx->free_descq))
1719 p_curp = list_first_entry(&p_tx->free_descq,
1720 struct qed_ll2_tx_packet, list_entry);
1721 if (p_curp && qed_chain_get_elem_left(p_tx_chain) < num_of_bds)
1722 p_curp = NULL;
1723
1724 if (!p_curp) {
1725 rc = -EBUSY;
1726 goto out;
1727 }
1728
Yuval Mintz1d6cff42016-12-01 00:21:07 -08001729 tx_dest = e_tx_dest == QED_LL2_TX_DEST_NW ? CORE_TX_DEST_NW :
1730 CORE_TX_DEST_LB;
Ram Amraniabd49672016-10-01 22:00:01 +03001731 if (qed_roce_flavor == QED_LL2_ROCE) {
1732 roce_flavor = CORE_ROCE;
1733 } else if (qed_roce_flavor == QED_LL2_RROCE) {
1734 roce_flavor = CORE_RROCE;
1735 } else {
1736 rc = -EINVAL;
1737 goto out;
1738 }
1739
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001740 /* Prepare packet and BD, and perhaps send a doorbell to FW */
1741 qed_ll2_prepare_tx_packet_set(p_hwfn, p_tx, p_curp,
1742 num_of_bds, first_frag,
1743 first_frag_len, cookie, notify_fw);
1744 qed_ll2_prepare_tx_packet_set_bd(p_hwfn, p_ll2_conn, p_curp,
Yuval Mintz1d6cff42016-12-01 00:21:07 -08001745 num_of_bds, tx_dest,
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001746 vlan, bd_flags, l4_hdr_offset_w,
Ram Amraniabd49672016-10-01 22:00:01 +03001747 roce_flavor,
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001748 first_frag, first_frag_len);
1749
1750 qed_ll2_tx_packet_notify(p_hwfn, p_ll2_conn);
1751
1752out:
1753 spin_unlock_irqrestore(&p_tx->lock, flags);
1754 return rc;
1755}
1756
1757int qed_ll2_set_fragment_of_tx_packet(struct qed_hwfn *p_hwfn,
1758 u8 connection_handle,
1759 dma_addr_t addr, u16 nbytes)
1760{
1761 struct qed_ll2_tx_packet *p_cur_send_packet = NULL;
1762 struct qed_ll2_info *p_ll2_conn = NULL;
1763 u16 cur_send_frag_num = 0;
1764 struct core_tx_bd *p_bd;
1765 unsigned long flags;
1766
1767 p_ll2_conn = qed_ll2_handle_sanity(p_hwfn, connection_handle);
1768 if (!p_ll2_conn)
1769 return -EINVAL;
1770
1771 if (!p_ll2_conn->tx_queue.cur_send_packet)
1772 return -EINVAL;
1773
1774 p_cur_send_packet = p_ll2_conn->tx_queue.cur_send_packet;
1775 cur_send_frag_num = p_ll2_conn->tx_queue.cur_send_frag_num;
1776
1777 if (cur_send_frag_num >= p_cur_send_packet->bd_used)
1778 return -EINVAL;
1779
1780 /* Fill the BD information, and possibly notify FW */
1781 p_bd = p_cur_send_packet->bds_set[cur_send_frag_num].txq_bd;
1782 DMA_REGPAIR_LE(p_bd->addr, addr);
1783 p_bd->nbytes = cpu_to_le16(nbytes);
1784 p_cur_send_packet->bds_set[cur_send_frag_num].tx_frag = addr;
1785 p_cur_send_packet->bds_set[cur_send_frag_num].frag_len = nbytes;
1786
1787 p_ll2_conn->tx_queue.cur_send_frag_num++;
1788
1789 spin_lock_irqsave(&p_ll2_conn->tx_queue.lock, flags);
1790 qed_ll2_tx_packet_notify(p_hwfn, p_ll2_conn);
1791 spin_unlock_irqrestore(&p_ll2_conn->tx_queue.lock, flags);
1792
1793 return 0;
1794}
1795
1796int qed_ll2_terminate_connection(struct qed_hwfn *p_hwfn, u8 connection_handle)
1797{
1798 struct qed_ll2_info *p_ll2_conn = NULL;
1799 int rc = -EINVAL;
1800
1801 p_ll2_conn = qed_ll2_handle_sanity_lock(p_hwfn, connection_handle);
1802 if (!p_ll2_conn)
1803 return -EINVAL;
1804
1805 /* Stop Tx & Rx of connection, if needed */
1806 if (QED_LL2_TX_REGISTERED(p_ll2_conn)) {
1807 rc = qed_sp_ll2_tx_queue_stop(p_hwfn, p_ll2_conn);
1808 if (rc)
1809 return rc;
1810 qed_ll2_txq_flush(p_hwfn, connection_handle);
1811 }
1812
1813 if (QED_LL2_RX_REGISTERED(p_ll2_conn)) {
1814 rc = qed_sp_ll2_rx_queue_stop(p_hwfn, p_ll2_conn);
1815 if (rc)
1816 return rc;
1817 qed_ll2_rxq_flush(p_hwfn, connection_handle);
1818 }
1819
Yuval Mintz1d6cff42016-12-01 00:21:07 -08001820 if (p_ll2_conn->conn_type == QED_LL2_TYPE_ISCSI_OOO)
1821 qed_ooo_release_all_isles(p_hwfn, p_hwfn->p_ooo_info);
1822
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001823 return rc;
1824}
1825
1826void qed_ll2_release_connection(struct qed_hwfn *p_hwfn, u8 connection_handle)
1827{
1828 struct qed_ll2_info *p_ll2_conn = NULL;
1829
1830 p_ll2_conn = qed_ll2_handle_sanity(p_hwfn, connection_handle);
1831 if (!p_ll2_conn)
1832 return;
1833
1834 if (QED_LL2_RX_REGISTERED(p_ll2_conn)) {
1835 p_ll2_conn->rx_queue.b_cb_registred = false;
1836 qed_int_unregister_cb(p_hwfn, p_ll2_conn->rx_queue.rx_sb_index);
1837 }
1838
1839 if (QED_LL2_TX_REGISTERED(p_ll2_conn)) {
1840 p_ll2_conn->tx_queue.b_cb_registred = false;
1841 qed_int_unregister_cb(p_hwfn, p_ll2_conn->tx_queue.tx_sb_index);
1842 }
1843
1844 kfree(p_ll2_conn->tx_queue.descq_array);
1845 qed_chain_free(p_hwfn->cdev, &p_ll2_conn->tx_queue.txq_chain);
1846
1847 kfree(p_ll2_conn->rx_queue.descq_array);
1848 qed_chain_free(p_hwfn->cdev, &p_ll2_conn->rx_queue.rxq_chain);
1849 qed_chain_free(p_hwfn->cdev, &p_ll2_conn->rx_queue.rcq_chain);
1850
1851 qed_cxt_release_cid(p_hwfn, p_ll2_conn->cid);
1852
Yuval Mintz1d6cff42016-12-01 00:21:07 -08001853 qed_ll2_release_connection_ooo(p_hwfn, p_ll2_conn);
1854
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001855 mutex_lock(&p_ll2_conn->mutex);
1856 p_ll2_conn->b_active = false;
1857 mutex_unlock(&p_ll2_conn->mutex);
1858}
1859
1860struct qed_ll2_info *qed_ll2_alloc(struct qed_hwfn *p_hwfn)
1861{
1862 struct qed_ll2_info *p_ll2_connections;
1863 u8 i;
1864
1865 /* Allocate LL2's set struct */
1866 p_ll2_connections = kcalloc(QED_MAX_NUM_OF_LL2_CONNECTIONS,
1867 sizeof(struct qed_ll2_info), GFP_KERNEL);
1868 if (!p_ll2_connections) {
1869 DP_NOTICE(p_hwfn, "Failed to allocate `struct qed_ll2'\n");
1870 return NULL;
1871 }
1872
1873 for (i = 0; i < QED_MAX_NUM_OF_LL2_CONNECTIONS; i++)
1874 p_ll2_connections[i].my_id = i;
1875
1876 return p_ll2_connections;
1877}
1878
1879void qed_ll2_setup(struct qed_hwfn *p_hwfn,
1880 struct qed_ll2_info *p_ll2_connections)
1881{
1882 int i;
1883
1884 for (i = 0; i < QED_MAX_NUM_OF_LL2_CONNECTIONS; i++)
1885 mutex_init(&p_ll2_connections[i].mutex);
1886}
1887
1888void qed_ll2_free(struct qed_hwfn *p_hwfn,
1889 struct qed_ll2_info *p_ll2_connections)
1890{
1891 kfree(p_ll2_connections);
1892}
1893
1894static void _qed_ll2_get_tstats(struct qed_hwfn *p_hwfn,
1895 struct qed_ptt *p_ptt,
1896 struct qed_ll2_info *p_ll2_conn,
1897 struct qed_ll2_stats *p_stats)
1898{
1899 struct core_ll2_tstorm_per_queue_stat tstats;
1900 u8 qid = p_ll2_conn->queue_id;
1901 u32 tstats_addr;
1902
1903 memset(&tstats, 0, sizeof(tstats));
1904 tstats_addr = BAR0_MAP_REG_TSDM_RAM +
1905 CORE_LL2_TSTORM_PER_QUEUE_STAT_OFFSET(qid);
1906 qed_memcpy_from(p_hwfn, p_ptt, &tstats, tstats_addr, sizeof(tstats));
1907
1908 p_stats->packet_too_big_discard =
1909 HILO_64_REGPAIR(tstats.packet_too_big_discard);
1910 p_stats->no_buff_discard = HILO_64_REGPAIR(tstats.no_buff_discard);
1911}
1912
1913static void _qed_ll2_get_ustats(struct qed_hwfn *p_hwfn,
1914 struct qed_ptt *p_ptt,
1915 struct qed_ll2_info *p_ll2_conn,
1916 struct qed_ll2_stats *p_stats)
1917{
1918 struct core_ll2_ustorm_per_queue_stat ustats;
1919 u8 qid = p_ll2_conn->queue_id;
1920 u32 ustats_addr;
1921
1922 memset(&ustats, 0, sizeof(ustats));
1923 ustats_addr = BAR0_MAP_REG_USDM_RAM +
1924 CORE_LL2_USTORM_PER_QUEUE_STAT_OFFSET(qid);
1925 qed_memcpy_from(p_hwfn, p_ptt, &ustats, ustats_addr, sizeof(ustats));
1926
1927 p_stats->rcv_ucast_bytes = HILO_64_REGPAIR(ustats.rcv_ucast_bytes);
1928 p_stats->rcv_mcast_bytes = HILO_64_REGPAIR(ustats.rcv_mcast_bytes);
1929 p_stats->rcv_bcast_bytes = HILO_64_REGPAIR(ustats.rcv_bcast_bytes);
1930 p_stats->rcv_ucast_pkts = HILO_64_REGPAIR(ustats.rcv_ucast_pkts);
1931 p_stats->rcv_mcast_pkts = HILO_64_REGPAIR(ustats.rcv_mcast_pkts);
1932 p_stats->rcv_bcast_pkts = HILO_64_REGPAIR(ustats.rcv_bcast_pkts);
1933}
1934
1935static void _qed_ll2_get_pstats(struct qed_hwfn *p_hwfn,
1936 struct qed_ptt *p_ptt,
1937 struct qed_ll2_info *p_ll2_conn,
1938 struct qed_ll2_stats *p_stats)
1939{
1940 struct core_ll2_pstorm_per_queue_stat pstats;
1941 u8 stats_id = p_ll2_conn->tx_stats_id;
1942 u32 pstats_addr;
1943
1944 memset(&pstats, 0, sizeof(pstats));
1945 pstats_addr = BAR0_MAP_REG_PSDM_RAM +
1946 CORE_LL2_PSTORM_PER_QUEUE_STAT_OFFSET(stats_id);
1947 qed_memcpy_from(p_hwfn, p_ptt, &pstats, pstats_addr, sizeof(pstats));
1948
1949 p_stats->sent_ucast_bytes = HILO_64_REGPAIR(pstats.sent_ucast_bytes);
1950 p_stats->sent_mcast_bytes = HILO_64_REGPAIR(pstats.sent_mcast_bytes);
1951 p_stats->sent_bcast_bytes = HILO_64_REGPAIR(pstats.sent_bcast_bytes);
1952 p_stats->sent_ucast_pkts = HILO_64_REGPAIR(pstats.sent_ucast_pkts);
1953 p_stats->sent_mcast_pkts = HILO_64_REGPAIR(pstats.sent_mcast_pkts);
1954 p_stats->sent_bcast_pkts = HILO_64_REGPAIR(pstats.sent_bcast_pkts);
1955}
1956
1957int qed_ll2_get_stats(struct qed_hwfn *p_hwfn,
1958 u8 connection_handle, struct qed_ll2_stats *p_stats)
1959{
1960 struct qed_ll2_info *p_ll2_conn = NULL;
1961 struct qed_ptt *p_ptt;
1962
1963 memset(p_stats, 0, sizeof(*p_stats));
1964
1965 if ((connection_handle >= QED_MAX_NUM_OF_LL2_CONNECTIONS) ||
1966 !p_hwfn->p_ll2_info)
1967 return -EINVAL;
1968
1969 p_ll2_conn = &p_hwfn->p_ll2_info[connection_handle];
1970
1971 p_ptt = qed_ptt_acquire(p_hwfn);
1972 if (!p_ptt) {
1973 DP_ERR(p_hwfn, "Failed to acquire ptt\n");
1974 return -EINVAL;
1975 }
1976
1977 _qed_ll2_get_tstats(p_hwfn, p_ptt, p_ll2_conn, p_stats);
1978 _qed_ll2_get_ustats(p_hwfn, p_ptt, p_ll2_conn, p_stats);
1979 if (p_ll2_conn->tx_stats_en)
1980 _qed_ll2_get_pstats(p_hwfn, p_ptt, p_ll2_conn, p_stats);
1981
1982 qed_ptt_release(p_hwfn, p_ptt);
1983 return 0;
1984}
1985
1986static void qed_ll2_register_cb_ops(struct qed_dev *cdev,
1987 const struct qed_ll2_cb_ops *ops,
1988 void *cookie)
1989{
1990 cdev->ll2->cbs = ops;
1991 cdev->ll2->cb_cookie = cookie;
1992}
1993
1994static int qed_ll2_start(struct qed_dev *cdev, struct qed_ll2_params *params)
1995{
1996 struct qed_ll2_info ll2_info;
Wei Yongjun88a24282016-10-10 14:08:28 +00001997 struct qed_ll2_buffer *buffer, *tmp_buffer;
Yuval Mintz0a7fb112016-10-01 21:59:55 +03001998 enum qed_ll2_conn_type conn_type;
1999 struct qed_ptt *p_ptt;
2000 int rc, i;
Yuval Mintzfc831822016-12-01 00:21:06 -08002001 u8 gsi_enable = 1;
Yuval Mintz0a7fb112016-10-01 21:59:55 +03002002
2003 /* Initialize LL2 locks & lists */
2004 INIT_LIST_HEAD(&cdev->ll2->list);
2005 spin_lock_init(&cdev->ll2->lock);
2006 cdev->ll2->rx_size = NET_SKB_PAD + ETH_HLEN +
2007 L1_CACHE_BYTES + params->mtu;
2008 cdev->ll2->frags_mapped = params->frags_mapped;
2009
2010 /*Allocate memory for LL2 */
2011 DP_INFO(cdev, "Allocating LL2 buffers of size %08x bytes\n",
2012 cdev->ll2->rx_size);
2013 for (i = 0; i < QED_LL2_RX_SIZE; i++) {
2014 buffer = kzalloc(sizeof(*buffer), GFP_KERNEL);
2015 if (!buffer) {
2016 DP_INFO(cdev, "Failed to allocate LL2 buffers\n");
2017 goto fail;
2018 }
2019
2020 rc = qed_ll2_alloc_buffer(cdev, (u8 **)&buffer->data,
2021 &buffer->phys_addr);
2022 if (rc) {
2023 kfree(buffer);
2024 goto fail;
2025 }
2026
2027 list_add_tail(&buffer->list, &cdev->ll2->list);
2028 }
2029
2030 switch (QED_LEADING_HWFN(cdev)->hw_info.personality) {
2031 case QED_PCI_ISCSI:
2032 conn_type = QED_LL2_TYPE_ISCSI;
Yuval Mintzfc831822016-12-01 00:21:06 -08002033 gsi_enable = 0;
Yuval Mintz0a7fb112016-10-01 21:59:55 +03002034 break;
2035 case QED_PCI_ETH_ROCE:
2036 conn_type = QED_LL2_TYPE_ROCE;
2037 break;
2038 default:
2039 conn_type = QED_LL2_TYPE_TEST;
2040 }
2041
2042 /* Prepare the temporary ll2 information */
2043 memset(&ll2_info, 0, sizeof(ll2_info));
2044 ll2_info.conn_type = conn_type;
2045 ll2_info.mtu = params->mtu;
2046 ll2_info.rx_drop_ttl0_flg = params->drop_ttl0_packets;
2047 ll2_info.rx_vlan_removal_en = params->rx_vlan_stripping;
2048 ll2_info.tx_tc = 0;
2049 ll2_info.tx_dest = CORE_TX_DEST_NW;
Yuval Mintzfc831822016-12-01 00:21:06 -08002050 ll2_info.gsi_enable = gsi_enable;
Yuval Mintz0a7fb112016-10-01 21:59:55 +03002051
2052 rc = qed_ll2_acquire_connection(QED_LEADING_HWFN(cdev), &ll2_info,
2053 QED_LL2_RX_SIZE, QED_LL2_TX_SIZE,
2054 &cdev->ll2->handle);
2055 if (rc) {
2056 DP_INFO(cdev, "Failed to acquire LL2 connection\n");
2057 goto fail;
2058 }
2059
2060 rc = qed_ll2_establish_connection(QED_LEADING_HWFN(cdev),
2061 cdev->ll2->handle);
2062 if (rc) {
2063 DP_INFO(cdev, "Failed to establish LL2 connection\n");
2064 goto release_fail;
2065 }
2066
2067 /* Post all Rx buffers to FW */
2068 spin_lock_bh(&cdev->ll2->lock);
Wei Yongjun88a24282016-10-10 14:08:28 +00002069 list_for_each_entry_safe(buffer, tmp_buffer, &cdev->ll2->list, list) {
Yuval Mintz0a7fb112016-10-01 21:59:55 +03002070 rc = qed_ll2_post_rx_buffer(QED_LEADING_HWFN(cdev),
2071 cdev->ll2->handle,
2072 buffer->phys_addr, 0, buffer, 1);
2073 if (rc) {
2074 DP_INFO(cdev,
2075 "Failed to post an Rx buffer; Deleting it\n");
2076 dma_unmap_single(&cdev->pdev->dev, buffer->phys_addr,
2077 cdev->ll2->rx_size, DMA_FROM_DEVICE);
2078 kfree(buffer->data);
2079 list_del(&buffer->list);
2080 kfree(buffer);
2081 } else {
2082 cdev->ll2->rx_cnt++;
2083 }
2084 }
2085 spin_unlock_bh(&cdev->ll2->lock);
2086
2087 if (!cdev->ll2->rx_cnt) {
2088 DP_INFO(cdev, "Failed passing even a single Rx buffer\n");
2089 goto release_terminate;
2090 }
2091
2092 if (!is_valid_ether_addr(params->ll2_mac_address)) {
2093 DP_INFO(cdev, "Invalid Ethernet address\n");
2094 goto release_terminate;
2095 }
2096
Yuval Mintz1d6cff42016-12-01 00:21:07 -08002097 if (cdev->hwfns[0].hw_info.personality == QED_PCI_ISCSI &&
2098 cdev->hwfns[0].pf_params.iscsi_pf_params.ooo_enable) {
2099 DP_VERBOSE(cdev, QED_MSG_STORAGE, "Starting OOO LL2 queue\n");
2100 rc = qed_ll2_start_ooo(cdev, params);
2101 if (rc) {
2102 DP_INFO(cdev,
2103 "Failed to initialize the OOO LL2 queue\n");
2104 goto release_terminate;
2105 }
2106 }
2107
Yuval Mintz0a7fb112016-10-01 21:59:55 +03002108 p_ptt = qed_ptt_acquire(QED_LEADING_HWFN(cdev));
2109 if (!p_ptt) {
2110 DP_INFO(cdev, "Failed to acquire PTT\n");
2111 goto release_terminate;
2112 }
2113
2114 rc = qed_llh_add_mac_filter(QED_LEADING_HWFN(cdev), p_ptt,
2115 params->ll2_mac_address);
2116 qed_ptt_release(QED_LEADING_HWFN(cdev), p_ptt);
2117 if (rc) {
2118 DP_ERR(cdev, "Failed to allocate LLH filter\n");
2119 goto release_terminate_all;
2120 }
2121
2122 ether_addr_copy(cdev->ll2_mac_address, params->ll2_mac_address);
2123
2124 return 0;
2125
2126release_terminate_all:
2127
2128release_terminate:
2129 qed_ll2_terminate_connection(QED_LEADING_HWFN(cdev), cdev->ll2->handle);
2130release_fail:
2131 qed_ll2_release_connection(QED_LEADING_HWFN(cdev), cdev->ll2->handle);
2132fail:
2133 qed_ll2_kill_buffers(cdev);
2134 cdev->ll2->handle = QED_LL2_UNUSED_HANDLE;
2135 return -EINVAL;
2136}
2137
2138static int qed_ll2_stop(struct qed_dev *cdev)
2139{
2140 struct qed_ptt *p_ptt;
2141 int rc;
2142
2143 if (cdev->ll2->handle == QED_LL2_UNUSED_HANDLE)
2144 return 0;
2145
2146 p_ptt = qed_ptt_acquire(QED_LEADING_HWFN(cdev));
2147 if (!p_ptt) {
2148 DP_INFO(cdev, "Failed to acquire PTT\n");
2149 goto fail;
2150 }
2151
2152 qed_llh_remove_mac_filter(QED_LEADING_HWFN(cdev), p_ptt,
2153 cdev->ll2_mac_address);
2154 qed_ptt_release(QED_LEADING_HWFN(cdev), p_ptt);
2155 eth_zero_addr(cdev->ll2_mac_address);
2156
Yuval Mintz1d6cff42016-12-01 00:21:07 -08002157 if (cdev->hwfns[0].hw_info.personality == QED_PCI_ISCSI &&
2158 cdev->hwfns[0].pf_params.iscsi_pf_params.ooo_enable)
2159 qed_ll2_stop_ooo(cdev);
2160
Yuval Mintz0a7fb112016-10-01 21:59:55 +03002161 rc = qed_ll2_terminate_connection(QED_LEADING_HWFN(cdev),
2162 cdev->ll2->handle);
2163 if (rc)
2164 DP_INFO(cdev, "Failed to terminate LL2 connection\n");
2165
2166 qed_ll2_kill_buffers(cdev);
2167
2168 qed_ll2_release_connection(QED_LEADING_HWFN(cdev), cdev->ll2->handle);
2169 cdev->ll2->handle = QED_LL2_UNUSED_HANDLE;
2170
2171 return rc;
2172fail:
2173 return -EINVAL;
2174}
2175
2176static int qed_ll2_start_xmit(struct qed_dev *cdev, struct sk_buff *skb)
2177{
2178 const skb_frag_t *frag;
2179 int rc = -EINVAL, i;
2180 dma_addr_t mapping;
2181 u16 vlan = 0;
2182 u8 flags = 0;
2183
2184 if (unlikely(skb->ip_summed != CHECKSUM_NONE)) {
2185 DP_INFO(cdev, "Cannot transmit a checksumed packet\n");
2186 return -EINVAL;
2187 }
2188
2189 if (1 + skb_shinfo(skb)->nr_frags > CORE_LL2_TX_MAX_BDS_PER_PACKET) {
2190 DP_ERR(cdev, "Cannot transmit a packet with %d fragments\n",
2191 1 + skb_shinfo(skb)->nr_frags);
2192 return -EINVAL;
2193 }
2194
2195 mapping = dma_map_single(&cdev->pdev->dev, skb->data,
2196 skb->len, DMA_TO_DEVICE);
2197 if (unlikely(dma_mapping_error(&cdev->pdev->dev, mapping))) {
2198 DP_NOTICE(cdev, "SKB mapping failed\n");
2199 return -EINVAL;
2200 }
2201
2202 /* Request HW to calculate IP csum */
2203 if (!((vlan_get_protocol(skb) == htons(ETH_P_IPV6)) &&
2204 ipv6_hdr(skb)->nexthdr == NEXTHDR_IPV6))
2205 flags |= BIT(CORE_TX_BD_FLAGS_IP_CSUM_SHIFT);
2206
2207 if (skb_vlan_tag_present(skb)) {
2208 vlan = skb_vlan_tag_get(skb);
2209 flags |= BIT(CORE_TX_BD_FLAGS_VLAN_INSERTION_SHIFT);
2210 }
2211
2212 rc = qed_ll2_prepare_tx_packet(QED_LEADING_HWFN(cdev),
2213 cdev->ll2->handle,
2214 1 + skb_shinfo(skb)->nr_frags,
Yuval Mintz1d6cff42016-12-01 00:21:07 -08002215 vlan, flags, 0, QED_LL2_TX_DEST_NW,
2216 0 /* RoCE FLAVOR */,
Ram Amraniabd49672016-10-01 22:00:01 +03002217 mapping, skb->len, skb, 1);
Yuval Mintz0a7fb112016-10-01 21:59:55 +03002218 if (rc)
2219 goto err;
2220
2221 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
2222 frag = &skb_shinfo(skb)->frags[i];
2223 if (!cdev->ll2->frags_mapped) {
2224 mapping = skb_frag_dma_map(&cdev->pdev->dev, frag, 0,
2225 skb_frag_size(frag),
2226 DMA_TO_DEVICE);
2227
2228 if (unlikely(dma_mapping_error(&cdev->pdev->dev,
2229 mapping))) {
2230 DP_NOTICE(cdev,
2231 "Unable to map frag - dropping packet\n");
Pan Bian0ff18d22016-12-04 13:53:53 +08002232 rc = -ENOMEM;
Yuval Mintz0a7fb112016-10-01 21:59:55 +03002233 goto err;
2234 }
2235 } else {
2236 mapping = page_to_phys(skb_frag_page(frag)) |
2237 frag->page_offset;
2238 }
2239
2240 rc = qed_ll2_set_fragment_of_tx_packet(QED_LEADING_HWFN(cdev),
2241 cdev->ll2->handle,
2242 mapping,
2243 skb_frag_size(frag));
2244
2245 /* if failed not much to do here, partial packet has been posted
2246 * we can't free memory, will need to wait for completion.
2247 */
2248 if (rc)
2249 goto err2;
2250 }
2251
2252 return 0;
2253
2254err:
2255 dma_unmap_single(&cdev->pdev->dev, mapping, skb->len, DMA_TO_DEVICE);
2256
2257err2:
2258 return rc;
2259}
2260
2261static int qed_ll2_stats(struct qed_dev *cdev, struct qed_ll2_stats *stats)
2262{
2263 if (!cdev->ll2)
2264 return -EINVAL;
2265
2266 return qed_ll2_get_stats(QED_LEADING_HWFN(cdev),
2267 cdev->ll2->handle, stats);
2268}
2269
2270const struct qed_ll2_ops qed_ll2_ops_pass = {
2271 .start = &qed_ll2_start,
2272 .stop = &qed_ll2_stop,
2273 .start_xmit = &qed_ll2_start_xmit,
2274 .register_cb_ops = &qed_ll2_register_cb_ops,
2275 .get_stats = &qed_ll2_stats,
2276};
2277
2278int qed_ll2_alloc_if(struct qed_dev *cdev)
2279{
2280 cdev->ll2 = kzalloc(sizeof(*cdev->ll2), GFP_KERNEL);
2281 return cdev->ll2 ? 0 : -ENOMEM;
2282}
2283
2284void qed_ll2_dealloc_if(struct qed_dev *cdev)
2285{
2286 kfree(cdev->ll2);
2287 cdev->ll2 = NULL;
2288}