Haibo Chen | 9a436d5 | 2015-09-05 11:31:21 -0700 | [diff] [blame] | 1 | /* |
| 2 | * Freescale i.MX6UL touchscreen controller driver |
| 3 | * |
| 4 | * Copyright (C) 2015 Freescale Semiconductor, Inc. |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License version 2 as |
| 8 | * published by the Free Software Foundation. |
| 9 | */ |
| 10 | |
| 11 | #include <linux/errno.h> |
| 12 | #include <linux/kernel.h> |
| 13 | #include <linux/module.h> |
| 14 | #include <linux/gpio/consumer.h> |
| 15 | #include <linux/input.h> |
| 16 | #include <linux/slab.h> |
| 17 | #include <linux/completion.h> |
| 18 | #include <linux/delay.h> |
| 19 | #include <linux/of.h> |
| 20 | #include <linux/interrupt.h> |
| 21 | #include <linux/platform_device.h> |
| 22 | #include <linux/clk.h> |
| 23 | #include <linux/io.h> |
Guy Shapiro | f43d3ec | 2016-12-15 21:23:02 -0800 | [diff] [blame] | 24 | #include <linux/log2.h> |
Haibo Chen | 9a436d5 | 2015-09-05 11:31:21 -0700 | [diff] [blame] | 25 | |
| 26 | /* ADC configuration registers field define */ |
| 27 | #define ADC_AIEN (0x1 << 7) |
| 28 | #define ADC_CONV_DISABLE 0x1F |
Guy Shapiro | 031bfed | 2016-11-27 20:40:39 -0800 | [diff] [blame] | 29 | #define ADC_AVGE (0x1 << 5) |
Haibo Chen | 9a436d5 | 2015-09-05 11:31:21 -0700 | [diff] [blame] | 30 | #define ADC_CAL (0x1 << 7) |
| 31 | #define ADC_CALF 0x2 |
| 32 | #define ADC_12BIT_MODE (0x2 << 2) |
Haibo Chen | 70f5a29 | 2016-11-30 09:02:06 -0800 | [diff] [blame] | 33 | #define ADC_CONV_MODE_MASK (0x3 << 2) |
Haibo Chen | 9a436d5 | 2015-09-05 11:31:21 -0700 | [diff] [blame] | 34 | #define ADC_IPG_CLK 0x00 |
Haibo Chen | 70f5a29 | 2016-11-30 09:02:06 -0800 | [diff] [blame] | 35 | #define ADC_INPUT_CLK_MASK 0x3 |
Haibo Chen | 9a436d5 | 2015-09-05 11:31:21 -0700 | [diff] [blame] | 36 | #define ADC_CLK_DIV_8 (0x03 << 5) |
Haibo Chen | 70f5a29 | 2016-11-30 09:02:06 -0800 | [diff] [blame] | 37 | #define ADC_CLK_DIV_MASK (0x3 << 5) |
Haibo Chen | 9a436d5 | 2015-09-05 11:31:21 -0700 | [diff] [blame] | 38 | #define ADC_SHORT_SAMPLE_MODE (0x0 << 4) |
Haibo Chen | 70f5a29 | 2016-11-30 09:02:06 -0800 | [diff] [blame] | 39 | #define ADC_SAMPLE_MODE_MASK (0x1 << 4) |
Haibo Chen | 9a436d5 | 2015-09-05 11:31:21 -0700 | [diff] [blame] | 40 | #define ADC_HARDWARE_TRIGGER (0x1 << 13) |
Guy Shapiro | 031bfed | 2016-11-27 20:40:39 -0800 | [diff] [blame] | 41 | #define ADC_AVGS_SHIFT 14 |
Haibo Chen | 70f5a29 | 2016-11-30 09:02:06 -0800 | [diff] [blame] | 42 | #define ADC_AVGS_MASK (0x3 << 14) |
Haibo Chen | 9a436d5 | 2015-09-05 11:31:21 -0700 | [diff] [blame] | 43 | #define SELECT_CHANNEL_4 0x04 |
| 44 | #define SELECT_CHANNEL_1 0x01 |
| 45 | #define DISABLE_CONVERSION_INT (0x0 << 7) |
| 46 | |
| 47 | /* ADC registers */ |
| 48 | #define REG_ADC_HC0 0x00 |
| 49 | #define REG_ADC_HC1 0x04 |
| 50 | #define REG_ADC_HC2 0x08 |
| 51 | #define REG_ADC_HC3 0x0C |
| 52 | #define REG_ADC_HC4 0x10 |
| 53 | #define REG_ADC_HS 0x14 |
| 54 | #define REG_ADC_R0 0x18 |
| 55 | #define REG_ADC_CFG 0x2C |
| 56 | #define REG_ADC_GC 0x30 |
| 57 | #define REG_ADC_GS 0x34 |
| 58 | |
| 59 | #define ADC_TIMEOUT msecs_to_jiffies(100) |
| 60 | |
| 61 | /* TSC registers */ |
| 62 | #define REG_TSC_BASIC_SETING 0x00 |
| 63 | #define REG_TSC_PRE_CHARGE_TIME 0x10 |
| 64 | #define REG_TSC_FLOW_CONTROL 0x20 |
| 65 | #define REG_TSC_MEASURE_VALUE 0x30 |
| 66 | #define REG_TSC_INT_EN 0x40 |
| 67 | #define REG_TSC_INT_SIG_EN 0x50 |
| 68 | #define REG_TSC_INT_STATUS 0x60 |
| 69 | #define REG_TSC_DEBUG_MODE 0x70 |
| 70 | #define REG_TSC_DEBUG_MODE2 0x80 |
| 71 | |
| 72 | /* TSC configuration registers field define */ |
| 73 | #define DETECT_4_WIRE_MODE (0x0 << 4) |
| 74 | #define AUTO_MEASURE 0x1 |
| 75 | #define MEASURE_SIGNAL 0x1 |
| 76 | #define DETECT_SIGNAL (0x1 << 4) |
| 77 | #define VALID_SIGNAL (0x1 << 8) |
| 78 | #define MEASURE_INT_EN 0x1 |
| 79 | #define MEASURE_SIG_EN 0x1 |
| 80 | #define VALID_SIG_EN (0x1 << 8) |
| 81 | #define DE_GLITCH_2 (0x2 << 29) |
| 82 | #define START_SENSE (0x1 << 12) |
| 83 | #define TSC_DISABLE (0x1 << 16) |
| 84 | #define DETECT_MODE 0x2 |
| 85 | |
| 86 | struct imx6ul_tsc { |
| 87 | struct device *dev; |
| 88 | struct input_dev *input; |
| 89 | void __iomem *tsc_regs; |
| 90 | void __iomem *adc_regs; |
| 91 | struct clk *tsc_clk; |
| 92 | struct clk *adc_clk; |
| 93 | struct gpio_desc *xnur_gpio; |
| 94 | |
Guy Shapiro | accbcea | 2016-11-30 10:25:11 -0800 | [diff] [blame] | 95 | u32 measure_delay_time; |
| 96 | u32 pre_charge_time; |
Guy Shapiro | f43d3ec | 2016-12-15 21:23:02 -0800 | [diff] [blame] | 97 | bool average_enable; |
| 98 | u32 average_select; |
Haibo Chen | 9a436d5 | 2015-09-05 11:31:21 -0700 | [diff] [blame] | 99 | |
| 100 | struct completion completion; |
| 101 | }; |
| 102 | |
| 103 | /* |
| 104 | * TSC module need ADC to get the measure value. So |
| 105 | * before config TSC, we should initialize ADC module. |
| 106 | */ |
Fabio Estevam | 6cc527b | 2015-09-14 10:36:35 -0700 | [diff] [blame] | 107 | static int imx6ul_adc_init(struct imx6ul_tsc *tsc) |
Haibo Chen | 9a436d5 | 2015-09-05 11:31:21 -0700 | [diff] [blame] | 108 | { |
Guy Shapiro | accbcea | 2016-11-30 10:25:11 -0800 | [diff] [blame] | 109 | u32 adc_hc = 0; |
| 110 | u32 adc_gc; |
| 111 | u32 adc_gs; |
| 112 | u32 adc_cfg; |
| 113 | unsigned long timeout; |
Haibo Chen | 9a436d5 | 2015-09-05 11:31:21 -0700 | [diff] [blame] | 114 | |
| 115 | reinit_completion(&tsc->completion); |
| 116 | |
| 117 | adc_cfg = readl(tsc->adc_regs + REG_ADC_CFG); |
Haibo Chen | 70f5a29 | 2016-11-30 09:02:06 -0800 | [diff] [blame] | 118 | adc_cfg &= ~(ADC_CONV_MODE_MASK | ADC_INPUT_CLK_MASK); |
Haibo Chen | 9a436d5 | 2015-09-05 11:31:21 -0700 | [diff] [blame] | 119 | adc_cfg |= ADC_12BIT_MODE | ADC_IPG_CLK; |
Haibo Chen | 70f5a29 | 2016-11-30 09:02:06 -0800 | [diff] [blame] | 120 | adc_cfg &= ~(ADC_CLK_DIV_MASK | ADC_SAMPLE_MODE_MASK); |
Haibo Chen | 9a436d5 | 2015-09-05 11:31:21 -0700 | [diff] [blame] | 121 | adc_cfg |= ADC_CLK_DIV_8 | ADC_SHORT_SAMPLE_MODE; |
Guy Shapiro | f43d3ec | 2016-12-15 21:23:02 -0800 | [diff] [blame] | 122 | if (tsc->average_enable) { |
Haibo Chen | 70f5a29 | 2016-11-30 09:02:06 -0800 | [diff] [blame] | 123 | adc_cfg &= ~ADC_AVGS_MASK; |
Guy Shapiro | f43d3ec | 2016-12-15 21:23:02 -0800 | [diff] [blame] | 124 | adc_cfg |= (tsc->average_select) << ADC_AVGS_SHIFT; |
Haibo Chen | 70f5a29 | 2016-11-30 09:02:06 -0800 | [diff] [blame] | 125 | } |
Haibo Chen | 9a436d5 | 2015-09-05 11:31:21 -0700 | [diff] [blame] | 126 | adc_cfg &= ~ADC_HARDWARE_TRIGGER; |
| 127 | writel(adc_cfg, tsc->adc_regs + REG_ADC_CFG); |
| 128 | |
| 129 | /* enable calibration interrupt */ |
| 130 | adc_hc |= ADC_AIEN; |
| 131 | adc_hc |= ADC_CONV_DISABLE; |
| 132 | writel(adc_hc, tsc->adc_regs + REG_ADC_HC0); |
| 133 | |
| 134 | /* start ADC calibration */ |
| 135 | adc_gc = readl(tsc->adc_regs + REG_ADC_GC); |
| 136 | adc_gc |= ADC_CAL; |
Guy Shapiro | f43d3ec | 2016-12-15 21:23:02 -0800 | [diff] [blame] | 137 | if (tsc->average_enable) |
Guy Shapiro | 031bfed | 2016-11-27 20:40:39 -0800 | [diff] [blame] | 138 | adc_gc |= ADC_AVGE; |
Haibo Chen | 9a436d5 | 2015-09-05 11:31:21 -0700 | [diff] [blame] | 139 | writel(adc_gc, tsc->adc_regs + REG_ADC_GC); |
| 140 | |
| 141 | timeout = wait_for_completion_timeout |
| 142 | (&tsc->completion, ADC_TIMEOUT); |
Fabio Estevam | 6cc527b | 2015-09-14 10:36:35 -0700 | [diff] [blame] | 143 | if (timeout == 0) { |
Haibo Chen | 9a436d5 | 2015-09-05 11:31:21 -0700 | [diff] [blame] | 144 | dev_err(tsc->dev, "Timeout for adc calibration\n"); |
Fabio Estevam | 6cc527b | 2015-09-14 10:36:35 -0700 | [diff] [blame] | 145 | return -ETIMEDOUT; |
| 146 | } |
Haibo Chen | 9a436d5 | 2015-09-05 11:31:21 -0700 | [diff] [blame] | 147 | |
| 148 | adc_gs = readl(tsc->adc_regs + REG_ADC_GS); |
Fabio Estevam | 6cc527b | 2015-09-14 10:36:35 -0700 | [diff] [blame] | 149 | if (adc_gs & ADC_CALF) { |
Haibo Chen | 9a436d5 | 2015-09-05 11:31:21 -0700 | [diff] [blame] | 150 | dev_err(tsc->dev, "ADC calibration failed\n"); |
Fabio Estevam | 6cc527b | 2015-09-14 10:36:35 -0700 | [diff] [blame] | 151 | return -EINVAL; |
| 152 | } |
Haibo Chen | 9a436d5 | 2015-09-05 11:31:21 -0700 | [diff] [blame] | 153 | |
| 154 | /* TSC need the ADC work in hardware trigger */ |
| 155 | adc_cfg = readl(tsc->adc_regs + REG_ADC_CFG); |
| 156 | adc_cfg |= ADC_HARDWARE_TRIGGER; |
| 157 | writel(adc_cfg, tsc->adc_regs + REG_ADC_CFG); |
Fabio Estevam | 6cc527b | 2015-09-14 10:36:35 -0700 | [diff] [blame] | 158 | |
| 159 | return 0; |
Haibo Chen | 9a436d5 | 2015-09-05 11:31:21 -0700 | [diff] [blame] | 160 | } |
| 161 | |
| 162 | /* |
| 163 | * This is a TSC workaround. Currently TSC misconnect two |
| 164 | * ADC channels, this function remap channel configure for |
| 165 | * hardware trigger. |
| 166 | */ |
| 167 | static void imx6ul_tsc_channel_config(struct imx6ul_tsc *tsc) |
| 168 | { |
Guy Shapiro | accbcea | 2016-11-30 10:25:11 -0800 | [diff] [blame] | 169 | u32 adc_hc0, adc_hc1, adc_hc2, adc_hc3, adc_hc4; |
Haibo Chen | 9a436d5 | 2015-09-05 11:31:21 -0700 | [diff] [blame] | 170 | |
| 171 | adc_hc0 = DISABLE_CONVERSION_INT; |
| 172 | writel(adc_hc0, tsc->adc_regs + REG_ADC_HC0); |
| 173 | |
| 174 | adc_hc1 = DISABLE_CONVERSION_INT | SELECT_CHANNEL_4; |
| 175 | writel(adc_hc1, tsc->adc_regs + REG_ADC_HC1); |
| 176 | |
| 177 | adc_hc2 = DISABLE_CONVERSION_INT; |
| 178 | writel(adc_hc2, tsc->adc_regs + REG_ADC_HC2); |
| 179 | |
| 180 | adc_hc3 = DISABLE_CONVERSION_INT | SELECT_CHANNEL_1; |
| 181 | writel(adc_hc3, tsc->adc_regs + REG_ADC_HC3); |
| 182 | |
| 183 | adc_hc4 = DISABLE_CONVERSION_INT; |
| 184 | writel(adc_hc4, tsc->adc_regs + REG_ADC_HC4); |
| 185 | } |
| 186 | |
| 187 | /* |
| 188 | * TSC setting, confige the pre-charge time and measure delay time. |
| 189 | * different touch screen may need different pre-charge time and |
| 190 | * measure delay time. |
| 191 | */ |
| 192 | static void imx6ul_tsc_set(struct imx6ul_tsc *tsc) |
| 193 | { |
Guy Shapiro | accbcea | 2016-11-30 10:25:11 -0800 | [diff] [blame] | 194 | u32 basic_setting = 0; |
| 195 | u32 start; |
Haibo Chen | 9a436d5 | 2015-09-05 11:31:21 -0700 | [diff] [blame] | 196 | |
| 197 | basic_setting |= tsc->measure_delay_time << 8; |
| 198 | basic_setting |= DETECT_4_WIRE_MODE | AUTO_MEASURE; |
| 199 | writel(basic_setting, tsc->tsc_regs + REG_TSC_BASIC_SETING); |
| 200 | |
| 201 | writel(DE_GLITCH_2, tsc->tsc_regs + REG_TSC_DEBUG_MODE2); |
| 202 | |
| 203 | writel(tsc->pre_charge_time, tsc->tsc_regs + REG_TSC_PRE_CHARGE_TIME); |
| 204 | writel(MEASURE_INT_EN, tsc->tsc_regs + REG_TSC_INT_EN); |
| 205 | writel(MEASURE_SIG_EN | VALID_SIG_EN, |
| 206 | tsc->tsc_regs + REG_TSC_INT_SIG_EN); |
| 207 | |
| 208 | /* start sense detection */ |
| 209 | start = readl(tsc->tsc_regs + REG_TSC_FLOW_CONTROL); |
| 210 | start |= START_SENSE; |
| 211 | start &= ~TSC_DISABLE; |
| 212 | writel(start, tsc->tsc_regs + REG_TSC_FLOW_CONTROL); |
| 213 | } |
| 214 | |
Fabio Estevam | 6cc527b | 2015-09-14 10:36:35 -0700 | [diff] [blame] | 215 | static int imx6ul_tsc_init(struct imx6ul_tsc *tsc) |
Haibo Chen | 9a436d5 | 2015-09-05 11:31:21 -0700 | [diff] [blame] | 216 | { |
Fabio Estevam | 6cc527b | 2015-09-14 10:36:35 -0700 | [diff] [blame] | 217 | int err; |
| 218 | |
| 219 | err = imx6ul_adc_init(tsc); |
| 220 | if (err) |
| 221 | return err; |
Haibo Chen | 9a436d5 | 2015-09-05 11:31:21 -0700 | [diff] [blame] | 222 | imx6ul_tsc_channel_config(tsc); |
| 223 | imx6ul_tsc_set(tsc); |
Fabio Estevam | 6cc527b | 2015-09-14 10:36:35 -0700 | [diff] [blame] | 224 | |
| 225 | return 0; |
Haibo Chen | 9a436d5 | 2015-09-05 11:31:21 -0700 | [diff] [blame] | 226 | } |
| 227 | |
| 228 | static void imx6ul_tsc_disable(struct imx6ul_tsc *tsc) |
| 229 | { |
Guy Shapiro | accbcea | 2016-11-30 10:25:11 -0800 | [diff] [blame] | 230 | u32 tsc_flow; |
| 231 | u32 adc_cfg; |
Haibo Chen | 9a436d5 | 2015-09-05 11:31:21 -0700 | [diff] [blame] | 232 | |
| 233 | /* TSC controller enters to idle status */ |
| 234 | tsc_flow = readl(tsc->tsc_regs + REG_TSC_FLOW_CONTROL); |
| 235 | tsc_flow |= TSC_DISABLE; |
| 236 | writel(tsc_flow, tsc->tsc_regs + REG_TSC_FLOW_CONTROL); |
| 237 | |
| 238 | /* ADC controller enters to stop mode */ |
| 239 | adc_cfg = readl(tsc->adc_regs + REG_ADC_HC0); |
| 240 | adc_cfg |= ADC_CONV_DISABLE; |
| 241 | writel(adc_cfg, tsc->adc_regs + REG_ADC_HC0); |
| 242 | } |
| 243 | |
| 244 | /* Delay some time (max 2ms), wait the pre-charge done. */ |
| 245 | static bool tsc_wait_detect_mode(struct imx6ul_tsc *tsc) |
| 246 | { |
| 247 | unsigned long timeout = jiffies + msecs_to_jiffies(2); |
Guy Shapiro | accbcea | 2016-11-30 10:25:11 -0800 | [diff] [blame] | 248 | u32 state_machine; |
| 249 | u32 debug_mode2; |
Haibo Chen | 9a436d5 | 2015-09-05 11:31:21 -0700 | [diff] [blame] | 250 | |
| 251 | do { |
| 252 | if (time_after(jiffies, timeout)) |
| 253 | return false; |
| 254 | |
| 255 | usleep_range(200, 400); |
| 256 | debug_mode2 = readl(tsc->tsc_regs + REG_TSC_DEBUG_MODE2); |
| 257 | state_machine = (debug_mode2 >> 20) & 0x7; |
| 258 | } while (state_machine != DETECT_MODE); |
| 259 | |
| 260 | usleep_range(200, 400); |
| 261 | return true; |
| 262 | } |
| 263 | |
| 264 | static irqreturn_t tsc_irq_fn(int irq, void *dev_id) |
| 265 | { |
| 266 | struct imx6ul_tsc *tsc = dev_id; |
Guy Shapiro | accbcea | 2016-11-30 10:25:11 -0800 | [diff] [blame] | 267 | u32 status; |
| 268 | u32 value; |
| 269 | u32 x, y; |
| 270 | u32 start; |
Haibo Chen | 9a436d5 | 2015-09-05 11:31:21 -0700 | [diff] [blame] | 271 | |
| 272 | status = readl(tsc->tsc_regs + REG_TSC_INT_STATUS); |
| 273 | |
| 274 | /* write 1 to clear the bit measure-signal */ |
| 275 | writel(MEASURE_SIGNAL | DETECT_SIGNAL, |
| 276 | tsc->tsc_regs + REG_TSC_INT_STATUS); |
| 277 | |
| 278 | /* It's a HW self-clean bit. Set this bit and start sense detection */ |
| 279 | start = readl(tsc->tsc_regs + REG_TSC_FLOW_CONTROL); |
| 280 | start |= START_SENSE; |
| 281 | writel(start, tsc->tsc_regs + REG_TSC_FLOW_CONTROL); |
| 282 | |
| 283 | if (status & MEASURE_SIGNAL) { |
| 284 | value = readl(tsc->tsc_regs + REG_TSC_MEASURE_VALUE); |
| 285 | x = (value >> 16) & 0x0fff; |
| 286 | y = value & 0x0fff; |
| 287 | |
| 288 | /* |
| 289 | * In detect mode, we can get the xnur gpio value, |
| 290 | * otherwise assume contact is stiull active. |
| 291 | */ |
| 292 | if (!tsc_wait_detect_mode(tsc) || |
| 293 | gpiod_get_value_cansleep(tsc->xnur_gpio)) { |
| 294 | input_report_key(tsc->input, BTN_TOUCH, 1); |
| 295 | input_report_abs(tsc->input, ABS_X, x); |
| 296 | input_report_abs(tsc->input, ABS_Y, y); |
| 297 | } else { |
| 298 | input_report_key(tsc->input, BTN_TOUCH, 0); |
| 299 | } |
| 300 | |
| 301 | input_sync(tsc->input); |
| 302 | } |
| 303 | |
| 304 | return IRQ_HANDLED; |
| 305 | } |
| 306 | |
| 307 | static irqreturn_t adc_irq_fn(int irq, void *dev_id) |
| 308 | { |
| 309 | struct imx6ul_tsc *tsc = dev_id; |
Guy Shapiro | accbcea | 2016-11-30 10:25:11 -0800 | [diff] [blame] | 310 | u32 coco; |
| 311 | u32 value; |
Haibo Chen | 9a436d5 | 2015-09-05 11:31:21 -0700 | [diff] [blame] | 312 | |
| 313 | coco = readl(tsc->adc_regs + REG_ADC_HS); |
| 314 | if (coco & 0x01) { |
| 315 | value = readl(tsc->adc_regs + REG_ADC_R0); |
| 316 | complete(&tsc->completion); |
| 317 | } |
| 318 | |
| 319 | return IRQ_HANDLED; |
| 320 | } |
| 321 | |
| 322 | static int imx6ul_tsc_open(struct input_dev *input_dev) |
| 323 | { |
| 324 | struct imx6ul_tsc *tsc = input_get_drvdata(input_dev); |
| 325 | int err; |
| 326 | |
| 327 | err = clk_prepare_enable(tsc->adc_clk); |
| 328 | if (err) { |
| 329 | dev_err(tsc->dev, |
| 330 | "Could not prepare or enable the adc clock: %d\n", |
| 331 | err); |
| 332 | return err; |
| 333 | } |
| 334 | |
| 335 | err = clk_prepare_enable(tsc->tsc_clk); |
| 336 | if (err) { |
| 337 | dev_err(tsc->dev, |
| 338 | "Could not prepare or enable the tsc clock: %d\n", |
| 339 | err); |
| 340 | clk_disable_unprepare(tsc->adc_clk); |
| 341 | return err; |
| 342 | } |
| 343 | |
Fabio Estevam | 6cc527b | 2015-09-14 10:36:35 -0700 | [diff] [blame] | 344 | return imx6ul_tsc_init(tsc); |
Haibo Chen | 9a436d5 | 2015-09-05 11:31:21 -0700 | [diff] [blame] | 345 | } |
| 346 | |
| 347 | static void imx6ul_tsc_close(struct input_dev *input_dev) |
| 348 | { |
| 349 | struct imx6ul_tsc *tsc = input_get_drvdata(input_dev); |
| 350 | |
| 351 | imx6ul_tsc_disable(tsc); |
| 352 | |
| 353 | clk_disable_unprepare(tsc->tsc_clk); |
| 354 | clk_disable_unprepare(tsc->adc_clk); |
| 355 | } |
| 356 | |
| 357 | static int imx6ul_tsc_probe(struct platform_device *pdev) |
| 358 | { |
| 359 | struct device_node *np = pdev->dev.of_node; |
| 360 | struct imx6ul_tsc *tsc; |
| 361 | struct input_dev *input_dev; |
| 362 | struct resource *tsc_mem; |
| 363 | struct resource *adc_mem; |
| 364 | int err; |
| 365 | int tsc_irq; |
| 366 | int adc_irq; |
Guy Shapiro | f43d3ec | 2016-12-15 21:23:02 -0800 | [diff] [blame] | 367 | u32 average_samples; |
Haibo Chen | 9a436d5 | 2015-09-05 11:31:21 -0700 | [diff] [blame] | 368 | |
Fabio Estevam | 5eab3cf | 2015-09-14 10:37:31 -0700 | [diff] [blame] | 369 | tsc = devm_kzalloc(&pdev->dev, sizeof(*tsc), GFP_KERNEL); |
Haibo Chen | 9a436d5 | 2015-09-05 11:31:21 -0700 | [diff] [blame] | 370 | if (!tsc) |
| 371 | return -ENOMEM; |
| 372 | |
| 373 | input_dev = devm_input_allocate_device(&pdev->dev); |
| 374 | if (!input_dev) |
| 375 | return -ENOMEM; |
| 376 | |
Fabio Estevam | 002801f | 2015-09-14 10:37:55 -0700 | [diff] [blame] | 377 | input_dev->name = "iMX6UL Touchscreen Controller"; |
Haibo Chen | 9a436d5 | 2015-09-05 11:31:21 -0700 | [diff] [blame] | 378 | input_dev->id.bustype = BUS_HOST; |
| 379 | |
| 380 | input_dev->open = imx6ul_tsc_open; |
| 381 | input_dev->close = imx6ul_tsc_close; |
| 382 | |
| 383 | input_set_capability(input_dev, EV_KEY, BTN_TOUCH); |
| 384 | input_set_abs_params(input_dev, ABS_X, 0, 0xFFF, 0, 0); |
| 385 | input_set_abs_params(input_dev, ABS_Y, 0, 0xFFF, 0, 0); |
| 386 | |
| 387 | input_set_drvdata(input_dev, tsc); |
| 388 | |
| 389 | tsc->dev = &pdev->dev; |
| 390 | tsc->input = input_dev; |
| 391 | init_completion(&tsc->completion); |
| 392 | |
| 393 | tsc->xnur_gpio = devm_gpiod_get(&pdev->dev, "xnur", GPIOD_IN); |
| 394 | if (IS_ERR(tsc->xnur_gpio)) { |
| 395 | err = PTR_ERR(tsc->xnur_gpio); |
| 396 | dev_err(&pdev->dev, |
| 397 | "failed to request GPIO tsc_X- (xnur): %d\n", err); |
| 398 | return err; |
| 399 | } |
| 400 | |
| 401 | tsc_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
| 402 | tsc->tsc_regs = devm_ioremap_resource(&pdev->dev, tsc_mem); |
| 403 | if (IS_ERR(tsc->tsc_regs)) { |
| 404 | err = PTR_ERR(tsc->tsc_regs); |
| 405 | dev_err(&pdev->dev, "failed to remap tsc memory: %d\n", err); |
| 406 | return err; |
| 407 | } |
| 408 | |
| 409 | adc_mem = platform_get_resource(pdev, IORESOURCE_MEM, 1); |
| 410 | tsc->adc_regs = devm_ioremap_resource(&pdev->dev, adc_mem); |
| 411 | if (IS_ERR(tsc->adc_regs)) { |
| 412 | err = PTR_ERR(tsc->adc_regs); |
| 413 | dev_err(&pdev->dev, "failed to remap adc memory: %d\n", err); |
| 414 | return err; |
| 415 | } |
| 416 | |
| 417 | tsc->tsc_clk = devm_clk_get(&pdev->dev, "tsc"); |
| 418 | if (IS_ERR(tsc->tsc_clk)) { |
| 419 | err = PTR_ERR(tsc->tsc_clk); |
| 420 | dev_err(&pdev->dev, "failed getting tsc clock: %d\n", err); |
| 421 | return err; |
| 422 | } |
| 423 | |
| 424 | tsc->adc_clk = devm_clk_get(&pdev->dev, "adc"); |
| 425 | if (IS_ERR(tsc->adc_clk)) { |
| 426 | err = PTR_ERR(tsc->adc_clk); |
| 427 | dev_err(&pdev->dev, "failed getting adc clock: %d\n", err); |
| 428 | return err; |
| 429 | } |
| 430 | |
| 431 | tsc_irq = platform_get_irq(pdev, 0); |
| 432 | if (tsc_irq < 0) { |
| 433 | dev_err(&pdev->dev, "no tsc irq resource?\n"); |
| 434 | return tsc_irq; |
| 435 | } |
| 436 | |
| 437 | adc_irq = platform_get_irq(pdev, 1); |
Fabio Estevam | 3905de6 | 2015-09-14 10:37:08 -0700 | [diff] [blame] | 438 | if (adc_irq < 0) { |
Haibo Chen | 9a436d5 | 2015-09-05 11:31:21 -0700 | [diff] [blame] | 439 | dev_err(&pdev->dev, "no adc irq resource?\n"); |
| 440 | return adc_irq; |
| 441 | } |
| 442 | |
| 443 | err = devm_request_threaded_irq(tsc->dev, tsc_irq, |
| 444 | NULL, tsc_irq_fn, IRQF_ONESHOT, |
| 445 | dev_name(&pdev->dev), tsc); |
| 446 | if (err) { |
| 447 | dev_err(&pdev->dev, |
| 448 | "failed requesting tsc irq %d: %d\n", |
| 449 | tsc_irq, err); |
| 450 | return err; |
| 451 | } |
| 452 | |
| 453 | err = devm_request_irq(tsc->dev, adc_irq, adc_irq_fn, 0, |
| 454 | dev_name(&pdev->dev), tsc); |
| 455 | if (err) { |
| 456 | dev_err(&pdev->dev, |
| 457 | "failed requesting adc irq %d: %d\n", |
| 458 | adc_irq, err); |
| 459 | return err; |
| 460 | } |
| 461 | |
| 462 | err = of_property_read_u32(np, "measure-delay-time", |
| 463 | &tsc->measure_delay_time); |
| 464 | if (err) |
| 465 | tsc->measure_delay_time = 0xffff; |
| 466 | |
| 467 | err = of_property_read_u32(np, "pre-charge-time", |
| 468 | &tsc->pre_charge_time); |
| 469 | if (err) |
| 470 | tsc->pre_charge_time = 0xfff; |
| 471 | |
Guy Shapiro | f43d3ec | 2016-12-15 21:23:02 -0800 | [diff] [blame] | 472 | err = of_property_read_u32(np, "touchscreen-average-samples", |
| 473 | &average_samples); |
Guy Shapiro | 031bfed | 2016-11-27 20:40:39 -0800 | [diff] [blame] | 474 | if (err) |
Guy Shapiro | f43d3ec | 2016-12-15 21:23:02 -0800 | [diff] [blame] | 475 | average_samples = 1; |
Guy Shapiro | 031bfed | 2016-11-27 20:40:39 -0800 | [diff] [blame] | 476 | |
Guy Shapiro | f43d3ec | 2016-12-15 21:23:02 -0800 | [diff] [blame] | 477 | switch (average_samples) { |
| 478 | case 1: |
| 479 | tsc->average_enable = false; |
| 480 | tsc->average_select = 0; /* value unused; initialize anyway */ |
| 481 | break; |
| 482 | case 4: |
| 483 | case 8: |
| 484 | case 16: |
| 485 | case 32: |
| 486 | tsc->average_enable = true; |
| 487 | tsc->average_select = ilog2(average_samples) - 2; |
| 488 | break; |
| 489 | default: |
| 490 | dev_err(&pdev->dev, |
| 491 | "touchscreen-average-samples (%u) must be 1, 4, 8, 16 or 32\n", |
| 492 | average_samples); |
Guy Shapiro | 031bfed | 2016-11-27 20:40:39 -0800 | [diff] [blame] | 493 | return -EINVAL; |
| 494 | } |
| 495 | |
Haibo Chen | 9a436d5 | 2015-09-05 11:31:21 -0700 | [diff] [blame] | 496 | err = input_register_device(tsc->input); |
| 497 | if (err) { |
| 498 | dev_err(&pdev->dev, |
| 499 | "failed to register input device: %d\n", err); |
| 500 | return err; |
| 501 | } |
| 502 | |
| 503 | platform_set_drvdata(pdev, tsc); |
| 504 | return 0; |
| 505 | } |
| 506 | |
| 507 | static int __maybe_unused imx6ul_tsc_suspend(struct device *dev) |
| 508 | { |
| 509 | struct platform_device *pdev = to_platform_device(dev); |
| 510 | struct imx6ul_tsc *tsc = platform_get_drvdata(pdev); |
| 511 | struct input_dev *input_dev = tsc->input; |
| 512 | |
| 513 | mutex_lock(&input_dev->mutex); |
| 514 | |
| 515 | if (input_dev->users) { |
| 516 | imx6ul_tsc_disable(tsc); |
| 517 | |
| 518 | clk_disable_unprepare(tsc->tsc_clk); |
| 519 | clk_disable_unprepare(tsc->adc_clk); |
| 520 | } |
| 521 | |
| 522 | mutex_unlock(&input_dev->mutex); |
| 523 | |
| 524 | return 0; |
| 525 | } |
| 526 | |
| 527 | static int __maybe_unused imx6ul_tsc_resume(struct device *dev) |
| 528 | { |
| 529 | struct platform_device *pdev = to_platform_device(dev); |
| 530 | struct imx6ul_tsc *tsc = platform_get_drvdata(pdev); |
| 531 | struct input_dev *input_dev = tsc->input; |
| 532 | int retval = 0; |
| 533 | |
| 534 | mutex_lock(&input_dev->mutex); |
| 535 | |
| 536 | if (input_dev->users) { |
| 537 | retval = clk_prepare_enable(tsc->adc_clk); |
| 538 | if (retval) |
| 539 | goto out; |
| 540 | |
| 541 | retval = clk_prepare_enable(tsc->tsc_clk); |
| 542 | if (retval) { |
| 543 | clk_disable_unprepare(tsc->adc_clk); |
| 544 | goto out; |
| 545 | } |
| 546 | |
Fabio Estevam | 6cc527b | 2015-09-14 10:36:35 -0700 | [diff] [blame] | 547 | retval = imx6ul_tsc_init(tsc); |
Haibo Chen | 9a436d5 | 2015-09-05 11:31:21 -0700 | [diff] [blame] | 548 | } |
| 549 | |
| 550 | out: |
| 551 | mutex_unlock(&input_dev->mutex); |
| 552 | return retval; |
| 553 | } |
| 554 | |
| 555 | static SIMPLE_DEV_PM_OPS(imx6ul_tsc_pm_ops, |
| 556 | imx6ul_tsc_suspend, imx6ul_tsc_resume); |
| 557 | |
| 558 | static const struct of_device_id imx6ul_tsc_match[] = { |
| 559 | { .compatible = "fsl,imx6ul-tsc", }, |
| 560 | { /* sentinel */ } |
| 561 | }; |
| 562 | MODULE_DEVICE_TABLE(of, imx6ul_tsc_match); |
| 563 | |
| 564 | static struct platform_driver imx6ul_tsc_driver = { |
| 565 | .driver = { |
| 566 | .name = "imx6ul-tsc", |
| 567 | .of_match_table = imx6ul_tsc_match, |
| 568 | .pm = &imx6ul_tsc_pm_ops, |
| 569 | }, |
| 570 | .probe = imx6ul_tsc_probe, |
| 571 | }; |
| 572 | module_platform_driver(imx6ul_tsc_driver); |
| 573 | |
| 574 | MODULE_AUTHOR("Haibo Chen <haibo.chen@freescale.com>"); |
| 575 | MODULE_DESCRIPTION("Freescale i.MX6UL Touchscreen controller driver"); |
| 576 | MODULE_LICENSE("GPL v2"); |