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Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * Copyright (c) 2004, 2005 Topspin Communications. All rights reserved.
3 *
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
9 *
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
12 * conditions are met:
13 *
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
16 * disclaimer.
17 *
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
31 *
32 * $Id: mthca_dev.h 1349 2004-12-16 21:09:43Z roland $
33 */
34
35#ifndef MTHCA_DEV_H
36#define MTHCA_DEV_H
37
38#include <linux/spinlock.h>
39#include <linux/kernel.h>
40#include <linux/pci.h>
41#include <linux/dma-mapping.h>
42#include <asm/semaphore.h>
43
44#include "mthca_provider.h"
45#include "mthca_doorbell.h"
46
47#define DRV_NAME "ib_mthca"
48#define PFX DRV_NAME ": "
49#define DRV_VERSION "0.06-pre"
50#define DRV_RELDATE "November 8, 2004"
51
52/* Types of supported HCA */
53enum {
54 TAVOR, /* MT23108 */
55 ARBEL_COMPAT, /* MT25208 in Tavor compat mode */
56 ARBEL_NATIVE /* MT25208 with extended features */
57};
58
59enum {
60 MTHCA_FLAG_DDR_HIDDEN = 1 << 1,
61 MTHCA_FLAG_SRQ = 1 << 2,
62 MTHCA_FLAG_MSI = 1 << 3,
63 MTHCA_FLAG_MSI_X = 1 << 4,
Michael S. Tsirkine0f5fdc2005-04-16 15:26:30 -070064 MTHCA_FLAG_NO_LAM = 1 << 5,
65 MTHCA_FLAG_FMR = 1 << 6
Linus Torvalds1da177e2005-04-16 15:20:36 -070066};
67
68enum {
69 MTHCA_MAX_PORTS = 2
70};
71
72enum {
73 MTHCA_EQ_CONTEXT_SIZE = 0x40,
74 MTHCA_CQ_CONTEXT_SIZE = 0x40,
75 MTHCA_QP_CONTEXT_SIZE = 0x200,
76 MTHCA_RDB_ENTRY_SIZE = 0x20,
77 MTHCA_AV_SIZE = 0x20,
78 MTHCA_MGM_ENTRY_SIZE = 0x40,
79
80 /* Arbel FW gives us these, but we need them for Tavor */
81 MTHCA_MPT_ENTRY_SIZE = 0x40,
82 MTHCA_MTT_SEG_SIZE = 0x40,
83};
84
85enum {
86 MTHCA_EQ_CMD,
87 MTHCA_EQ_ASYNC,
88 MTHCA_EQ_COMP,
89 MTHCA_NUM_EQ
90};
91
Michael S. Tsirkin2a4443a2005-04-16 15:26:25 -070092enum {
93 MTHCA_OPCODE_NOP = 0x00,
94 MTHCA_OPCODE_RDMA_WRITE = 0x08,
95 MTHCA_OPCODE_RDMA_WRITE_IMM = 0x09,
96 MTHCA_OPCODE_SEND = 0x0a,
97 MTHCA_OPCODE_SEND_IMM = 0x0b,
98 MTHCA_OPCODE_RDMA_READ = 0x10,
99 MTHCA_OPCODE_ATOMIC_CS = 0x11,
100 MTHCA_OPCODE_ATOMIC_FA = 0x12,
101 MTHCA_OPCODE_BIND_MW = 0x18,
102 MTHCA_OPCODE_INVALID = 0xff
103};
104
Linus Torvalds1da177e2005-04-16 15:20:36 -0700105struct mthca_cmd {
106 int use_events;
107 struct semaphore hcr_sem;
108 struct semaphore poll_sem;
109 struct semaphore event_sem;
110 int max_cmds;
111 spinlock_t context_lock;
112 int free_head;
113 struct mthca_cmd_context *context;
114 u16 token_mask;
115};
116
117struct mthca_limits {
118 int num_ports;
119 int vl_cap;
120 int mtu_cap;
121 int gid_table_len;
122 int pkey_table_len;
123 int local_ca_ack_delay;
124 int num_uars;
125 int max_sg;
126 int num_qps;
127 int reserved_qps;
128 int num_srqs;
129 int reserved_srqs;
130 int num_eecs;
131 int reserved_eecs;
132 int num_cqs;
133 int reserved_cqs;
134 int num_eqs;
135 int reserved_eqs;
136 int num_mpts;
137 int num_mtt_segs;
Michael S. Tsirkine0f5fdc2005-04-16 15:26:30 -0700138 int fmr_reserved_mtts;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700139 int reserved_mtts;
140 int reserved_mrws;
141 int reserved_uars;
142 int num_mgms;
143 int num_amgms;
144 int reserved_mcgs;
145 int num_pds;
146 int reserved_pds;
147};
148
149struct mthca_alloc {
150 u32 last;
151 u32 top;
152 u32 max;
153 u32 mask;
154 spinlock_t lock;
155 unsigned long *table;
156};
157
158struct mthca_array {
159 struct {
160 void **page;
161 int used;
162 } *page_list;
163};
164
165struct mthca_uar_table {
166 struct mthca_alloc alloc;
167 u64 uarc_base;
168 int uarc_size;
169};
170
171struct mthca_pd_table {
172 struct mthca_alloc alloc;
173};
174
Michael S. Tsirkin9095e202005-04-16 15:26:26 -0700175struct mthca_buddy {
176 unsigned long **bits;
177 int max_order;
178 spinlock_t lock;
179};
180
Linus Torvalds1da177e2005-04-16 15:20:36 -0700181struct mthca_mr_table {
182 struct mthca_alloc mpt_alloc;
Michael S. Tsirkine0f5fdc2005-04-16 15:26:30 -0700183 struct mthca_buddy mtt_buddy;
184 struct mthca_buddy *fmr_mtt_buddy;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700185 u64 mtt_base;
Michael S. Tsirkine0f5fdc2005-04-16 15:26:30 -0700186 u64 mpt_base;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700187 struct mthca_icm_table *mtt_table;
188 struct mthca_icm_table *mpt_table;
Michael S. Tsirkine0f5fdc2005-04-16 15:26:30 -0700189 struct {
190 void __iomem *mpt_base;
191 void __iomem *mtt_base;
192 struct mthca_buddy mtt_buddy;
193 } tavor_fmr;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700194};
195
196struct mthca_eq_table {
197 struct mthca_alloc alloc;
198 void __iomem *clr_int;
199 u32 clr_mask;
200 u32 arm_mask;
201 struct mthca_eq eq[MTHCA_NUM_EQ];
202 u64 icm_virt;
203 struct page *icm_page;
204 dma_addr_t icm_dma;
205 int have_irq;
206 u8 inta_pin;
207};
208
209struct mthca_cq_table {
210 struct mthca_alloc alloc;
211 spinlock_t lock;
212 struct mthca_array cq;
213 struct mthca_icm_table *table;
214};
215
216struct mthca_qp_table {
217 struct mthca_alloc alloc;
218 u32 rdb_base;
219 int rdb_shift;
220 int sqp_start;
221 spinlock_t lock;
222 struct mthca_array qp;
223 struct mthca_icm_table *qp_table;
224 struct mthca_icm_table *eqp_table;
Roland Dreier08aeb142005-04-16 15:26:34 -0700225 struct mthca_icm_table *rdb_table;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700226};
227
228struct mthca_av_table {
229 struct pci_pool *pool;
230 int num_ddr_avs;
231 u64 ddr_av_base;
232 void __iomem *av_map;
233 struct mthca_alloc alloc;
234};
235
236struct mthca_mcg_table {
237 struct semaphore sem;
238 struct mthca_alloc alloc;
239 struct mthca_icm_table *table;
240};
241
242struct mthca_dev {
243 struct ib_device ib_dev;
244 struct pci_dev *pdev;
245
246 int hca_type;
247 unsigned long mthca_flags;
248 unsigned long device_cap_flags;
249
250 u32 rev_id;
251
252 /* firmware info */
253 u64 fw_ver;
254 union {
255 struct {
256 u64 fw_start;
257 u64 fw_end;
258 } tavor;
259 struct {
260 u64 clr_int_base;
261 u64 eq_arm_base;
262 u64 eq_set_ci_base;
263 struct mthca_icm *fw_icm;
264 struct mthca_icm *aux_icm;
265 u16 fw_pages;
266 } arbel;
267 } fw;
268
269 u64 ddr_start;
270 u64 ddr_end;
271
272 MTHCA_DECLARE_DOORBELL_LOCK(doorbell_lock)
273 struct semaphore cap_mask_mutex;
274
275 void __iomem *hcr;
276 void __iomem *kar;
277 void __iomem *clr_base;
278 union {
279 struct {
280 void __iomem *ecr_base;
281 } tavor;
282 struct {
283 void __iomem *eq_arm;
284 void __iomem *eq_set_ci_base;
285 } arbel;
286 } eq_regs;
287
288 struct mthca_cmd cmd;
289 struct mthca_limits limits;
290
291 struct mthca_uar_table uar_table;
292 struct mthca_pd_table pd_table;
293 struct mthca_mr_table mr_table;
294 struct mthca_eq_table eq_table;
295 struct mthca_cq_table cq_table;
296 struct mthca_qp_table qp_table;
297 struct mthca_av_table av_table;
298 struct mthca_mcg_table mcg_table;
299
300 struct mthca_uar driver_uar;
301 struct mthca_db_table *db_tab;
302 struct mthca_pd driver_pd;
303 struct mthca_mr driver_mr;
304
305 struct ib_mad_agent *send_agent[MTHCA_MAX_PORTS][2];
306 struct ib_ah *sm_ah[MTHCA_MAX_PORTS];
307 spinlock_t sm_lock;
308};
309
310#define mthca_dbg(mdev, format, arg...) \
311 dev_dbg(&mdev->pdev->dev, format, ## arg)
312#define mthca_err(mdev, format, arg...) \
313 dev_err(&mdev->pdev->dev, format, ## arg)
314#define mthca_info(mdev, format, arg...) \
315 dev_info(&mdev->pdev->dev, format, ## arg)
316#define mthca_warn(mdev, format, arg...) \
317 dev_warn(&mdev->pdev->dev, format, ## arg)
318
319extern void __buggy_use_of_MTHCA_GET(void);
320extern void __buggy_use_of_MTHCA_PUT(void);
321
322#define MTHCA_GET(dest, source, offset) \
323 do { \
324 void *__p = (char *) (source) + (offset); \
325 switch (sizeof (dest)) { \
326 case 1: (dest) = *(u8 *) __p; break; \
327 case 2: (dest) = be16_to_cpup(__p); break; \
328 case 4: (dest) = be32_to_cpup(__p); break; \
329 case 8: (dest) = be64_to_cpup(__p); break; \
330 default: __buggy_use_of_MTHCA_GET(); \
331 } \
332 } while (0)
333
334#define MTHCA_PUT(dest, source, offset) \
335 do { \
336 __typeof__(source) *__p = \
337 (__typeof__(source) *) ((char *) (dest) + (offset)); \
338 switch (sizeof(source)) { \
339 case 1: *__p = (source); break; \
340 case 2: *__p = cpu_to_be16(source); break; \
341 case 4: *__p = cpu_to_be32(source); break; \
342 case 8: *__p = cpu_to_be64(source); break; \
343 default: __buggy_use_of_MTHCA_PUT(); \
344 } \
345 } while (0)
346
347int mthca_reset(struct mthca_dev *mdev);
348
349u32 mthca_alloc(struct mthca_alloc *alloc);
350void mthca_free(struct mthca_alloc *alloc, u32 obj);
351int mthca_alloc_init(struct mthca_alloc *alloc, u32 num, u32 mask,
352 u32 reserved);
353void mthca_alloc_cleanup(struct mthca_alloc *alloc);
354void *mthca_array_get(struct mthca_array *array, int index);
355int mthca_array_set(struct mthca_array *array, int index, void *value);
356void mthca_array_clear(struct mthca_array *array, int index);
357int mthca_array_init(struct mthca_array *array, int nent);
358void mthca_array_cleanup(struct mthca_array *array, int nent);
359
360int mthca_init_uar_table(struct mthca_dev *dev);
361int mthca_init_pd_table(struct mthca_dev *dev);
362int mthca_init_mr_table(struct mthca_dev *dev);
363int mthca_init_eq_table(struct mthca_dev *dev);
364int mthca_init_cq_table(struct mthca_dev *dev);
365int mthca_init_qp_table(struct mthca_dev *dev);
366int mthca_init_av_table(struct mthca_dev *dev);
367int mthca_init_mcg_table(struct mthca_dev *dev);
368
369void mthca_cleanup_uar_table(struct mthca_dev *dev);
370void mthca_cleanup_pd_table(struct mthca_dev *dev);
371void mthca_cleanup_mr_table(struct mthca_dev *dev);
372void mthca_cleanup_eq_table(struct mthca_dev *dev);
373void mthca_cleanup_cq_table(struct mthca_dev *dev);
374void mthca_cleanup_qp_table(struct mthca_dev *dev);
375void mthca_cleanup_av_table(struct mthca_dev *dev);
376void mthca_cleanup_mcg_table(struct mthca_dev *dev);
377
378int mthca_register_device(struct mthca_dev *dev);
379void mthca_unregister_device(struct mthca_dev *dev);
380
381int mthca_uar_alloc(struct mthca_dev *dev, struct mthca_uar *uar);
382void mthca_uar_free(struct mthca_dev *dev, struct mthca_uar *uar);
383
384int mthca_pd_alloc(struct mthca_dev *dev, struct mthca_pd *pd);
385void mthca_pd_free(struct mthca_dev *dev, struct mthca_pd *pd);
386
387int mthca_mr_alloc_notrans(struct mthca_dev *dev, u32 pd,
388 u32 access, struct mthca_mr *mr);
389int mthca_mr_alloc_phys(struct mthca_dev *dev, u32 pd,
390 u64 *buffer_list, int buffer_size_shift,
391 int list_len, u64 iova, u64 total_size,
392 u32 access, struct mthca_mr *mr);
Michael S. Tsirkine0f5fdc2005-04-16 15:26:30 -0700393void mthca_free_mr(struct mthca_dev *dev, struct mthca_mr *mr);
394
395int mthca_fmr_alloc(struct mthca_dev *dev, u32 pd,
396 u32 access, struct mthca_fmr *fmr);
397int mthca_tavor_map_phys_fmr(struct ib_fmr *ibfmr, u64 *page_list,
398 int list_len, u64 iova);
399void mthca_tavor_fmr_unmap(struct mthca_dev *dev, struct mthca_fmr *fmr);
400int mthca_arbel_map_phys_fmr(struct ib_fmr *ibfmr, u64 *page_list,
401 int list_len, u64 iova);
402void mthca_arbel_fmr_unmap(struct mthca_dev *dev, struct mthca_fmr *fmr);
403int mthca_free_fmr(struct mthca_dev *dev, struct mthca_fmr *fmr);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700404
405int mthca_map_eq_icm(struct mthca_dev *dev, u64 icm_virt);
406void mthca_unmap_eq_icm(struct mthca_dev *dev);
407
408int mthca_poll_cq(struct ib_cq *ibcq, int num_entries,
409 struct ib_wc *entry);
410int mthca_tavor_arm_cq(struct ib_cq *cq, enum ib_cq_notify notify);
411int mthca_arbel_arm_cq(struct ib_cq *cq, enum ib_cq_notify notify);
412int mthca_init_cq(struct mthca_dev *dev, int nent,
413 struct mthca_cq *cq);
414void mthca_free_cq(struct mthca_dev *dev,
415 struct mthca_cq *cq);
416void mthca_cq_event(struct mthca_dev *dev, u32 cqn);
417void mthca_cq_clean(struct mthca_dev *dev, u32 cqn, u32 qpn);
418
419void mthca_qp_event(struct mthca_dev *dev, u32 qpn,
420 enum ib_event_type event_type);
421int mthca_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr, int attr_mask);
422int mthca_tavor_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr,
423 struct ib_send_wr **bad_wr);
424int mthca_tavor_post_receive(struct ib_qp *ibqp, struct ib_recv_wr *wr,
425 struct ib_recv_wr **bad_wr);
426int mthca_arbel_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr,
427 struct ib_send_wr **bad_wr);
428int mthca_arbel_post_receive(struct ib_qp *ibqp, struct ib_recv_wr *wr,
429 struct ib_recv_wr **bad_wr);
430int mthca_free_err_wqe(struct mthca_dev *dev, struct mthca_qp *qp, int is_send,
431 int index, int *dbd, u32 *new_wqe);
432int mthca_alloc_qp(struct mthca_dev *dev,
433 struct mthca_pd *pd,
434 struct mthca_cq *send_cq,
435 struct mthca_cq *recv_cq,
436 enum ib_qp_type type,
437 enum ib_sig_type send_policy,
438 struct mthca_qp *qp);
439int mthca_alloc_sqp(struct mthca_dev *dev,
440 struct mthca_pd *pd,
441 struct mthca_cq *send_cq,
442 struct mthca_cq *recv_cq,
443 enum ib_sig_type send_policy,
444 int qpn,
445 int port,
446 struct mthca_sqp *sqp);
447void mthca_free_qp(struct mthca_dev *dev, struct mthca_qp *qp);
448int mthca_create_ah(struct mthca_dev *dev,
449 struct mthca_pd *pd,
450 struct ib_ah_attr *ah_attr,
451 struct mthca_ah *ah);
452int mthca_destroy_ah(struct mthca_dev *dev, struct mthca_ah *ah);
453int mthca_read_ah(struct mthca_dev *dev, struct mthca_ah *ah,
454 struct ib_ud_header *header);
455
456int mthca_multicast_attach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid);
457int mthca_multicast_detach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid);
458
459int mthca_process_mad(struct ib_device *ibdev,
460 int mad_flags,
461 u8 port_num,
462 struct ib_wc *in_wc,
463 struct ib_grh *in_grh,
464 struct ib_mad *in_mad,
465 struct ib_mad *out_mad);
466int mthca_create_agents(struct mthca_dev *dev);
467void mthca_free_agents(struct mthca_dev *dev);
468
469static inline struct mthca_dev *to_mdev(struct ib_device *ibdev)
470{
471 return container_of(ibdev, struct mthca_dev, ib_dev);
472}
473
Roland Dreierd10ddbf2005-04-16 15:26:32 -0700474static inline int mthca_is_memfree(struct mthca_dev *dev)
475{
476 return dev->hca_type == ARBEL_NATIVE;
477}
478
Linus Torvalds1da177e2005-04-16 15:20:36 -0700479#endif /* MTHCA_DEV_H */