blob: d0e257315d975b475f55260f4c627c52b15a5bc1 [file] [log] [blame]
Mark Brownf701a2e2011-03-09 19:31:01 +00001/*
2 * wm8958-dsp2.c -- WM8958 DSP2 support
3 *
4 * Copyright 2011 Wolfson Microelectronics plc
5 *
6 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13#include <linux/module.h>
14#include <linux/moduleparam.h>
15#include <linux/init.h>
16#include <linux/delay.h>
17#include <linux/pm.h>
18#include <linux/i2c.h>
19#include <linux/platform_device.h>
20#include <linux/slab.h>
21#include <sound/soc.h>
22#include <sound/initval.h>
23#include <sound/tlv.h>
24#include <trace/events/asoc.h>
25
26#include <linux/mfd/wm8994/core.h>
27#include <linux/mfd/wm8994/registers.h>
28#include <linux/mfd/wm8994/pdata.h>
29#include <linux/mfd/wm8994/gpio.h>
30
31#include "wm8994.h"
32
Mark Brownfbbf5922011-03-11 18:09:04 +000033#define WM_FW_BLOCK_INFO 0xff
34#define WM_FW_BLOCK_PM 0x00
35#define WM_FW_BLOCK_X 0x01
36#define WM_FW_BLOCK_Y 0x02
37#define WM_FW_BLOCK_Z 0x03
38#define WM_FW_BLOCK_I 0x06
39#define WM_FW_BLOCK_A 0x08
40#define WM_FW_BLOCK_C 0x0c
41
42static int wm8958_dsp2_fw(struct snd_soc_codec *codec, const char *name,
43 const struct firmware *fw, bool check)
44{
45 struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec);
46 u64 data64;
47 u32 data32;
48 const u8 *data;
49 char *str;
50 size_t block_len, len;
51 int ret = 0;
52
53 /* Suppress unneeded downloads */
54 if (wm8994->cur_fw == fw)
55 return 0;
56
57 if (fw->size < 32) {
58 dev_err(codec->dev, "%s: firmware too short\n", name);
59 goto err;
60 }
61
62 if (memcmp(fw->data, "WMFW", 4) != 0) {
63 dev_err(codec->dev, "%s: firmware has bad file magic %08x\n",
64 name, data32);
65 goto err;
66 }
67
68 memcpy(&data32, fw->data + 4, sizeof(data32));
69 len = be32_to_cpu(data32);
70
71 memcpy(&data32, fw->data + 8, sizeof(data32));
72 data32 = be32_to_cpu(data32);
73 if ((data32 >> 24) & 0xff) {
74 dev_err(codec->dev, "%s: unsupported firmware version %d\n",
75 name, (data32 >> 24) & 0xff);
76 goto err;
77 }
78 if ((data32 & 0xffff) != 8958) {
79 dev_err(codec->dev, "%s: unsupported target device %d\n",
80 name, data32 & 0xffff);
81 goto err;
82 }
83 if (((data32 >> 16) & 0xff) != 0xc) {
84 dev_err(codec->dev, "%s: unsupported target core %d\n",
85 name, (data32 >> 16) & 0xff);
86 goto err;
87 }
88
89 if (check) {
90 memcpy(&data64, fw->data + 24, sizeof(u64));
91 dev_info(codec->dev, "%s timestamp %llx\n",
92 name, be64_to_cpu(data64));
93 } else {
94 snd_soc_write(codec, 0x102, 0x2);
95 snd_soc_write(codec, 0x900, 0x2);
96 }
97
98 data = fw->data + len;
99 len = fw->size - len;
100 while (len) {
101 if (len < 12) {
102 dev_err(codec->dev, "%s short data block of %d\n",
103 name, len);
104 goto err;
105 }
106
107 memcpy(&data32, data + 4, sizeof(data32));
108 block_len = be32_to_cpu(data32);
109 if (block_len + 8 > len) {
110 dev_err(codec->dev, "%d byte block longer than file\n",
111 block_len);
112 goto err;
113 }
114 if (block_len == 0) {
115 dev_err(codec->dev, "Zero length block\n");
116 goto err;
117 }
118
119 memcpy(&data32, data, sizeof(data32));
120 data32 = be32_to_cpu(data32);
121
122 switch ((data32 >> 24) & 0xff) {
123 case WM_FW_BLOCK_INFO:
124 /* Informational text */
125 if (!check)
126 break;
127
128 str = kzalloc(block_len + 1, GFP_KERNEL);
129 if (str) {
130 memcpy(str, data + 8, block_len);
131 dev_info(codec->dev, "%s: %s\n", name, str);
132 kfree(str);
133 } else {
134 dev_err(codec->dev, "Out of memory\n");
135 }
136 break;
137 case WM_FW_BLOCK_PM:
138 case WM_FW_BLOCK_X:
139 case WM_FW_BLOCK_Y:
140 case WM_FW_BLOCK_Z:
141 case WM_FW_BLOCK_I:
142 case WM_FW_BLOCK_A:
143 case WM_FW_BLOCK_C:
144 dev_dbg(codec->dev, "%s: %d bytes of %x@%x\n", name,
145 block_len, (data32 >> 24) & 0xff,
146 data32 & 0xffffff);
147
148 if (check)
149 break;
150
151 data32 &= 0xffffff;
152
153 wm8994_bulk_write(codec->control_data,
154 data32 & 0xffffff,
155 block_len / 2,
156 (void *)(data + 8));
157
158 break;
159 default:
160 dev_warn(codec->dev, "%s: unknown block type %d\n",
161 name, (data32 >> 24) & 0xff);
162 break;
163 }
164
165 /* Round up to the next 32 bit word */
166 block_len += block_len % 4;
167
168 data += block_len + 8;
169 len -= block_len + 8;
170 }
171
172 if (!check) {
173 dev_dbg(codec->dev, "%s: download done\n", name);
174 wm8994->cur_fw = fw;
175 } else {
176 dev_info(codec->dev, "%s: got firmware\n", name);
177 }
178
179 goto ok;
180
181err:
182 ret = -EINVAL;
183ok:
184 if (!check) {
185 snd_soc_write(codec, 0x900, 0x0);
186 snd_soc_write(codec, 0x102, 0x0);
187 }
188
189 return ret;
190}
191
Mark Brownf20d77c2011-03-16 20:55:37 +0000192static void wm8958_dsp_start_mbc(struct snd_soc_codec *codec, int path)
Mark Brownf701a2e2011-03-09 19:31:01 +0000193{
194 struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec);
195 struct wm8994_pdata *pdata = wm8994->pdata;
Mark Brownfbbf5922011-03-11 18:09:04 +0000196 int i;
197
198 /* If the DSP is already running then noop */
199 if (snd_soc_read(codec, WM8958_DSP2_PROGRAM) & WM8958_DSP2_ENA)
200 return;
201
202 /* If we have MBC firmware download it */
203 if (wm8994->mbc)
204 wm8958_dsp2_fw(codec, "MBC", wm8994->mbc, false);
205
206 snd_soc_update_bits(codec, WM8958_DSP2_PROGRAM,
207 WM8958_DSP2_ENA, WM8958_DSP2_ENA);
208
209 /* If we've got user supplied MBC settings use them */
210 if (pdata && pdata->num_mbc_cfgs) {
211 struct wm8958_mbc_cfg *cfg
212 = &pdata->mbc_cfgs[wm8994->mbc_cfg];
213
214 for (i = 0; i < ARRAY_SIZE(cfg->coeff_regs); i++)
215 snd_soc_write(codec, i + WM8958_MBC_BAND_1_K_1,
216 cfg->coeff_regs[i]);
217
218 for (i = 0; i < ARRAY_SIZE(cfg->cutoff_regs); i++)
219 snd_soc_write(codec,
220 i + WM8958_MBC_BAND_2_LOWER_CUTOFF_C1_1,
221 cfg->cutoff_regs[i]);
222 }
223
224 /* Run the DSP */
225 snd_soc_write(codec, WM8958_DSP2_EXECCONTROL,
226 WM8958_DSP2_RUNR);
227
228 /* And we're off! */
229 snd_soc_update_bits(codec, WM8958_DSP2_CONFIG,
230 WM8958_MBC_ENA |
231 WM8958_MBC_SEL_MASK,
232 path << WM8958_MBC_SEL_SHIFT |
233 WM8958_MBC_ENA);
234}
235
Mark Brown09e10d72011-03-16 22:57:47 +0000236static void wm8958_dsp_start_vss(struct snd_soc_codec *codec, int path)
237{
238 struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec);
239 struct wm8994_pdata *pdata = wm8994->pdata;
240 int i, ena;
241
242 if (wm8994->mbc_vss)
243 wm8958_dsp2_fw(codec, "MBC+VSS", wm8994->mbc_vss, false);
244
245 snd_soc_update_bits(codec, WM8958_DSP2_PROGRAM,
246 WM8958_DSP2_ENA, WM8958_DSP2_ENA);
247
248 /* If we've got user supplied settings use them */
249 if (pdata && pdata->num_mbc_cfgs) {
250 struct wm8958_mbc_cfg *cfg
251 = &pdata->mbc_cfgs[wm8994->mbc_cfg];
252
253 for (i = 0; i < ARRAY_SIZE(cfg->combined_regs); i++)
254 snd_soc_write(codec, i + 0x2800,
255 cfg->combined_regs[i]);
256 }
257
258 if (pdata && pdata->num_vss_cfgs) {
259 struct wm8958_vss_cfg *cfg
260 = &pdata->vss_cfgs[wm8994->vss_cfg];
261
262 for (i = 0; i < ARRAY_SIZE(cfg->regs); i++)
263 snd_soc_write(codec, i + 0x2600, cfg->regs[i]);
264 }
265
266 if (pdata && pdata->num_vss_hpf_cfgs) {
267 struct wm8958_vss_hpf_cfg *cfg
268 = &pdata->vss_hpf_cfgs[wm8994->vss_hpf_cfg];
269
270 for (i = 0; i < ARRAY_SIZE(cfg->regs); i++)
271 snd_soc_write(codec, i + 0x2400, cfg->regs[i]);
272 }
273
274 /* Run the DSP */
275 snd_soc_write(codec, WM8958_DSP2_EXECCONTROL,
276 WM8958_DSP2_RUNR);
277
278 /* Enable the algorithms we've selected */
279 ena = 0;
280 if (wm8994->mbc_ena[path])
281 ena |= 0x8;
282 if (wm8994->hpf2_ena[path])
283 ena |= 0x4;
284 if (wm8994->hpf1_ena[path])
285 ena |= 0x2;
286 if (wm8994->vss_ena[path])
287 ena |= 0x1;
288
289 snd_soc_write(codec, 0x2201, ena);
290
291 /* Switch the DSP into the data path */
292 snd_soc_update_bits(codec, WM8958_DSP2_CONFIG,
293 WM8958_MBC_SEL_MASK | WM8958_MBC_ENA,
294 path << WM8958_MBC_SEL_SHIFT | WM8958_MBC_ENA);
295}
296
297
Mark Brownfbbf5922011-03-11 18:09:04 +0000298static void wm8958_dsp_apply(struct snd_soc_codec *codec, int path, int start)
299{
300 struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec);
Mark Brownf701a2e2011-03-09 19:31:01 +0000301 int pwr_reg = snd_soc_read(codec, WM8994_POWER_MANAGEMENT_5);
Mark Brownf20d77c2011-03-16 20:55:37 +0000302 int ena, reg, aif;
Mark Brownf701a2e2011-03-09 19:31:01 +0000303
Mark Brownf20d77c2011-03-16 20:55:37 +0000304 switch (path) {
Mark Brownf701a2e2011-03-09 19:31:01 +0000305 case 0:
306 pwr_reg &= (WM8994_AIF1DAC1L_ENA | WM8994_AIF1DAC1R_ENA);
307 aif = 0;
308 break;
309 case 1:
310 pwr_reg &= (WM8994_AIF1DAC2L_ENA | WM8994_AIF1DAC2R_ENA);
311 aif = 0;
312 break;
313 case 2:
314 pwr_reg &= (WM8994_AIF2DACL_ENA | WM8994_AIF2DACR_ENA);
315 aif = 1;
316 break;
317 default:
318 BUG();
319 return;
320 }
321
Mark Brownf20d77c2011-03-16 20:55:37 +0000322 /* Do we have both an active AIF and an active algorithm? */
Mark Brown09e10d72011-03-16 22:57:47 +0000323 ena = wm8994->mbc_ena[path] || wm8994->vss_ena[path] ||
324 wm8994->hpf1_ena[path] || wm8994->hpf2_ena[path];
Mark Brownf20d77c2011-03-16 20:55:37 +0000325 if (!pwr_reg)
326 ena = 0;
Mark Brownf701a2e2011-03-09 19:31:01 +0000327
328 reg = snd_soc_read(codec, WM8958_DSP2_PROGRAM);
329
Mark Brownf20d77c2011-03-16 20:55:37 +0000330 dev_dbg(codec->dev, "DSP path %d %d startup: %d, power: %x, DSP: %x\n",
331 path, wm8994->dsp_active, start, pwr_reg, reg);
Mark Brownf701a2e2011-03-09 19:31:01 +0000332
333 if (start && ena) {
Mark Brownf20d77c2011-03-16 20:55:37 +0000334 /* If either AIFnCLK is not yet enabled postpone */
Mark Brownc6b7b572011-03-11 18:13:12 +0000335 if (!(snd_soc_read(codec, WM8994_AIF1_CLOCKING_1)
336 & WM8994_AIF1CLK_ENA_MASK) &&
337 !(snd_soc_read(codec, WM8994_AIF2_CLOCKING_1)
338 & WM8994_AIF2CLK_ENA_MASK))
339 return;
340
Mark Brownf701a2e2011-03-09 19:31:01 +0000341 /* Switch the clock over to the appropriate AIF */
342 snd_soc_update_bits(codec, WM8994_CLOCKING_1,
343 WM8958_DSP2CLK_SRC | WM8958_DSP2CLK_ENA,
344 aif << WM8958_DSP2CLK_SRC_SHIFT |
345 WM8958_DSP2CLK_ENA);
346
Mark Brown09e10d72011-03-16 22:57:47 +0000347 if (wm8994->vss_ena[path] || wm8994->hpf1_ena[path] ||
348 wm8994->hpf2_ena[path])
349 wm8958_dsp_start_vss(codec, path);
350 else if (wm8994->mbc_ena[path])
Mark Brownf20d77c2011-03-16 20:55:37 +0000351 wm8958_dsp_start_mbc(codec, path);
Mark Brownf701a2e2011-03-09 19:31:01 +0000352
Mark Brown09e10d72011-03-16 22:57:47 +0000353 wm8994->dsp_active = path;
354
355 dev_dbg(codec->dev, "DSP running in path %d\n", path);
356 }
357
358 if (!start && wm8994->dsp_active == path) {
Mark Brownf701a2e2011-03-09 19:31:01 +0000359 /* If the DSP is already stopped then noop */
360 if (!(reg & WM8958_DSP2_ENA))
361 return;
362
363 snd_soc_update_bits(codec, WM8958_DSP2_CONFIG,
364 WM8958_MBC_ENA, 0);
Mark Brownf20d77c2011-03-16 20:55:37 +0000365 snd_soc_write(codec, WM8958_DSP2_EXECCONTROL,
366 WM8958_DSP2_STOP);
Mark Brownf701a2e2011-03-09 19:31:01 +0000367 snd_soc_update_bits(codec, WM8958_DSP2_PROGRAM,
368 WM8958_DSP2_ENA, 0);
369 snd_soc_update_bits(codec, WM8994_CLOCKING_1,
370 WM8958_DSP2CLK_ENA, 0);
Mark Brownf20d77c2011-03-16 20:55:37 +0000371
372 wm8994->dsp_active = -1;
373
374 dev_dbg(codec->dev, "DSP stopped\n");
Mark Brownf701a2e2011-03-09 19:31:01 +0000375 }
376}
377
378int wm8958_aif_ev(struct snd_soc_dapm_widget *w,
379 struct snd_kcontrol *kcontrol, int event)
380{
381 struct snd_soc_codec *codec = w->codec;
Mark Brownc6b7b572011-03-11 18:13:12 +0000382 int i;
Mark Brownf701a2e2011-03-09 19:31:01 +0000383
384 switch (event) {
385 case SND_SOC_DAPM_POST_PMU:
Mark Brownc6b7b572011-03-11 18:13:12 +0000386 case SND_SOC_DAPM_PRE_PMU:
387 for (i = 0; i < 3; i++)
Mark Brownf20d77c2011-03-16 20:55:37 +0000388 wm8958_dsp_apply(codec, i, 1);
Mark Brownf701a2e2011-03-09 19:31:01 +0000389 break;
390 case SND_SOC_DAPM_POST_PMD:
Mark Brownc6b7b572011-03-11 18:13:12 +0000391 case SND_SOC_DAPM_PRE_PMD:
392 for (i = 0; i < 3; i++)
Mark Brownf20d77c2011-03-16 20:55:37 +0000393 wm8958_dsp_apply(codec, i, 0);
Mark Brownf701a2e2011-03-09 19:31:01 +0000394 break;
395 }
396
397 return 0;
398}
399
Mark Brownf20d77c2011-03-16 20:55:37 +0000400/* Check if DSP2 is in use on another AIF */
401static int wm8958_dsp2_busy(struct wm8994_priv *wm8994, int aif)
402{
403 int i;
404
405 for (i = 0; i < ARRAY_SIZE(wm8994->mbc_ena); i++) {
406 if (i == aif)
407 continue;
Mark Brown09e10d72011-03-16 22:57:47 +0000408 if (wm8994->mbc_ena[i] || wm8994->vss_ena[i] ||
409 wm8994->hpf1_ena[i] || wm8994->hpf2_ena[i])
Mark Brownf20d77c2011-03-16 20:55:37 +0000410 return 1;
411 }
412
413 return 0;
414}
415
Mark Brownf701a2e2011-03-09 19:31:01 +0000416static int wm8958_put_mbc_enum(struct snd_kcontrol *kcontrol,
417 struct snd_ctl_elem_value *ucontrol)
418{
419 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
420 struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec);
421 struct wm8994_pdata *pdata = wm8994->pdata;
422 int value = ucontrol->value.integer.value[0];
423 int reg;
424
425 /* Don't allow on the fly reconfiguration */
426 reg = snd_soc_read(codec, WM8994_CLOCKING_1);
427 if (reg < 0 || reg & WM8958_DSP2CLK_ENA)
428 return -EBUSY;
429
430 if (value >= pdata->num_mbc_cfgs)
431 return -EINVAL;
432
433 wm8994->mbc_cfg = value;
434
435 return 0;
436}
437
438static int wm8958_get_mbc_enum(struct snd_kcontrol *kcontrol,
439 struct snd_ctl_elem_value *ucontrol)
440{
441 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
442 struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec);
443
444 ucontrol->value.enumerated.item[0] = wm8994->mbc_cfg;
445
446 return 0;
447}
448
449static int wm8958_mbc_info(struct snd_kcontrol *kcontrol,
450 struct snd_ctl_elem_info *uinfo)
451{
452 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
453 uinfo->count = 1;
454 uinfo->value.integer.min = 0;
455 uinfo->value.integer.max = 1;
456 return 0;
457}
458
459static int wm8958_mbc_get(struct snd_kcontrol *kcontrol,
460 struct snd_ctl_elem_value *ucontrol)
461{
462 int mbc = kcontrol->private_value;
463 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
464 struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec);
465
466 ucontrol->value.integer.value[0] = wm8994->mbc_ena[mbc];
467
468 return 0;
469}
470
471static int wm8958_mbc_put(struct snd_kcontrol *kcontrol,
472 struct snd_ctl_elem_value *ucontrol)
473{
474 int mbc = kcontrol->private_value;
Mark Brownf701a2e2011-03-09 19:31:01 +0000475 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
476 struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec);
477
478 if (ucontrol->value.integer.value[0] > 1)
479 return -EINVAL;
480
Mark Brownf20d77c2011-03-16 20:55:37 +0000481 if (wm8958_dsp2_busy(wm8994, mbc)) {
482 dev_dbg(codec->dev, "DSP2 active on %d already\n", mbc);
483 return -EBUSY;
Mark Brownf701a2e2011-03-09 19:31:01 +0000484 }
485
486 wm8994->mbc_ena[mbc] = ucontrol->value.integer.value[0];
487
Mark Brownf20d77c2011-03-16 20:55:37 +0000488 wm8958_dsp_apply(codec, mbc, wm8994->mbc_ena[mbc]);
Mark Brownf701a2e2011-03-09 19:31:01 +0000489
490 return 0;
491}
492
493#define WM8958_MBC_SWITCH(xname, xval) {\
494 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), \
495 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE,\
496 .info = wm8958_mbc_info, \
497 .get = wm8958_mbc_get, .put = wm8958_mbc_put, \
498 .private_value = xval }
499
Mark Brown09e10d72011-03-16 22:57:47 +0000500static int wm8958_put_vss_enum(struct snd_kcontrol *kcontrol,
501 struct snd_ctl_elem_value *ucontrol)
502{
503 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
504 struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec);
505 struct wm8994_pdata *pdata = wm8994->pdata;
506 int value = ucontrol->value.integer.value[0];
507 int reg;
508
509 /* Don't allow on the fly reconfiguration */
510 reg = snd_soc_read(codec, WM8994_CLOCKING_1);
511 if (reg < 0 || reg & WM8958_DSP2CLK_ENA)
512 return -EBUSY;
513
514 if (value >= pdata->num_vss_cfgs)
515 return -EINVAL;
516
517 wm8994->vss_cfg = value;
518
519 return 0;
520}
521
522static int wm8958_get_vss_enum(struct snd_kcontrol *kcontrol,
523 struct snd_ctl_elem_value *ucontrol)
524{
525 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
526 struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec);
527
528 ucontrol->value.enumerated.item[0] = wm8994->vss_cfg;
529
530 return 0;
531}
532
533static int wm8958_put_vss_hpf_enum(struct snd_kcontrol *kcontrol,
534 struct snd_ctl_elem_value *ucontrol)
535{
536 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
537 struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec);
538 struct wm8994_pdata *pdata = wm8994->pdata;
539 int value = ucontrol->value.integer.value[0];
540 int reg;
541
542 /* Don't allow on the fly reconfiguration */
543 reg = snd_soc_read(codec, WM8994_CLOCKING_1);
544 if (reg < 0 || reg & WM8958_DSP2CLK_ENA)
545 return -EBUSY;
546
547 if (value >= pdata->num_vss_hpf_cfgs)
548 return -EINVAL;
549
550 wm8994->vss_hpf_cfg = value;
551
552 return 0;
553}
554
555static int wm8958_get_vss_hpf_enum(struct snd_kcontrol *kcontrol,
556 struct snd_ctl_elem_value *ucontrol)
557{
558 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
559 struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec);
560
561 ucontrol->value.enumerated.item[0] = wm8994->vss_hpf_cfg;
562
563 return 0;
564}
565
566static int wm8958_vss_info(struct snd_kcontrol *kcontrol,
567 struct snd_ctl_elem_info *uinfo)
568{
569 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
570 uinfo->count = 1;
571 uinfo->value.integer.min = 0;
572 uinfo->value.integer.max = 1;
573 return 0;
574}
575
576static int wm8958_vss_get(struct snd_kcontrol *kcontrol,
577 struct snd_ctl_elem_value *ucontrol)
578{
579 int vss = kcontrol->private_value;
580 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
581 struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec);
582
583 ucontrol->value.integer.value[0] = wm8994->vss_ena[vss];
584
585 return 0;
586}
587
588static int wm8958_vss_put(struct snd_kcontrol *kcontrol,
589 struct snd_ctl_elem_value *ucontrol)
590{
591 int vss = kcontrol->private_value;
592 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
593 struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec);
594
595 if (ucontrol->value.integer.value[0] > 1)
596 return -EINVAL;
597
598 if (!wm8994->mbc_vss)
599 return -ENODEV;
600
601 if (wm8958_dsp2_busy(wm8994, vss)) {
602 dev_dbg(codec->dev, "DSP2 active on %d already\n", vss);
603 return -EBUSY;
604 }
605
606 wm8994->vss_ena[vss] = ucontrol->value.integer.value[0];
607
608 wm8958_dsp_apply(codec, vss, wm8994->vss_ena[vss]);
609
610 return 0;
611}
612
613
614#define WM8958_VSS_SWITCH(xname, xval) {\
615 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), \
616 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE,\
617 .info = wm8958_vss_info, \
618 .get = wm8958_vss_get, .put = wm8958_vss_put, \
619 .private_value = xval }
620
621static int wm8958_hpf_info(struct snd_kcontrol *kcontrol,
622 struct snd_ctl_elem_info *uinfo)
623{
624 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
625 uinfo->count = 1;
626 uinfo->value.integer.min = 0;
627 uinfo->value.integer.max = 1;
628 return 0;
629}
630
631static int wm8958_hpf_get(struct snd_kcontrol *kcontrol,
632 struct snd_ctl_elem_value *ucontrol)
633{
634 int hpf = kcontrol->private_value;
635 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
636 struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec);
637
638 if (hpf < 3)
639 ucontrol->value.integer.value[0] = wm8994->hpf1_ena[hpf % 3];
640 else
641 ucontrol->value.integer.value[0] = wm8994->hpf2_ena[hpf % 3];
642
643 return 0;
644}
645
646static int wm8958_hpf_put(struct snd_kcontrol *kcontrol,
647 struct snd_ctl_elem_value *ucontrol)
648{
649 int hpf = kcontrol->private_value;
650 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
651 struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec);
652
653 if (ucontrol->value.integer.value[0] > 1)
654 return -EINVAL;
655
656 if (!wm8994->mbc_vss)
657 return -ENODEV;
658
659 if (wm8958_dsp2_busy(wm8994, hpf % 3)) {
660 dev_dbg(codec->dev, "DSP2 active on %d already\n", hpf);
661 return -EBUSY;
662 }
663
664 if (wm8994->eq[hpf % 3])
665 return -EBUSY;
666
667 if (hpf < 3)
668 wm8994->hpf1_ena[hpf % 3] = ucontrol->value.integer.value[0];
669 else
670 wm8994->hpf2_ena[hpf % 3] = ucontrol->value.integer.value[0];
671
672 wm8958_dsp_apply(codec, hpf % 3, ucontrol->value.integer.value[0]);
673
674 return 0;
675}
676
677#define WM8958_HPF_SWITCH(xname, xval) {\
678 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), \
679 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE,\
680 .info = wm8958_hpf_info, \
681 .get = wm8958_hpf_get, .put = wm8958_hpf_put, \
682 .private_value = xval }
683
Mark Brownf701a2e2011-03-09 19:31:01 +0000684static const struct snd_kcontrol_new wm8958_mbc_snd_controls[] = {
685WM8958_MBC_SWITCH("AIF1DAC1 MBC Switch", 0),
686WM8958_MBC_SWITCH("AIF1DAC2 MBC Switch", 1),
687WM8958_MBC_SWITCH("AIF2DAC MBC Switch", 2),
688};
689
Mark Brown09e10d72011-03-16 22:57:47 +0000690static const struct snd_kcontrol_new wm8958_vss_snd_controls[] = {
691WM8958_VSS_SWITCH("AIF1DAC1 VSS Switch", 0),
692WM8958_VSS_SWITCH("AIF1DAC2 VSS Switch", 1),
693WM8958_VSS_SWITCH("AIF2DAC VSS Switch", 2),
694WM8958_HPF_SWITCH("AIF1DAC1 HPF1 Switch", 0),
695WM8958_HPF_SWITCH("AIF1DAC2 HPF1 Switch", 1),
696WM8958_HPF_SWITCH("AIF2DAC HPF1 Switch", 2),
697WM8958_HPF_SWITCH("AIF1DAC1 HPF2 Switch", 3),
698WM8958_HPF_SWITCH("AIF1DAC2 HPF2 Switch", 4),
699WM8958_HPF_SWITCH("AIF2DAC HPF2 Switch", 5),
700};
701
702static void wm8958_mbc_vss_loaded(const struct firmware *fw, void *context)
703{
704 struct snd_soc_codec *codec = context;
705 struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec);
706
707 if (fw && (wm8958_dsp2_fw(codec, "MBC+VSS", fw, true) == 0)) {
708 mutex_lock(&codec->mutex);
709 wm8994->mbc_vss = fw;
710 mutex_unlock(&codec->mutex);
711 }
712
713}
714
Mark Brownfbbf5922011-03-11 18:09:04 +0000715static void wm8958_mbc_loaded(const struct firmware *fw, void *context)
716{
717 struct snd_soc_codec *codec = context;
718 struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec);
719
Mark Brown09e10d72011-03-16 22:57:47 +0000720 if (wm8958_dsp2_fw(codec, "MBC", fw, true) != 0)
721 return;
722
723 mutex_lock(&codec->mutex);
724 wm8994->mbc = fw;
725 mutex_unlock(&codec->mutex);
726
727 /* We can't have more than one request outstanding at once so
728 * we daisy chain.
729 */
730 request_firmware_nowait(THIS_MODULE, FW_ACTION_HOTPLUG,
731 "wm8958_mbc_vss.wfw", codec->dev, GFP_KERNEL,
732 codec, wm8958_mbc_vss_loaded);
Mark Brownfbbf5922011-03-11 18:09:04 +0000733}
734
Mark Brownf701a2e2011-03-09 19:31:01 +0000735void wm8958_dsp2_init(struct snd_soc_codec *codec)
736{
737 struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec);
738 struct wm8994_pdata *pdata = wm8994->pdata;
739 int ret, i;
740
Mark Brownf20d77c2011-03-16 20:55:37 +0000741 wm8994->dsp_active = -1;
742
Mark Brownf701a2e2011-03-09 19:31:01 +0000743 snd_soc_add_controls(codec, wm8958_mbc_snd_controls,
744 ARRAY_SIZE(wm8958_mbc_snd_controls));
Mark Brown09e10d72011-03-16 22:57:47 +0000745 snd_soc_add_controls(codec, wm8958_vss_snd_controls,
746 ARRAY_SIZE(wm8958_vss_snd_controls));
747
Mark Brownf701a2e2011-03-09 19:31:01 +0000748
Mark Brownf20d77c2011-03-16 20:55:37 +0000749 /* We don't *require* firmware and don't want to delay boot */
Mark Brownfbbf5922011-03-11 18:09:04 +0000750 request_firmware_nowait(THIS_MODULE, FW_ACTION_HOTPLUG,
751 "wm8958_mbc.wfw", codec->dev, GFP_KERNEL,
752 codec, wm8958_mbc_loaded);
753
Mark Brownf701a2e2011-03-09 19:31:01 +0000754 if (!pdata)
755 return;
756
757 if (pdata->num_mbc_cfgs) {
758 struct snd_kcontrol_new control[] = {
759 SOC_ENUM_EXT("MBC Mode", wm8994->mbc_enum,
760 wm8958_get_mbc_enum, wm8958_put_mbc_enum),
761 };
762
763 /* We need an array of texts for the enum API */
764 wm8994->mbc_texts = kmalloc(sizeof(char *)
765 * pdata->num_mbc_cfgs, GFP_KERNEL);
766 if (!wm8994->mbc_texts) {
767 dev_err(wm8994->codec->dev,
768 "Failed to allocate %d MBC config texts\n",
769 pdata->num_mbc_cfgs);
770 return;
771 }
772
773 for (i = 0; i < pdata->num_mbc_cfgs; i++)
774 wm8994->mbc_texts[i] = pdata->mbc_cfgs[i].name;
775
776 wm8994->mbc_enum.max = pdata->num_mbc_cfgs;
777 wm8994->mbc_enum.texts = wm8994->mbc_texts;
778
779 ret = snd_soc_add_controls(wm8994->codec, control, 1);
780 if (ret != 0)
781 dev_err(wm8994->codec->dev,
782 "Failed to add MBC mode controls: %d\n", ret);
783 }
784
Mark Brown09e10d72011-03-16 22:57:47 +0000785 if (pdata->num_vss_cfgs) {
786 struct snd_kcontrol_new control[] = {
787 SOC_ENUM_EXT("VSS Mode", wm8994->vss_enum,
788 wm8958_get_vss_enum, wm8958_put_vss_enum),
789 };
Mark Brownf701a2e2011-03-09 19:31:01 +0000790
Mark Brown09e10d72011-03-16 22:57:47 +0000791 /* We need an array of texts for the enum API */
792 wm8994->vss_texts = kmalloc(sizeof(char *)
793 * pdata->num_vss_cfgs, GFP_KERNEL);
794 if (!wm8994->vss_texts) {
795 dev_err(wm8994->codec->dev,
796 "Failed to allocate %d VSS config texts\n",
797 pdata->num_vss_cfgs);
798 return;
799 }
800
801 for (i = 0; i < pdata->num_vss_cfgs; i++)
802 wm8994->vss_texts[i] = pdata->vss_cfgs[i].name;
803
804 wm8994->vss_enum.max = pdata->num_vss_cfgs;
805 wm8994->vss_enum.texts = wm8994->vss_texts;
806
807 ret = snd_soc_add_controls(wm8994->codec, control, 1);
808 if (ret != 0)
809 dev_err(wm8994->codec->dev,
810 "Failed to add VSS mode controls: %d\n", ret);
811 }
812
813 if (pdata->num_vss_hpf_cfgs) {
814 struct snd_kcontrol_new control[] = {
815 SOC_ENUM_EXT("VSS HPF Mode", wm8994->vss_hpf_enum,
816 wm8958_get_vss_hpf_enum,
817 wm8958_put_vss_hpf_enum),
818 };
819
820 /* We need an array of texts for the enum API */
821 wm8994->vss_hpf_texts = kmalloc(sizeof(char *)
822 * pdata->num_vss_hpf_cfgs, GFP_KERNEL);
823 if (!wm8994->vss_hpf_texts) {
824 dev_err(wm8994->codec->dev,
825 "Failed to allocate %d VSS HPF config texts\n",
826 pdata->num_vss_hpf_cfgs);
827 return;
828 }
829
830 for (i = 0; i < pdata->num_vss_hpf_cfgs; i++)
831 wm8994->vss_hpf_texts[i] = pdata->vss_hpf_cfgs[i].name;
832
833 wm8994->vss_hpf_enum.max = pdata->num_vss_hpf_cfgs;
834 wm8994->vss_hpf_enum.texts = wm8994->vss_hpf_texts;
835
836 ret = snd_soc_add_controls(wm8994->codec, control, 1);
837 if (ret != 0)
838 dev_err(wm8994->codec->dev,
839 "Failed to add VSS HPFmode controls: %d\n",
840 ret);
841 }
Mark Brownf701a2e2011-03-09 19:31:01 +0000842}