blob: 9f841af41092f059a604c0631984bb3c6ef067d7 [file] [log] [blame]
Vineet Gupta95d69762013-01-18 15:12:19 +05301/*
2 * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 *
8 * vineetg: May 2011: for Non-aliasing VIPT D-cache following can be NOPs
9 * -flush_cache_dup_mm (fork)
10 * -likewise for flush_cache_mm (exit/execve)
11 * -likewise for flush_cache_{range,page} (munmap, exit, COW-break)
12 *
13 * vineetg: April 2008
14 * -Added a critical CacheLine flush to copy_to_user_page( ) which
15 * was causing gdbserver to not setup breakpoints consistently
16 */
17
18#ifndef _ASM_CACHEFLUSH_H
19#define _ASM_CACHEFLUSH_H
20
21#include <linux/mm.h>
Vineet Gupta5bba49f2013-05-09 19:20:43 +053022#include <asm/shmparam.h>
Vineet Gupta95d69762013-01-18 15:12:19 +053023
Vineet Gupta24603fd2013-04-11 18:36:35 +053024/*
25 * Semantically we need this because icache doesn't snoop dcache/dma.
26 * However ARC Cache flush requires paddr as well as vaddr, latter not available
27 * in the flush_icache_page() API. So we no-op it but do the equivalent work
28 * in update_mmu_cache()
29 */
30#define flush_icache_page(vma, page)
31
Vineet Gupta95d69762013-01-18 15:12:19 +053032void flush_cache_all(void);
33
34void flush_icache_range(unsigned long start, unsigned long end);
Vineet Gupta94bad1a2013-04-12 12:20:23 +053035void __sync_icache_dcache(unsigned long paddr, unsigned long vaddr, int len);
Vineet Gupta24603fd2013-04-11 18:36:35 +053036void __inv_icache_page(unsigned long paddr, unsigned long vaddr);
Vineet Guptade2a8522013-05-09 21:55:27 +053037void ___flush_dcache_page(unsigned long paddr, unsigned long vaddr);
38#define __flush_dcache_page(p, v) \
39 ___flush_dcache_page((unsigned long)p, (unsigned long)v)
Vineet Gupta95d69762013-01-18 15:12:19 +053040
41#define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 1
42
43void flush_dcache_page(struct page *page);
44
45void dma_cache_wback_inv(unsigned long start, unsigned long sz);
46void dma_cache_inv(unsigned long start, unsigned long sz);
47void dma_cache_wback(unsigned long start, unsigned long sz);
48
49#define flush_dcache_mmap_lock(mapping) do { } while (0)
50#define flush_dcache_mmap_unlock(mapping) do { } while (0)
51
52/* TBD: optimize this */
53#define flush_cache_vmap(start, end) flush_cache_all()
54#define flush_cache_vunmap(start, end) flush_cache_all()
55
Vineet Gupta4102b532013-05-09 21:54:51 +053056#define flush_cache_dup_mm(mm) /* called on fork (VIVT only) */
57
58#ifndef CONFIG_ARC_CACHE_VIPT_ALIASING
59
Vineet Gupta95d69762013-01-18 15:12:19 +053060#define flush_cache_mm(mm) /* called on munmap/exit */
61#define flush_cache_range(mm, u_vstart, u_vend)
62#define flush_cache_page(vma, u_vaddr, pfn) /* PF handling/COW-break */
63
Vineet Gupta4102b532013-05-09 21:54:51 +053064#else /* VIPT aliasing dcache */
65
66/* To clear out stale userspace mappings */
67void flush_cache_mm(struct mm_struct *mm);
68void flush_cache_range(struct vm_area_struct *vma,
69 unsigned long start,unsigned long end);
70void flush_cache_page(struct vm_area_struct *vma,
71 unsigned long user_addr, unsigned long page);
72
73/*
74 * To make sure that userspace mapping is flushed to memory before
75 * get_user_pages() uses a kernel mapping to access the page
76 */
77#define ARCH_HAS_FLUSH_ANON_PAGE
78void flush_anon_page(struct vm_area_struct *vma,
79 struct page *page, unsigned long u_vaddr);
80
81#endif /* CONFIG_ARC_CACHE_VIPT_ALIASING */
82
83/*
84 * Simple wrapper over config option
85 * Bootup code ensures that hardware matches kernel configuration
86 */
87static inline int cache_is_vipt_aliasing(void)
88{
89#ifdef CONFIG_ARC_CACHE_VIPT_ALIASING
90 return 1;
91#else
92 return 0;
93#endif
94}
95
96#define CACHE_COLOR(addr) (((unsigned long)(addr) >> (PAGE_SHIFT)) & 3)
97
98/*
99 * checks if two addresses (after page aligning) index into same cache set
100 */
101#define addr_not_cache_congruent(addr1, addr2) \
102 cache_is_vipt_aliasing() ? \
103 (CACHE_COLOR(addr1) != CACHE_COLOR(addr2)) : 0 \
104
Vineet Gupta95d69762013-01-18 15:12:19 +0530105#define copy_to_user_page(vma, page, vaddr, dst, src, len) \
106do { \
107 memcpy(dst, src, len); \
108 if (vma->vm_flags & VM_EXEC) \
Vineet Gupta94bad1a2013-04-12 12:20:23 +0530109 __sync_icache_dcache((unsigned long)(dst), vaddr, len); \
Vineet Gupta95d69762013-01-18 15:12:19 +0530110} while (0)
111
112#define copy_from_user_page(vma, page, vaddr, dst, src, len) \
113 memcpy(dst, src, len); \
114
115#endif