Nicolas Pitre | 6f475c0 | 2005-10-28 16:39:33 +0100 | [diff] [blame] | 1 | /* |
| 2 | * linux/drivers/net/irda/pxaficp_ir.c |
| 3 | * |
| 4 | * Based on sa1100_ir.c by Russell King |
| 5 | * |
| 6 | * Changes copyright (C) 2003-2005 MontaVista Software, Inc. |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or modify |
| 9 | * it under the terms of the GNU General Public License version 2 as |
| 10 | * published by the Free Software Foundation. |
| 11 | * |
| 12 | * Infra-red driver (SIR/FIR) for the PXA2xx embedded microprocessor |
| 13 | * |
| 14 | */ |
Alexey Dobriyan | b7f080c | 2011-06-16 11:01:34 +0000 | [diff] [blame] | 15 | #include <linux/dma-mapping.h> |
Alexey Dobriyan | a6b7a40 | 2011-06-06 10:43:46 +0000 | [diff] [blame] | 16 | #include <linux/interrupt.h> |
Nicolas Pitre | 6f475c0 | 2005-10-28 16:39:33 +0100 | [diff] [blame] | 17 | #include <linux/module.h> |
Nicolas Pitre | 6f475c0 | 2005-10-28 16:39:33 +0100 | [diff] [blame] | 18 | #include <linux/netdevice.h> |
Alexander Beregalov | f6a2629 | 2009-04-16 15:23:03 +0000 | [diff] [blame] | 19 | #include <linux/etherdevice.h> |
Russell King | d052d1b | 2005-10-29 19:07:23 +0100 | [diff] [blame] | 20 | #include <linux/platform_device.h> |
Russell King | 82d553c | 2007-09-02 17:09:23 +0100 | [diff] [blame] | 21 | #include <linux/clk.h> |
Robert Jarzmik | 1273bc5 | 2015-09-26 20:49:20 +0200 | [diff] [blame] | 22 | #include <linux/dmaengine.h> |
| 23 | #include <linux/dma-mapping.h> |
| 24 | #include <linux/dma/pxa-dma.h> |
Marek Vasut | c4bd017 | 2009-07-17 12:50:43 +0200 | [diff] [blame] | 25 | #include <linux/gpio.h> |
Tejun Heo | 5a0e3ad | 2010-03-24 17:04:11 +0900 | [diff] [blame] | 26 | #include <linux/slab.h> |
Ingo Molnar | e601757 | 2017-02-01 16:36:40 +0100 | [diff] [blame] | 27 | #include <linux/sched/clock.h> |
Nicolas Pitre | 6f475c0 | 2005-10-28 16:39:33 +0100 | [diff] [blame] | 28 | |
| 29 | #include <net/irda/irda.h> |
| 30 | #include <net/irda/irmod.h> |
| 31 | #include <net/irda/wrapper.h> |
| 32 | #include <net/irda/irda_device.h> |
| 33 | |
Arnd Bergmann | 293b2da | 2012-08-24 15:16:48 +0200 | [diff] [blame] | 34 | #include <linux/platform_data/irda-pxaficp.h> |
Robert Jarzmik | 89fa572 | 2015-09-26 20:49:19 +0200 | [diff] [blame] | 35 | #undef __REG |
| 36 | #define __REG(x) ((x) & 0xffff) |
Rob Herring | 121f3f9 | 2012-08-29 10:31:14 -0500 | [diff] [blame] | 37 | #include <mach/regs-uart.h> |
Nicolas Pitre | 6f475c0 | 2005-10-28 16:39:33 +0100 | [diff] [blame] | 38 | |
Robert Jarzmik | 89fa572 | 2015-09-26 20:49:19 +0200 | [diff] [blame] | 39 | #define ICCR0 0x0000 /* ICP Control Register 0 */ |
| 40 | #define ICCR1 0x0004 /* ICP Control Register 1 */ |
| 41 | #define ICCR2 0x0008 /* ICP Control Register 2 */ |
| 42 | #define ICDR 0x000c /* ICP Data Register */ |
| 43 | #define ICSR0 0x0014 /* ICP Status Register 0 */ |
| 44 | #define ICSR1 0x0018 /* ICP Status Register 1 */ |
Eric Miao | b40ddf5 | 2008-11-28 11:13:47 +0800 | [diff] [blame] | 45 | |
| 46 | #define ICCR0_AME (1 << 7) /* Address match enable */ |
| 47 | #define ICCR0_TIE (1 << 6) /* Transmit FIFO interrupt enable */ |
Lucas De Marchi | 25985ed | 2011-03-30 22:57:33 -0300 | [diff] [blame] | 48 | #define ICCR0_RIE (1 << 5) /* Receive FIFO interrupt enable */ |
Eric Miao | b40ddf5 | 2008-11-28 11:13:47 +0800 | [diff] [blame] | 49 | #define ICCR0_RXE (1 << 4) /* Receive enable */ |
| 50 | #define ICCR0_TXE (1 << 3) /* Transmit enable */ |
| 51 | #define ICCR0_TUS (1 << 2) /* Transmit FIFO underrun select */ |
| 52 | #define ICCR0_LBM (1 << 1) /* Loopback mode */ |
| 53 | #define ICCR0_ITR (1 << 0) /* IrDA transmission */ |
| 54 | |
| 55 | #define ICCR2_RXP (1 << 3) /* Receive Pin Polarity select */ |
| 56 | #define ICCR2_TXP (1 << 2) /* Transmit Pin Polarity select */ |
| 57 | #define ICCR2_TRIG (3 << 0) /* Receive FIFO Trigger threshold */ |
| 58 | #define ICCR2_TRIG_8 (0 << 0) /* >= 8 bytes */ |
| 59 | #define ICCR2_TRIG_16 (1 << 0) /* >= 16 bytes */ |
| 60 | #define ICCR2_TRIG_32 (2 << 0) /* >= 32 bytes */ |
| 61 | |
Eric Miao | b40ddf5 | 2008-11-28 11:13:47 +0800 | [diff] [blame] | 62 | #define ICSR0_EOC (1 << 6) /* DMA End of Descriptor Chain */ |
Eric Miao | b40ddf5 | 2008-11-28 11:13:47 +0800 | [diff] [blame] | 63 | #define ICSR0_FRE (1 << 5) /* Framing error */ |
| 64 | #define ICSR0_RFS (1 << 4) /* Receive FIFO service request */ |
| 65 | #define ICSR0_TFS (1 << 3) /* Transnit FIFO service request */ |
| 66 | #define ICSR0_RAB (1 << 2) /* Receiver abort */ |
| 67 | #define ICSR0_TUR (1 << 1) /* Trunsmit FIFO underun */ |
| 68 | #define ICSR0_EIF (1 << 0) /* End/Error in FIFO */ |
| 69 | |
| 70 | #define ICSR1_ROR (1 << 6) /* Receiver FIFO underrun */ |
| 71 | #define ICSR1_CRE (1 << 5) /* CRC error */ |
| 72 | #define ICSR1_EOF (1 << 4) /* End of frame */ |
| 73 | #define ICSR1_TNF (1 << 3) /* Transmit FIFO not full */ |
| 74 | #define ICSR1_RNE (1 << 2) /* Receive FIFO not empty */ |
| 75 | #define ICSR1_TBY (1 << 1) /* Tramsmiter busy flag */ |
| 76 | #define ICSR1_RSY (1 << 0) /* Recevier synchronized flag */ |
Nicolas Pitre | 6f475c0 | 2005-10-28 16:39:33 +0100 | [diff] [blame] | 77 | |
Nicolas Pitre | 6f475c0 | 2005-10-28 16:39:33 +0100 | [diff] [blame] | 78 | #define IrSR_RXPL_NEG_IS_ZERO (1<<4) |
| 79 | #define IrSR_RXPL_POS_IS_ZERO 0x0 |
| 80 | #define IrSR_TXPL_NEG_IS_ZERO (1<<3) |
| 81 | #define IrSR_TXPL_POS_IS_ZERO 0x0 |
| 82 | #define IrSR_XMODE_PULSE_1_6 (1<<2) |
| 83 | #define IrSR_XMODE_PULSE_3_16 0x0 |
| 84 | #define IrSR_RCVEIR_IR_MODE (1<<1) |
| 85 | #define IrSR_RCVEIR_UART_MODE 0x0 |
| 86 | #define IrSR_XMITIR_IR_MODE (1<<0) |
| 87 | #define IrSR_XMITIR_UART_MODE 0x0 |
| 88 | |
| 89 | #define IrSR_IR_RECEIVE_ON (\ |
| 90 | IrSR_RXPL_NEG_IS_ZERO | \ |
| 91 | IrSR_TXPL_POS_IS_ZERO | \ |
| 92 | IrSR_XMODE_PULSE_3_16 | \ |
| 93 | IrSR_RCVEIR_IR_MODE | \ |
| 94 | IrSR_XMITIR_UART_MODE) |
| 95 | |
| 96 | #define IrSR_IR_TRANSMIT_ON (\ |
| 97 | IrSR_RXPL_NEG_IS_ZERO | \ |
| 98 | IrSR_TXPL_POS_IS_ZERO | \ |
| 99 | IrSR_XMODE_PULSE_3_16 | \ |
| 100 | IrSR_RCVEIR_UART_MODE | \ |
| 101 | IrSR_XMITIR_IR_MODE) |
| 102 | |
Robert Jarzmik | 89fa572 | 2015-09-26 20:49:19 +0200 | [diff] [blame] | 103 | /* macros for registers read/write */ |
| 104 | #define ficp_writel(irda, val, off) \ |
| 105 | do { \ |
| 106 | dev_vdbg(irda->dev, \ |
| 107 | "%s():%d ficp_writel(0x%x, %s)\n", \ |
| 108 | __func__, __LINE__, (val), #off); \ |
| 109 | writel_relaxed((val), (irda)->irda_base + (off)); \ |
| 110 | } while (0) |
| 111 | |
| 112 | #define ficp_readl(irda, off) \ |
| 113 | ({ \ |
| 114 | unsigned int _v; \ |
| 115 | _v = readl_relaxed((irda)->irda_base + (off)); \ |
| 116 | dev_vdbg(irda->dev, \ |
| 117 | "%s():%d ficp_readl(%s): 0x%x\n", \ |
| 118 | __func__, __LINE__, #off, _v); \ |
| 119 | _v; \ |
| 120 | }) |
| 121 | |
| 122 | #define stuart_writel(irda, val, off) \ |
| 123 | do { \ |
| 124 | dev_vdbg(irda->dev, \ |
| 125 | "%s():%d stuart_writel(0x%x, %s)\n", \ |
| 126 | __func__, __LINE__, (val), #off); \ |
| 127 | writel_relaxed((val), (irda)->stuart_base + (off)); \ |
| 128 | } while (0) |
| 129 | |
| 130 | #define stuart_readl(irda, off) \ |
| 131 | ({ \ |
| 132 | unsigned int _v; \ |
| 133 | _v = readl_relaxed((irda)->stuart_base + (off)); \ |
| 134 | dev_vdbg(irda->dev, \ |
| 135 | "%s():%d stuart_readl(%s): 0x%x\n", \ |
| 136 | __func__, __LINE__, #off, _v); \ |
| 137 | _v; \ |
| 138 | }) |
| 139 | |
Nicolas Pitre | 6f475c0 | 2005-10-28 16:39:33 +0100 | [diff] [blame] | 140 | struct pxa_irda { |
| 141 | int speed; |
| 142 | int newspeed; |
Robert Jarzmik | be01891 | 2015-09-26 20:49:18 +0200 | [diff] [blame] | 143 | unsigned long long last_clk; |
Nicolas Pitre | 6f475c0 | 2005-10-28 16:39:33 +0100 | [diff] [blame] | 144 | |
Robert Jarzmik | 89fa572 | 2015-09-26 20:49:19 +0200 | [diff] [blame] | 145 | void __iomem *stuart_base; |
| 146 | void __iomem *irda_base; |
Nicolas Pitre | 6f475c0 | 2005-10-28 16:39:33 +0100 | [diff] [blame] | 147 | unsigned char *dma_rx_buff; |
| 148 | unsigned char *dma_tx_buff; |
| 149 | dma_addr_t dma_rx_buff_phy; |
| 150 | dma_addr_t dma_tx_buff_phy; |
| 151 | unsigned int dma_tx_buff_len; |
Robert Jarzmik | 1273bc5 | 2015-09-26 20:49:20 +0200 | [diff] [blame] | 152 | struct dma_chan *txdma; |
| 153 | struct dma_chan *rxdma; |
| 154 | dma_cookie_t rx_cookie; |
| 155 | dma_cookie_t tx_cookie; |
| 156 | int drcmr_rx; |
| 157 | int drcmr_tx; |
Nicolas Pitre | 6f475c0 | 2005-10-28 16:39:33 +0100 | [diff] [blame] | 158 | |
Rob Herring | 121f3f9 | 2012-08-29 10:31:14 -0500 | [diff] [blame] | 159 | int uart_irq; |
| 160 | int icp_irq; |
| 161 | |
Nicolas Pitre | 6f475c0 | 2005-10-28 16:39:33 +0100 | [diff] [blame] | 162 | struct irlap_cb *irlap; |
| 163 | struct qos_info qos; |
| 164 | |
| 165 | iobuff_t tx_buff; |
| 166 | iobuff_t rx_buff; |
| 167 | |
| 168 | struct device *dev; |
| 169 | struct pxaficp_platform_data *pdata; |
Russell King | 82d553c | 2007-09-02 17:09:23 +0100 | [diff] [blame] | 170 | struct clk *fir_clk; |
| 171 | struct clk *sir_clk; |
| 172 | struct clk *cur_clk; |
Nicolas Pitre | 6f475c0 | 2005-10-28 16:39:33 +0100 | [diff] [blame] | 173 | }; |
| 174 | |
Robert Jarzmik | 1273bc5 | 2015-09-26 20:49:20 +0200 | [diff] [blame] | 175 | static int pxa_irda_set_speed(struct pxa_irda *si, int speed); |
| 176 | |
Russell King | 82d553c | 2007-09-02 17:09:23 +0100 | [diff] [blame] | 177 | static inline void pxa_irda_disable_clk(struct pxa_irda *si) |
| 178 | { |
| 179 | if (si->cur_clk) |
Philipp Zabel | 4823cd3 | 2012-03-15 08:19:29 +0000 | [diff] [blame] | 180 | clk_disable_unprepare(si->cur_clk); |
Russell King | 82d553c | 2007-09-02 17:09:23 +0100 | [diff] [blame] | 181 | si->cur_clk = NULL; |
| 182 | } |
| 183 | |
| 184 | static inline void pxa_irda_enable_firclk(struct pxa_irda *si) |
| 185 | { |
| 186 | si->cur_clk = si->fir_clk; |
Philipp Zabel | 4823cd3 | 2012-03-15 08:19:29 +0000 | [diff] [blame] | 187 | clk_prepare_enable(si->fir_clk); |
Russell King | 82d553c | 2007-09-02 17:09:23 +0100 | [diff] [blame] | 188 | } |
| 189 | |
| 190 | static inline void pxa_irda_enable_sirclk(struct pxa_irda *si) |
| 191 | { |
| 192 | si->cur_clk = si->sir_clk; |
Philipp Zabel | 4823cd3 | 2012-03-15 08:19:29 +0000 | [diff] [blame] | 193 | clk_prepare_enable(si->sir_clk); |
Russell King | 82d553c | 2007-09-02 17:09:23 +0100 | [diff] [blame] | 194 | } |
| 195 | |
Nicolas Pitre | 6f475c0 | 2005-10-28 16:39:33 +0100 | [diff] [blame] | 196 | |
| 197 | #define IS_FIR(si) ((si)->speed >= 4000000) |
| 198 | #define IRDA_FRAME_SIZE_LIMIT 2047 |
| 199 | |
Robert Jarzmik | 1273bc5 | 2015-09-26 20:49:20 +0200 | [diff] [blame] | 200 | static void pxa_irda_fir_dma_rx_irq(void *data); |
| 201 | static void pxa_irda_fir_dma_tx_irq(void *data); |
| 202 | |
Nicolas Pitre | 6f475c0 | 2005-10-28 16:39:33 +0100 | [diff] [blame] | 203 | inline static void pxa_irda_fir_dma_rx_start(struct pxa_irda *si) |
| 204 | { |
Robert Jarzmik | 1273bc5 | 2015-09-26 20:49:20 +0200 | [diff] [blame] | 205 | struct dma_async_tx_descriptor *tx; |
| 206 | |
| 207 | tx = dmaengine_prep_slave_single(si->rxdma, si->dma_rx_buff_phy, |
| 208 | IRDA_FRAME_SIZE_LIMIT, DMA_FROM_DEVICE, |
| 209 | DMA_PREP_INTERRUPT); |
| 210 | if (!tx) { |
| 211 | dev_err(si->dev, "prep_slave_sg() failed\n"); |
| 212 | return; |
| 213 | } |
| 214 | tx->callback = pxa_irda_fir_dma_rx_irq; |
| 215 | tx->callback_param = si; |
| 216 | si->rx_cookie = dmaengine_submit(tx); |
| 217 | dma_async_issue_pending(si->rxdma); |
Nicolas Pitre | 6f475c0 | 2005-10-28 16:39:33 +0100 | [diff] [blame] | 218 | } |
| 219 | |
| 220 | inline static void pxa_irda_fir_dma_tx_start(struct pxa_irda *si) |
| 221 | { |
Robert Jarzmik | 1273bc5 | 2015-09-26 20:49:20 +0200 | [diff] [blame] | 222 | struct dma_async_tx_descriptor *tx; |
| 223 | |
| 224 | tx = dmaengine_prep_slave_single(si->txdma, si->dma_tx_buff_phy, |
| 225 | si->dma_tx_buff_len, DMA_TO_DEVICE, |
| 226 | DMA_PREP_INTERRUPT); |
| 227 | if (!tx) { |
| 228 | dev_err(si->dev, "prep_slave_sg() failed\n"); |
| 229 | return; |
| 230 | } |
| 231 | tx->callback = pxa_irda_fir_dma_tx_irq; |
| 232 | tx->callback_param = si; |
| 233 | si->tx_cookie = dmaengine_submit(tx); |
| 234 | dma_async_issue_pending(si->rxdma); |
Nicolas Pitre | 6f475c0 | 2005-10-28 16:39:33 +0100 | [diff] [blame] | 235 | } |
| 236 | |
| 237 | /* |
Marek Vasut | c4bd017 | 2009-07-17 12:50:43 +0200 | [diff] [blame] | 238 | * Set the IrDA communications mode. |
| 239 | */ |
| 240 | static void pxa_irda_set_mode(struct pxa_irda *si, int mode) |
| 241 | { |
| 242 | if (si->pdata->transceiver_mode) |
| 243 | si->pdata->transceiver_mode(si->dev, mode); |
| 244 | else { |
| 245 | if (gpio_is_valid(si->pdata->gpio_pwdown)) |
| 246 | gpio_set_value(si->pdata->gpio_pwdown, |
| 247 | !(mode & IR_OFF) ^ |
| 248 | !si->pdata->gpio_pwdown_inverted); |
| 249 | pxa2xx_transceiver_mode(si->dev, mode); |
| 250 | } |
| 251 | } |
| 252 | |
| 253 | /* |
Nicolas Pitre | 6f475c0 | 2005-10-28 16:39:33 +0100 | [diff] [blame] | 254 | * Set the IrDA communications speed. |
| 255 | */ |
| 256 | static int pxa_irda_set_speed(struct pxa_irda *si, int speed) |
| 257 | { |
| 258 | unsigned long flags; |
| 259 | unsigned int divisor; |
| 260 | |
| 261 | switch (speed) { |
| 262 | case 9600: case 19200: case 38400: |
| 263 | case 57600: case 115200: |
| 264 | |
| 265 | /* refer to PXA250/210 Developer's Manual 10-7 */ |
| 266 | /* BaudRate = 14.7456 MHz / (16*Divisor) */ |
| 267 | divisor = 14745600 / (16 * speed); |
| 268 | |
| 269 | local_irq_save(flags); |
| 270 | |
| 271 | if (IS_FIR(si)) { |
| 272 | /* stop RX DMA */ |
Robert Jarzmik | 1273bc5 | 2015-09-26 20:49:20 +0200 | [diff] [blame] | 273 | dmaengine_terminate_all(si->rxdma); |
Nicolas Pitre | 6f475c0 | 2005-10-28 16:39:33 +0100 | [diff] [blame] | 274 | /* disable FICP */ |
Robert Jarzmik | 89fa572 | 2015-09-26 20:49:19 +0200 | [diff] [blame] | 275 | ficp_writel(si, 0, ICCR0); |
Russell King | 82d553c | 2007-09-02 17:09:23 +0100 | [diff] [blame] | 276 | pxa_irda_disable_clk(si); |
Nicolas Pitre | 6f475c0 | 2005-10-28 16:39:33 +0100 | [diff] [blame] | 277 | |
| 278 | /* set board transceiver to SIR mode */ |
Marek Vasut | c4bd017 | 2009-07-17 12:50:43 +0200 | [diff] [blame] | 279 | pxa_irda_set_mode(si, IR_SIRMODE); |
Nicolas Pitre | 6f475c0 | 2005-10-28 16:39:33 +0100 | [diff] [blame] | 280 | |
Nicolas Pitre | 6f475c0 | 2005-10-28 16:39:33 +0100 | [diff] [blame] | 281 | /* enable the STUART clock */ |
Russell King | 82d553c | 2007-09-02 17:09:23 +0100 | [diff] [blame] | 282 | pxa_irda_enable_sirclk(si); |
Nicolas Pitre | 6f475c0 | 2005-10-28 16:39:33 +0100 | [diff] [blame] | 283 | } |
| 284 | |
| 285 | /* disable STUART first */ |
Robert Jarzmik | 89fa572 | 2015-09-26 20:49:19 +0200 | [diff] [blame] | 286 | stuart_writel(si, 0, STIER); |
Nicolas Pitre | 6f475c0 | 2005-10-28 16:39:33 +0100 | [diff] [blame] | 287 | |
| 288 | /* access DLL & DLH */ |
Robert Jarzmik | 89fa572 | 2015-09-26 20:49:19 +0200 | [diff] [blame] | 289 | stuart_writel(si, stuart_readl(si, STLCR) | LCR_DLAB, STLCR); |
| 290 | stuart_writel(si, divisor & 0xff, STDLL); |
| 291 | stuart_writel(si, divisor >> 8, STDLH); |
| 292 | stuart_writel(si, stuart_readl(si, STLCR) & ~LCR_DLAB, STLCR); |
Nicolas Pitre | 6f475c0 | 2005-10-28 16:39:33 +0100 | [diff] [blame] | 293 | |
| 294 | si->speed = speed; |
Robert Jarzmik | 89fa572 | 2015-09-26 20:49:19 +0200 | [diff] [blame] | 295 | stuart_writel(si, IrSR_IR_RECEIVE_ON | IrSR_XMODE_PULSE_1_6, |
| 296 | STISR); |
| 297 | stuart_writel(si, IER_UUE | IER_RLSE | IER_RAVIE | IER_RTIOE, |
| 298 | STIER); |
Nicolas Pitre | 6f475c0 | 2005-10-28 16:39:33 +0100 | [diff] [blame] | 299 | |
| 300 | local_irq_restore(flags); |
| 301 | break; |
| 302 | |
| 303 | case 4000000: |
| 304 | local_irq_save(flags); |
| 305 | |
| 306 | /* disable STUART */ |
Robert Jarzmik | 89fa572 | 2015-09-26 20:49:19 +0200 | [diff] [blame] | 307 | stuart_writel(si, 0, STIER); |
| 308 | stuart_writel(si, 0, STISR); |
Russell King | 82d553c | 2007-09-02 17:09:23 +0100 | [diff] [blame] | 309 | pxa_irda_disable_clk(si); |
Nicolas Pitre | 6f475c0 | 2005-10-28 16:39:33 +0100 | [diff] [blame] | 310 | |
| 311 | /* disable FICP first */ |
Robert Jarzmik | 89fa572 | 2015-09-26 20:49:19 +0200 | [diff] [blame] | 312 | ficp_writel(si, 0, ICCR0); |
Nicolas Pitre | 6f475c0 | 2005-10-28 16:39:33 +0100 | [diff] [blame] | 313 | |
| 314 | /* set board transceiver to FIR mode */ |
Marek Vasut | c4bd017 | 2009-07-17 12:50:43 +0200 | [diff] [blame] | 315 | pxa_irda_set_mode(si, IR_FIRMODE); |
Nicolas Pitre | 6f475c0 | 2005-10-28 16:39:33 +0100 | [diff] [blame] | 316 | |
Nicolas Pitre | 6f475c0 | 2005-10-28 16:39:33 +0100 | [diff] [blame] | 317 | /* enable the FICP clock */ |
Russell King | 82d553c | 2007-09-02 17:09:23 +0100 | [diff] [blame] | 318 | pxa_irda_enable_firclk(si); |
Nicolas Pitre | 6f475c0 | 2005-10-28 16:39:33 +0100 | [diff] [blame] | 319 | |
| 320 | si->speed = speed; |
| 321 | pxa_irda_fir_dma_rx_start(si); |
Robert Jarzmik | 89fa572 | 2015-09-26 20:49:19 +0200 | [diff] [blame] | 322 | ficp_writel(si, ICCR0_ITR | ICCR0_RXE, ICCR0); |
Nicolas Pitre | 6f475c0 | 2005-10-28 16:39:33 +0100 | [diff] [blame] | 323 | |
| 324 | local_irq_restore(flags); |
| 325 | break; |
| 326 | |
| 327 | default: |
| 328 | return -EINVAL; |
| 329 | } |
| 330 | |
| 331 | return 0; |
| 332 | } |
| 333 | |
| 334 | /* SIR interrupt service routine. */ |
David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 335 | static irqreturn_t pxa_irda_sir_irq(int irq, void *dev_id) |
Nicolas Pitre | 6f475c0 | 2005-10-28 16:39:33 +0100 | [diff] [blame] | 336 | { |
| 337 | struct net_device *dev = dev_id; |
| 338 | struct pxa_irda *si = netdev_priv(dev); |
| 339 | int iir, lsr, data; |
| 340 | |
Robert Jarzmik | 89fa572 | 2015-09-26 20:49:19 +0200 | [diff] [blame] | 341 | iir = stuart_readl(si, STIIR); |
Nicolas Pitre | 6f475c0 | 2005-10-28 16:39:33 +0100 | [diff] [blame] | 342 | |
| 343 | switch (iir & 0x0F) { |
| 344 | case 0x06: /* Receiver Line Status */ |
Robert Jarzmik | 89fa572 | 2015-09-26 20:49:19 +0200 | [diff] [blame] | 345 | lsr = stuart_readl(si, STLSR); |
Nicolas Pitre | 6f475c0 | 2005-10-28 16:39:33 +0100 | [diff] [blame] | 346 | while (lsr & LSR_FIFOE) { |
Robert Jarzmik | 89fa572 | 2015-09-26 20:49:19 +0200 | [diff] [blame] | 347 | data = stuart_readl(si, STRBR); |
Nicolas Pitre | 6f475c0 | 2005-10-28 16:39:33 +0100 | [diff] [blame] | 348 | if (lsr & (LSR_OE | LSR_PE | LSR_FE | LSR_BI)) { |
| 349 | printk(KERN_DEBUG "pxa_ir: sir receiving error\n"); |
Stephen Hemminger | af04908 | 2009-01-06 10:40:43 -0800 | [diff] [blame] | 350 | dev->stats.rx_errors++; |
Nicolas Pitre | 6f475c0 | 2005-10-28 16:39:33 +0100 | [diff] [blame] | 351 | if (lsr & LSR_FE) |
Stephen Hemminger | af04908 | 2009-01-06 10:40:43 -0800 | [diff] [blame] | 352 | dev->stats.rx_frame_errors++; |
Nicolas Pitre | 6f475c0 | 2005-10-28 16:39:33 +0100 | [diff] [blame] | 353 | if (lsr & LSR_OE) |
Stephen Hemminger | af04908 | 2009-01-06 10:40:43 -0800 | [diff] [blame] | 354 | dev->stats.rx_fifo_errors++; |
Nicolas Pitre | 6f475c0 | 2005-10-28 16:39:33 +0100 | [diff] [blame] | 355 | } else { |
Stephen Hemminger | af04908 | 2009-01-06 10:40:43 -0800 | [diff] [blame] | 356 | dev->stats.rx_bytes++; |
| 357 | async_unwrap_char(dev, &dev->stats, |
| 358 | &si->rx_buff, data); |
Nicolas Pitre | 6f475c0 | 2005-10-28 16:39:33 +0100 | [diff] [blame] | 359 | } |
Robert Jarzmik | 89fa572 | 2015-09-26 20:49:19 +0200 | [diff] [blame] | 360 | lsr = stuart_readl(si, STLSR); |
Nicolas Pitre | 6f475c0 | 2005-10-28 16:39:33 +0100 | [diff] [blame] | 361 | } |
Robert Jarzmik | be01891 | 2015-09-26 20:49:18 +0200 | [diff] [blame] | 362 | si->last_clk = sched_clock(); |
Nicolas Pitre | 6f475c0 | 2005-10-28 16:39:33 +0100 | [diff] [blame] | 363 | break; |
| 364 | |
| 365 | case 0x04: /* Received Data Available */ |
| 366 | /* forth through */ |
| 367 | |
| 368 | case 0x0C: /* Character Timeout Indication */ |
| 369 | do { |
Stephen Hemminger | af04908 | 2009-01-06 10:40:43 -0800 | [diff] [blame] | 370 | dev->stats.rx_bytes++; |
Robert Jarzmik | 89fa572 | 2015-09-26 20:49:19 +0200 | [diff] [blame] | 371 | async_unwrap_char(dev, &dev->stats, &si->rx_buff, |
| 372 | stuart_readl(si, STRBR)); |
| 373 | } while (stuart_readl(si, STLSR) & LSR_DR); |
Robert Jarzmik | be01891 | 2015-09-26 20:49:18 +0200 | [diff] [blame] | 374 | si->last_clk = sched_clock(); |
Nicolas Pitre | 6f475c0 | 2005-10-28 16:39:33 +0100 | [diff] [blame] | 375 | break; |
| 376 | |
| 377 | case 0x02: /* Transmit FIFO Data Request */ |
Robert Jarzmik | 89fa572 | 2015-09-26 20:49:19 +0200 | [diff] [blame] | 378 | while ((si->tx_buff.len) && |
| 379 | (stuart_readl(si, STLSR) & LSR_TDRQ)) { |
| 380 | stuart_writel(si, *si->tx_buff.data++, STTHR); |
Nicolas Pitre | 6f475c0 | 2005-10-28 16:39:33 +0100 | [diff] [blame] | 381 | si->tx_buff.len -= 1; |
| 382 | } |
| 383 | |
| 384 | if (si->tx_buff.len == 0) { |
Stephen Hemminger | af04908 | 2009-01-06 10:40:43 -0800 | [diff] [blame] | 385 | dev->stats.tx_packets++; |
| 386 | dev->stats.tx_bytes += si->tx_buff.data - si->tx_buff.head; |
Nicolas Pitre | 6f475c0 | 2005-10-28 16:39:33 +0100 | [diff] [blame] | 387 | |
| 388 | /* We need to ensure that the transmitter has finished. */ |
Robert Jarzmik | 89fa572 | 2015-09-26 20:49:19 +0200 | [diff] [blame] | 389 | while ((stuart_readl(si, STLSR) & LSR_TEMT) == 0) |
Nicolas Pitre | 6f475c0 | 2005-10-28 16:39:33 +0100 | [diff] [blame] | 390 | cpu_relax(); |
Robert Jarzmik | be01891 | 2015-09-26 20:49:18 +0200 | [diff] [blame] | 391 | si->last_clk = sched_clock(); |
Nicolas Pitre | 6f475c0 | 2005-10-28 16:39:33 +0100 | [diff] [blame] | 392 | |
| 393 | /* |
| 394 | * Ok, we've finished transmitting. Now enable |
| 395 | * the receiver. Sometimes we get a receive IRQ |
| 396 | * immediately after a transmit... |
| 397 | */ |
| 398 | if (si->newspeed) { |
| 399 | pxa_irda_set_speed(si, si->newspeed); |
| 400 | si->newspeed = 0; |
| 401 | } else { |
| 402 | /* enable IR Receiver, disable IR Transmitter */ |
Robert Jarzmik | 89fa572 | 2015-09-26 20:49:19 +0200 | [diff] [blame] | 403 | stuart_writel(si, IrSR_IR_RECEIVE_ON | |
| 404 | IrSR_XMODE_PULSE_1_6, STISR); |
Nicolas Pitre | 6f475c0 | 2005-10-28 16:39:33 +0100 | [diff] [blame] | 405 | /* enable STUART and receive interrupts */ |
Robert Jarzmik | 89fa572 | 2015-09-26 20:49:19 +0200 | [diff] [blame] | 406 | stuart_writel(si, IER_UUE | IER_RLSE | |
| 407 | IER_RAVIE | IER_RTIOE, STIER); |
Nicolas Pitre | 6f475c0 | 2005-10-28 16:39:33 +0100 | [diff] [blame] | 408 | } |
| 409 | /* I'm hungry! */ |
| 410 | netif_wake_queue(dev); |
| 411 | } |
| 412 | break; |
| 413 | } |
| 414 | |
| 415 | return IRQ_HANDLED; |
| 416 | } |
| 417 | |
| 418 | /* FIR Receive DMA interrupt handler */ |
Robert Jarzmik | 1273bc5 | 2015-09-26 20:49:20 +0200 | [diff] [blame] | 419 | static void pxa_irda_fir_dma_rx_irq(void *data) |
Nicolas Pitre | 6f475c0 | 2005-10-28 16:39:33 +0100 | [diff] [blame] | 420 | { |
| 421 | struct net_device *dev = data; |
| 422 | struct pxa_irda *si = netdev_priv(dev); |
Nicolas Pitre | 6f475c0 | 2005-10-28 16:39:33 +0100 | [diff] [blame] | 423 | |
Robert Jarzmik | 1273bc5 | 2015-09-26 20:49:20 +0200 | [diff] [blame] | 424 | dmaengine_terminate_all(si->rxdma); |
| 425 | netdev_dbg(dev, "pxa_ir: fir rx dma bus error\n"); |
| 426 | } |
Nicolas Pitre | 6f475c0 | 2005-10-28 16:39:33 +0100 | [diff] [blame] | 427 | |
Robert Jarzmik | 1273bc5 | 2015-09-26 20:49:20 +0200 | [diff] [blame] | 428 | /* FIR Transmit DMA interrupt handler */ |
| 429 | static void pxa_irda_fir_dma_tx_irq(void *data) |
| 430 | { |
| 431 | struct net_device *dev = data; |
| 432 | struct pxa_irda *si = netdev_priv(dev); |
| 433 | |
| 434 | dmaengine_terminate_all(si->txdma); |
| 435 | if (dmaengine_tx_status(si->txdma, si->tx_cookie, NULL) == DMA_ERROR) { |
| 436 | dev->stats.tx_errors++; |
| 437 | } else { |
Stephen Hemminger | af04908 | 2009-01-06 10:40:43 -0800 | [diff] [blame] | 438 | dev->stats.tx_packets++; |
| 439 | dev->stats.tx_bytes += si->dma_tx_buff_len; |
Nicolas Pitre | 6f475c0 | 2005-10-28 16:39:33 +0100 | [diff] [blame] | 440 | } |
| 441 | |
Robert Jarzmik | 89fa572 | 2015-09-26 20:49:19 +0200 | [diff] [blame] | 442 | while (ficp_readl(si, ICSR1) & ICSR1_TBY) |
Nicolas Pitre | 6f475c0 | 2005-10-28 16:39:33 +0100 | [diff] [blame] | 443 | cpu_relax(); |
Robert Jarzmik | be01891 | 2015-09-26 20:49:18 +0200 | [diff] [blame] | 444 | si->last_clk = sched_clock(); |
Nicolas Pitre | 6f475c0 | 2005-10-28 16:39:33 +0100 | [diff] [blame] | 445 | |
| 446 | /* |
| 447 | * HACK: It looks like the TBY bit is dropped too soon. |
| 448 | * Without this delay things break. |
| 449 | */ |
| 450 | udelay(120); |
| 451 | |
| 452 | if (si->newspeed) { |
| 453 | pxa_irda_set_speed(si, si->newspeed); |
| 454 | si->newspeed = 0; |
| 455 | } else { |
Guennadi Liakhovetski | 9a4d93d | 2007-03-30 08:49:55 +0100 | [diff] [blame] | 456 | int i = 64; |
| 457 | |
Robert Jarzmik | 89fa572 | 2015-09-26 20:49:19 +0200 | [diff] [blame] | 458 | ficp_writel(si, 0, ICCR0); |
Nicolas Pitre | 6f475c0 | 2005-10-28 16:39:33 +0100 | [diff] [blame] | 459 | pxa_irda_fir_dma_rx_start(si); |
Robert Jarzmik | 89fa572 | 2015-09-26 20:49:19 +0200 | [diff] [blame] | 460 | while ((ficp_readl(si, ICSR1) & ICSR1_RNE) && i--) |
| 461 | ficp_readl(si, ICDR); |
| 462 | ficp_writel(si, ICCR0_ITR | ICCR0_RXE, ICCR0); |
Guennadi Liakhovetski | 9a4d93d | 2007-03-30 08:49:55 +0100 | [diff] [blame] | 463 | |
| 464 | if (i < 0) |
| 465 | printk(KERN_ERR "pxa_ir: cannot clear Rx FIFO!\n"); |
Nicolas Pitre | 6f475c0 | 2005-10-28 16:39:33 +0100 | [diff] [blame] | 466 | } |
| 467 | netif_wake_queue(dev); |
| 468 | } |
| 469 | |
| 470 | /* EIF(Error in FIFO/End in Frame) handler for FIR */ |
Guennadi Liakhovetski | 9a4d93d | 2007-03-30 08:49:55 +0100 | [diff] [blame] | 471 | static void pxa_irda_fir_irq_eif(struct pxa_irda *si, struct net_device *dev, int icsr0) |
Nicolas Pitre | 6f475c0 | 2005-10-28 16:39:33 +0100 | [diff] [blame] | 472 | { |
| 473 | unsigned int len, stat, data; |
Robert Jarzmik | 1273bc5 | 2015-09-26 20:49:20 +0200 | [diff] [blame] | 474 | struct dma_tx_state state; |
Nicolas Pitre | 6f475c0 | 2005-10-28 16:39:33 +0100 | [diff] [blame] | 475 | |
| 476 | /* Get the current data position. */ |
Robert Jarzmik | 1273bc5 | 2015-09-26 20:49:20 +0200 | [diff] [blame] | 477 | |
| 478 | dmaengine_tx_status(si->rxdma, si->rx_cookie, &state); |
| 479 | len = IRDA_FRAME_SIZE_LIMIT - state.residue; |
Nicolas Pitre | 6f475c0 | 2005-10-28 16:39:33 +0100 | [diff] [blame] | 480 | |
| 481 | do { |
| 482 | /* Read Status, and then Data. */ |
Robert Jarzmik | 89fa572 | 2015-09-26 20:49:19 +0200 | [diff] [blame] | 483 | stat = ficp_readl(si, ICSR1); |
Nicolas Pitre | 6f475c0 | 2005-10-28 16:39:33 +0100 | [diff] [blame] | 484 | rmb(); |
Robert Jarzmik | 89fa572 | 2015-09-26 20:49:19 +0200 | [diff] [blame] | 485 | data = ficp_readl(si, ICDR); |
Nicolas Pitre | 6f475c0 | 2005-10-28 16:39:33 +0100 | [diff] [blame] | 486 | |
| 487 | if (stat & (ICSR1_CRE | ICSR1_ROR)) { |
Stephen Hemminger | af04908 | 2009-01-06 10:40:43 -0800 | [diff] [blame] | 488 | dev->stats.rx_errors++; |
Nicolas Pitre | 6f475c0 | 2005-10-28 16:39:33 +0100 | [diff] [blame] | 489 | if (stat & ICSR1_CRE) { |
| 490 | printk(KERN_DEBUG "pxa_ir: fir receive CRC error\n"); |
Stephen Hemminger | af04908 | 2009-01-06 10:40:43 -0800 | [diff] [blame] | 491 | dev->stats.rx_crc_errors++; |
Nicolas Pitre | 6f475c0 | 2005-10-28 16:39:33 +0100 | [diff] [blame] | 492 | } |
| 493 | if (stat & ICSR1_ROR) { |
| 494 | printk(KERN_DEBUG "pxa_ir: fir receive overrun\n"); |
Stephen Hemminger | af04908 | 2009-01-06 10:40:43 -0800 | [diff] [blame] | 495 | dev->stats.rx_over_errors++; |
Nicolas Pitre | 6f475c0 | 2005-10-28 16:39:33 +0100 | [diff] [blame] | 496 | } |
| 497 | } else { |
| 498 | si->dma_rx_buff[len++] = data; |
| 499 | } |
| 500 | /* If we hit the end of frame, there's no point in continuing. */ |
| 501 | if (stat & ICSR1_EOF) |
| 502 | break; |
Robert Jarzmik | 89fa572 | 2015-09-26 20:49:19 +0200 | [diff] [blame] | 503 | } while (ficp_readl(si, ICSR0) & ICSR0_EIF); |
Nicolas Pitre | 6f475c0 | 2005-10-28 16:39:33 +0100 | [diff] [blame] | 504 | |
| 505 | if (stat & ICSR1_EOF) { |
| 506 | /* end of frame. */ |
Guennadi Liakhovetski | 9a4d93d | 2007-03-30 08:49:55 +0100 | [diff] [blame] | 507 | struct sk_buff *skb; |
| 508 | |
| 509 | if (icsr0 & ICSR0_FRE) { |
| 510 | printk(KERN_ERR "pxa_ir: dropping erroneous frame\n"); |
Stephen Hemminger | af04908 | 2009-01-06 10:40:43 -0800 | [diff] [blame] | 511 | dev->stats.rx_dropped++; |
Guennadi Liakhovetski | 9a4d93d | 2007-03-30 08:49:55 +0100 | [diff] [blame] | 512 | return; |
| 513 | } |
| 514 | |
| 515 | skb = alloc_skb(len+1,GFP_ATOMIC); |
Nicolas Pitre | 6f475c0 | 2005-10-28 16:39:33 +0100 | [diff] [blame] | 516 | if (!skb) { |
| 517 | printk(KERN_ERR "pxa_ir: fir out of memory for receive skb\n"); |
Stephen Hemminger | af04908 | 2009-01-06 10:40:43 -0800 | [diff] [blame] | 518 | dev->stats.rx_dropped++; |
Nicolas Pitre | 6f475c0 | 2005-10-28 16:39:33 +0100 | [diff] [blame] | 519 | return; |
| 520 | } |
| 521 | |
| 522 | /* Align IP header to 20 bytes */ |
| 523 | skb_reserve(skb, 1); |
Arnaldo Carvalho de Melo | 27d7ff4 | 2007-03-31 11:55:19 -0300 | [diff] [blame] | 524 | skb_copy_to_linear_data(skb, si->dma_rx_buff, len); |
Nicolas Pitre | 6f475c0 | 2005-10-28 16:39:33 +0100 | [diff] [blame] | 525 | skb_put(skb, len); |
| 526 | |
| 527 | /* Feed it to IrLAP */ |
| 528 | skb->dev = dev; |
Arnaldo Carvalho de Melo | 459a98e | 2007-03-19 15:30:44 -0700 | [diff] [blame] | 529 | skb_reset_mac_header(skb); |
Nicolas Pitre | 6f475c0 | 2005-10-28 16:39:33 +0100 | [diff] [blame] | 530 | skb->protocol = htons(ETH_P_IRDA); |
| 531 | netif_rx(skb); |
| 532 | |
Stephen Hemminger | af04908 | 2009-01-06 10:40:43 -0800 | [diff] [blame] | 533 | dev->stats.rx_packets++; |
| 534 | dev->stats.rx_bytes += len; |
Nicolas Pitre | 6f475c0 | 2005-10-28 16:39:33 +0100 | [diff] [blame] | 535 | } |
| 536 | } |
| 537 | |
| 538 | /* FIR interrupt handler */ |
David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 539 | static irqreturn_t pxa_irda_fir_irq(int irq, void *dev_id) |
Nicolas Pitre | 6f475c0 | 2005-10-28 16:39:33 +0100 | [diff] [blame] | 540 | { |
| 541 | struct net_device *dev = dev_id; |
| 542 | struct pxa_irda *si = netdev_priv(dev); |
Guennadi Liakhovetski | 9a4d93d | 2007-03-30 08:49:55 +0100 | [diff] [blame] | 543 | int icsr0, i = 64; |
Nicolas Pitre | 6f475c0 | 2005-10-28 16:39:33 +0100 | [diff] [blame] | 544 | |
| 545 | /* stop RX DMA */ |
Robert Jarzmik | 1273bc5 | 2015-09-26 20:49:20 +0200 | [diff] [blame] | 546 | dmaengine_terminate_all(si->rxdma); |
Robert Jarzmik | be01891 | 2015-09-26 20:49:18 +0200 | [diff] [blame] | 547 | si->last_clk = sched_clock(); |
Robert Jarzmik | 89fa572 | 2015-09-26 20:49:19 +0200 | [diff] [blame] | 548 | icsr0 = ficp_readl(si, ICSR0); |
Nicolas Pitre | 6f475c0 | 2005-10-28 16:39:33 +0100 | [diff] [blame] | 549 | |
| 550 | if (icsr0 & (ICSR0_FRE | ICSR0_RAB)) { |
| 551 | if (icsr0 & ICSR0_FRE) { |
| 552 | printk(KERN_DEBUG "pxa_ir: fir receive frame error\n"); |
Stephen Hemminger | af04908 | 2009-01-06 10:40:43 -0800 | [diff] [blame] | 553 | dev->stats.rx_frame_errors++; |
Nicolas Pitre | 6f475c0 | 2005-10-28 16:39:33 +0100 | [diff] [blame] | 554 | } else { |
| 555 | printk(KERN_DEBUG "pxa_ir: fir receive abort\n"); |
Stephen Hemminger | af04908 | 2009-01-06 10:40:43 -0800 | [diff] [blame] | 556 | dev->stats.rx_errors++; |
Nicolas Pitre | 6f475c0 | 2005-10-28 16:39:33 +0100 | [diff] [blame] | 557 | } |
Robert Jarzmik | 89fa572 | 2015-09-26 20:49:19 +0200 | [diff] [blame] | 558 | ficp_writel(si, icsr0 & (ICSR0_FRE | ICSR0_RAB), ICSR0); |
Nicolas Pitre | 6f475c0 | 2005-10-28 16:39:33 +0100 | [diff] [blame] | 559 | } |
| 560 | |
| 561 | if (icsr0 & ICSR0_EIF) { |
Lucas De Marchi | 25985ed | 2011-03-30 22:57:33 -0300 | [diff] [blame] | 562 | /* An error in FIFO occurred, or there is a end of frame */ |
Guennadi Liakhovetski | 9a4d93d | 2007-03-30 08:49:55 +0100 | [diff] [blame] | 563 | pxa_irda_fir_irq_eif(si, dev, icsr0); |
Nicolas Pitre | 6f475c0 | 2005-10-28 16:39:33 +0100 | [diff] [blame] | 564 | } |
| 565 | |
Robert Jarzmik | 89fa572 | 2015-09-26 20:49:19 +0200 | [diff] [blame] | 566 | ficp_writel(si, 0, ICCR0); |
Nicolas Pitre | 6f475c0 | 2005-10-28 16:39:33 +0100 | [diff] [blame] | 567 | pxa_irda_fir_dma_rx_start(si); |
Robert Jarzmik | 89fa572 | 2015-09-26 20:49:19 +0200 | [diff] [blame] | 568 | while ((ficp_readl(si, ICSR1) & ICSR1_RNE) && i--) |
| 569 | ficp_readl(si, ICDR); |
| 570 | ficp_writel(si, ICCR0_ITR | ICCR0_RXE, ICCR0); |
Nicolas Pitre | 6f475c0 | 2005-10-28 16:39:33 +0100 | [diff] [blame] | 571 | |
Guennadi Liakhovetski | 9a4d93d | 2007-03-30 08:49:55 +0100 | [diff] [blame] | 572 | if (i < 0) |
| 573 | printk(KERN_ERR "pxa_ir: cannot clear Rx FIFO!\n"); |
| 574 | |
Nicolas Pitre | 6f475c0 | 2005-10-28 16:39:33 +0100 | [diff] [blame] | 575 | return IRQ_HANDLED; |
| 576 | } |
| 577 | |
| 578 | /* hard_xmit interface of irda device */ |
| 579 | static int pxa_irda_hard_xmit(struct sk_buff *skb, struct net_device *dev) |
| 580 | { |
| 581 | struct pxa_irda *si = netdev_priv(dev); |
| 582 | int speed = irda_get_next_speed(skb); |
| 583 | |
| 584 | /* |
| 585 | * Does this packet contain a request to change the interface |
| 586 | * speed? If so, remember it until we complete the transmission |
| 587 | * of this frame. |
| 588 | */ |
| 589 | if (speed != si->speed && speed != -1) |
| 590 | si->newspeed = speed; |
| 591 | |
| 592 | /* |
| 593 | * If this is an empty frame, we can bypass a lot. |
| 594 | */ |
| 595 | if (skb->len == 0) { |
| 596 | if (si->newspeed) { |
| 597 | si->newspeed = 0; |
| 598 | pxa_irda_set_speed(si, speed); |
| 599 | } |
| 600 | dev_kfree_skb(skb); |
Patrick McHardy | 6ed1065 | 2009-06-23 06:03:08 +0000 | [diff] [blame] | 601 | return NETDEV_TX_OK; |
Nicolas Pitre | 6f475c0 | 2005-10-28 16:39:33 +0100 | [diff] [blame] | 602 | } |
| 603 | |
| 604 | netif_stop_queue(dev); |
| 605 | |
| 606 | if (!IS_FIR(si)) { |
| 607 | si->tx_buff.data = si->tx_buff.head; |
| 608 | si->tx_buff.len = async_wrap_skb(skb, si->tx_buff.data, si->tx_buff.truesize); |
| 609 | |
| 610 | /* Disable STUART interrupts and switch to transmit mode. */ |
Robert Jarzmik | 89fa572 | 2015-09-26 20:49:19 +0200 | [diff] [blame] | 611 | stuart_writel(si, 0, STIER); |
| 612 | stuart_writel(si, IrSR_IR_TRANSMIT_ON | IrSR_XMODE_PULSE_1_6, |
| 613 | STISR); |
Nicolas Pitre | 6f475c0 | 2005-10-28 16:39:33 +0100 | [diff] [blame] | 614 | |
| 615 | /* enable STUART and transmit interrupts */ |
Robert Jarzmik | 89fa572 | 2015-09-26 20:49:19 +0200 | [diff] [blame] | 616 | stuart_writel(si, IER_UUE | IER_TIE, STIER); |
Nicolas Pitre | 6f475c0 | 2005-10-28 16:39:33 +0100 | [diff] [blame] | 617 | } else { |
| 618 | unsigned long mtt = irda_get_mtt(skb); |
| 619 | |
| 620 | si->dma_tx_buff_len = skb->len; |
Arnaldo Carvalho de Melo | d626f62 | 2007-03-27 18:55:52 -0300 | [diff] [blame] | 621 | skb_copy_from_linear_data(skb, si->dma_tx_buff, skb->len); |
Nicolas Pitre | 6f475c0 | 2005-10-28 16:39:33 +0100 | [diff] [blame] | 622 | |
| 623 | if (mtt) |
Robert Jarzmik | be01891 | 2015-09-26 20:49:18 +0200 | [diff] [blame] | 624 | while ((sched_clock() - si->last_clk) * 1000 < mtt) |
Nicolas Pitre | 6f475c0 | 2005-10-28 16:39:33 +0100 | [diff] [blame] | 625 | cpu_relax(); |
| 626 | |
| 627 | /* stop RX DMA, disable FICP */ |
Robert Jarzmik | 1273bc5 | 2015-09-26 20:49:20 +0200 | [diff] [blame] | 628 | dmaengine_terminate_all(si->rxdma); |
Robert Jarzmik | 89fa572 | 2015-09-26 20:49:19 +0200 | [diff] [blame] | 629 | ficp_writel(si, 0, ICCR0); |
Nicolas Pitre | 6f475c0 | 2005-10-28 16:39:33 +0100 | [diff] [blame] | 630 | |
| 631 | pxa_irda_fir_dma_tx_start(si); |
Robert Jarzmik | 89fa572 | 2015-09-26 20:49:19 +0200 | [diff] [blame] | 632 | ficp_writel(si, ICCR0_ITR | ICCR0_TXE, ICCR0); |
Nicolas Pitre | 6f475c0 | 2005-10-28 16:39:33 +0100 | [diff] [blame] | 633 | } |
| 634 | |
| 635 | dev_kfree_skb(skb); |
Patrick McHardy | 6ed1065 | 2009-06-23 06:03:08 +0000 | [diff] [blame] | 636 | return NETDEV_TX_OK; |
Nicolas Pitre | 6f475c0 | 2005-10-28 16:39:33 +0100 | [diff] [blame] | 637 | } |
| 638 | |
| 639 | static int pxa_irda_ioctl(struct net_device *dev, struct ifreq *ifreq, int cmd) |
| 640 | { |
| 641 | struct if_irda_req *rq = (struct if_irda_req *)ifreq; |
| 642 | struct pxa_irda *si = netdev_priv(dev); |
| 643 | int ret; |
| 644 | |
| 645 | switch (cmd) { |
| 646 | case SIOCSBANDWIDTH: |
| 647 | ret = -EPERM; |
| 648 | if (capable(CAP_NET_ADMIN)) { |
| 649 | /* |
| 650 | * We are unable to set the speed if the |
| 651 | * device is not running. |
| 652 | */ |
| 653 | if (netif_running(dev)) { |
| 654 | ret = pxa_irda_set_speed(si, |
| 655 | rq->ifr_baudrate); |
| 656 | } else { |
| 657 | printk(KERN_INFO "pxa_ir: SIOCSBANDWIDTH: !netif_running\n"); |
| 658 | ret = 0; |
| 659 | } |
| 660 | } |
| 661 | break; |
| 662 | |
| 663 | case SIOCSMEDIABUSY: |
| 664 | ret = -EPERM; |
| 665 | if (capable(CAP_NET_ADMIN)) { |
| 666 | irda_device_set_media_busy(dev, TRUE); |
| 667 | ret = 0; |
| 668 | } |
| 669 | break; |
| 670 | |
| 671 | case SIOCGRECEIVING: |
| 672 | ret = 0; |
| 673 | rq->ifr_receiving = IS_FIR(si) ? 0 |
| 674 | : si->rx_buff.state != OUTSIDE_FRAME; |
| 675 | break; |
| 676 | |
| 677 | default: |
| 678 | ret = -EOPNOTSUPP; |
| 679 | break; |
| 680 | } |
| 681 | |
| 682 | return ret; |
| 683 | } |
| 684 | |
Nicolas Pitre | 6f475c0 | 2005-10-28 16:39:33 +0100 | [diff] [blame] | 685 | static void pxa_irda_startup(struct pxa_irda *si) |
| 686 | { |
| 687 | /* Disable STUART interrupts */ |
Robert Jarzmik | 89fa572 | 2015-09-26 20:49:19 +0200 | [diff] [blame] | 688 | stuart_writel(si, 0, STIER); |
Nicolas Pitre | 6f475c0 | 2005-10-28 16:39:33 +0100 | [diff] [blame] | 689 | /* enable STUART interrupt to the processor */ |
Robert Jarzmik | 89fa572 | 2015-09-26 20:49:19 +0200 | [diff] [blame] | 690 | stuart_writel(si, MCR_OUT2, STMCR); |
Nicolas Pitre | 6f475c0 | 2005-10-28 16:39:33 +0100 | [diff] [blame] | 691 | /* configure SIR frame format: StartBit - Data 7 ... Data 0 - Stop Bit */ |
Robert Jarzmik | 89fa572 | 2015-09-26 20:49:19 +0200 | [diff] [blame] | 692 | stuart_writel(si, LCR_WLS0 | LCR_WLS1, STLCR); |
Nicolas Pitre | 6f475c0 | 2005-10-28 16:39:33 +0100 | [diff] [blame] | 693 | /* enable FIFO, we use FIFO to improve performance */ |
Robert Jarzmik | 89fa572 | 2015-09-26 20:49:19 +0200 | [diff] [blame] | 694 | stuart_writel(si, FCR_TRFIFOE | FCR_ITL_32, STFCR); |
Nicolas Pitre | 6f475c0 | 2005-10-28 16:39:33 +0100 | [diff] [blame] | 695 | |
| 696 | /* disable FICP */ |
Robert Jarzmik | 89fa572 | 2015-09-26 20:49:19 +0200 | [diff] [blame] | 697 | ficp_writel(si, 0, ICCR0); |
Nicolas Pitre | 6f475c0 | 2005-10-28 16:39:33 +0100 | [diff] [blame] | 698 | /* configure FICP ICCR2 */ |
Robert Jarzmik | 89fa572 | 2015-09-26 20:49:19 +0200 | [diff] [blame] | 699 | ficp_writel(si, ICCR2_TXP | ICCR2_TRIG_32, ICCR2); |
Nicolas Pitre | 6f475c0 | 2005-10-28 16:39:33 +0100 | [diff] [blame] | 700 | |
Nicolas Pitre | 6f475c0 | 2005-10-28 16:39:33 +0100 | [diff] [blame] | 701 | /* force SIR reinitialization */ |
| 702 | si->speed = 4000000; |
| 703 | pxa_irda_set_speed(si, 9600); |
| 704 | |
| 705 | printk(KERN_DEBUG "pxa_ir: irda startup\n"); |
| 706 | } |
| 707 | |
| 708 | static void pxa_irda_shutdown(struct pxa_irda *si) |
| 709 | { |
| 710 | unsigned long flags; |
| 711 | |
| 712 | local_irq_save(flags); |
| 713 | |
| 714 | /* disable STUART and interrupt */ |
Robert Jarzmik | 89fa572 | 2015-09-26 20:49:19 +0200 | [diff] [blame] | 715 | stuart_writel(si, 0, STIER); |
Nicolas Pitre | 6f475c0 | 2005-10-28 16:39:33 +0100 | [diff] [blame] | 716 | /* disable STUART SIR mode */ |
Robert Jarzmik | 89fa572 | 2015-09-26 20:49:19 +0200 | [diff] [blame] | 717 | stuart_writel(si, 0, STISR); |
Nicolas Pitre | 6f475c0 | 2005-10-28 16:39:33 +0100 | [diff] [blame] | 718 | |
| 719 | /* disable DMA */ |
Robert Jarzmik | 1273bc5 | 2015-09-26 20:49:20 +0200 | [diff] [blame] | 720 | dmaengine_terminate_all(si->rxdma); |
| 721 | dmaengine_terminate_all(si->txdma); |
Nicolas Pitre | 6f475c0 | 2005-10-28 16:39:33 +0100 | [diff] [blame] | 722 | /* disable FICP */ |
Robert Jarzmik | 89fa572 | 2015-09-26 20:49:19 +0200 | [diff] [blame] | 723 | ficp_writel(si, 0, ICCR0); |
Russell King | 82d553c | 2007-09-02 17:09:23 +0100 | [diff] [blame] | 724 | |
| 725 | /* disable the STUART or FICP clocks */ |
| 726 | pxa_irda_disable_clk(si); |
Nicolas Pitre | 6f475c0 | 2005-10-28 16:39:33 +0100 | [diff] [blame] | 727 | |
Nicolas Pitre | 6f475c0 | 2005-10-28 16:39:33 +0100 | [diff] [blame] | 728 | local_irq_restore(flags); |
| 729 | |
| 730 | /* power off board transceiver */ |
Marek Vasut | c4bd017 | 2009-07-17 12:50:43 +0200 | [diff] [blame] | 731 | pxa_irda_set_mode(si, IR_OFF); |
Nicolas Pitre | 6f475c0 | 2005-10-28 16:39:33 +0100 | [diff] [blame] | 732 | |
| 733 | printk(KERN_DEBUG "pxa_ir: irda shutdown\n"); |
| 734 | } |
| 735 | |
| 736 | static int pxa_irda_start(struct net_device *dev) |
| 737 | { |
| 738 | struct pxa_irda *si = netdev_priv(dev); |
Robert Jarzmik | 1273bc5 | 2015-09-26 20:49:20 +0200 | [diff] [blame] | 739 | dma_cap_mask_t mask; |
| 740 | struct dma_slave_config config; |
| 741 | struct pxad_param param; |
Nicolas Pitre | 6f475c0 | 2005-10-28 16:39:33 +0100 | [diff] [blame] | 742 | int err; |
| 743 | |
| 744 | si->speed = 9600; |
| 745 | |
Rob Herring | 121f3f9 | 2012-08-29 10:31:14 -0500 | [diff] [blame] | 746 | err = request_irq(si->uart_irq, pxa_irda_sir_irq, 0, dev->name, dev); |
Nicolas Pitre | 6f475c0 | 2005-10-28 16:39:33 +0100 | [diff] [blame] | 747 | if (err) |
| 748 | goto err_irq1; |
| 749 | |
Rob Herring | 121f3f9 | 2012-08-29 10:31:14 -0500 | [diff] [blame] | 750 | err = request_irq(si->icp_irq, pxa_irda_fir_irq, 0, dev->name, dev); |
Nicolas Pitre | 6f475c0 | 2005-10-28 16:39:33 +0100 | [diff] [blame] | 751 | if (err) |
| 752 | goto err_irq2; |
| 753 | |
| 754 | /* |
| 755 | * The interrupt must remain disabled for now. |
| 756 | */ |
Rob Herring | 121f3f9 | 2012-08-29 10:31:14 -0500 | [diff] [blame] | 757 | disable_irq(si->uart_irq); |
| 758 | disable_irq(si->icp_irq); |
Nicolas Pitre | 6f475c0 | 2005-10-28 16:39:33 +0100 | [diff] [blame] | 759 | |
| 760 | err = -EBUSY; |
Robert Jarzmik | 1273bc5 | 2015-09-26 20:49:20 +0200 | [diff] [blame] | 761 | dma_cap_zero(mask); |
| 762 | dma_cap_set(DMA_SLAVE, mask); |
| 763 | param.prio = PXAD_PRIO_LOWEST; |
| 764 | |
| 765 | memset(&config, 0, sizeof(config)); |
| 766 | config.src_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE; |
| 767 | config.dst_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE; |
| 768 | config.src_addr = (dma_addr_t)si->irda_base + ICDR; |
| 769 | config.dst_addr = (dma_addr_t)si->irda_base + ICDR; |
| 770 | config.src_maxburst = 32; |
| 771 | config.dst_maxburst = 32; |
| 772 | |
| 773 | param.drcmr = si->drcmr_rx; |
| 774 | si->rxdma = dma_request_slave_channel_compat(mask, pxad_filter_fn, |
| 775 | ¶m, &dev->dev, "rx"); |
| 776 | if (!si->rxdma) |
Nicolas Pitre | 6f475c0 | 2005-10-28 16:39:33 +0100 | [diff] [blame] | 777 | goto err_rx_dma; |
| 778 | |
Robert Jarzmik | 1273bc5 | 2015-09-26 20:49:20 +0200 | [diff] [blame] | 779 | param.drcmr = si->drcmr_tx; |
| 780 | si->txdma = dma_request_slave_channel_compat(mask, pxad_filter_fn, |
| 781 | ¶m, &dev->dev, "tx"); |
| 782 | if (!si->txdma) |
Nicolas Pitre | 6f475c0 | 2005-10-28 16:39:33 +0100 | [diff] [blame] | 783 | goto err_tx_dma; |
| 784 | |
Robert Jarzmik | 1273bc5 | 2015-09-26 20:49:20 +0200 | [diff] [blame] | 785 | err = dmaengine_slave_config(si->rxdma, &config); |
| 786 | if (err) |
| 787 | goto err_dma_rx_buff; |
| 788 | err = dmaengine_slave_config(si->txdma, &config); |
| 789 | if (err) |
| 790 | goto err_dma_rx_buff; |
| 791 | |
Nicolas Pitre | 6f475c0 | 2005-10-28 16:39:33 +0100 | [diff] [blame] | 792 | err = -ENOMEM; |
| 793 | si->dma_rx_buff = dma_alloc_coherent(si->dev, IRDA_FRAME_SIZE_LIMIT, |
Joe Perches | 1f9061d2 | 2013-03-15 07:23:58 +0000 | [diff] [blame] | 794 | &si->dma_rx_buff_phy, GFP_KERNEL); |
Nicolas Pitre | 6f475c0 | 2005-10-28 16:39:33 +0100 | [diff] [blame] | 795 | if (!si->dma_rx_buff) |
| 796 | goto err_dma_rx_buff; |
| 797 | |
| 798 | si->dma_tx_buff = dma_alloc_coherent(si->dev, IRDA_FRAME_SIZE_LIMIT, |
Joe Perches | 1f9061d2 | 2013-03-15 07:23:58 +0000 | [diff] [blame] | 799 | &si->dma_tx_buff_phy, GFP_KERNEL); |
Nicolas Pitre | 6f475c0 | 2005-10-28 16:39:33 +0100 | [diff] [blame] | 800 | if (!si->dma_tx_buff) |
| 801 | goto err_dma_tx_buff; |
| 802 | |
| 803 | /* Setup the serial port for the initial speed. */ |
| 804 | pxa_irda_startup(si); |
| 805 | |
| 806 | /* |
| 807 | * Open a new IrLAP layer instance. |
| 808 | */ |
| 809 | si->irlap = irlap_open(dev, &si->qos, "pxa"); |
| 810 | err = -ENOMEM; |
| 811 | if (!si->irlap) |
| 812 | goto err_irlap; |
| 813 | |
| 814 | /* |
| 815 | * Now enable the interrupt and start the queue |
| 816 | */ |
Rob Herring | 121f3f9 | 2012-08-29 10:31:14 -0500 | [diff] [blame] | 817 | enable_irq(si->uart_irq); |
| 818 | enable_irq(si->icp_irq); |
Nicolas Pitre | 6f475c0 | 2005-10-28 16:39:33 +0100 | [diff] [blame] | 819 | netif_start_queue(dev); |
| 820 | |
| 821 | printk(KERN_DEBUG "pxa_ir: irda driver opened\n"); |
| 822 | |
| 823 | return 0; |
| 824 | |
| 825 | err_irlap: |
| 826 | pxa_irda_shutdown(si); |
| 827 | dma_free_coherent(si->dev, IRDA_FRAME_SIZE_LIMIT, si->dma_tx_buff, si->dma_tx_buff_phy); |
| 828 | err_dma_tx_buff: |
| 829 | dma_free_coherent(si->dev, IRDA_FRAME_SIZE_LIMIT, si->dma_rx_buff, si->dma_rx_buff_phy); |
| 830 | err_dma_rx_buff: |
Robert Jarzmik | 1273bc5 | 2015-09-26 20:49:20 +0200 | [diff] [blame] | 831 | dma_release_channel(si->txdma); |
Nicolas Pitre | 6f475c0 | 2005-10-28 16:39:33 +0100 | [diff] [blame] | 832 | err_tx_dma: |
Robert Jarzmik | 1273bc5 | 2015-09-26 20:49:20 +0200 | [diff] [blame] | 833 | dma_release_channel(si->rxdma); |
Nicolas Pitre | 6f475c0 | 2005-10-28 16:39:33 +0100 | [diff] [blame] | 834 | err_rx_dma: |
Rob Herring | 121f3f9 | 2012-08-29 10:31:14 -0500 | [diff] [blame] | 835 | free_irq(si->icp_irq, dev); |
Nicolas Pitre | 6f475c0 | 2005-10-28 16:39:33 +0100 | [diff] [blame] | 836 | err_irq2: |
Rob Herring | 121f3f9 | 2012-08-29 10:31:14 -0500 | [diff] [blame] | 837 | free_irq(si->uart_irq, dev); |
Nicolas Pitre | 6f475c0 | 2005-10-28 16:39:33 +0100 | [diff] [blame] | 838 | err_irq1: |
| 839 | |
| 840 | return err; |
| 841 | } |
| 842 | |
| 843 | static int pxa_irda_stop(struct net_device *dev) |
| 844 | { |
| 845 | struct pxa_irda *si = netdev_priv(dev); |
| 846 | |
| 847 | netif_stop_queue(dev); |
| 848 | |
| 849 | pxa_irda_shutdown(si); |
| 850 | |
| 851 | /* Stop IrLAP */ |
| 852 | if (si->irlap) { |
| 853 | irlap_close(si->irlap); |
| 854 | si->irlap = NULL; |
| 855 | } |
| 856 | |
Rob Herring | 121f3f9 | 2012-08-29 10:31:14 -0500 | [diff] [blame] | 857 | free_irq(si->uart_irq, dev); |
| 858 | free_irq(si->icp_irq, dev); |
Nicolas Pitre | 6f475c0 | 2005-10-28 16:39:33 +0100 | [diff] [blame] | 859 | |
Robert Jarzmik | 1273bc5 | 2015-09-26 20:49:20 +0200 | [diff] [blame] | 860 | dmaengine_terminate_all(si->rxdma); |
| 861 | dmaengine_terminate_all(si->txdma); |
| 862 | dma_release_channel(si->rxdma); |
| 863 | dma_release_channel(si->txdma); |
Nicolas Pitre | 6f475c0 | 2005-10-28 16:39:33 +0100 | [diff] [blame] | 864 | |
| 865 | if (si->dma_rx_buff) |
| 866 | dma_free_coherent(si->dev, IRDA_FRAME_SIZE_LIMIT, si->dma_tx_buff, si->dma_tx_buff_phy); |
| 867 | if (si->dma_tx_buff) |
| 868 | dma_free_coherent(si->dev, IRDA_FRAME_SIZE_LIMIT, si->dma_rx_buff, si->dma_rx_buff_phy); |
| 869 | |
| 870 | printk(KERN_DEBUG "pxa_ir: irda driver closed\n"); |
| 871 | return 0; |
| 872 | } |
| 873 | |
Paul Sokolovsky | b259e7d | 2006-12-06 20:07:59 -0800 | [diff] [blame] | 874 | static int pxa_irda_suspend(struct platform_device *_dev, pm_message_t state) |
Nicolas Pitre | 6f475c0 | 2005-10-28 16:39:33 +0100 | [diff] [blame] | 875 | { |
Paul Sokolovsky | b259e7d | 2006-12-06 20:07:59 -0800 | [diff] [blame] | 876 | struct net_device *dev = platform_get_drvdata(_dev); |
Nicolas Pitre | 6f475c0 | 2005-10-28 16:39:33 +0100 | [diff] [blame] | 877 | struct pxa_irda *si; |
| 878 | |
Richard Purdie | 91e1a51 | 2005-10-30 14:38:52 +0000 | [diff] [blame] | 879 | if (dev && netif_running(dev)) { |
Nicolas Pitre | 6f475c0 | 2005-10-28 16:39:33 +0100 | [diff] [blame] | 880 | si = netdev_priv(dev); |
| 881 | netif_device_detach(dev); |
| 882 | pxa_irda_shutdown(si); |
| 883 | } |
| 884 | |
| 885 | return 0; |
| 886 | } |
| 887 | |
Paul Sokolovsky | b259e7d | 2006-12-06 20:07:59 -0800 | [diff] [blame] | 888 | static int pxa_irda_resume(struct platform_device *_dev) |
Nicolas Pitre | 6f475c0 | 2005-10-28 16:39:33 +0100 | [diff] [blame] | 889 | { |
Paul Sokolovsky | b259e7d | 2006-12-06 20:07:59 -0800 | [diff] [blame] | 890 | struct net_device *dev = platform_get_drvdata(_dev); |
Nicolas Pitre | 6f475c0 | 2005-10-28 16:39:33 +0100 | [diff] [blame] | 891 | struct pxa_irda *si; |
| 892 | |
Richard Purdie | 91e1a51 | 2005-10-30 14:38:52 +0000 | [diff] [blame] | 893 | if (dev && netif_running(dev)) { |
Nicolas Pitre | 6f475c0 | 2005-10-28 16:39:33 +0100 | [diff] [blame] | 894 | si = netdev_priv(dev); |
| 895 | pxa_irda_startup(si); |
| 896 | netif_device_attach(dev); |
| 897 | netif_wake_queue(dev); |
| 898 | } |
| 899 | |
| 900 | return 0; |
| 901 | } |
| 902 | |
| 903 | |
| 904 | static int pxa_irda_init_iobuf(iobuff_t *io, int size) |
| 905 | { |
| 906 | io->head = kmalloc(size, GFP_KERNEL | GFP_DMA); |
| 907 | if (io->head != NULL) { |
| 908 | io->truesize = size; |
| 909 | io->in_frame = FALSE; |
| 910 | io->state = OUTSIDE_FRAME; |
| 911 | io->data = io->head; |
| 912 | } |
| 913 | return io->head ? 0 : -ENOMEM; |
| 914 | } |
| 915 | |
Alexander Beregalov | c76ccd6 | 2009-04-15 12:52:41 +0000 | [diff] [blame] | 916 | static const struct net_device_ops pxa_irda_netdev_ops = { |
| 917 | .ndo_open = pxa_irda_start, |
| 918 | .ndo_stop = pxa_irda_stop, |
| 919 | .ndo_start_xmit = pxa_irda_hard_xmit, |
| 920 | .ndo_do_ioctl = pxa_irda_ioctl, |
Alexander Beregalov | c76ccd6 | 2009-04-15 12:52:41 +0000 | [diff] [blame] | 921 | }; |
| 922 | |
Paul Sokolovsky | b259e7d | 2006-12-06 20:07:59 -0800 | [diff] [blame] | 923 | static int pxa_irda_probe(struct platform_device *pdev) |
Nicolas Pitre | 6f475c0 | 2005-10-28 16:39:33 +0100 | [diff] [blame] | 924 | { |
Nicolas Pitre | 6f475c0 | 2005-10-28 16:39:33 +0100 | [diff] [blame] | 925 | struct net_device *dev; |
Robert Jarzmik | 89fa572 | 2015-09-26 20:49:19 +0200 | [diff] [blame] | 926 | struct resource *res; |
Nicolas Pitre | 6f475c0 | 2005-10-28 16:39:33 +0100 | [diff] [blame] | 927 | struct pxa_irda *si; |
Robert Jarzmik | 89fa572 | 2015-09-26 20:49:19 +0200 | [diff] [blame] | 928 | void __iomem *ficp, *stuart; |
Nicolas Pitre | 6f475c0 | 2005-10-28 16:39:33 +0100 | [diff] [blame] | 929 | unsigned int baudrate_mask; |
| 930 | int err; |
| 931 | |
| 932 | if (!pdev->dev.platform_data) |
| 933 | return -ENODEV; |
| 934 | |
Robert Jarzmik | 89fa572 | 2015-09-26 20:49:19 +0200 | [diff] [blame] | 935 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
| 936 | ficp = devm_ioremap_resource(&pdev->dev, res); |
| 937 | if (IS_ERR(ficp)) { |
| 938 | dev_err(&pdev->dev, "resource ficp not defined\n"); |
| 939 | return PTR_ERR(ficp); |
| 940 | } |
Nicolas Pitre | 6f475c0 | 2005-10-28 16:39:33 +0100 | [diff] [blame] | 941 | |
Robert Jarzmik | 89fa572 | 2015-09-26 20:49:19 +0200 | [diff] [blame] | 942 | res = platform_get_resource(pdev, IORESOURCE_MEM, 1); |
| 943 | stuart = devm_ioremap_resource(&pdev->dev, res); |
| 944 | if (IS_ERR(stuart)) { |
| 945 | dev_err(&pdev->dev, "resource stuart not defined\n"); |
| 946 | return PTR_ERR(stuart); |
| 947 | } |
Nicolas Pitre | 6f475c0 | 2005-10-28 16:39:33 +0100 | [diff] [blame] | 948 | |
| 949 | dev = alloc_irdadev(sizeof(struct pxa_irda)); |
Peter Senna Tschudin | cbd841c | 2012-10-05 11:33:05 +0000 | [diff] [blame] | 950 | if (!dev) { |
| 951 | err = -ENOMEM; |
Robert Jarzmik | 89fa572 | 2015-09-26 20:49:19 +0200 | [diff] [blame] | 952 | goto err_mem_1; |
Peter Senna Tschudin | cbd841c | 2012-10-05 11:33:05 +0000 | [diff] [blame] | 953 | } |
Nicolas Pitre | 6f475c0 | 2005-10-28 16:39:33 +0100 | [diff] [blame] | 954 | |
Marek Vasut | d2f3ad4 | 2009-08-23 22:57:30 -0700 | [diff] [blame] | 955 | SET_NETDEV_DEV(dev, &pdev->dev); |
Nicolas Pitre | 6f475c0 | 2005-10-28 16:39:33 +0100 | [diff] [blame] | 956 | si = netdev_priv(dev); |
| 957 | si->dev = &pdev->dev; |
| 958 | si->pdata = pdev->dev.platform_data; |
| 959 | |
Robert Jarzmik | 89fa572 | 2015-09-26 20:49:19 +0200 | [diff] [blame] | 960 | si->irda_base = ficp; |
| 961 | si->stuart_base = stuart; |
Rob Herring | 121f3f9 | 2012-08-29 10:31:14 -0500 | [diff] [blame] | 962 | si->uart_irq = platform_get_irq(pdev, 0); |
| 963 | si->icp_irq = platform_get_irq(pdev, 1); |
| 964 | |
Robert Jarzmik | 89fa572 | 2015-09-26 20:49:19 +0200 | [diff] [blame] | 965 | si->sir_clk = devm_clk_get(&pdev->dev, "UARTCLK"); |
| 966 | si->fir_clk = devm_clk_get(&pdev->dev, "FICPCLK"); |
Russell King | 82d553c | 2007-09-02 17:09:23 +0100 | [diff] [blame] | 967 | if (IS_ERR(si->sir_clk) || IS_ERR(si->fir_clk)) { |
| 968 | err = PTR_ERR(IS_ERR(si->sir_clk) ? si->sir_clk : si->fir_clk); |
| 969 | goto err_mem_4; |
| 970 | } |
| 971 | |
Robert Jarzmik | 1273bc5 | 2015-09-26 20:49:20 +0200 | [diff] [blame] | 972 | res = platform_get_resource(pdev, IORESOURCE_DMA, 0); |
| 973 | if (res) |
| 974 | si->drcmr_rx = res->start; |
| 975 | res = platform_get_resource(pdev, IORESOURCE_DMA, 1); |
| 976 | if (res) |
| 977 | si->drcmr_tx = res->start; |
| 978 | |
Nicolas Pitre | 6f475c0 | 2005-10-28 16:39:33 +0100 | [diff] [blame] | 979 | /* |
| 980 | * Initialise the SIR buffers |
| 981 | */ |
| 982 | err = pxa_irda_init_iobuf(&si->rx_buff, 14384); |
| 983 | if (err) |
| 984 | goto err_mem_4; |
| 985 | err = pxa_irda_init_iobuf(&si->tx_buff, 4000); |
| 986 | if (err) |
| 987 | goto err_mem_5; |
| 988 | |
Marek Vasut | c4bd017 | 2009-07-17 12:50:43 +0200 | [diff] [blame] | 989 | if (gpio_is_valid(si->pdata->gpio_pwdown)) { |
| 990 | err = gpio_request(si->pdata->gpio_pwdown, "IrDA switch"); |
| 991 | if (err) |
| 992 | goto err_startup; |
| 993 | err = gpio_direction_output(si->pdata->gpio_pwdown, |
| 994 | !si->pdata->gpio_pwdown_inverted); |
| 995 | if (err) { |
| 996 | gpio_free(si->pdata->gpio_pwdown); |
| 997 | goto err_startup; |
| 998 | } |
| 999 | } |
| 1000 | |
| 1001 | if (si->pdata->startup) { |
Dmitry Baryshkov | baf1c5d | 2008-04-12 20:08:16 +0100 | [diff] [blame] | 1002 | err = si->pdata->startup(si->dev); |
Marek Vasut | c4bd017 | 2009-07-17 12:50:43 +0200 | [diff] [blame] | 1003 | if (err) |
| 1004 | goto err_startup; |
| 1005 | } |
| 1006 | |
| 1007 | if (gpio_is_valid(si->pdata->gpio_pwdown) && si->pdata->startup) |
| 1008 | dev_warn(si->dev, "gpio_pwdown and startup() both defined!\n"); |
Dmitry Baryshkov | baf1c5d | 2008-04-12 20:08:16 +0100 | [diff] [blame] | 1009 | |
Alexander Beregalov | c76ccd6 | 2009-04-15 12:52:41 +0000 | [diff] [blame] | 1010 | dev->netdev_ops = &pxa_irda_netdev_ops; |
Nicolas Pitre | 6f475c0 | 2005-10-28 16:39:33 +0100 | [diff] [blame] | 1011 | |
| 1012 | irda_init_max_qos_capabilies(&si->qos); |
| 1013 | |
| 1014 | baudrate_mask = 0; |
| 1015 | if (si->pdata->transceiver_cap & IR_SIRMODE) |
| 1016 | baudrate_mask |= IR_9600|IR_19200|IR_38400|IR_57600|IR_115200; |
| 1017 | if (si->pdata->transceiver_cap & IR_FIRMODE) |
| 1018 | baudrate_mask |= IR_4000000 << 8; |
| 1019 | |
| 1020 | si->qos.baud_rate.bits &= baudrate_mask; |
| 1021 | si->qos.min_turn_time.bits = 7; /* 1ms or more */ |
| 1022 | |
| 1023 | irda_qos_bits_to_value(&si->qos); |
| 1024 | |
| 1025 | err = register_netdev(dev); |
| 1026 | |
| 1027 | if (err == 0) |
Libo Chen | 9bcadae | 2013-08-21 18:15:11 +0800 | [diff] [blame] | 1028 | platform_set_drvdata(pdev, dev); |
Nicolas Pitre | 6f475c0 | 2005-10-28 16:39:33 +0100 | [diff] [blame] | 1029 | |
| 1030 | if (err) { |
Dmitry Baryshkov | baf1c5d | 2008-04-12 20:08:16 +0100 | [diff] [blame] | 1031 | if (si->pdata->shutdown) |
| 1032 | si->pdata->shutdown(si->dev); |
| 1033 | err_startup: |
Nicolas Pitre | 6f475c0 | 2005-10-28 16:39:33 +0100 | [diff] [blame] | 1034 | kfree(si->tx_buff.head); |
| 1035 | err_mem_5: |
| 1036 | kfree(si->rx_buff.head); |
| 1037 | err_mem_4: |
| 1038 | free_netdev(dev); |
Nicolas Pitre | 6f475c0 | 2005-10-28 16:39:33 +0100 | [diff] [blame] | 1039 | } |
| 1040 | err_mem_1: |
| 1041 | return err; |
| 1042 | } |
| 1043 | |
Paul Sokolovsky | b259e7d | 2006-12-06 20:07:59 -0800 | [diff] [blame] | 1044 | static int pxa_irda_remove(struct platform_device *_dev) |
Nicolas Pitre | 6f475c0 | 2005-10-28 16:39:33 +0100 | [diff] [blame] | 1045 | { |
Paul Sokolovsky | b259e7d | 2006-12-06 20:07:59 -0800 | [diff] [blame] | 1046 | struct net_device *dev = platform_get_drvdata(_dev); |
Nicolas Pitre | 6f475c0 | 2005-10-28 16:39:33 +0100 | [diff] [blame] | 1047 | |
| 1048 | if (dev) { |
| 1049 | struct pxa_irda *si = netdev_priv(dev); |
| 1050 | unregister_netdev(dev); |
Marek Vasut | c4bd017 | 2009-07-17 12:50:43 +0200 | [diff] [blame] | 1051 | if (gpio_is_valid(si->pdata->gpio_pwdown)) |
| 1052 | gpio_free(si->pdata->gpio_pwdown); |
Dmitry Baryshkov | baf1c5d | 2008-04-12 20:08:16 +0100 | [diff] [blame] | 1053 | if (si->pdata->shutdown) |
| 1054 | si->pdata->shutdown(si->dev); |
Nicolas Pitre | 6f475c0 | 2005-10-28 16:39:33 +0100 | [diff] [blame] | 1055 | kfree(si->tx_buff.head); |
| 1056 | kfree(si->rx_buff.head); |
| 1057 | free_netdev(dev); |
| 1058 | } |
| 1059 | |
Nicolas Pitre | 6f475c0 | 2005-10-28 16:39:33 +0100 | [diff] [blame] | 1060 | return 0; |
| 1061 | } |
| 1062 | |
Paul Sokolovsky | b259e7d | 2006-12-06 20:07:59 -0800 | [diff] [blame] | 1063 | static struct platform_driver pxa_ir_driver = { |
| 1064 | .driver = { |
| 1065 | .name = "pxa2xx-ir", |
| 1066 | }, |
Nicolas Pitre | 6f475c0 | 2005-10-28 16:39:33 +0100 | [diff] [blame] | 1067 | .probe = pxa_irda_probe, |
| 1068 | .remove = pxa_irda_remove, |
| 1069 | .suspend = pxa_irda_suspend, |
| 1070 | .resume = pxa_irda_resume, |
| 1071 | }; |
| 1072 | |
Axel Lin | 8b7ff20 | 2011-11-27 20:29:11 -0500 | [diff] [blame] | 1073 | module_platform_driver(pxa_ir_driver); |
Nicolas Pitre | 6f475c0 | 2005-10-28 16:39:33 +0100 | [diff] [blame] | 1074 | |
| 1075 | MODULE_LICENSE("GPL"); |
Kay Sievers | 72abb46 | 2008-04-18 13:50:44 -0700 | [diff] [blame] | 1076 | MODULE_ALIAS("platform:pxa2xx-ir"); |