Tony Lindgren | 0c4a59f | 2007-07-17 04:06:09 -0700 | [diff] [blame^] | 1 | #define DEBUG |
| 2 | /* |
| 3 | * Copyright (C) 2004 Texas Instruments, Inc. |
| 4 | * |
| 5 | * Some parts based tps65010.c: |
| 6 | * Copyright (C) 2004 Texas Instruments and |
| 7 | * Copyright (C) 2004-2005 David Brownell |
| 8 | * |
| 9 | * Some parts based on tlv320aic24.c: |
| 10 | * Copyright (C) by Kai Svahn <kai.svahn@nokia.com> |
| 11 | * |
| 12 | * Changes for interrupt handling and clean-up by |
| 13 | * Tony Lindgren <tony@atomide.com> and Imre Deak <imre.deak@nokia.com> |
| 14 | * Cleanup and generalized support for voltage setting by |
| 15 | * Juha Yrjola |
| 16 | * Added support for controlling VCORE and regulator sleep states, |
| 17 | * Amit Kucheria <amit.kucheria@nokia.com> |
| 18 | * Copyright (C) 2005, 2006 Nokia Corporation |
| 19 | * |
| 20 | * This program is free software; you can redistribute it and/or modify |
| 21 | * it under the terms of the GNU General Public License as published by |
| 22 | * the Free Software Foundation; either version 2 of the License, or |
| 23 | * (at your option) any later version. |
| 24 | * |
| 25 | * This program is distributed in the hope that it will be useful, |
| 26 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 27 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 28 | * GNU General Public License for more details. |
| 29 | * |
| 30 | * You should have received a copy of the GNU General Public License |
| 31 | * along with this program; if not, write to the Free Software |
| 32 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
| 33 | */ |
| 34 | |
| 35 | #include <linux/module.h> |
| 36 | #include <linux/i2c.h> |
| 37 | #include <linux/interrupt.h> |
| 38 | #include <linux/sched.h> |
| 39 | #include <linux/mutex.h> |
| 40 | #include <linux/workqueue.h> |
| 41 | #include <linux/delay.h> |
| 42 | #include <linux/rtc.h> |
| 43 | #include <linux/bcd.h> |
| 44 | |
| 45 | #include <asm/mach-types.h> |
| 46 | #include <asm/mach/irq.h> |
| 47 | |
| 48 | #include <asm/arch/gpio.h> |
| 49 | #include <asm/arch/menelaus.h> |
| 50 | |
| 51 | #define DRIVER_NAME "menelaus" |
| 52 | |
| 53 | #define pr_err(fmt, arg...) printk(KERN_ERR DRIVER_NAME ": ", ## arg); |
| 54 | |
| 55 | #define MENELAUS_I2C_ADDRESS 0x72 |
| 56 | |
| 57 | #define MENELAUS_REV 0x01 |
| 58 | #define MENELAUS_VCORE_CTRL1 0x02 |
| 59 | #define MENELAUS_VCORE_CTRL2 0x03 |
| 60 | #define MENELAUS_VCORE_CTRL3 0x04 |
| 61 | #define MENELAUS_VCORE_CTRL4 0x05 |
| 62 | #define MENELAUS_VCORE_CTRL5 0x06 |
| 63 | #define MENELAUS_DCDC_CTRL1 0x07 |
| 64 | #define MENELAUS_DCDC_CTRL2 0x08 |
| 65 | #define MENELAUS_DCDC_CTRL3 0x09 |
| 66 | #define MENELAUS_LDO_CTRL1 0x0A |
| 67 | #define MENELAUS_LDO_CTRL2 0x0B |
| 68 | #define MENELAUS_LDO_CTRL3 0x0C |
| 69 | #define MENELAUS_LDO_CTRL4 0x0D |
| 70 | #define MENELAUS_LDO_CTRL5 0x0E |
| 71 | #define MENELAUS_LDO_CTRL6 0x0F |
| 72 | #define MENELAUS_LDO_CTRL7 0x10 |
| 73 | #define MENELAUS_LDO_CTRL8 0x11 |
| 74 | #define MENELAUS_SLEEP_CTRL1 0x12 |
| 75 | #define MENELAUS_SLEEP_CTRL2 0x13 |
| 76 | #define MENELAUS_DEVICE_OFF 0x14 |
| 77 | #define MENELAUS_OSC_CTRL 0x15 |
| 78 | #define MENELAUS_DETECT_CTRL 0x16 |
| 79 | #define MENELAUS_INT_MASK1 0x17 |
| 80 | #define MENELAUS_INT_MASK2 0x18 |
| 81 | #define MENELAUS_INT_STATUS1 0x19 |
| 82 | #define MENELAUS_INT_STATUS2 0x1A |
| 83 | #define MENELAUS_INT_ACK1 0x1B |
| 84 | #define MENELAUS_INT_ACK2 0x1C |
| 85 | #define MENELAUS_GPIO_CTRL 0x1D |
| 86 | #define MENELAUS_GPIO_IN 0x1E |
| 87 | #define MENELAUS_GPIO_OUT 0x1F |
| 88 | #define MENELAUS_BBSMS 0x20 |
| 89 | #define MENELAUS_RTC_CTRL 0x21 |
| 90 | #define MENELAUS_RTC_UPDATE 0x22 |
| 91 | #define MENELAUS_RTC_SEC 0x23 |
| 92 | #define MENELAUS_RTC_MIN 0x24 |
| 93 | #define MENELAUS_RTC_HR 0x25 |
| 94 | #define MENELAUS_RTC_DAY 0x26 |
| 95 | #define MENELAUS_RTC_MON 0x27 |
| 96 | #define MENELAUS_RTC_YR 0x28 |
| 97 | #define MENELAUS_RTC_WKDAY 0x29 |
| 98 | #define MENELAUS_RTC_AL_SEC 0x2A |
| 99 | #define MENELAUS_RTC_AL_MIN 0x2B |
| 100 | #define MENELAUS_RTC_AL_HR 0x2C |
| 101 | #define MENELAUS_RTC_AL_DAY 0x2D |
| 102 | #define MENELAUS_RTC_AL_MON 0x2E |
| 103 | #define MENELAUS_RTC_AL_YR 0x2F |
| 104 | #define MENELAUS_RTC_COMP_MSB 0x30 |
| 105 | #define MENELAUS_RTC_COMP_LSB 0x31 |
| 106 | #define MENELAUS_S1_PULL_EN 0x32 |
| 107 | #define MENELAUS_S1_PULL_DIR 0x33 |
| 108 | #define MENELAUS_S2_PULL_EN 0x34 |
| 109 | #define MENELAUS_S2_PULL_DIR 0x35 |
| 110 | #define MENELAUS_MCT_CTRL1 0x36 |
| 111 | #define MENELAUS_MCT_CTRL2 0x37 |
| 112 | #define MENELAUS_MCT_CTRL3 0x38 |
| 113 | #define MENELAUS_MCT_PIN_ST 0x39 |
| 114 | #define MENELAUS_DEBOUNCE1 0x3A |
| 115 | |
| 116 | #define IH_MENELAUS_IRQS 12 |
| 117 | #define MENELAUS_MMC_S1CD_IRQ 0 /* MMC slot 1 card change */ |
| 118 | #define MENELAUS_MMC_S2CD_IRQ 1 /* MMC slot 2 card change */ |
| 119 | #define MENELAUS_MMC_S1D1_IRQ 2 /* MMC DAT1 low in slot 1 */ |
| 120 | #define MENELAUS_MMC_S2D1_IRQ 3 /* MMC DAT1 low in slot 2 */ |
| 121 | #define MENELAUS_LOWBAT_IRQ 4 /* Low battery */ |
| 122 | #define MENELAUS_HOTDIE_IRQ 5 /* Hot die detect */ |
| 123 | #define MENELAUS_UVLO_IRQ 6 /* UVLO detect */ |
| 124 | #define MENELAUS_TSHUT_IRQ 7 /* Thermal shutdown */ |
| 125 | #define MENELAUS_RTCTMR_IRQ 8 /* RTC timer */ |
| 126 | #define MENELAUS_RTCALM_IRQ 9 /* RTC alarm */ |
| 127 | #define MENELAUS_RTCERR_IRQ 10 /* RTC error */ |
| 128 | #define MENELAUS_PSHBTN_IRQ 11 /* Push button */ |
| 129 | #define MENELAUS_RESERVED12_IRQ 12 /* Reserved */ |
| 130 | #define MENELAUS_RESERVED13_IRQ 13 /* Reserved */ |
| 131 | #define MENELAUS_RESERVED14_IRQ 14 /* Reserved */ |
| 132 | #define MENELAUS_RESERVED15_IRQ 15 /* Reserved */ |
| 133 | |
| 134 | static void menelaus_work(struct work_struct *_menelaus); |
| 135 | |
| 136 | struct menelaus_chip { |
| 137 | struct mutex lock; |
| 138 | struct i2c_client *client; |
| 139 | struct work_struct work; |
| 140 | #ifdef CONFIG_RTC_DRV_TWL92330 |
| 141 | struct rtc_device *rtc; |
| 142 | u8 rtc_control; |
| 143 | unsigned uie:1; |
| 144 | #endif |
| 145 | unsigned vcore_hw_mode:1; |
| 146 | u8 mask1, mask2; |
| 147 | void (*handlers[16])(struct menelaus_chip *); |
| 148 | void (*mmc_callback)(void *data, u8 mask); |
| 149 | void *mmc_callback_data; |
| 150 | }; |
| 151 | |
| 152 | static struct menelaus_chip *the_menelaus; |
| 153 | |
| 154 | static int menelaus_write_reg(int reg, u8 value) |
| 155 | { |
| 156 | int val = i2c_smbus_write_byte_data(the_menelaus->client, reg, value); |
| 157 | |
| 158 | if (val < 0) { |
| 159 | pr_err("write error"); |
| 160 | return val; |
| 161 | } |
| 162 | |
| 163 | return 0; |
| 164 | } |
| 165 | |
| 166 | static int menelaus_read_reg(int reg) |
| 167 | { |
| 168 | int val = i2c_smbus_read_byte_data(the_menelaus->client, reg); |
| 169 | |
| 170 | if (val < 0) |
| 171 | pr_err("read error"); |
| 172 | |
| 173 | return val; |
| 174 | } |
| 175 | |
| 176 | static int menelaus_enable_irq(int irq) |
| 177 | { |
| 178 | if (irq > 7) { |
| 179 | irq -= 8; |
| 180 | the_menelaus->mask2 &= ~(1 << irq); |
| 181 | return menelaus_write_reg(MENELAUS_INT_MASK2, |
| 182 | the_menelaus->mask2); |
| 183 | } else { |
| 184 | the_menelaus->mask1 &= ~(1 << irq); |
| 185 | return menelaus_write_reg(MENELAUS_INT_MASK1, |
| 186 | the_menelaus->mask1); |
| 187 | } |
| 188 | } |
| 189 | |
| 190 | static int menelaus_disable_irq(int irq) |
| 191 | { |
| 192 | if (irq > 7) { |
| 193 | irq -= 8; |
| 194 | the_menelaus->mask2 |= (1 << irq); |
| 195 | return menelaus_write_reg(MENELAUS_INT_MASK2, |
| 196 | the_menelaus->mask2); |
| 197 | } else { |
| 198 | the_menelaus->mask1 |= (1 << irq); |
| 199 | return menelaus_write_reg(MENELAUS_INT_MASK1, |
| 200 | the_menelaus->mask1); |
| 201 | } |
| 202 | } |
| 203 | |
| 204 | static int menelaus_ack_irq(int irq) |
| 205 | { |
| 206 | if (irq > 7) |
| 207 | return menelaus_write_reg(MENELAUS_INT_ACK2, 1 << (irq - 8)); |
| 208 | else |
| 209 | return menelaus_write_reg(MENELAUS_INT_ACK1, 1 << irq); |
| 210 | } |
| 211 | |
| 212 | /* Adds a handler for an interrupt. Does not run in interrupt context */ |
| 213 | static int menelaus_add_irq_work(int irq, |
| 214 | void (*handler)(struct menelaus_chip *)) |
| 215 | { |
| 216 | int ret = 0; |
| 217 | |
| 218 | mutex_lock(&the_menelaus->lock); |
| 219 | the_menelaus->handlers[irq] = handler; |
| 220 | ret = menelaus_enable_irq(irq); |
| 221 | mutex_unlock(&the_menelaus->lock); |
| 222 | |
| 223 | return ret; |
| 224 | } |
| 225 | |
| 226 | /* Removes handler for an interrupt */ |
| 227 | static int menelaus_remove_irq_work(int irq) |
| 228 | { |
| 229 | int ret = 0; |
| 230 | |
| 231 | mutex_lock(&the_menelaus->lock); |
| 232 | ret = menelaus_disable_irq(irq); |
| 233 | the_menelaus->handlers[irq] = NULL; |
| 234 | mutex_unlock(&the_menelaus->lock); |
| 235 | |
| 236 | return ret; |
| 237 | } |
| 238 | |
| 239 | /* |
| 240 | * Gets scheduled when a card detect interrupt happens. Note that in some cases |
| 241 | * this line is wired to card cover switch rather than the card detect switch |
| 242 | * in each slot. In this case the cards are not seen by menelaus. |
| 243 | * FIXME: Add handling for D1 too |
| 244 | */ |
| 245 | static void menelaus_mmc_cd_work(struct menelaus_chip *menelaus_hw) |
| 246 | { |
| 247 | int reg; |
| 248 | unsigned char card_mask = 0; |
| 249 | |
| 250 | reg = menelaus_read_reg(MENELAUS_MCT_PIN_ST); |
| 251 | if (reg < 0) |
| 252 | return; |
| 253 | |
| 254 | if (!(reg & 0x1)) |
| 255 | card_mask |= (1 << 0); |
| 256 | |
| 257 | if (!(reg & 0x2)) |
| 258 | card_mask |= (1 << 1); |
| 259 | |
| 260 | if (menelaus_hw->mmc_callback) |
| 261 | menelaus_hw->mmc_callback(menelaus_hw->mmc_callback_data, |
| 262 | card_mask); |
| 263 | } |
| 264 | |
| 265 | /* |
| 266 | * Toggles the MMC slots between open-drain and push-pull mode. |
| 267 | */ |
| 268 | int menelaus_set_mmc_opendrain(int slot, int enable) |
| 269 | { |
| 270 | int ret, val; |
| 271 | |
| 272 | if (slot != 1 && slot != 2) |
| 273 | return -EINVAL; |
| 274 | mutex_lock(&the_menelaus->lock); |
| 275 | ret = menelaus_read_reg(MENELAUS_MCT_CTRL1); |
| 276 | if (ret < 0) { |
| 277 | mutex_unlock(&the_menelaus->lock); |
| 278 | return ret; |
| 279 | } |
| 280 | val = ret; |
| 281 | if (slot == 1) { |
| 282 | if (enable) |
| 283 | val |= 1 << 2; |
| 284 | else |
| 285 | val &= ~(1 << 2); |
| 286 | } else { |
| 287 | if (enable) |
| 288 | val |= 1 << 3; |
| 289 | else |
| 290 | val &= ~(1 << 3); |
| 291 | } |
| 292 | ret = menelaus_write_reg(MENELAUS_MCT_CTRL1, val); |
| 293 | mutex_unlock(&the_menelaus->lock); |
| 294 | |
| 295 | return ret; |
| 296 | } |
| 297 | EXPORT_SYMBOL(menelaus_set_mmc_opendrain); |
| 298 | |
| 299 | int menelaus_set_slot_sel(int enable) |
| 300 | { |
| 301 | int ret; |
| 302 | |
| 303 | mutex_lock(&the_menelaus->lock); |
| 304 | ret = menelaus_read_reg(MENELAUS_GPIO_CTRL); |
| 305 | if (ret < 0) |
| 306 | goto out; |
| 307 | ret |= 0x02; |
| 308 | if (enable) |
| 309 | ret |= 1 << 5; |
| 310 | else |
| 311 | ret &= ~(1 << 5); |
| 312 | ret = menelaus_write_reg(MENELAUS_GPIO_CTRL, ret); |
| 313 | out: |
| 314 | mutex_unlock(&the_menelaus->lock); |
| 315 | return ret; |
| 316 | } |
| 317 | EXPORT_SYMBOL(menelaus_set_slot_sel); |
| 318 | |
| 319 | int menelaus_set_mmc_slot(int slot, int enable, int power, int cd_en) |
| 320 | { |
| 321 | int ret, val; |
| 322 | |
| 323 | if (slot != 1 && slot != 2) |
| 324 | return -EINVAL; |
| 325 | if (power >= 3) |
| 326 | return -EINVAL; |
| 327 | |
| 328 | mutex_lock(&the_menelaus->lock); |
| 329 | |
| 330 | ret = menelaus_read_reg(MENELAUS_MCT_CTRL2); |
| 331 | if (ret < 0) |
| 332 | goto out; |
| 333 | val = ret; |
| 334 | if (slot == 1) { |
| 335 | if (cd_en) |
| 336 | val |= (1 << 4) | (1 << 6); |
| 337 | else |
| 338 | val &= ~((1 << 4) | (1 << 6)); |
| 339 | } else { |
| 340 | if (cd_en) |
| 341 | val |= (1 << 5) | (1 << 7); |
| 342 | else |
| 343 | val &= ~((1 << 5) | (1 << 7)); |
| 344 | } |
| 345 | ret = menelaus_write_reg(MENELAUS_MCT_CTRL2, val); |
| 346 | if (ret < 0) |
| 347 | goto out; |
| 348 | |
| 349 | ret = menelaus_read_reg(MENELAUS_MCT_CTRL3); |
| 350 | if (ret < 0) |
| 351 | goto out; |
| 352 | val = ret; |
| 353 | if (slot == 1) { |
| 354 | if (enable) |
| 355 | val |= 1 << 0; |
| 356 | else |
| 357 | val &= ~(1 << 0); |
| 358 | } else { |
| 359 | int b; |
| 360 | |
| 361 | if (enable) |
| 362 | ret |= 1 << 1; |
| 363 | else |
| 364 | ret &= ~(1 << 1); |
| 365 | b = menelaus_read_reg(MENELAUS_MCT_CTRL2); |
| 366 | b &= ~0x03; |
| 367 | b |= power; |
| 368 | ret = menelaus_write_reg(MENELAUS_MCT_CTRL2, b); |
| 369 | if (ret < 0) |
| 370 | goto out; |
| 371 | } |
| 372 | /* Disable autonomous shutdown */ |
| 373 | val &= ~(0x03 << 2); |
| 374 | ret = menelaus_write_reg(MENELAUS_MCT_CTRL3, val); |
| 375 | out: |
| 376 | mutex_unlock(&the_menelaus->lock); |
| 377 | return ret; |
| 378 | } |
| 379 | EXPORT_SYMBOL(menelaus_set_mmc_slot); |
| 380 | |
| 381 | int menelaus_register_mmc_callback(void (*callback)(void *data, u8 card_mask), |
| 382 | void *data) |
| 383 | { |
| 384 | int ret = 0; |
| 385 | |
| 386 | the_menelaus->mmc_callback_data = data; |
| 387 | the_menelaus->mmc_callback = callback; |
| 388 | ret = menelaus_add_irq_work(MENELAUS_MMC_S1CD_IRQ, |
| 389 | menelaus_mmc_cd_work); |
| 390 | if (ret < 0) |
| 391 | return ret; |
| 392 | ret = menelaus_add_irq_work(MENELAUS_MMC_S2CD_IRQ, |
| 393 | menelaus_mmc_cd_work); |
| 394 | if (ret < 0) |
| 395 | return ret; |
| 396 | ret = menelaus_add_irq_work(MENELAUS_MMC_S1D1_IRQ, |
| 397 | menelaus_mmc_cd_work); |
| 398 | if (ret < 0) |
| 399 | return ret; |
| 400 | ret = menelaus_add_irq_work(MENELAUS_MMC_S2D1_IRQ, |
| 401 | menelaus_mmc_cd_work); |
| 402 | |
| 403 | return ret; |
| 404 | } |
| 405 | EXPORT_SYMBOL(menelaus_register_mmc_callback); |
| 406 | |
| 407 | void menelaus_unregister_mmc_callback(void) |
| 408 | { |
| 409 | menelaus_remove_irq_work(MENELAUS_MMC_S1CD_IRQ); |
| 410 | menelaus_remove_irq_work(MENELAUS_MMC_S2CD_IRQ); |
| 411 | menelaus_remove_irq_work(MENELAUS_MMC_S1D1_IRQ); |
| 412 | menelaus_remove_irq_work(MENELAUS_MMC_S2D1_IRQ); |
| 413 | |
| 414 | the_menelaus->mmc_callback = NULL; |
| 415 | the_menelaus->mmc_callback_data = 0; |
| 416 | } |
| 417 | EXPORT_SYMBOL(menelaus_unregister_mmc_callback); |
| 418 | |
| 419 | struct menelaus_vtg { |
| 420 | const char *name; |
| 421 | u8 vtg_reg; |
| 422 | u8 vtg_shift; |
| 423 | u8 vtg_bits; |
| 424 | u8 mode_reg; |
| 425 | }; |
| 426 | |
| 427 | struct menelaus_vtg_value { |
| 428 | u16 vtg; |
| 429 | u16 val; |
| 430 | }; |
| 431 | |
| 432 | static int menelaus_set_voltage(const struct menelaus_vtg *vtg, int mV, |
| 433 | int vtg_val, int mode) |
| 434 | { |
| 435 | int val, ret; |
| 436 | struct i2c_client *c = the_menelaus->client; |
| 437 | |
| 438 | mutex_lock(&the_menelaus->lock); |
| 439 | if (vtg == 0) |
| 440 | goto set_voltage; |
| 441 | |
| 442 | ret = menelaus_read_reg(vtg->vtg_reg); |
| 443 | if (ret < 0) |
| 444 | goto out; |
| 445 | val = ret & ~(((1 << vtg->vtg_bits) - 1) << vtg->vtg_shift); |
| 446 | val |= vtg_val << vtg->vtg_shift; |
| 447 | |
| 448 | dev_dbg(&c->dev, "Setting voltage '%s'" |
| 449 | "to %d mV (reg 0x%02x, val 0x%02x)\n", |
| 450 | vtg->name, mV, vtg->vtg_reg, val); |
| 451 | |
| 452 | ret = menelaus_write_reg(vtg->vtg_reg, val); |
| 453 | if (ret < 0) |
| 454 | goto out; |
| 455 | set_voltage: |
| 456 | ret = menelaus_write_reg(vtg->mode_reg, mode); |
| 457 | out: |
| 458 | mutex_unlock(&the_menelaus->lock); |
| 459 | if (ret == 0) { |
| 460 | /* Wait for voltage to stabilize */ |
| 461 | msleep(1); |
| 462 | } |
| 463 | return ret; |
| 464 | } |
| 465 | |
| 466 | static int menelaus_get_vtg_value(int vtg, const struct menelaus_vtg_value *tbl, |
| 467 | int n) |
| 468 | { |
| 469 | int i; |
| 470 | |
| 471 | for (i = 0; i < n; i++, tbl++) |
| 472 | if (tbl->vtg == vtg) |
| 473 | return tbl->val; |
| 474 | return -EINVAL; |
| 475 | } |
| 476 | |
| 477 | /* |
| 478 | * Vcore can be programmed in two ways: |
| 479 | * SW-controlled: Required voltage is programmed into VCORE_CTRL1 |
| 480 | * HW-controlled: Required range (roof-floor) is programmed into VCORE_CTRL3 |
| 481 | * and VCORE_CTRL4 |
| 482 | * |
| 483 | * Call correct 'set' function accordingly |
| 484 | */ |
| 485 | |
| 486 | static const struct menelaus_vtg_value vcore_values[] = { |
| 487 | { 1000, 0 }, |
| 488 | { 1025, 1 }, |
| 489 | { 1050, 2 }, |
| 490 | { 1075, 3 }, |
| 491 | { 1100, 4 }, |
| 492 | { 1125, 5 }, |
| 493 | { 1150, 6 }, |
| 494 | { 1175, 7 }, |
| 495 | { 1200, 8 }, |
| 496 | { 1225, 9 }, |
| 497 | { 1250, 10 }, |
| 498 | { 1275, 11 }, |
| 499 | { 1300, 12 }, |
| 500 | { 1325, 13 }, |
| 501 | { 1350, 14 }, |
| 502 | { 1375, 15 }, |
| 503 | { 1400, 16 }, |
| 504 | { 1425, 17 }, |
| 505 | { 1450, 18 }, |
| 506 | }; |
| 507 | |
| 508 | int menelaus_set_vcore_sw(unsigned int mV) |
| 509 | { |
| 510 | int val, ret; |
| 511 | struct i2c_client *c = the_menelaus->client; |
| 512 | |
| 513 | val = menelaus_get_vtg_value(mV, vcore_values, |
| 514 | ARRAY_SIZE(vcore_values)); |
| 515 | if (val < 0) |
| 516 | return -EINVAL; |
| 517 | |
| 518 | dev_dbg(&c->dev, "Setting VCORE to %d mV (val 0x%02x)\n", mV, val); |
| 519 | |
| 520 | /* Set SW mode and the voltage in one go. */ |
| 521 | mutex_lock(&the_menelaus->lock); |
| 522 | ret = menelaus_write_reg(MENELAUS_VCORE_CTRL1, val); |
| 523 | if (ret == 0) |
| 524 | the_menelaus->vcore_hw_mode = 0; |
| 525 | mutex_unlock(&the_menelaus->lock); |
| 526 | msleep(1); |
| 527 | |
| 528 | return ret; |
| 529 | } |
| 530 | |
| 531 | int menelaus_set_vcore_hw(unsigned int roof_mV, unsigned int floor_mV) |
| 532 | { |
| 533 | int fval, rval, val, ret; |
| 534 | struct i2c_client *c = the_menelaus->client; |
| 535 | |
| 536 | rval = menelaus_get_vtg_value(roof_mV, vcore_values, |
| 537 | ARRAY_SIZE(vcore_values)); |
| 538 | if (rval < 0) |
| 539 | return -EINVAL; |
| 540 | fval = menelaus_get_vtg_value(floor_mV, vcore_values, |
| 541 | ARRAY_SIZE(vcore_values)); |
| 542 | if (fval < 0) |
| 543 | return -EINVAL; |
| 544 | |
| 545 | dev_dbg(&c->dev, "Setting VCORE FLOOR to %d mV and ROOF to %d mV\n", |
| 546 | floor_mV, roof_mV); |
| 547 | |
| 548 | mutex_lock(&the_menelaus->lock); |
| 549 | ret = menelaus_write_reg(MENELAUS_VCORE_CTRL3, fval); |
| 550 | if (ret < 0) |
| 551 | goto out; |
| 552 | ret = menelaus_write_reg(MENELAUS_VCORE_CTRL4, rval); |
| 553 | if (ret < 0) |
| 554 | goto out; |
| 555 | if (!the_menelaus->vcore_hw_mode) { |
| 556 | val = menelaus_read_reg(MENELAUS_VCORE_CTRL1); |
| 557 | /* HW mode, turn OFF byte comparator */ |
| 558 | val |= ((1 << 7) | (1 << 5)); |
| 559 | ret = menelaus_write_reg(MENELAUS_VCORE_CTRL1, val); |
| 560 | the_menelaus->vcore_hw_mode = 1; |
| 561 | } |
| 562 | msleep(1); |
| 563 | out: |
| 564 | mutex_unlock(&the_menelaus->lock); |
| 565 | return ret; |
| 566 | } |
| 567 | |
| 568 | static const struct menelaus_vtg vmem_vtg = { |
| 569 | .name = "VMEM", |
| 570 | .vtg_reg = MENELAUS_LDO_CTRL1, |
| 571 | .vtg_shift = 0, |
| 572 | .vtg_bits = 2, |
| 573 | .mode_reg = MENELAUS_LDO_CTRL3, |
| 574 | }; |
| 575 | |
| 576 | static const struct menelaus_vtg_value vmem_values[] = { |
| 577 | { 1500, 0 }, |
| 578 | { 1800, 1 }, |
| 579 | { 1900, 2 }, |
| 580 | { 2500, 3 }, |
| 581 | }; |
| 582 | |
| 583 | int menelaus_set_vmem(unsigned int mV) |
| 584 | { |
| 585 | int val; |
| 586 | |
| 587 | if (mV == 0) |
| 588 | return menelaus_set_voltage(&vmem_vtg, 0, 0, 0); |
| 589 | |
| 590 | val = menelaus_get_vtg_value(mV, vmem_values, ARRAY_SIZE(vmem_values)); |
| 591 | if (val < 0) |
| 592 | return -EINVAL; |
| 593 | return menelaus_set_voltage(&vmem_vtg, mV, val, 0x02); |
| 594 | } |
| 595 | EXPORT_SYMBOL(menelaus_set_vmem); |
| 596 | |
| 597 | static const struct menelaus_vtg vio_vtg = { |
| 598 | .name = "VIO", |
| 599 | .vtg_reg = MENELAUS_LDO_CTRL1, |
| 600 | .vtg_shift = 2, |
| 601 | .vtg_bits = 2, |
| 602 | .mode_reg = MENELAUS_LDO_CTRL4, |
| 603 | }; |
| 604 | |
| 605 | static const struct menelaus_vtg_value vio_values[] = { |
| 606 | { 1500, 0 }, |
| 607 | { 1800, 1 }, |
| 608 | { 2500, 2 }, |
| 609 | { 2800, 3 }, |
| 610 | }; |
| 611 | |
| 612 | int menelaus_set_vio(unsigned int mV) |
| 613 | { |
| 614 | int val; |
| 615 | |
| 616 | if (mV == 0) |
| 617 | return menelaus_set_voltage(&vio_vtg, 0, 0, 0); |
| 618 | |
| 619 | val = menelaus_get_vtg_value(mV, vio_values, ARRAY_SIZE(vio_values)); |
| 620 | if (val < 0) |
| 621 | return -EINVAL; |
| 622 | return menelaus_set_voltage(&vio_vtg, mV, val, 0x02); |
| 623 | } |
| 624 | EXPORT_SYMBOL(menelaus_set_vio); |
| 625 | |
| 626 | static const struct menelaus_vtg_value vdcdc_values[] = { |
| 627 | { 1500, 0 }, |
| 628 | { 1800, 1 }, |
| 629 | { 2000, 2 }, |
| 630 | { 2200, 3 }, |
| 631 | { 2400, 4 }, |
| 632 | { 2800, 5 }, |
| 633 | { 3000, 6 }, |
| 634 | { 3300, 7 }, |
| 635 | }; |
| 636 | |
| 637 | static const struct menelaus_vtg vdcdc2_vtg = { |
| 638 | .name = "VDCDC2", |
| 639 | .vtg_reg = MENELAUS_DCDC_CTRL1, |
| 640 | .vtg_shift = 0, |
| 641 | .vtg_bits = 3, |
| 642 | .mode_reg = MENELAUS_DCDC_CTRL2, |
| 643 | }; |
| 644 | |
| 645 | static const struct menelaus_vtg vdcdc3_vtg = { |
| 646 | .name = "VDCDC3", |
| 647 | .vtg_reg = MENELAUS_DCDC_CTRL1, |
| 648 | .vtg_shift = 3, |
| 649 | .vtg_bits = 3, |
| 650 | .mode_reg = MENELAUS_DCDC_CTRL3, |
| 651 | }; |
| 652 | |
| 653 | int menelaus_set_vdcdc(int dcdc, unsigned int mV) |
| 654 | { |
| 655 | const struct menelaus_vtg *vtg; |
| 656 | int val; |
| 657 | |
| 658 | if (dcdc != 2 && dcdc != 3) |
| 659 | return -EINVAL; |
| 660 | if (dcdc == 2) |
| 661 | vtg = &vdcdc2_vtg; |
| 662 | else |
| 663 | vtg = &vdcdc3_vtg; |
| 664 | |
| 665 | if (mV == 0) |
| 666 | return menelaus_set_voltage(vtg, 0, 0, 0); |
| 667 | |
| 668 | val = menelaus_get_vtg_value(mV, vdcdc_values, |
| 669 | ARRAY_SIZE(vdcdc_values)); |
| 670 | if (val < 0) |
| 671 | return -EINVAL; |
| 672 | return menelaus_set_voltage(vtg, mV, val, 0x03); |
| 673 | } |
| 674 | |
| 675 | static const struct menelaus_vtg_value vmmc_values[] = { |
| 676 | { 1850, 0 }, |
| 677 | { 2800, 1 }, |
| 678 | { 3000, 2 }, |
| 679 | { 3100, 3 }, |
| 680 | }; |
| 681 | |
| 682 | static const struct menelaus_vtg vmmc_vtg = { |
| 683 | .name = "VMMC", |
| 684 | .vtg_reg = MENELAUS_LDO_CTRL1, |
| 685 | .vtg_shift = 6, |
| 686 | .vtg_bits = 2, |
| 687 | .mode_reg = MENELAUS_LDO_CTRL7, |
| 688 | }; |
| 689 | |
| 690 | int menelaus_set_vmmc(unsigned int mV) |
| 691 | { |
| 692 | int val; |
| 693 | |
| 694 | if (mV == 0) |
| 695 | return menelaus_set_voltage(&vmmc_vtg, 0, 0, 0); |
| 696 | |
| 697 | val = menelaus_get_vtg_value(mV, vmmc_values, ARRAY_SIZE(vmmc_values)); |
| 698 | if (val < 0) |
| 699 | return -EINVAL; |
| 700 | return menelaus_set_voltage(&vmmc_vtg, mV, val, 0x02); |
| 701 | } |
| 702 | EXPORT_SYMBOL(menelaus_set_vmmc); |
| 703 | |
| 704 | |
| 705 | static const struct menelaus_vtg_value vaux_values[] = { |
| 706 | { 1500, 0 }, |
| 707 | { 1800, 1 }, |
| 708 | { 2500, 2 }, |
| 709 | { 2800, 3 }, |
| 710 | }; |
| 711 | |
| 712 | static const struct menelaus_vtg vaux_vtg = { |
| 713 | .name = "VAUX", |
| 714 | .vtg_reg = MENELAUS_LDO_CTRL1, |
| 715 | .vtg_shift = 4, |
| 716 | .vtg_bits = 2, |
| 717 | .mode_reg = MENELAUS_LDO_CTRL6, |
| 718 | }; |
| 719 | |
| 720 | int menelaus_set_vaux(unsigned int mV) |
| 721 | { |
| 722 | int val; |
| 723 | |
| 724 | if (mV == 0) |
| 725 | return menelaus_set_voltage(&vaux_vtg, 0, 0, 0); |
| 726 | |
| 727 | val = menelaus_get_vtg_value(mV, vaux_values, ARRAY_SIZE(vaux_values)); |
| 728 | if (val < 0) |
| 729 | return -EINVAL; |
| 730 | return menelaus_set_voltage(&vaux_vtg, mV, val, 0x02); |
| 731 | } |
| 732 | EXPORT_SYMBOL(menelaus_set_vaux); |
| 733 | |
| 734 | int menelaus_get_slot_pin_states(void) |
| 735 | { |
| 736 | return menelaus_read_reg(MENELAUS_MCT_PIN_ST); |
| 737 | } |
| 738 | EXPORT_SYMBOL(menelaus_get_slot_pin_states); |
| 739 | |
| 740 | int menelaus_set_regulator_sleep(int enable, u32 val) |
| 741 | { |
| 742 | int t, ret; |
| 743 | struct i2c_client *c = the_menelaus->client; |
| 744 | |
| 745 | mutex_lock(&the_menelaus->lock); |
| 746 | ret = menelaus_write_reg(MENELAUS_SLEEP_CTRL2, val); |
| 747 | if (ret < 0) |
| 748 | goto out; |
| 749 | |
| 750 | dev_dbg(&c->dev, "regulator sleep configuration: %02x\n", val); |
| 751 | |
| 752 | ret = menelaus_read_reg(MENELAUS_GPIO_CTRL); |
| 753 | if (ret < 0) |
| 754 | goto out; |
| 755 | t = ((1 << 6) | 0x04); |
| 756 | if (enable) |
| 757 | ret |= t; |
| 758 | else |
| 759 | ret &= ~t; |
| 760 | ret = menelaus_write_reg(MENELAUS_GPIO_CTRL, ret); |
| 761 | out: |
| 762 | mutex_unlock(&the_menelaus->lock); |
| 763 | return ret; |
| 764 | } |
| 765 | |
| 766 | /*-----------------------------------------------------------------------*/ |
| 767 | |
| 768 | /* Handles Menelaus interrupts. Does not run in interrupt context */ |
| 769 | static void menelaus_work(struct work_struct *_menelaus) |
| 770 | { |
| 771 | struct menelaus_chip *menelaus = |
| 772 | container_of(_menelaus, struct menelaus_chip, work); |
| 773 | void (*handler)(struct menelaus_chip *menelaus); |
| 774 | |
| 775 | while (1) { |
| 776 | unsigned isr; |
| 777 | |
| 778 | isr = (menelaus_read_reg(MENELAUS_INT_STATUS2) |
| 779 | & ~menelaus->mask2) << 8; |
| 780 | isr |= menelaus_read_reg(MENELAUS_INT_STATUS1) |
| 781 | & ~menelaus->mask1; |
| 782 | if (!isr) |
| 783 | break; |
| 784 | |
| 785 | while (isr) { |
| 786 | int irq = fls(isr) - 1; |
| 787 | isr &= ~(1 << irq); |
| 788 | |
| 789 | mutex_lock(&menelaus->lock); |
| 790 | menelaus_disable_irq(irq); |
| 791 | menelaus_ack_irq(irq); |
| 792 | handler = menelaus->handlers[irq]; |
| 793 | if (handler) |
| 794 | handler(menelaus); |
| 795 | menelaus_enable_irq(irq); |
| 796 | mutex_unlock(&menelaus->lock); |
| 797 | } |
| 798 | } |
| 799 | enable_irq(menelaus->client->irq); |
| 800 | } |
| 801 | |
| 802 | /* |
| 803 | * We cannot use I2C in interrupt context, so we just schedule work. |
| 804 | */ |
| 805 | static irqreturn_t menelaus_irq(int irq, void *_menelaus) |
| 806 | { |
| 807 | struct menelaus_chip *menelaus = _menelaus; |
| 808 | |
| 809 | disable_irq_nosync(irq); |
| 810 | (void)schedule_work(&menelaus->work); |
| 811 | |
| 812 | return IRQ_HANDLED; |
| 813 | } |
| 814 | |
| 815 | /*-----------------------------------------------------------------------*/ |
| 816 | |
| 817 | /* |
| 818 | * The RTC needs to be set once, then it runs on backup battery power. |
| 819 | * It supports alarms, including system wake alarms (from some modes); |
| 820 | * and 1/second IRQs if requested. |
| 821 | */ |
| 822 | #ifdef CONFIG_RTC_DRV_TWL92330 |
| 823 | |
| 824 | #define RTC_CTRL_RTC_EN (1 << 0) |
| 825 | #define RTC_CTRL_AL_EN (1 << 1) |
| 826 | #define RTC_CTRL_MODE12 (1 << 2) |
| 827 | #define RTC_CTRL_EVERY_MASK (3 << 3) |
| 828 | #define RTC_CTRL_EVERY_SEC (0 << 3) |
| 829 | #define RTC_CTRL_EVERY_MIN (1 << 3) |
| 830 | #define RTC_CTRL_EVERY_HR (2 << 3) |
| 831 | #define RTC_CTRL_EVERY_DAY (3 << 3) |
| 832 | |
| 833 | #define RTC_UPDATE_EVERY 0x08 |
| 834 | |
| 835 | #define RTC_HR_PM (1 << 7) |
| 836 | |
| 837 | static void menelaus_to_time(char *regs, struct rtc_time *t) |
| 838 | { |
| 839 | t->tm_sec = BCD2BIN(regs[0]); |
| 840 | t->tm_min = BCD2BIN(regs[1]); |
| 841 | if (the_menelaus->rtc_control & RTC_CTRL_MODE12) { |
| 842 | t->tm_hour = BCD2BIN(regs[2] & 0x1f) - 1; |
| 843 | if (regs[2] & RTC_HR_PM) |
| 844 | t->tm_hour += 12; |
| 845 | } else |
| 846 | t->tm_hour = BCD2BIN(regs[2] & 0x3f); |
| 847 | t->tm_mday = BCD2BIN(regs[3]); |
| 848 | t->tm_mon = BCD2BIN(regs[4]) - 1; |
| 849 | t->tm_year = BCD2BIN(regs[5]) + 100; |
| 850 | } |
| 851 | |
| 852 | static int time_to_menelaus(struct rtc_time *t, int regnum) |
| 853 | { |
| 854 | int hour, status; |
| 855 | |
| 856 | status = menelaus_write_reg(regnum++, BIN2BCD(t->tm_sec)); |
| 857 | if (status < 0) |
| 858 | goto fail; |
| 859 | |
| 860 | status = menelaus_write_reg(regnum++, BIN2BCD(t->tm_min)); |
| 861 | if (status < 0) |
| 862 | goto fail; |
| 863 | |
| 864 | if (the_menelaus->rtc_control & RTC_CTRL_MODE12) { |
| 865 | hour = t->tm_hour + 1; |
| 866 | if (hour > 12) |
| 867 | hour = RTC_HR_PM | BIN2BCD(hour - 12); |
| 868 | else |
| 869 | hour = BIN2BCD(hour); |
| 870 | } else |
| 871 | hour = BIN2BCD(t->tm_hour); |
| 872 | status = menelaus_write_reg(regnum++, hour); |
| 873 | if (status < 0) |
| 874 | goto fail; |
| 875 | |
| 876 | status = menelaus_write_reg(regnum++, BIN2BCD(t->tm_mday)); |
| 877 | if (status < 0) |
| 878 | goto fail; |
| 879 | |
| 880 | status = menelaus_write_reg(regnum++, BIN2BCD(t->tm_mon + 1)); |
| 881 | if (status < 0) |
| 882 | goto fail; |
| 883 | |
| 884 | status = menelaus_write_reg(regnum++, BIN2BCD(t->tm_year - 100)); |
| 885 | if (status < 0) |
| 886 | goto fail; |
| 887 | |
| 888 | return 0; |
| 889 | fail: |
| 890 | dev_err(&the_menelaus->client->dev, "rtc write reg %02x, err %d\n", |
| 891 | --regnum, status); |
| 892 | return status; |
| 893 | } |
| 894 | |
| 895 | static int menelaus_read_time(struct device *dev, struct rtc_time *t) |
| 896 | { |
| 897 | struct i2c_msg msg[2]; |
| 898 | char regs[7]; |
| 899 | int status; |
| 900 | |
| 901 | /* block read date and time registers */ |
| 902 | regs[0] = MENELAUS_RTC_SEC; |
| 903 | |
| 904 | msg[0].addr = MENELAUS_I2C_ADDRESS; |
| 905 | msg[0].flags = 0; |
| 906 | msg[0].len = 1; |
| 907 | msg[0].buf = regs; |
| 908 | |
| 909 | msg[1].addr = MENELAUS_I2C_ADDRESS; |
| 910 | msg[1].flags = I2C_M_RD; |
| 911 | msg[1].len = sizeof(regs); |
| 912 | msg[1].buf = regs; |
| 913 | |
| 914 | status = i2c_transfer(the_menelaus->client->adapter, msg, 2); |
| 915 | if (status != 2) { |
| 916 | dev_err(dev, "%s error %d\n", "read", status); |
| 917 | return -EIO; |
| 918 | } |
| 919 | |
| 920 | menelaus_to_time(regs, t); |
| 921 | t->tm_wday = BCD2BIN(regs[6]); |
| 922 | |
| 923 | return 0; |
| 924 | } |
| 925 | |
| 926 | static int menelaus_set_time(struct device *dev, struct rtc_time *t) |
| 927 | { |
| 928 | int status; |
| 929 | |
| 930 | /* write date and time registers */ |
| 931 | status = time_to_menelaus(t, MENELAUS_RTC_SEC); |
| 932 | if (status < 0) |
| 933 | return status; |
| 934 | status = menelaus_write_reg(MENELAUS_RTC_WKDAY, BIN2BCD(t->tm_wday)); |
| 935 | if (status < 0) { |
| 936 | dev_err(&the_menelaus->client->dev, "rtc write reg %02x", |
| 937 | "err %d\n", MENELAUS_RTC_WKDAY, status); |
| 938 | return status; |
| 939 | } |
| 940 | |
| 941 | /* now commit the write */ |
| 942 | status = menelaus_write_reg(MENELAUS_RTC_UPDATE, RTC_UPDATE_EVERY); |
| 943 | if (status < 0) |
| 944 | dev_err(&the_menelaus->client->dev, "rtc commit time, err %d\n", |
| 945 | status); |
| 946 | |
| 947 | return 0; |
| 948 | } |
| 949 | |
| 950 | static int menelaus_read_alarm(struct device *dev, struct rtc_wkalrm *w) |
| 951 | { |
| 952 | struct i2c_msg msg[2]; |
| 953 | char regs[6]; |
| 954 | int status; |
| 955 | |
| 956 | /* block read alarm registers */ |
| 957 | regs[0] = MENELAUS_RTC_AL_SEC; |
| 958 | |
| 959 | msg[0].addr = MENELAUS_I2C_ADDRESS; |
| 960 | msg[0].flags = 0; |
| 961 | msg[0].len = 1; |
| 962 | msg[0].buf = regs; |
| 963 | |
| 964 | msg[1].addr = MENELAUS_I2C_ADDRESS; |
| 965 | msg[1].flags = I2C_M_RD; |
| 966 | msg[1].len = sizeof(regs); |
| 967 | msg[1].buf = regs; |
| 968 | |
| 969 | status = i2c_transfer(the_menelaus->client->adapter, msg, 2); |
| 970 | if (status != 2) { |
| 971 | dev_err(dev, "%s error %d\n", "alarm read", status); |
| 972 | return -EIO; |
| 973 | } |
| 974 | |
| 975 | menelaus_to_time(regs, &w->time); |
| 976 | |
| 977 | w->enabled = !!(the_menelaus->rtc_control & RTC_CTRL_AL_EN); |
| 978 | |
| 979 | /* NOTE we *could* check if actually pending... */ |
| 980 | w->pending = 0; |
| 981 | |
| 982 | return 0; |
| 983 | } |
| 984 | |
| 985 | static int menelaus_set_alarm(struct device *dev, struct rtc_wkalrm *w) |
| 986 | { |
| 987 | int status; |
| 988 | |
| 989 | if (the_menelaus->client->irq <= 0 && w->enabled) |
| 990 | return -ENODEV; |
| 991 | |
| 992 | /* clear previous alarm enable */ |
| 993 | if (the_menelaus->rtc_control & RTC_CTRL_AL_EN) { |
| 994 | the_menelaus->rtc_control &= ~RTC_CTRL_AL_EN; |
| 995 | status = menelaus_write_reg(MENELAUS_RTC_CTRL, |
| 996 | the_menelaus->rtc_control); |
| 997 | if (status < 0) |
| 998 | return status; |
| 999 | } |
| 1000 | |
| 1001 | /* write alarm registers */ |
| 1002 | status = time_to_menelaus(&w->time, MENELAUS_RTC_AL_SEC); |
| 1003 | if (status < 0) |
| 1004 | return status; |
| 1005 | |
| 1006 | /* enable alarm if requested */ |
| 1007 | if (w->enabled) { |
| 1008 | the_menelaus->rtc_control |= RTC_CTRL_AL_EN; |
| 1009 | status = menelaus_write_reg(MENELAUS_RTC_CTRL, |
| 1010 | the_menelaus->rtc_control); |
| 1011 | } |
| 1012 | |
| 1013 | return status; |
| 1014 | } |
| 1015 | |
| 1016 | #ifdef CONFIG_RTC_INTF_DEV |
| 1017 | |
| 1018 | static void menelaus_rtc_update_work(struct menelaus_chip *m) |
| 1019 | { |
| 1020 | /* report 1/sec update */ |
| 1021 | local_irq_disable(); |
| 1022 | rtc_update_irq(m->rtc, 1, RTC_IRQF | RTC_UF); |
| 1023 | local_irq_enable(); |
| 1024 | } |
| 1025 | |
| 1026 | static int menelaus_ioctl(struct device *dev, unsigned cmd, unsigned long arg) |
| 1027 | { |
| 1028 | int status; |
| 1029 | |
| 1030 | if (the_menelaus->client->irq <= 0) |
| 1031 | return -ENOIOCTLCMD; |
| 1032 | |
| 1033 | switch (cmd) { |
| 1034 | /* alarm IRQ */ |
| 1035 | case RTC_AIE_ON: |
| 1036 | if (the_menelaus->rtc_control & RTC_CTRL_AL_EN) |
| 1037 | return 0; |
| 1038 | the_menelaus->rtc_control |= RTC_CTRL_AL_EN; |
| 1039 | break; |
| 1040 | case RTC_AIE_OFF: |
| 1041 | if (!(the_menelaus->rtc_control & RTC_CTRL_AL_EN)) |
| 1042 | return 0; |
| 1043 | the_menelaus->rtc_control &= ~RTC_CTRL_AL_EN; |
| 1044 | break; |
| 1045 | /* 1/second "update" IRQ */ |
| 1046 | case RTC_UIE_ON: |
| 1047 | if (the_menelaus->uie) |
| 1048 | return 0; |
| 1049 | status = menelaus_remove_irq_work(MENELAUS_RTCTMR_IRQ); |
| 1050 | status = menelaus_add_irq_work(MENELAUS_RTCTMR_IRQ, |
| 1051 | menelaus_rtc_update_work); |
| 1052 | if (status == 0) |
| 1053 | the_menelaus->uie = 1; |
| 1054 | return status; |
| 1055 | case RTC_UIE_OFF: |
| 1056 | if (!the_menelaus->uie) |
| 1057 | return 0; |
| 1058 | status = menelaus_remove_irq_work(MENELAUS_RTCTMR_IRQ); |
| 1059 | if (status == 0) |
| 1060 | the_menelaus->uie = 0; |
| 1061 | return status; |
| 1062 | default: |
| 1063 | return -ENOIOCTLCMD; |
| 1064 | } |
| 1065 | return menelaus_write_reg(MENELAUS_RTC_CTRL, the_menelaus->rtc_control); |
| 1066 | } |
| 1067 | |
| 1068 | #else |
| 1069 | #define menelaus_ioctl NULL |
| 1070 | #endif |
| 1071 | |
| 1072 | /* REVISIT no compensation register support ... */ |
| 1073 | |
| 1074 | static const struct rtc_class_ops menelaus_rtc_ops = { |
| 1075 | .ioctl = menelaus_ioctl, |
| 1076 | .read_time = menelaus_read_time, |
| 1077 | .set_time = menelaus_set_time, |
| 1078 | .read_alarm = menelaus_read_alarm, |
| 1079 | .set_alarm = menelaus_set_alarm, |
| 1080 | }; |
| 1081 | |
| 1082 | static void menelaus_rtc_alarm_work(struct menelaus_chip *m) |
| 1083 | { |
| 1084 | /* report alarm */ |
| 1085 | local_irq_disable(); |
| 1086 | rtc_update_irq(m->rtc, 1, RTC_IRQF | RTC_AF); |
| 1087 | local_irq_enable(); |
| 1088 | |
| 1089 | /* then disable it; alarms are oneshot */ |
| 1090 | the_menelaus->rtc_control &= ~RTC_CTRL_AL_EN; |
| 1091 | menelaus_write_reg(MENELAUS_RTC_CTRL, the_menelaus->rtc_control); |
| 1092 | } |
| 1093 | |
| 1094 | static inline void menelaus_rtc_init(struct menelaus_chip *m) |
| 1095 | { |
| 1096 | int alarm = (m->client->irq > 0); |
| 1097 | |
| 1098 | /* assume 32KDETEN pin is pulled high */ |
| 1099 | if (!(menelaus_read_reg(MENELAUS_OSC_CTRL) & 0x80)) { |
| 1100 | dev_dbg(&m->client->dev, "no 32k oscillator\n"); |
| 1101 | return; |
| 1102 | } |
| 1103 | |
| 1104 | /* support RTC alarm; it can issue wakeups */ |
| 1105 | if (alarm) { |
| 1106 | if (menelaus_add_irq_work(MENELAUS_RTCALM_IRQ, |
| 1107 | menelaus_rtc_alarm_work) < 0) { |
| 1108 | dev_err(&m->client->dev, "can't handle RTC alarm\n"); |
| 1109 | return; |
| 1110 | } |
| 1111 | device_init_wakeup(&m->client->dev, 1); |
| 1112 | } |
| 1113 | |
| 1114 | /* be sure RTC is enabled; allow 1/sec irqs; leave 12hr mode alone */ |
| 1115 | m->rtc_control = menelaus_read_reg(MENELAUS_RTC_CTRL); |
| 1116 | if (!(m->rtc_control & RTC_CTRL_RTC_EN) |
| 1117 | || (m->rtc_control & RTC_CTRL_AL_EN) |
| 1118 | || (m->rtc_control & RTC_CTRL_EVERY_MASK)) { |
| 1119 | if (!(m->rtc_control & RTC_CTRL_RTC_EN)) { |
| 1120 | dev_warn(&m->client->dev, "rtc clock needs setting\n"); |
| 1121 | m->rtc_control |= RTC_CTRL_RTC_EN; |
| 1122 | } |
| 1123 | m->rtc_control &= ~RTC_CTRL_EVERY_MASK; |
| 1124 | m->rtc_control &= ~RTC_CTRL_AL_EN; |
| 1125 | menelaus_write_reg(MENELAUS_RTC_CTRL, m->rtc_control); |
| 1126 | } |
| 1127 | |
| 1128 | m->rtc = rtc_device_register(DRIVER_NAME, |
| 1129 | &m->client->dev, |
| 1130 | &menelaus_rtc_ops, THIS_MODULE); |
| 1131 | if (IS_ERR(m->rtc)) { |
| 1132 | if (alarm) { |
| 1133 | menelaus_remove_irq_work(MENELAUS_RTCALM_IRQ); |
| 1134 | device_init_wakeup(&m->client->dev, 0); |
| 1135 | } |
| 1136 | dev_err(&m->client->dev, "can't register RTC: %d\n", |
| 1137 | (int) PTR_ERR(m->rtc)); |
| 1138 | the_menelaus->rtc = NULL; |
| 1139 | } |
| 1140 | } |
| 1141 | |
| 1142 | #else |
| 1143 | |
| 1144 | static inline void menelaus_rtc_init(struct menelaus_chip *m) |
| 1145 | { |
| 1146 | /* nothing */ |
| 1147 | } |
| 1148 | |
| 1149 | #endif |
| 1150 | |
| 1151 | /*-----------------------------------------------------------------------*/ |
| 1152 | |
| 1153 | static struct i2c_driver menelaus_i2c_driver; |
| 1154 | |
| 1155 | static int menelaus_probe(struct i2c_client *client) |
| 1156 | { |
| 1157 | struct menelaus_chip *menelaus; |
| 1158 | int rev = 0, val; |
| 1159 | int err = 0; |
| 1160 | struct menelaus_platform_data *menelaus_pdata = |
| 1161 | client->dev.platform_data; |
| 1162 | |
| 1163 | if (the_menelaus) { |
| 1164 | dev_dbg(&client->dev, "only one %s for now\n", |
| 1165 | DRIVER_NAME); |
| 1166 | return -ENODEV; |
| 1167 | } |
| 1168 | |
| 1169 | menelaus = kzalloc(sizeof *menelaus, GFP_KERNEL); |
| 1170 | if (!menelaus) |
| 1171 | return -ENOMEM; |
| 1172 | |
| 1173 | i2c_set_clientdata(client, menelaus); |
| 1174 | |
| 1175 | the_menelaus = menelaus; |
| 1176 | menelaus->client = client; |
| 1177 | |
| 1178 | /* If a true probe check the device */ |
| 1179 | rev = menelaus_read_reg(MENELAUS_REV); |
| 1180 | if (rev < 0) { |
| 1181 | pr_err("device not found"); |
| 1182 | err = -ENODEV; |
| 1183 | goto fail1; |
| 1184 | } |
| 1185 | |
| 1186 | /* Ack and disable all Menelaus interrupts */ |
| 1187 | menelaus_write_reg(MENELAUS_INT_ACK1, 0xff); |
| 1188 | menelaus_write_reg(MENELAUS_INT_ACK2, 0xff); |
| 1189 | menelaus_write_reg(MENELAUS_INT_MASK1, 0xff); |
| 1190 | menelaus_write_reg(MENELAUS_INT_MASK2, 0xff); |
| 1191 | menelaus->mask1 = 0xff; |
| 1192 | menelaus->mask2 = 0xff; |
| 1193 | |
| 1194 | /* Set output buffer strengths */ |
| 1195 | menelaus_write_reg(MENELAUS_MCT_CTRL1, 0x73); |
| 1196 | |
| 1197 | if (client->irq > 0) { |
| 1198 | err = request_irq(client->irq, menelaus_irq, IRQF_DISABLED, |
| 1199 | DRIVER_NAME, menelaus); |
| 1200 | if (err) { |
| 1201 | dev_dbg(&client->dev, "can't get IRQ %d, err %d", |
| 1202 | client->irq, err); |
| 1203 | goto fail1; |
| 1204 | } |
| 1205 | } |
| 1206 | |
| 1207 | mutex_init(&menelaus->lock); |
| 1208 | INIT_WORK(&menelaus->work, menelaus_work); |
| 1209 | |
| 1210 | pr_info("Menelaus rev %d.%d\n", rev >> 4, rev & 0x0f); |
| 1211 | |
| 1212 | val = menelaus_read_reg(MENELAUS_VCORE_CTRL1); |
| 1213 | if (val < 0) |
| 1214 | goto fail2; |
| 1215 | if (val & (1 << 7)) |
| 1216 | menelaus->vcore_hw_mode = 1; |
| 1217 | else |
| 1218 | menelaus->vcore_hw_mode = 0; |
| 1219 | |
| 1220 | if (menelaus_pdata != NULL && menelaus_pdata->late_init != NULL) { |
| 1221 | err = menelaus_pdata->late_init(&client->dev); |
| 1222 | if (err < 0) |
| 1223 | goto fail2; |
| 1224 | } |
| 1225 | |
| 1226 | menelaus_rtc_init(menelaus); |
| 1227 | |
| 1228 | return 0; |
| 1229 | fail2: |
| 1230 | free_irq(client->irq, menelaus); |
| 1231 | flush_scheduled_work(); |
| 1232 | fail1: |
| 1233 | kfree(menelaus); |
| 1234 | return err; |
| 1235 | } |
| 1236 | |
| 1237 | static int __exit menelaus_remove(struct i2c_client *client) |
| 1238 | { |
| 1239 | struct menelaus_chip *menelaus = i2c_get_clientdata(client); |
| 1240 | |
| 1241 | free_irq(client->irq, menelaus); |
| 1242 | kfree(menelaus); |
| 1243 | i2c_set_clientdata(client, NULL); |
| 1244 | the_menelaus = NULL; |
| 1245 | return 0; |
| 1246 | } |
| 1247 | |
| 1248 | static struct i2c_driver menelaus_i2c_driver = { |
| 1249 | .driver = { |
| 1250 | .name = DRIVER_NAME, |
| 1251 | }, |
| 1252 | .probe = menelaus_probe, |
| 1253 | .remove = __exit_p(menelaus_remove), |
| 1254 | }; |
| 1255 | |
| 1256 | static int __init menelaus_init(void) |
| 1257 | { |
| 1258 | int res; |
| 1259 | |
| 1260 | res = i2c_add_driver(&menelaus_i2c_driver); |
| 1261 | if (res < 0) { |
| 1262 | pr_err("driver registration failed\n"); |
| 1263 | return res; |
| 1264 | } |
| 1265 | |
| 1266 | return 0; |
| 1267 | } |
| 1268 | |
| 1269 | static void __exit menelaus_exit(void) |
| 1270 | { |
| 1271 | i2c_del_driver(&menelaus_i2c_driver); |
| 1272 | |
| 1273 | /* FIXME: Shutdown menelaus parts that can be shut down */ |
| 1274 | } |
| 1275 | |
| 1276 | MODULE_AUTHOR("Texas Instruments, Inc. (and others)"); |
| 1277 | MODULE_DESCRIPTION("I2C interface for Menelaus."); |
| 1278 | MODULE_LICENSE("GPL"); |
| 1279 | |
| 1280 | module_init(menelaus_init); |
| 1281 | module_exit(menelaus_exit); |