blob: ec48d562c7fc62306bbde93f1bf08527b81f4e4c [file] [log] [blame]
Dave Airlie0e32b392014-05-02 14:02:48 +10001/*
2 * Copyright © 2008 Intel Corporation
3 * 2014 Red Hat Inc.
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
22 * IN THE SOFTWARE.
23 *
24 */
25
26#include <drm/drmP.h>
27#include "i915_drv.h"
28#include "intel_drv.h"
29#include <drm/drm_crtc_helper.h>
30#include <drm/drm_edid.h>
31
32static bool intel_dp_mst_compute_config(struct intel_encoder *encoder,
33 struct intel_crtc_config *pipe_config)
34{
35 struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
36 struct intel_digital_port *intel_dig_port = intel_mst->primary;
37 struct intel_dp *intel_dp = &intel_dig_port->dp;
38 struct drm_device *dev = encoder->base.dev;
39 int bpp;
40 int lane_count, slots;
41 struct drm_display_mode *adjusted_mode = &pipe_config->adjusted_mode;
42 struct intel_connector *found = NULL, *intel_connector;
43 int mst_pbn;
44
45 pipe_config->dp_encoder_is_mst = true;
46 pipe_config->has_pch_encoder = false;
47 pipe_config->has_dp_encoder = true;
48 bpp = 24;
49 /*
50 * for MST we always configure max link bw - the spec doesn't
51 * seem to suggest we should do otherwise.
52 */
53 lane_count = drm_dp_max_lane_count(intel_dp->dpcd);
54 intel_dp->link_bw = intel_dp_max_link_bw(intel_dp);
55 intel_dp->lane_count = lane_count;
56
57 pipe_config->pipe_bpp = 24;
58 pipe_config->port_clock = drm_dp_bw_code_to_link_rate(intel_dp->link_bw);
59
60 list_for_each_entry(intel_connector, &dev->mode_config.connector_list, base.head) {
61 if (intel_connector->new_encoder == encoder) {
62 found = intel_connector;
63 break;
64 }
65 }
66
67 if (!found) {
68 DRM_ERROR("can't find connector\n");
69 return false;
70 }
71
72 mst_pbn = drm_dp_calc_pbn_mode(adjusted_mode->clock, bpp);
73
74 pipe_config->pbn = mst_pbn;
75 slots = drm_dp_find_vcpi_slots(&intel_dp->mst_mgr, mst_pbn);
76
77 intel_link_compute_m_n(bpp, lane_count,
78 adjusted_mode->crtc_clock,
79 pipe_config->port_clock,
80 &pipe_config->dp_m_n);
81
82 pipe_config->dp_m_n.tu = slots;
83 return true;
84
85}
86
87static void intel_mst_disable_dp(struct intel_encoder *encoder)
88{
89 struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
90 struct intel_digital_port *intel_dig_port = intel_mst->primary;
91 struct intel_dp *intel_dp = &intel_dig_port->dp;
92 int ret;
93
94 DRM_DEBUG_KMS("%d\n", intel_dp->active_mst_links);
95
96 drm_dp_mst_reset_vcpi_slots(&intel_dp->mst_mgr, intel_mst->port);
97
98 ret = drm_dp_update_payload_part1(&intel_dp->mst_mgr);
99 if (ret) {
100 DRM_ERROR("failed to update payload %d\n", ret);
101 }
102}
103
104static void intel_mst_post_disable_dp(struct intel_encoder *encoder)
105{
106 struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
107 struct intel_digital_port *intel_dig_port = intel_mst->primary;
108 struct intel_dp *intel_dp = &intel_dig_port->dp;
109
110 DRM_DEBUG_KMS("%d\n", intel_dp->active_mst_links);
111
112 /* this can fail */
113 drm_dp_check_act_status(&intel_dp->mst_mgr);
114 /* and this can also fail */
115 drm_dp_update_payload_part2(&intel_dp->mst_mgr);
116
117 drm_dp_mst_deallocate_vcpi(&intel_dp->mst_mgr, intel_mst->port);
118
119 intel_dp->active_mst_links--;
120 intel_mst->port = NULL;
121 if (intel_dp->active_mst_links == 0) {
122 intel_dig_port->base.post_disable(&intel_dig_port->base);
123 intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_OFF);
124 }
125}
126
127static void intel_mst_pre_enable_dp(struct intel_encoder *encoder)
128{
129 struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
130 struct intel_digital_port *intel_dig_port = intel_mst->primary;
131 struct intel_dp *intel_dp = &intel_dig_port->dp;
132 struct drm_device *dev = encoder->base.dev;
133 struct drm_i915_private *dev_priv = dev->dev_private;
134 enum port port = intel_dig_port->port;
135 int ret;
136 uint32_t temp;
137 struct intel_connector *found = NULL, *intel_connector;
138 int slots;
139 struct drm_crtc *crtc = encoder->base.crtc;
140 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
141
142 list_for_each_entry(intel_connector, &dev->mode_config.connector_list, base.head) {
143 if (intel_connector->new_encoder == encoder) {
144 found = intel_connector;
145 break;
146 }
147 }
148
149 if (!found) {
150 DRM_ERROR("can't find connector\n");
151 return;
152 }
153
154 DRM_DEBUG_KMS("%d\n", intel_dp->active_mst_links);
155 intel_mst->port = found->port;
156
157 if (intel_dp->active_mst_links == 0) {
158 enum port port = intel_ddi_get_encoder_port(encoder);
159
160 I915_WRITE(PORT_CLK_SEL(port), intel_crtc->config.ddi_pll_sel);
161
162 intel_ddi_init_dp_buf_reg(&intel_dig_port->base);
163
164 intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_ON);
165
166
167 intel_dp_start_link_train(intel_dp);
168 intel_dp_complete_link_train(intel_dp);
169 intel_dp_stop_link_train(intel_dp);
170 }
171
172 ret = drm_dp_mst_allocate_vcpi(&intel_dp->mst_mgr,
173 intel_mst->port, intel_crtc->config.pbn, &slots);
174 if (ret == false) {
175 DRM_ERROR("failed to allocate vcpi\n");
176 return;
177 }
178
179
180 intel_dp->active_mst_links++;
181 temp = I915_READ(DP_TP_STATUS(port));
182 I915_WRITE(DP_TP_STATUS(port), temp);
183
184 ret = drm_dp_update_payload_part1(&intel_dp->mst_mgr);
185}
186
187static void intel_mst_enable_dp(struct intel_encoder *encoder)
188{
189 struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
190 struct intel_digital_port *intel_dig_port = intel_mst->primary;
191 struct intel_dp *intel_dp = &intel_dig_port->dp;
192 struct drm_device *dev = intel_dig_port->base.base.dev;
193 struct drm_i915_private *dev_priv = dev->dev_private;
194 enum port port = intel_dig_port->port;
195 int ret;
196
197 DRM_DEBUG_KMS("%d\n", intel_dp->active_mst_links);
198
199 if (wait_for((I915_READ(DP_TP_STATUS(port)) & DP_TP_STATUS_ACT_SENT),
200 1))
201 DRM_ERROR("Timed out waiting for ACT sent\n");
202
203 ret = drm_dp_check_act_status(&intel_dp->mst_mgr);
204
205 ret = drm_dp_update_payload_part2(&intel_dp->mst_mgr);
206}
207
208static bool intel_dp_mst_enc_get_hw_state(struct intel_encoder *encoder,
209 enum pipe *pipe)
210{
211 struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
212 *pipe = intel_mst->pipe;
213 if (intel_mst->port)
214 return true;
215 return false;
216}
217
218static void intel_dp_mst_enc_get_config(struct intel_encoder *encoder,
219 struct intel_crtc_config *pipe_config)
220{
221 struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
222 struct intel_digital_port *intel_dig_port = intel_mst->primary;
223 struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc);
224 struct drm_device *dev = encoder->base.dev;
225 struct drm_i915_private *dev_priv = dev->dev_private;
226 enum transcoder cpu_transcoder = crtc->config.cpu_transcoder;
227 u32 temp, flags = 0;
228
229 pipe_config->has_dp_encoder = true;
230
231 temp = I915_READ(TRANS_DDI_FUNC_CTL(cpu_transcoder));
232 if (temp & TRANS_DDI_PHSYNC)
233 flags |= DRM_MODE_FLAG_PHSYNC;
234 else
235 flags |= DRM_MODE_FLAG_NHSYNC;
236 if (temp & TRANS_DDI_PVSYNC)
237 flags |= DRM_MODE_FLAG_PVSYNC;
238 else
239 flags |= DRM_MODE_FLAG_NVSYNC;
240
241 switch (temp & TRANS_DDI_BPC_MASK) {
242 case TRANS_DDI_BPC_6:
243 pipe_config->pipe_bpp = 18;
244 break;
245 case TRANS_DDI_BPC_8:
246 pipe_config->pipe_bpp = 24;
247 break;
248 case TRANS_DDI_BPC_10:
249 pipe_config->pipe_bpp = 30;
250 break;
251 case TRANS_DDI_BPC_12:
252 pipe_config->pipe_bpp = 36;
253 break;
254 default:
255 break;
256 }
257 pipe_config->adjusted_mode.flags |= flags;
258 intel_dp_get_m_n(crtc, pipe_config);
259
260 intel_ddi_clock_get(&intel_dig_port->base, pipe_config);
261}
262
263static int intel_dp_mst_get_ddc_modes(struct drm_connector *connector)
264{
265 struct intel_connector *intel_connector = to_intel_connector(connector);
266 struct intel_dp *intel_dp = intel_connector->mst_port;
267 struct edid *edid;
268 int ret;
269
270 edid = drm_dp_mst_get_edid(connector, &intel_dp->mst_mgr, intel_connector->port);
271 if (!edid)
272 return 0;
273
274 ret = intel_connector_update_modes(connector, edid);
275 kfree(edid);
276
277 return ret;
278}
279
280static enum drm_connector_status
281intel_mst_port_dp_detect(struct drm_connector *connector)
282{
283 struct intel_connector *intel_connector = to_intel_connector(connector);
284 struct intel_dp *intel_dp = intel_connector->mst_port;
285
286 return drm_dp_mst_detect_port(&intel_dp->mst_mgr, intel_connector->port);
287}
288
289static enum drm_connector_status
290intel_dp_mst_detect(struct drm_connector *connector, bool force)
291{
292 enum drm_connector_status status;
293 status = intel_mst_port_dp_detect(connector);
294 return status;
295}
296
297static int
298intel_dp_mst_set_property(struct drm_connector *connector,
299 struct drm_property *property,
300 uint64_t val)
301{
302 return 0;
303}
304
305static void
306intel_dp_mst_connector_destroy(struct drm_connector *connector)
307{
308 struct intel_connector *intel_connector = to_intel_connector(connector);
309
310 if (!IS_ERR_OR_NULL(intel_connector->edid))
311 kfree(intel_connector->edid);
312
313 drm_connector_cleanup(connector);
314 kfree(connector);
315}
316
317static const struct drm_connector_funcs intel_dp_mst_connector_funcs = {
318 .dpms = intel_connector_dpms,
319 .detect = intel_dp_mst_detect,
320 .fill_modes = drm_helper_probe_single_connector_modes,
321 .set_property = intel_dp_mst_set_property,
322 .destroy = intel_dp_mst_connector_destroy,
323};
324
325static int intel_dp_mst_get_modes(struct drm_connector *connector)
326{
327 return intel_dp_mst_get_ddc_modes(connector);
328}
329
330static enum drm_mode_status
331intel_dp_mst_mode_valid(struct drm_connector *connector,
332 struct drm_display_mode *mode)
333{
334 /* TODO - validate mode against available PBN for link */
335 if (mode->clock < 10000)
336 return MODE_CLOCK_LOW;
337
338 if (mode->flags & DRM_MODE_FLAG_DBLCLK)
339 return MODE_H_ILLEGAL;
340
341 return MODE_OK;
342}
343
344static struct drm_encoder *intel_mst_best_encoder(struct drm_connector *connector)
345{
346 struct intel_connector *intel_connector = to_intel_connector(connector);
347 struct intel_dp *intel_dp = intel_connector->mst_port;
348 return &intel_dp->mst_encoders[0]->base.base;
349}
350
351static const struct drm_connector_helper_funcs intel_dp_mst_connector_helper_funcs = {
352 .get_modes = intel_dp_mst_get_modes,
353 .mode_valid = intel_dp_mst_mode_valid,
354 .best_encoder = intel_mst_best_encoder,
355};
356
357static void intel_dp_mst_encoder_destroy(struct drm_encoder *encoder)
358{
359 struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
360
361 drm_encoder_cleanup(encoder);
362 kfree(intel_mst);
363}
364
365static const struct drm_encoder_funcs intel_dp_mst_enc_funcs = {
366 .destroy = intel_dp_mst_encoder_destroy,
367};
368
369static bool intel_dp_mst_get_hw_state(struct intel_connector *connector)
370{
371 if (connector->encoder) {
372 enum pipe pipe;
373 if (!connector->encoder->get_hw_state(connector->encoder, &pipe))
374 return false;
375 return true;
376 }
377 return false;
378}
379
380static struct drm_connector *intel_dp_add_mst_connector(struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_port *port, char *pathprop)
381{
382 struct intel_dp *intel_dp = container_of(mgr, struct intel_dp, mst_mgr);
383 struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
384 struct drm_device *dev = intel_dig_port->base.base.dev;
385 struct drm_i915_private *dev_priv = dev->dev_private;
386 struct intel_connector *intel_connector;
387 struct drm_connector *connector;
388 int i;
389
390 intel_connector = kzalloc(sizeof(*intel_connector), GFP_KERNEL);
391 if (!intel_connector)
392 return NULL;
393
394 connector = &intel_connector->base;
395 drm_connector_init(dev, connector, &intel_dp_mst_connector_funcs, DRM_MODE_CONNECTOR_DisplayPort);
396 drm_connector_helper_add(connector, &intel_dp_mst_connector_helper_funcs);
397
398 intel_connector->unregister = intel_connector_unregister;
399 intel_connector->get_hw_state = intel_dp_mst_get_hw_state;
400 intel_connector->mst_port = intel_dp;
401 intel_connector->port = port;
402
403 for (i = PIPE_A; i <= PIPE_C; i++) {
404 drm_mode_connector_attach_encoder(&intel_connector->base,
405 &intel_dp->mst_encoders[i]->base.base);
406 }
407 intel_dp_add_properties(intel_dp, connector);
408
409 drm_object_attach_property(&connector->base, dev->mode_config.path_property, 0);
410 drm_mode_connector_set_path_property(connector, pathprop);
411 drm_reinit_primary_mode_group(dev);
412 mutex_lock(&dev->mode_config.mutex);
413 drm_fb_helper_add_one_connector(&dev_priv->fbdev->helper, connector);
414 mutex_unlock(&dev->mode_config.mutex);
415 drm_connector_register(&intel_connector->base);
416 return connector;
417}
418
419static void intel_dp_destroy_mst_connector(struct drm_dp_mst_topology_mgr *mgr,
420 struct drm_connector *connector)
421{
422 struct intel_connector *intel_connector = to_intel_connector(connector);
423 struct drm_device *dev = connector->dev;
424 struct drm_i915_private *dev_priv = dev->dev_private;
425 /* need to nuke the connector */
426 mutex_lock(&dev->mode_config.mutex);
427 intel_connector_dpms(connector, DRM_MODE_DPMS_OFF);
428 mutex_unlock(&dev->mode_config.mutex);
429
430 intel_connector->unregister(intel_connector);
431
432 mutex_lock(&dev->mode_config.mutex);
433 drm_fb_helper_remove_one_connector(&dev_priv->fbdev->helper, connector);
434 drm_connector_cleanup(connector);
435 mutex_unlock(&dev->mode_config.mutex);
436
437 drm_reinit_primary_mode_group(dev);
438
439 kfree(intel_connector);
440 DRM_DEBUG_KMS("\n");
441}
442
443static void intel_dp_mst_hotplug(struct drm_dp_mst_topology_mgr *mgr)
444{
445 struct intel_dp *intel_dp = container_of(mgr, struct intel_dp, mst_mgr);
446 struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
447 struct drm_device *dev = intel_dig_port->base.base.dev;
448
449 drm_kms_helper_hotplug_event(dev);
450}
451
452static struct drm_dp_mst_topology_cbs mst_cbs = {
453 .add_connector = intel_dp_add_mst_connector,
454 .destroy_connector = intel_dp_destroy_mst_connector,
455 .hotplug = intel_dp_mst_hotplug,
456};
457
458static struct intel_dp_mst_encoder *
459intel_dp_create_fake_mst_encoder(struct intel_digital_port *intel_dig_port, enum pipe pipe)
460{
461 struct intel_dp_mst_encoder *intel_mst;
462 struct intel_encoder *intel_encoder;
463 struct drm_device *dev = intel_dig_port->base.base.dev;
464
465 intel_mst = kzalloc(sizeof(*intel_mst), GFP_KERNEL);
466
467 if (!intel_mst)
468 return NULL;
469
470 intel_mst->pipe = pipe;
471 intel_encoder = &intel_mst->base;
472 intel_mst->primary = intel_dig_port;
473
474 drm_encoder_init(dev, &intel_encoder->base, &intel_dp_mst_enc_funcs,
475 DRM_MODE_ENCODER_DPMST);
476
477 intel_encoder->type = INTEL_OUTPUT_DP_MST;
478 intel_encoder->crtc_mask = 0x7;
479 intel_encoder->cloneable = 0;
480
481 intel_encoder->compute_config = intel_dp_mst_compute_config;
482 intel_encoder->disable = intel_mst_disable_dp;
483 intel_encoder->post_disable = intel_mst_post_disable_dp;
484 intel_encoder->pre_enable = intel_mst_pre_enable_dp;
485 intel_encoder->enable = intel_mst_enable_dp;
486 intel_encoder->get_hw_state = intel_dp_mst_enc_get_hw_state;
487 intel_encoder->get_config = intel_dp_mst_enc_get_config;
488
489 return intel_mst;
490
491}
492
493static bool
494intel_dp_create_fake_mst_encoders(struct intel_digital_port *intel_dig_port)
495{
496 int i;
497 struct intel_dp *intel_dp = &intel_dig_port->dp;
498
499 for (i = PIPE_A; i <= PIPE_C; i++)
500 intel_dp->mst_encoders[i] = intel_dp_create_fake_mst_encoder(intel_dig_port, i);
501 return true;
502}
503
504int
505intel_dp_mst_encoder_init(struct intel_digital_port *intel_dig_port, int conn_base_id)
506{
507 struct intel_dp *intel_dp = &intel_dig_port->dp;
508 struct drm_device *dev = intel_dig_port->base.base.dev;
509 int ret;
510
511 intel_dp->can_mst = true;
512 intel_dp->mst_mgr.cbs = &mst_cbs;
513
514 /* create encoders */
515 intel_dp_create_fake_mst_encoders(intel_dig_port);
516 ret = drm_dp_mst_topology_mgr_init(&intel_dp->mst_mgr, dev->dev, &intel_dp->aux, 16, 3, conn_base_id);
517 if (ret) {
518 intel_dp->can_mst = false;
519 return ret;
520 }
521 return 0;
522}
523
524void
525intel_dp_mst_encoder_cleanup(struct intel_digital_port *intel_dig_port)
526{
527 struct intel_dp *intel_dp = &intel_dig_port->dp;
528
529 if (!intel_dp->can_mst)
530 return;
531
532 drm_dp_mst_topology_mgr_destroy(&intel_dp->mst_mgr);
533 /* encoders will get killed by normal cleanup */
534}