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Thomas Gleixner6eda5832009-05-01 18:29:57 +02001#ifndef _PERF_PERF_H
2#define _PERF_PERF_H
3
Arnaldo Carvalho de Melo895f0ed2010-03-11 20:12:41 -03004struct winsize;
5
6void get_term_dimensions(struct winsize *ws);
7
Vince Weaver11d15782009-07-08 17:46:14 -04008#if defined(__i386__)
9#include "../../arch/x86/include/asm/unistd.h"
10#define rmb() asm volatile("lock; addl $0,0(%%esp)" ::: "memory")
11#define cpu_relax() asm volatile("rep; nop" ::: "memory");
Stephane Eranianfbe96f22011-09-30 15:40:40 +020012#define CPUINFO_PROC "model name"
Vince Weaver11d15782009-07-08 17:46:14 -040013#endif
14
15#if defined(__x86_64__)
Peter Zijlstra1a482f32009-05-23 18:28:58 +020016#include "../../arch/x86/include/asm/unistd.h"
17#define rmb() asm volatile("lfence" ::: "memory")
18#define cpu_relax() asm volatile("rep; nop" ::: "memory");
Stephane Eranianfbe96f22011-09-30 15:40:40 +020019#define CPUINFO_PROC "model name"
Peter Zijlstra1a482f32009-05-23 18:28:58 +020020#endif
21
22#ifdef __powerpc__
23#include "../../arch/powerpc/include/asm/unistd.h"
24#define rmb() asm volatile ("sync" ::: "memory")
25#define cpu_relax() asm volatile ("" ::: "memory");
Stephane Eranianfbe96f22011-09-30 15:40:40 +020026#define CPUINFO_PROC "cpu"
Peter Zijlstra1a482f32009-05-23 18:28:58 +020027#endif
28
Martin Schwidefsky12310e92009-06-22 12:08:22 +020029#ifdef __s390__
30#include "../../arch/s390/include/asm/unistd.h"
31#define rmb() asm volatile("bcr 15,0" ::: "memory")
32#define cpu_relax() asm volatile("" ::: "memory");
33#endif
34
Paul Mundtfebe8342009-06-25 14:41:57 +090035#ifdef __sh__
36#include "../../arch/sh/include/asm/unistd.h"
37#if defined(__SH4A__) || defined(__SH5__)
38# define rmb() asm volatile("synco" ::: "memory")
39#else
40# define rmb() asm volatile("" ::: "memory")
41#endif
42#define cpu_relax() asm volatile("" ::: "memory")
Stephane Eranianfbe96f22011-09-30 15:40:40 +020043#define CPUINFO_PROC "cpu type"
Paul Mundtfebe8342009-06-25 14:41:57 +090044#endif
45
Kyle McMartin2d4618d2009-06-23 21:38:49 -040046#ifdef __hppa__
47#include "../../arch/parisc/include/asm/unistd.h"
48#define rmb() asm volatile("" ::: "memory")
49#define cpu_relax() asm volatile("" ::: "memory");
Stephane Eranianfbe96f22011-09-30 15:40:40 +020050#define CPUINFO_PROC "cpu"
Kyle McMartin2d4618d2009-06-23 21:38:49 -040051#endif
52
Jens Axboe825c9fb2009-09-04 02:56:22 -070053#ifdef __sparc__
54#include "../../arch/sparc/include/asm/unistd.h"
55#define rmb() asm volatile("":::"memory")
56#define cpu_relax() asm volatile("":::"memory")
Stephane Eranianfbe96f22011-09-30 15:40:40 +020057#define CPUINFO_PROC "cpu"
Jens Axboe825c9fb2009-09-04 02:56:22 -070058#endif
59
Michael Creefcd14b32009-10-26 21:32:06 +130060#ifdef __alpha__
61#include "../../arch/alpha/include/asm/unistd.h"
62#define rmb() asm volatile("mb" ::: "memory")
63#define cpu_relax() asm volatile("" ::: "memory")
Stephane Eranianfbe96f22011-09-30 15:40:40 +020064#define CPUINFO_PROC "cpu model"
Michael Creefcd14b32009-10-26 21:32:06 +130065#endif
66
Luck, Tony11ada262009-11-17 09:05:56 -080067#ifdef __ia64__
68#include "../../arch/ia64/include/asm/unistd.h"
69#define rmb() asm volatile ("mf" ::: "memory")
70#define cpu_relax() asm volatile ("hint @pause" ::: "memory")
Stephane Eranianfbe96f22011-09-30 15:40:40 +020071#define CPUINFO_PROC "model name"
Luck, Tony11ada262009-11-17 09:05:56 -080072#endif
73
Jamie Iles58e9f942009-12-11 12:20:09 +000074#ifdef __arm__
75#include "../../arch/arm/include/asm/unistd.h"
76/*
77 * Use the __kuser_memory_barrier helper in the CPU helper page. See
78 * arch/arm/kernel/entry-armv.S in the kernel source for details.
79 */
Will Deaconda7196e2010-03-03 11:47:58 +000080#define rmb() ((void(*)(void))0xffff0fa0)()
Jamie Iles58e9f942009-12-11 12:20:09 +000081#define cpu_relax() asm volatile("":::"memory")
Stephane Eranianfbe96f22011-09-30 15:40:40 +020082#define CPUINFO_PROC "Processor"
Jamie Iles58e9f942009-12-11 12:20:09 +000083#endif
84
Deng-Cheng Zhuc1e028e2010-10-12 19:33:33 +080085#ifdef __mips__
86#include "../../arch/mips/include/asm/unistd.h"
87#define rmb() asm volatile( \
88 ".set mips2\n\t" \
89 "sync\n\t" \
90 ".set mips0" \
91 : /* no output */ \
92 : /* no input */ \
93 : "memory")
94#define cpu_relax() asm volatile("" ::: "memory")
Stephane Eranianfbe96f22011-09-30 15:40:40 +020095#define CPUINFO_PROC "cpu model"
Deng-Cheng Zhuc1e028e2010-10-12 19:33:33 +080096#endif
97
Peter Zijlstra1a482f32009-05-23 18:28:58 +020098#include <time.h>
99#include <unistd.h>
100#include <sys/types.h>
101#include <sys/syscall.h>
102
Ingo Molnarcdd6c482009-09-21 12:02:48 +0200103#include "../../include/linux/perf_event.h"
Peter Zijlstra7c6a1c62009-06-25 17:05:54 +0200104#include "util/types.h"
Arnaldo Carvalho de Melo80354582010-05-17 15:51:10 -0300105#include <stdbool.h>
Peter Zijlstra1a482f32009-05-23 18:28:58 +0200106
Arnaldo Carvalho de Melo70082dd2011-01-12 17:03:24 -0200107struct perf_mmap {
108 void *base;
109 int mask;
110 unsigned int prev;
111};
112
113static inline unsigned int perf_mmap__read_head(struct perf_mmap *mm)
114{
115 struct perf_event_mmap_page *pc = mm->base;
116 int head = pc->data_head;
117 rmb();
118 return head;
119}
120
Arnaldo Carvalho de Melo115d2d82011-01-12 17:11:53 -0200121static inline void perf_mmap__write_tail(struct perf_mmap *md,
122 unsigned long tail)
123{
124 struct perf_event_mmap_page *pc = md->base;
125
126 /*
127 * ensure all reads are done before we write the tail out.
128 */
129 /* mb(); */
130 pc->data_tail = tail;
131}
132
Thomas Gleixner6eda5832009-05-01 18:29:57 +0200133/*
Ingo Molnarcdd6c482009-09-21 12:02:48 +0200134 * prctl(PR_TASK_PERF_EVENTS_DISABLE) will (cheaply) disable all
Thomas Gleixner6eda5832009-05-01 18:29:57 +0200135 * counters in the current task.
136 */
Ingo Molnarcdd6c482009-09-21 12:02:48 +0200137#define PR_TASK_PERF_EVENTS_DISABLE 31
138#define PR_TASK_PERF_EVENTS_ENABLE 32
Thomas Gleixner6eda5832009-05-01 18:29:57 +0200139
Thomas Gleixnera92e702372009-05-01 18:39:47 +0200140#ifndef NSEC_PER_SEC
141# define NSEC_PER_SEC 1000000000ULL
142#endif
143
144static inline unsigned long long rdclock(void)
145{
146 struct timespec ts;
147
148 clock_gettime(CLOCK_MONOTONIC, &ts);
149 return ts.tv_sec * 1000000000ULL + ts.tv_nsec;
150}
Thomas Gleixner6eda5832009-05-01 18:29:57 +0200151
152/*
153 * Pick up some kernel type conventions:
154 */
155#define __user
156#define asmlinkage
157
Thomas Gleixner6eda5832009-05-01 18:29:57 +0200158#define unlikely(x) __builtin_expect(!!(x), 0)
159#define min(x, y) ({ \
160 typeof(x) _min1 = (x); \
161 typeof(y) _min2 = (y); \
162 (void) (&_min1 == &_min2); \
163 _min1 < _min2 ? _min1 : _min2; })
164
165static inline int
Ingo Molnarcdd6c482009-09-21 12:02:48 +0200166sys_perf_event_open(struct perf_event_attr *attr,
Thomas Gleixner6eda5832009-05-01 18:29:57 +0200167 pid_t pid, int cpu, int group_fd,
168 unsigned long flags)
169{
Peter Zijlstra974802e2009-06-12 12:46:55 +0200170 attr->size = sizeof(*attr);
Ingo Molnarcdd6c482009-09-21 12:02:48 +0200171 return syscall(__NR_perf_event_open, attr, pid, cpu,
Thomas Gleixner6eda5832009-05-01 18:29:57 +0200172 group_fd, flags);
173}
174
Ingo Molnar85a9f922009-05-25 09:59:50 +0200175#define MAX_COUNTERS 256
176#define MAX_NR_CPUS 256
Thomas Gleixner6eda5832009-05-01 18:29:57 +0200177
Frederic Weisbecker8cb76d92009-06-26 16:28:00 +0200178struct ip_callchain {
179 u64 nr;
180 u64 ips[0];
Peter Zijlstraf5970552009-06-18 23:22:55 +0200181};
182
Arnaldo Carvalho de Melo80354582010-05-17 15:51:10 -0300183extern bool perf_host, perf_guest;
Stephane Eranianfbe96f22011-09-30 15:40:40 +0200184extern const char perf_version_string[];
Zhang, Yanmina1645ce2010-04-19 13:32:50 +0800185
Arnaldo Carvalho de Melo3af6e332011-10-13 08:52:46 -0300186void pthread__unblock_sigwinch(void);
187
Arnaldo Carvalho de Melo0f82ebc2011-11-08 14:41:57 -0200188struct perf_record_opts {
189 pid_t target_pid;
190 pid_t target_tid;
191 bool call_graph;
192 bool inherit_stat;
193 bool no_delay;
194 bool no_inherit;
195 bool no_samples;
196 bool raw_samples;
197 bool sample_address;
198 bool sample_time;
199 bool sample_id_all_avail;
200 bool system_wide;
201 unsigned int freq;
202 unsigned int user_freq;
203 u64 default_interval;
204 u64 user_interval;
205 const char *cpu_list;
206};
207
Thomas Gleixner6eda5832009-05-01 18:29:57 +0200208#endif