Grant Likely | 8e267f3 | 2011-07-19 17:26:54 -0600 | [diff] [blame] | 1 | /* |
| 2 | * nVidia Tegra device tree board support |
| 3 | * |
| 4 | * Copyright (C) 2010 Secret Lab Technologies, Ltd. |
| 5 | * Copyright (C) 2010 Google, Inc. |
| 6 | * |
| 7 | * This software is licensed under the terms of the GNU General Public |
| 8 | * License version 2, as published by the Free Software Foundation, and |
| 9 | * may be copied, distributed, and modified under those terms. |
| 10 | * |
| 11 | * This program is distributed in the hope that it will be useful, |
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 14 | * GNU General Public License for more details. |
| 15 | * |
| 16 | */ |
| 17 | |
| 18 | #include <linux/kernel.h> |
| 19 | #include <linux/init.h> |
| 20 | #include <linux/platform_device.h> |
| 21 | #include <linux/serial_8250.h> |
| 22 | #include <linux/clk.h> |
| 23 | #include <linux/dma-mapping.h> |
| 24 | #include <linux/irqdomain.h> |
| 25 | #include <linux/of.h> |
| 26 | #include <linux/of_address.h> |
| 27 | #include <linux/of_fdt.h> |
| 28 | #include <linux/of_irq.h> |
| 29 | #include <linux/of_platform.h> |
| 30 | #include <linux/pda_power.h> |
| 31 | #include <linux/io.h> |
| 32 | #include <linux/i2c.h> |
| 33 | #include <linux/i2c-tegra.h> |
| 34 | |
Marc Zyngier | afed2a2 | 2011-09-06 10:23:45 +0100 | [diff] [blame] | 35 | #include <asm/hardware/gic.h> |
Grant Likely | 8e267f3 | 2011-07-19 17:26:54 -0600 | [diff] [blame] | 36 | #include <asm/mach-types.h> |
| 37 | #include <asm/mach/arch.h> |
| 38 | #include <asm/mach/time.h> |
| 39 | #include <asm/setup.h> |
| 40 | |
| 41 | #include <mach/iomap.h> |
| 42 | #include <mach/irqs.h> |
| 43 | |
| 44 | #include "board.h" |
| 45 | #include "board-harmony.h" |
| 46 | #include "clock.h" |
| 47 | #include "devices.h" |
| 48 | |
Grant Likely | 8e267f3 | 2011-07-19 17:26:54 -0600 | [diff] [blame] | 49 | struct of_dev_auxdata tegra20_auxdata_lookup[] __initdata = { |
| 50 | OF_DEV_AUXDATA("nvidia,tegra20-sdhci", TEGRA_SDMMC1_BASE, "sdhci-tegra.0", NULL), |
| 51 | OF_DEV_AUXDATA("nvidia,tegra20-sdhci", TEGRA_SDMMC2_BASE, "sdhci-tegra.1", NULL), |
| 52 | OF_DEV_AUXDATA("nvidia,tegra20-sdhci", TEGRA_SDMMC3_BASE, "sdhci-tegra.2", NULL), |
| 53 | OF_DEV_AUXDATA("nvidia,tegra20-sdhci", TEGRA_SDMMC4_BASE, "sdhci-tegra.3", NULL), |
| 54 | OF_DEV_AUXDATA("nvidia,tegra20-i2c", TEGRA_I2C_BASE, "tegra-i2c.0", NULL), |
| 55 | OF_DEV_AUXDATA("nvidia,tegra20-i2c", TEGRA_I2C2_BASE, "tegra-i2c.1", NULL), |
| 56 | OF_DEV_AUXDATA("nvidia,tegra20-i2c", TEGRA_I2C3_BASE, "tegra-i2c.2", NULL), |
Stephen Warren | 0bc2ecb | 2011-12-17 23:29:31 -0700 | [diff] [blame] | 57 | OF_DEV_AUXDATA("nvidia,tegra20-i2c-dvc", TEGRA_DVC_BASE, "tegra-i2c.3", NULL), |
Stephen Warren | 896637a | 2012-04-06 10:30:52 -0600 | [diff] [blame] | 58 | OF_DEV_AUXDATA("nvidia,tegra20-i2s", TEGRA_I2S1_BASE, "tegra20-i2s.0", NULL), |
| 59 | OF_DEV_AUXDATA("nvidia,tegra20-i2s", TEGRA_I2S2_BASE, "tegra20-i2s.1", NULL), |
| 60 | OF_DEV_AUXDATA("nvidia,tegra20-das", TEGRA_APB_MISC_DAS_BASE, "tegra20-das", NULL), |
Olof Johansson | 4a53f4e | 2011-11-04 09:12:40 +0000 | [diff] [blame] | 61 | OF_DEV_AUXDATA("nvidia,tegra20-ehci", TEGRA_USB_BASE, "tegra-ehci.0", |
Stephen Warren | 8c3ec84 | 2012-03-19 13:57:13 -0600 | [diff] [blame] | 62 | &tegra_ehci1_pdata), |
Olof Johansson | 4a53f4e | 2011-11-04 09:12:40 +0000 | [diff] [blame] | 63 | OF_DEV_AUXDATA("nvidia,tegra20-ehci", TEGRA_USB2_BASE, "tegra-ehci.1", |
Stephen Warren | 8c3ec84 | 2012-03-19 13:57:13 -0600 | [diff] [blame] | 64 | &tegra_ehci2_pdata), |
Olof Johansson | 4a53f4e | 2011-11-04 09:12:40 +0000 | [diff] [blame] | 65 | OF_DEV_AUXDATA("nvidia,tegra20-ehci", TEGRA_USB3_BASE, "tegra-ehci.2", |
Stephen Warren | 8c3ec84 | 2012-03-19 13:57:13 -0600 | [diff] [blame] | 66 | &tegra_ehci3_pdata), |
Thierry Reding | 140fd97 | 2011-12-21 08:04:13 +0100 | [diff] [blame^] | 67 | OF_DEV_AUXDATA("nvidia,tegra20-pwm", TEGRA_PWFM_BASE, "tegra-pwm", NULL), |
Grant Likely | 8e267f3 | 2011-07-19 17:26:54 -0600 | [diff] [blame] | 68 | {} |
| 69 | }; |
| 70 | |
| 71 | static __initdata struct tegra_clk_init_table tegra_dt_clk_init_table[] = { |
| 72 | /* name parent rate enabled */ |
| 73 | { "uartd", "pll_p", 216000000, true }, |
Olof Johansson | 4a53f4e | 2011-11-04 09:12:40 +0000 | [diff] [blame] | 74 | { "usbd", "clk_m", 12000000, false }, |
| 75 | { "usb2", "clk_m", 12000000, false }, |
| 76 | { "usb3", "clk_m", 12000000, false }, |
Stephen Warren | 586187e | 2011-12-07 15:13:42 -0700 | [diff] [blame] | 77 | { "pll_a", "pll_p_out1", 56448000, true }, |
| 78 | { "pll_a_out0", "pll_a", 11289600, true }, |
| 79 | { "cdev1", NULL, 0, true }, |
| 80 | { "i2s1", "pll_a_out0", 11289600, false}, |
| 81 | { "i2s2", "pll_a_out0", 11289600, false}, |
Grant Likely | 8e267f3 | 2011-07-19 17:26:54 -0600 | [diff] [blame] | 82 | { NULL, NULL, 0, 0}, |
| 83 | }; |
| 84 | |
| 85 | static struct of_device_id tegra_dt_match_table[] __initdata = { |
| 86 | { .compatible = "simple-bus", }, |
| 87 | {} |
| 88 | }; |
| 89 | |
Grant Likely | 8e267f3 | 2011-07-19 17:26:54 -0600 | [diff] [blame] | 90 | static void __init tegra_dt_init(void) |
| 91 | { |
Grant Likely | 8e267f3 | 2011-07-19 17:26:54 -0600 | [diff] [blame] | 92 | tegra_clk_init_from_table(tegra_dt_clk_init_table); |
| 93 | |
Stephen Warren | a58116f | 2011-12-16 15:12:32 -0700 | [diff] [blame] | 94 | /* |
| 95 | * Finished with the static registrations now; fill in the missing |
| 96 | * devices |
| 97 | */ |
| 98 | of_platform_populate(NULL, tegra_dt_match_table, |
| 99 | tegra20_auxdata_lookup, NULL); |
Grant Likely | 8e267f3 | 2011-07-19 17:26:54 -0600 | [diff] [blame] | 100 | } |
| 101 | |
Peter De Schrijver | c37c07d | 2011-12-14 17:03:17 +0200 | [diff] [blame] | 102 | static const char *tegra20_dt_board_compat[] = { |
Stephen Warren | c5444f3 | 2012-02-27 18:26:16 -0700 | [diff] [blame] | 103 | "nvidia,tegra20", |
Grant Likely | 8e267f3 | 2011-07-19 17:26:54 -0600 | [diff] [blame] | 104 | NULL |
| 105 | }; |
| 106 | |
Peter De Schrijver | c37c07d | 2011-12-14 17:03:17 +0200 | [diff] [blame] | 107 | DT_MACHINE_START(TEGRA_DT, "nVidia Tegra20 (Flattened Device Tree)") |
Grant Likely | 8e267f3 | 2011-07-19 17:26:54 -0600 | [diff] [blame] | 108 | .map_io = tegra_map_common_io, |
Peter De Schrijver | c37c07d | 2011-12-14 17:03:17 +0200 | [diff] [blame] | 109 | .init_early = tegra20_init_early, |
pdeschrijver@nvidia.com | 0d4f747 | 2011-11-29 18:29:19 -0700 | [diff] [blame] | 110 | .init_irq = tegra_dt_init_irq, |
Marc Zyngier | afed2a2 | 2011-09-06 10:23:45 +0100 | [diff] [blame] | 111 | .handle_irq = gic_handle_irq, |
Grant Likely | 8e267f3 | 2011-07-19 17:26:54 -0600 | [diff] [blame] | 112 | .timer = &tegra_timer, |
| 113 | .init_machine = tegra_dt_init, |
Shawn Guo | 390e0cf | 2012-05-02 17:08:06 +0800 | [diff] [blame] | 114 | .init_late = tegra_init_late, |
Russell King | abea3f2 | 2011-11-05 08:48:33 +0000 | [diff] [blame] | 115 | .restart = tegra_assert_system_reset, |
Peter De Schrijver | c37c07d | 2011-12-14 17:03:17 +0200 | [diff] [blame] | 116 | .dt_compat = tegra20_dt_board_compat, |
Grant Likely | 8e267f3 | 2011-07-19 17:26:54 -0600 | [diff] [blame] | 117 | MACHINE_END |