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Mike Marciniszyn77241052015-07-30 15:17:43 -04001/*
Jubin John05d6ac12016-02-14 20:22:17 -08002 * Copyright(c) 2015, 2016 Intel Corporation.
Mike Marciniszyn77241052015-07-30 15:17:43 -04003 *
4 * This file is provided under a dual BSD/GPLv2 license. When using or
5 * redistributing this file, you may do so under either license.
6 *
7 * GPL LICENSE SUMMARY
8 *
Mike Marciniszyn77241052015-07-30 15:17:43 -04009 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of version 2 of the GNU General Public License as
11 * published by the Free Software Foundation.
12 *
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * General Public License for more details.
17 *
18 * BSD LICENSE
19 *
Mike Marciniszyn77241052015-07-30 15:17:43 -040020 * Redistribution and use in source and binary forms, with or without
21 * modification, are permitted provided that the following conditions
22 * are met:
23 *
24 * - Redistributions of source code must retain the above copyright
25 * notice, this list of conditions and the following disclaimer.
26 * - Redistributions in binary form must reproduce the above copyright
27 * notice, this list of conditions and the following disclaimer in
28 * the documentation and/or other materials provided with the
29 * distribution.
30 * - Neither the name of Intel Corporation nor the names of its
31 * contributors may be used to endorse or promote products derived
32 * from this software without specific prior written permission.
33 *
34 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
35 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
36 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
37 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
38 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
39 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
40 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
41 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
42 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
43 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
44 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
45 *
46 */
47#include <linux/mm.h>
48#include <linux/types.h>
49#include <linux/device.h>
50#include <linux/dmapool.h>
51#include <linux/slab.h>
52#include <linux/list.h>
53#include <linux/highmem.h>
54#include <linux/io.h>
55#include <linux/uio.h>
56#include <linux/rbtree.h>
57#include <linux/spinlock.h>
58#include <linux/delay.h>
59#include <linux/kthread.h>
60#include <linux/mmu_context.h>
61#include <linux/module.h>
62#include <linux/vmalloc.h>
63
64#include "hfi.h"
65#include "sdma.h"
66#include "user_sdma.h"
Mike Marciniszyn77241052015-07-30 15:17:43 -040067#include "verbs.h" /* for the headers */
68#include "common.h" /* for struct hfi1_tid_info */
69#include "trace.h"
Mitko Haralanov5cd3a88d2016-03-08 11:15:22 -080070#include "mmu_rb.h"
Mike Marciniszyn77241052015-07-30 15:17:43 -040071
72static uint hfi1_sdma_comp_ring_size = 128;
73module_param_named(sdma_comp_size, hfi1_sdma_comp_ring_size, uint, S_IRUGO);
74MODULE_PARM_DESC(sdma_comp_size, "Size of User SDMA completion ring. Default: 128");
75
76/* The maximum number of Data io vectors per message/request */
77#define MAX_VECTORS_PER_REQ 8
78/*
79 * Maximum number of packet to send from each message/request
80 * before moving to the next one.
81 */
82#define MAX_PKTS_PER_QUEUE 16
83
84#define num_pages(x) (1 + ((((x) - 1) & PAGE_MASK) >> PAGE_SHIFT))
85
86#define req_opcode(x) \
87 (((x) >> HFI1_SDMA_REQ_OPCODE_SHIFT) & HFI1_SDMA_REQ_OPCODE_MASK)
88#define req_version(x) \
89 (((x) >> HFI1_SDMA_REQ_VERSION_SHIFT) & HFI1_SDMA_REQ_OPCODE_MASK)
90#define req_iovcnt(x) \
91 (((x) >> HFI1_SDMA_REQ_IOVCNT_SHIFT) & HFI1_SDMA_REQ_IOVCNT_MASK)
92
93/* Number of BTH.PSN bits used for sequence number in expected rcvs */
94#define BTH_SEQ_MASK 0x7ffull
95
96/*
97 * Define fields in the KDETH header so we can update the header
98 * template.
99 */
100#define KDETH_OFFSET_SHIFT 0
101#define KDETH_OFFSET_MASK 0x7fff
102#define KDETH_OM_SHIFT 15
103#define KDETH_OM_MASK 0x1
104#define KDETH_TID_SHIFT 16
105#define KDETH_TID_MASK 0x3ff
106#define KDETH_TIDCTRL_SHIFT 26
107#define KDETH_TIDCTRL_MASK 0x3
108#define KDETH_INTR_SHIFT 28
109#define KDETH_INTR_MASK 0x1
110#define KDETH_SH_SHIFT 29
111#define KDETH_SH_MASK 0x1
112#define KDETH_HCRC_UPPER_SHIFT 16
113#define KDETH_HCRC_UPPER_MASK 0xff
114#define KDETH_HCRC_LOWER_SHIFT 24
115#define KDETH_HCRC_LOWER_MASK 0xff
116
117#define PBC2LRH(x) ((((x) & 0xfff) << 2) - 4)
118#define LRH2PBC(x) ((((x) >> 2) + 1) & 0xfff)
119
120#define KDETH_GET(val, field) \
121 (((le32_to_cpu((val))) >> KDETH_##field##_SHIFT) & KDETH_##field##_MASK)
122#define KDETH_SET(dw, field, val) do { \
123 u32 dwval = le32_to_cpu(dw); \
124 dwval &= ~(KDETH_##field##_MASK << KDETH_##field##_SHIFT); \
125 dwval |= (((val) & KDETH_##field##_MASK) << \
126 KDETH_##field##_SHIFT); \
127 dw = cpu_to_le32(dwval); \
128 } while (0)
129
130#define AHG_HEADER_SET(arr, idx, dw, bit, width, value) \
131 do { \
132 if ((idx) < ARRAY_SIZE((arr))) \
133 (arr)[(idx++)] = sdma_build_ahg_descriptor( \
134 (__force u16)(value), (dw), (bit), \
135 (width)); \
136 else \
137 return -ERANGE; \
138 } while (0)
139
140/* KDETH OM multipliers and switch over point */
141#define KDETH_OM_SMALL 4
142#define KDETH_OM_LARGE 64
143#define KDETH_OM_MAX_SIZE (1 << ((KDETH_OM_LARGE / KDETH_OM_SMALL) + 1))
144
145/* Last packet in the request */
Sunny Kumarcb326492015-11-06 10:06:43 +0530146#define TXREQ_FLAGS_REQ_LAST_PKT BIT(0)
Mike Marciniszyn77241052015-07-30 15:17:43 -0400147
148#define SDMA_REQ_IN_USE 0
149#define SDMA_REQ_FOR_THREAD 1
150#define SDMA_REQ_SEND_DONE 2
151#define SDMA_REQ_HAVE_AHG 3
152#define SDMA_REQ_HAS_ERROR 4
153#define SDMA_REQ_DONE_ERROR 5
154
Sunny Kumarcb326492015-11-06 10:06:43 +0530155#define SDMA_PKT_Q_INACTIVE BIT(0)
156#define SDMA_PKT_Q_ACTIVE BIT(1)
157#define SDMA_PKT_Q_DEFERRED BIT(2)
Mike Marciniszyn77241052015-07-30 15:17:43 -0400158
159/*
160 * Maximum retry attempts to submit a TX request
161 * before putting the process to sleep.
162 */
163#define MAX_DEFER_RETRY_COUNT 1
164
165static unsigned initial_pkt_count = 8;
166
167#define SDMA_IOWAIT_TIMEOUT 1000 /* in milliseconds */
168
Mitko Haralanov9565c6a2016-05-19 05:21:18 -0700169struct sdma_mmu_node;
170
Mike Marciniszyn77241052015-07-30 15:17:43 -0400171struct user_sdma_iovec {
Mitko Haralanov0f2d87d2016-02-03 14:35:06 -0800172 struct list_head list;
Mike Marciniszyn77241052015-07-30 15:17:43 -0400173 struct iovec iov;
174 /* number of pages in this vector */
175 unsigned npages;
176 /* array of pinned pages for this vector */
177 struct page **pages;
Jubin John4d114fd2016-02-14 20:21:43 -0800178 /*
179 * offset into the virtual address space of the vector at
180 * which we last left off.
181 */
Mike Marciniszyn77241052015-07-30 15:17:43 -0400182 u64 offset;
Mitko Haralanov9565c6a2016-05-19 05:21:18 -0700183 struct sdma_mmu_node *node;
Mike Marciniszyn77241052015-07-30 15:17:43 -0400184};
185
Bart Van Assched55215c2016-06-03 12:10:37 -0700186#define SDMA_CACHE_NODE_EVICT 0
Mitko Haralanove88c9272016-04-12 10:46:53 -0700187
Mitko Haralanov5cd3a88d2016-03-08 11:15:22 -0800188struct sdma_mmu_node {
189 struct mmu_rb_node rb;
Mitko Haralanov5511d782016-03-08 11:15:44 -0800190 struct list_head list;
191 struct hfi1_user_sdma_pkt_q *pq;
Mitko Haralanov5cd3a88d2016-03-08 11:15:22 -0800192 atomic_t refcount;
193 struct page **pages;
194 unsigned npages;
Mitko Haralanove88c9272016-04-12 10:46:53 -0700195 unsigned long flags;
Mitko Haralanov5cd3a88d2016-03-08 11:15:22 -0800196};
197
Mike Marciniszyn77241052015-07-30 15:17:43 -0400198struct user_sdma_request {
199 struct sdma_req_info info;
200 struct hfi1_user_sdma_pkt_q *pq;
201 struct hfi1_user_sdma_comp_q *cq;
202 /* This is the original header from user space */
203 struct hfi1_pkt_header hdr;
204 /*
205 * Pointer to the SDMA engine for this request.
206 * Since different request could be on different VLs,
207 * each request will need it's own engine pointer.
208 */
209 struct sdma_engine *sde;
210 u8 ahg_idx;
211 u32 ahg[9];
212 /*
213 * KDETH.Offset (Eager) field
214 * We need to remember the initial value so the headers
215 * can be updated properly.
216 */
217 u32 koffset;
218 /*
219 * KDETH.OFFSET (TID) field
220 * The offset can cover multiple packets, depending on the
221 * size of the TID entry.
222 */
223 u32 tidoffset;
224 /*
225 * KDETH.OM
226 * Remember this because the header template always sets it
227 * to 0.
228 */
229 u8 omfactor;
230 /*
Mike Marciniszyn77241052015-07-30 15:17:43 -0400231 * We copy the iovs for this request (based on
232 * info.iovcnt). These are only the data vectors
233 */
234 unsigned data_iovs;
235 /* total length of the data in the request */
236 u32 data_len;
237 /* progress index moving along the iovs array */
238 unsigned iov_idx;
239 struct user_sdma_iovec iovs[MAX_VECTORS_PER_REQ];
240 /* number of elements copied to the tids array */
241 u16 n_tids;
242 /* TID array values copied from the tid_iov vector */
243 u32 *tids;
244 u16 tididx;
245 u32 sent;
246 u64 seqnum;
Mitko Haralanov0f2d87d2016-02-03 14:35:06 -0800247 u64 seqcomp;
Mitko Haralanovc7cbf2f2016-02-03 14:35:23 -0800248 u64 seqsubmitted;
Mike Marciniszyn77241052015-07-30 15:17:43 -0400249 struct list_head txps;
250 unsigned long flags;
Mitko Haralanova0d40692015-12-08 17:10:13 -0500251 /* status of the last txreq completed */
252 int status;
Mike Marciniszyn77241052015-07-30 15:17:43 -0400253};
254
Mitko Haralanovb9fb63182015-10-26 10:28:37 -0400255/*
256 * A single txreq could span up to 3 physical pages when the MTU
257 * is sufficiently large (> 4K). Each of the IOV pointers also
258 * needs it's own set of flags so the vector has been handled
259 * independently of each other.
260 */
Mike Marciniszyn77241052015-07-30 15:17:43 -0400261struct user_sdma_txreq {
262 /* Packet header for the txreq */
263 struct hfi1_pkt_header hdr;
264 struct sdma_txreq txreq;
Mitko Haralanova0d40692015-12-08 17:10:13 -0500265 struct list_head list;
Mike Marciniszyn77241052015-07-30 15:17:43 -0400266 struct user_sdma_request *req;
Mike Marciniszyn77241052015-07-30 15:17:43 -0400267 u16 flags;
268 unsigned busycount;
269 u64 seqnum;
270};
271
272#define SDMA_DBG(req, fmt, ...) \
273 hfi1_cdbg(SDMA, "[%u:%u:%u:%u] " fmt, (req)->pq->dd->unit, \
274 (req)->pq->ctxt, (req)->pq->subctxt, (req)->info.comp_idx, \
275 ##__VA_ARGS__)
276#define SDMA_Q_DBG(pq, fmt, ...) \
277 hfi1_cdbg(SDMA, "[%u:%u:%u] " fmt, (pq)->dd->unit, (pq)->ctxt, \
278 (pq)->subctxt, ##__VA_ARGS__)
279
280static int user_sdma_send_pkts(struct user_sdma_request *, unsigned);
281static int num_user_pages(const struct iovec *);
Mike Marciniszyna545f532016-02-14 12:45:53 -0800282static void user_sdma_txreq_cb(struct sdma_txreq *, int);
Mitko Haralanov0f2d87d2016-02-03 14:35:06 -0800283static inline void pq_update(struct hfi1_user_sdma_pkt_q *);
284static void user_sdma_free_request(struct user_sdma_request *, bool);
Mike Marciniszyn77241052015-07-30 15:17:43 -0400285static int pin_vector_pages(struct user_sdma_request *,
286 struct user_sdma_iovec *);
Mitko Haralanov849e3e92016-04-12 10:46:16 -0700287static void unpin_vector_pages(struct mm_struct *, struct page **, unsigned,
288 unsigned);
Mike Marciniszyn77241052015-07-30 15:17:43 -0400289static int check_header_template(struct user_sdma_request *,
290 struct hfi1_pkt_header *, u32, u32);
291static int set_txreq_header(struct user_sdma_request *,
292 struct user_sdma_txreq *, u32);
293static int set_txreq_header_ahg(struct user_sdma_request *,
294 struct user_sdma_txreq *, u32);
Mitko Haralanov0f2d87d2016-02-03 14:35:06 -0800295static inline void set_comp_state(struct hfi1_user_sdma_pkt_q *,
296 struct hfi1_user_sdma_comp_q *,
297 u16, enum hfi1_sdma_comp_state, int);
Mike Marciniszyn77241052015-07-30 15:17:43 -0400298static inline u32 set_pkt_bth_psn(__be32, u8, u32);
299static inline u32 get_lrh_len(struct hfi1_pkt_header, u32 len);
300
301static int defer_packet_queue(
302 struct sdma_engine *,
303 struct iowait *,
304 struct sdma_txreq *,
305 unsigned seq);
306static void activate_packet_queue(struct iowait *, int);
Mitko Haralanov5cd3a88d2016-03-08 11:15:22 -0800307static bool sdma_rb_filter(struct mmu_rb_node *, unsigned long, unsigned long);
308static int sdma_rb_insert(struct rb_root *, struct mmu_rb_node *);
Mitko Haralanovf19bd642016-04-12 10:45:57 -0700309static void sdma_rb_remove(struct rb_root *, struct mmu_rb_node *,
310 struct mm_struct *);
Mitko Haralanov5cd3a88d2016-03-08 11:15:22 -0800311static int sdma_rb_invalidate(struct rb_root *, struct mmu_rb_node *);
312
313static struct mmu_rb_ops sdma_rb_ops = {
314 .filter = sdma_rb_filter,
315 .insert = sdma_rb_insert,
316 .remove = sdma_rb_remove,
317 .invalidate = sdma_rb_invalidate
318};
Mike Marciniszyn77241052015-07-30 15:17:43 -0400319
Mike Marciniszyn77241052015-07-30 15:17:43 -0400320static int defer_packet_queue(
321 struct sdma_engine *sde,
322 struct iowait *wait,
323 struct sdma_txreq *txreq,
324 unsigned seq)
325{
326 struct hfi1_user_sdma_pkt_q *pq =
327 container_of(wait, struct hfi1_user_sdma_pkt_q, busy);
328 struct hfi1_ibdev *dev = &pq->dd->verbs_dev;
329 struct user_sdma_txreq *tx =
330 container_of(txreq, struct user_sdma_txreq, txreq);
331
332 if (sdma_progress(sde, seq, txreq)) {
333 if (tx->busycount++ < MAX_DEFER_RETRY_COUNT)
334 goto eagain;
335 }
336 /*
337 * We are assuming that if the list is enqueued somewhere, it
338 * is to the dmawait list since that is the only place where
339 * it is supposed to be enqueued.
340 */
341 xchg(&pq->state, SDMA_PKT_Q_DEFERRED);
342 write_seqlock(&dev->iowait_lock);
343 if (list_empty(&pq->busy.list))
344 list_add_tail(&pq->busy.list, &sde->dmawait);
345 write_sequnlock(&dev->iowait_lock);
346 return -EBUSY;
347eagain:
348 return -EAGAIN;
349}
350
351static void activate_packet_queue(struct iowait *wait, int reason)
352{
353 struct hfi1_user_sdma_pkt_q *pq =
354 container_of(wait, struct hfi1_user_sdma_pkt_q, busy);
355 xchg(&pq->state, SDMA_PKT_Q_ACTIVE);
356 wake_up(&wait->wait_dma);
357};
358
359static void sdma_kmem_cache_ctor(void *obj)
360{
Janani Ravichandran16ccad02016-02-25 15:08:17 -0500361 struct user_sdma_txreq *tx = obj;
Mike Marciniszyn77241052015-07-30 15:17:43 -0400362
363 memset(tx, 0, sizeof(*tx));
364}
365
366int hfi1_user_sdma_alloc_queues(struct hfi1_ctxtdata *uctxt, struct file *fp)
367{
Ira Weiny9e10af42015-10-30 18:58:40 -0400368 struct hfi1_filedata *fd;
Mike Marciniszyn77241052015-07-30 15:17:43 -0400369 int ret = 0;
370 unsigned memsize;
371 char buf[64];
372 struct hfi1_devdata *dd;
373 struct hfi1_user_sdma_comp_q *cq;
374 struct hfi1_user_sdma_pkt_q *pq;
375 unsigned long flags;
376
377 if (!uctxt || !fp) {
378 ret = -EBADF;
379 goto done;
380 }
381
Ira Weiny9e10af42015-10-30 18:58:40 -0400382 fd = fp->private_data;
383
Mike Marciniszyn77241052015-07-30 15:17:43 -0400384 if (!hfi1_sdma_comp_ring_size) {
385 ret = -EINVAL;
386 goto done;
387 }
388
389 dd = uctxt->dd;
390
391 pq = kzalloc(sizeof(*pq), GFP_KERNEL);
Alison Schofield806e6e12015-10-12 14:28:36 -0700392 if (!pq)
Mike Marciniszyn77241052015-07-30 15:17:43 -0400393 goto pq_nomem;
Alison Schofield806e6e12015-10-12 14:28:36 -0700394
Mike Marciniszyn77241052015-07-30 15:17:43 -0400395 memsize = sizeof(*pq->reqs) * hfi1_sdma_comp_ring_size;
Mitko Haralanov0f2d87d2016-02-03 14:35:06 -0800396 pq->reqs = kzalloc(memsize, GFP_KERNEL);
Alison Schofield806e6e12015-10-12 14:28:36 -0700397 if (!pq->reqs)
Mike Marciniszyn77241052015-07-30 15:17:43 -0400398 goto pq_reqs_nomem;
Alison Schofield806e6e12015-10-12 14:28:36 -0700399
Mike Marciniszyn77241052015-07-30 15:17:43 -0400400 INIT_LIST_HEAD(&pq->list);
401 pq->dd = dd;
402 pq->ctxt = uctxt->ctxt;
Ira Weiny9e10af42015-10-30 18:58:40 -0400403 pq->subctxt = fd->subctxt;
Mike Marciniszyn77241052015-07-30 15:17:43 -0400404 pq->n_max_reqs = hfi1_sdma_comp_ring_size;
405 pq->state = SDMA_PKT_Q_INACTIVE;
406 atomic_set(&pq->n_reqs, 0);
Mitko Haralanova0d40692015-12-08 17:10:13 -0500407 init_waitqueue_head(&pq->wait);
Mitko Haralanov5cd3a88d2016-03-08 11:15:22 -0800408 pq->sdma_rb_root = RB_ROOT;
Mitko Haralanov5511d782016-03-08 11:15:44 -0800409 INIT_LIST_HEAD(&pq->evict);
410 spin_lock_init(&pq->evict_lock);
Mike Marciniszyn77241052015-07-30 15:17:43 -0400411
412 iowait_init(&pq->busy, 0, NULL, defer_packet_queue,
Mike Marciniszyna545f532016-02-14 12:45:53 -0800413 activate_packet_queue, NULL);
Mike Marciniszyn77241052015-07-30 15:17:43 -0400414 pq->reqidx = 0;
415 snprintf(buf, 64, "txreq-kmem-cache-%u-%u-%u", dd->unit, uctxt->ctxt,
Ira Weiny9e10af42015-10-30 18:58:40 -0400416 fd->subctxt);
Mike Marciniszyn77241052015-07-30 15:17:43 -0400417 pq->txreq_cache = kmem_cache_create(buf,
418 sizeof(struct user_sdma_txreq),
419 L1_CACHE_BYTES,
420 SLAB_HWCACHE_ALIGN,
421 sdma_kmem_cache_ctor);
422 if (!pq->txreq_cache) {
423 dd_dev_err(dd, "[%u] Failed to allocate TxReq cache\n",
424 uctxt->ctxt);
425 goto pq_txreq_nomem;
426 }
Ira Weiny9e10af42015-10-30 18:58:40 -0400427 fd->pq = pq;
Mike Marciniszyn77241052015-07-30 15:17:43 -0400428 cq = kzalloc(sizeof(*cq), GFP_KERNEL);
Alison Schofield806e6e12015-10-12 14:28:36 -0700429 if (!cq)
Mike Marciniszyn77241052015-07-30 15:17:43 -0400430 goto cq_nomem;
Mike Marciniszyn77241052015-07-30 15:17:43 -0400431
Amitoj Kaur Chawla84449912016-03-04 22:30:43 +0530432 memsize = PAGE_ALIGN(sizeof(*cq->comps) * hfi1_sdma_comp_ring_size);
Mike Marciniszyn77241052015-07-30 15:17:43 -0400433 cq->comps = vmalloc_user(memsize);
Alison Schofield806e6e12015-10-12 14:28:36 -0700434 if (!cq->comps)
Mike Marciniszyn77241052015-07-30 15:17:43 -0400435 goto cq_comps_nomem;
Alison Schofield806e6e12015-10-12 14:28:36 -0700436
Mike Marciniszyn77241052015-07-30 15:17:43 -0400437 cq->nentries = hfi1_sdma_comp_ring_size;
Ira Weiny9e10af42015-10-30 18:58:40 -0400438 fd->cq = cq;
Mike Marciniszyn77241052015-07-30 15:17:43 -0400439
Mitko Haralanov5cd3a88d2016-03-08 11:15:22 -0800440 ret = hfi1_mmu_rb_register(&pq->sdma_rb_root, &sdma_rb_ops);
441 if (ret) {
442 dd_dev_err(dd, "Failed to register with MMU %d", ret);
443 goto done;
444 }
445
Mike Marciniszyn77241052015-07-30 15:17:43 -0400446 spin_lock_irqsave(&uctxt->sdma_qlock, flags);
447 list_add(&pq->list, &uctxt->sdma_queues);
448 spin_unlock_irqrestore(&uctxt->sdma_qlock, flags);
449 goto done;
450
451cq_comps_nomem:
452 kfree(cq);
453cq_nomem:
454 kmem_cache_destroy(pq->txreq_cache);
455pq_txreq_nomem:
456 kfree(pq->reqs);
457pq_reqs_nomem:
458 kfree(pq);
Ira Weiny9e10af42015-10-30 18:58:40 -0400459 fd->pq = NULL;
Mike Marciniszyn77241052015-07-30 15:17:43 -0400460pq_nomem:
461 ret = -ENOMEM;
462done:
463 return ret;
464}
465
466int hfi1_user_sdma_free_queues(struct hfi1_filedata *fd)
467{
468 struct hfi1_ctxtdata *uctxt = fd->uctxt;
469 struct hfi1_user_sdma_pkt_q *pq;
470 unsigned long flags;
471
472 hfi1_cdbg(SDMA, "[%u:%u:%u] Freeing user SDMA queues", uctxt->dd->unit,
473 uctxt->ctxt, fd->subctxt);
474 pq = fd->pq;
Mitko Haralanov5cd3a88d2016-03-08 11:15:22 -0800475 hfi1_mmu_rb_unregister(&pq->sdma_rb_root);
Mike Marciniszyn77241052015-07-30 15:17:43 -0400476 if (pq) {
Mike Marciniszyn77241052015-07-30 15:17:43 -0400477 spin_lock_irqsave(&uctxt->sdma_qlock, flags);
478 if (!list_empty(&pq->list))
479 list_del_init(&pq->list);
480 spin_unlock_irqrestore(&uctxt->sdma_qlock, flags);
481 iowait_sdma_drain(&pq->busy);
Mitko Haralanova0d40692015-12-08 17:10:13 -0500482 /* Wait until all requests have been freed. */
483 wait_event_interruptible(
484 pq->wait,
485 (ACCESS_ONCE(pq->state) == SDMA_PKT_Q_INACTIVE));
486 kfree(pq->reqs);
Julia Lawalladad44d2015-09-13 14:15:04 +0200487 kmem_cache_destroy(pq->txreq_cache);
Mike Marciniszyn77241052015-07-30 15:17:43 -0400488 kfree(pq);
489 fd->pq = NULL;
490 }
491 if (fd->cq) {
Bhumika Goyala4d7d052016-02-14 20:34:28 +0530492 vfree(fd->cq->comps);
Mike Marciniszyn77241052015-07-30 15:17:43 -0400493 kfree(fd->cq);
494 fd->cq = NULL;
495 }
496 return 0;
497}
498
Jianxin Xiong14833b82016-07-01 16:01:56 -0700499static u8 dlid_to_selector(u16 dlid)
500{
501 static u8 mapping[256];
502 static int initialized;
503 static u8 next;
504 int hash;
505
506 if (!initialized) {
507 memset(mapping, 0xFF, 256);
508 initialized = 1;
509 }
510
511 hash = ((dlid >> 8) ^ dlid) & 0xFF;
512 if (mapping[hash] == 0xFF) {
513 mapping[hash] = next;
514 next = (next + 1) & 0x7F;
515 }
516
517 return mapping[hash];
518}
519
Mike Marciniszyn77241052015-07-30 15:17:43 -0400520int hfi1_user_sdma_process_request(struct file *fp, struct iovec *iovec,
521 unsigned long dim, unsigned long *count)
522{
Mitko Haralanov0f2d87d2016-02-03 14:35:06 -0800523 int ret = 0, i = 0;
Ira Weiny9e10af42015-10-30 18:58:40 -0400524 struct hfi1_filedata *fd = fp->private_data;
525 struct hfi1_ctxtdata *uctxt = fd->uctxt;
526 struct hfi1_user_sdma_pkt_q *pq = fd->pq;
527 struct hfi1_user_sdma_comp_q *cq = fd->cq;
Mike Marciniszyn77241052015-07-30 15:17:43 -0400528 struct hfi1_devdata *dd = pq->dd;
529 unsigned long idx = 0;
530 u8 pcount = initial_pkt_count;
531 struct sdma_req_info info;
532 struct user_sdma_request *req;
533 u8 opcode, sc, vl;
Jianxin Xiongb583faf2016-05-19 05:21:57 -0700534 int req_queued = 0;
Jianxin Xiong14833b82016-07-01 16:01:56 -0700535 u16 dlid;
536 u8 selector;
Mike Marciniszyn77241052015-07-30 15:17:43 -0400537
538 if (iovec[idx].iov_len < sizeof(info) + sizeof(req->hdr)) {
539 hfi1_cdbg(
540 SDMA,
541 "[%u:%u:%u] First vector not big enough for header %lu/%lu",
Ira Weiny9e10af42015-10-30 18:58:40 -0400542 dd->unit, uctxt->ctxt, fd->subctxt,
Mike Marciniszyn77241052015-07-30 15:17:43 -0400543 iovec[idx].iov_len, sizeof(info) + sizeof(req->hdr));
Mitko Haralanovfaa98b82015-12-08 17:10:11 -0500544 return -EINVAL;
Mike Marciniszyn77241052015-07-30 15:17:43 -0400545 }
546 ret = copy_from_user(&info, iovec[idx].iov_base, sizeof(info));
547 if (ret) {
548 hfi1_cdbg(SDMA, "[%u:%u:%u] Failed to copy info QW (%d)",
Ira Weiny9e10af42015-10-30 18:58:40 -0400549 dd->unit, uctxt->ctxt, fd->subctxt, ret);
Mitko Haralanovfaa98b82015-12-08 17:10:11 -0500550 return -EFAULT;
Mike Marciniszyn77241052015-07-30 15:17:43 -0400551 }
Mitko Haralanov0f2d87d2016-02-03 14:35:06 -0800552
Ira Weiny9e10af42015-10-30 18:58:40 -0400553 trace_hfi1_sdma_user_reqinfo(dd, uctxt->ctxt, fd->subctxt,
Mike Marciniszyn77241052015-07-30 15:17:43 -0400554 (u16 *)&info);
Mitko Haralanov0f2d87d2016-02-03 14:35:06 -0800555 if (cq->comps[info.comp_idx].status == QUEUED ||
556 test_bit(SDMA_REQ_IN_USE, &pq->reqs[info.comp_idx].flags)) {
Mike Marciniszyn77241052015-07-30 15:17:43 -0400557 hfi1_cdbg(SDMA, "[%u:%u:%u] Entry %u is in QUEUED state",
Ira Weiny9e10af42015-10-30 18:58:40 -0400558 dd->unit, uctxt->ctxt, fd->subctxt,
Mike Marciniszyn77241052015-07-30 15:17:43 -0400559 info.comp_idx);
Mitko Haralanovfaa98b82015-12-08 17:10:11 -0500560 return -EBADSLT;
Mike Marciniszyn77241052015-07-30 15:17:43 -0400561 }
562 if (!info.fragsize) {
563 hfi1_cdbg(SDMA,
564 "[%u:%u:%u:%u] Request does not specify fragsize",
Ira Weiny9e10af42015-10-30 18:58:40 -0400565 dd->unit, uctxt->ctxt, fd->subctxt, info.comp_idx);
Mitko Haralanovfaa98b82015-12-08 17:10:11 -0500566 return -EINVAL;
Mike Marciniszyn77241052015-07-30 15:17:43 -0400567 }
568 /*
569 * We've done all the safety checks that we can up to this point,
570 * "allocate" the request entry.
571 */
572 hfi1_cdbg(SDMA, "[%u:%u:%u] Using req/comp entry %u\n", dd->unit,
Ira Weiny9e10af42015-10-30 18:58:40 -0400573 uctxt->ctxt, fd->subctxt, info.comp_idx);
Mike Marciniszyn77241052015-07-30 15:17:43 -0400574 req = pq->reqs + info.comp_idx;
575 memset(req, 0, sizeof(*req));
576 /* Mark the request as IN_USE before we start filling it in. */
577 set_bit(SDMA_REQ_IN_USE, &req->flags);
578 req->data_iovs = req_iovcnt(info.ctrl) - 1;
579 req->pq = pq;
580 req->cq = cq;
Mitko Haralanova0d40692015-12-08 17:10:13 -0500581 req->status = -1;
Mike Marciniszyn77241052015-07-30 15:17:43 -0400582 INIT_LIST_HEAD(&req->txps);
Mitko Haralanova0d40692015-12-08 17:10:13 -0500583
Mike Marciniszyn77241052015-07-30 15:17:43 -0400584 memcpy(&req->info, &info, sizeof(info));
585
586 if (req_opcode(info.ctrl) == EXPECTED)
587 req->data_iovs--;
588
589 if (!info.npkts || req->data_iovs > MAX_VECTORS_PER_REQ) {
590 SDMA_DBG(req, "Too many vectors (%u/%u)", req->data_iovs,
591 MAX_VECTORS_PER_REQ);
Mitko Haralanovfaa98b82015-12-08 17:10:11 -0500592 return -EINVAL;
Mike Marciniszyn77241052015-07-30 15:17:43 -0400593 }
594 /* Copy the header from the user buffer */
595 ret = copy_from_user(&req->hdr, iovec[idx].iov_base + sizeof(info),
596 sizeof(req->hdr));
597 if (ret) {
598 SDMA_DBG(req, "Failed to copy header template (%d)", ret);
599 ret = -EFAULT;
600 goto free_req;
601 }
602
603 /* If Static rate control is not enabled, sanitize the header. */
604 if (!HFI1_CAP_IS_USET(STATIC_RATE_CTRL))
605 req->hdr.pbc[2] = 0;
606
607 /* Validate the opcode. Do not trust packets from user space blindly. */
608 opcode = (be32_to_cpu(req->hdr.bth[0]) >> 24) & 0xff;
609 if ((opcode & USER_OPCODE_CHECK_MASK) !=
610 USER_OPCODE_CHECK_VAL) {
611 SDMA_DBG(req, "Invalid opcode (%d)", opcode);
612 ret = -EINVAL;
613 goto free_req;
614 }
615 /*
616 * Validate the vl. Do not trust packets from user space blindly.
617 * VL comes from PBC, SC comes from LRH, and the VL needs to
618 * match the SC look up.
619 */
620 vl = (le16_to_cpu(req->hdr.pbc[0]) >> 12) & 0xF;
621 sc = (((be16_to_cpu(req->hdr.lrh[0]) >> 12) & 0xF) |
622 (((le16_to_cpu(req->hdr.pbc[1]) >> 14) & 0x1) << 4));
623 if (vl >= dd->pport->vls_operational ||
624 vl != sc_to_vlt(dd, sc)) {
625 SDMA_DBG(req, "Invalid SC(%u)/VL(%u)", sc, vl);
626 ret = -EINVAL;
627 goto free_req;
628 }
629
Sebastian Sancheze38d1e42016-04-12 11:22:21 -0700630 /* Checking P_KEY for requests from user-space */
631 if (egress_pkey_check(dd->pport, req->hdr.lrh, req->hdr.bth, sc,
632 PKEY_CHECK_INVALID)) {
633 ret = -EINVAL;
634 goto free_req;
635 }
636
Mike Marciniszyn77241052015-07-30 15:17:43 -0400637 /*
638 * Also should check the BTH.lnh. If it says the next header is GRH then
639 * the RXE parsing will be off and will land in the middle of the KDETH
640 * or miss it entirely.
641 */
642 if ((be16_to_cpu(req->hdr.lrh[0]) & 0x3) == HFI1_LRH_GRH) {
643 SDMA_DBG(req, "User tried to pass in a GRH");
644 ret = -EINVAL;
645 goto free_req;
646 }
647
648 req->koffset = le32_to_cpu(req->hdr.kdeth.swdata[6]);
Jubin John4d114fd2016-02-14 20:21:43 -0800649 /*
650 * Calculate the initial TID offset based on the values of
651 * KDETH.OFFSET and KDETH.OM that are passed in.
652 */
Mike Marciniszyn77241052015-07-30 15:17:43 -0400653 req->tidoffset = KDETH_GET(req->hdr.kdeth.ver_tid_offset, OFFSET) *
654 (KDETH_GET(req->hdr.kdeth.ver_tid_offset, OM) ?
655 KDETH_OM_LARGE : KDETH_OM_SMALL);
656 SDMA_DBG(req, "Initial TID offset %u", req->tidoffset);
657 idx++;
658
659 /* Save all the IO vector structures */
660 while (i < req->data_iovs) {
Mitko Haralanov0f2d87d2016-02-03 14:35:06 -0800661 INIT_LIST_HEAD(&req->iovs[i].list);
Mike Marciniszyn77241052015-07-30 15:17:43 -0400662 memcpy(&req->iovs[i].iov, iovec + idx++, sizeof(struct iovec));
Mitko Haralanov5cd3a88d2016-03-08 11:15:22 -0800663 ret = pin_vector_pages(req, &req->iovs[i]);
664 if (ret) {
665 req->status = ret;
666 goto free_req;
667 }
Mike Marciniszyn77241052015-07-30 15:17:43 -0400668 req->data_len += req->iovs[i++].iov.iov_len;
669 }
670 SDMA_DBG(req, "total data length %u", req->data_len);
671
672 if (pcount > req->info.npkts)
673 pcount = req->info.npkts;
674 /*
675 * Copy any TID info
676 * User space will provide the TID info only when the
677 * request type is EXPECTED. This is true even if there is
678 * only one packet in the request and the header is already
679 * setup. The reason for the singular TID case is that the
680 * driver needs to perform safety checks.
681 */
682 if (req_opcode(req->info.ctrl) == EXPECTED) {
683 u16 ntids = iovec[idx].iov_len / sizeof(*req->tids);
684
685 if (!ntids || ntids > MAX_TID_PAIR_ENTRIES) {
686 ret = -EINVAL;
687 goto free_req;
688 }
689 req->tids = kcalloc(ntids, sizeof(*req->tids), GFP_KERNEL);
690 if (!req->tids) {
691 ret = -ENOMEM;
692 goto free_req;
693 }
694 /*
695 * We have to copy all of the tids because they may vary
696 * in size and, therefore, the TID count might not be
697 * equal to the pkt count. However, there is no way to
698 * tell at this point.
699 */
700 ret = copy_from_user(req->tids, iovec[idx].iov_base,
701 ntids * sizeof(*req->tids));
702 if (ret) {
703 SDMA_DBG(req, "Failed to copy %d TIDs (%d)",
704 ntids, ret);
705 ret = -EFAULT;
706 goto free_req;
707 }
708 req->n_tids = ntids;
709 idx++;
710 }
711
Jianxin Xiong14833b82016-07-01 16:01:56 -0700712 dlid = be16_to_cpu(req->hdr.lrh[1]);
713 selector = dlid_to_selector(dlid);
714
Mike Marciniszyn77241052015-07-30 15:17:43 -0400715 /* Have to select the engine */
716 req->sde = sdma_select_engine_vl(dd,
Jianxin Xiong14833b82016-07-01 16:01:56 -0700717 (u32)(uctxt->ctxt + fd->subctxt +
718 selector),
Mike Marciniszyn77241052015-07-30 15:17:43 -0400719 vl);
720 if (!req->sde || !sdma_running(req->sde)) {
721 ret = -ECOMM;
722 goto free_req;
723 }
724
725 /* We don't need an AHG entry if the request contains only one packet */
726 if (req->info.npkts > 1 && HFI1_CAP_IS_USET(SDMA_AHG)) {
727 int ahg = sdma_ahg_alloc(req->sde);
728
729 if (likely(ahg >= 0)) {
730 req->ahg_idx = (u8)ahg;
731 set_bit(SDMA_REQ_HAVE_AHG, &req->flags);
732 }
733 }
734
Mitko Haralanov0f2d87d2016-02-03 14:35:06 -0800735 set_comp_state(pq, cq, info.comp_idx, QUEUED, 0);
Mike Marciniszyn77241052015-07-30 15:17:43 -0400736 atomic_inc(&pq->n_reqs);
Jianxin Xiongb583faf2016-05-19 05:21:57 -0700737 req_queued = 1;
Mitko Haralanov0f2d87d2016-02-03 14:35:06 -0800738 /* Send the first N packets in the request to buy us some time */
739 ret = user_sdma_send_pkts(req, pcount);
740 if (unlikely(ret < 0 && ret != -EBUSY)) {
741 req->status = ret;
Mitko Haralanov0f2d87d2016-02-03 14:35:06 -0800742 goto free_req;
743 }
Mike Marciniszyn77241052015-07-30 15:17:43 -0400744
Mitko Haralanov0f2d87d2016-02-03 14:35:06 -0800745 /*
746 * It is possible that the SDMA engine would have processed all the
747 * submitted packets by the time we get here. Therefore, only set
748 * packet queue state to ACTIVE if there are still uncompleted
749 * requests.
750 */
751 if (atomic_read(&pq->n_reqs))
752 xchg(&pq->state, SDMA_PKT_Q_ACTIVE);
753
754 /*
755 * This is a somewhat blocking send implementation.
756 * The driver will block the caller until all packets of the
757 * request have been submitted to the SDMA engine. However, it
758 * will not wait for send completions.
759 */
760 while (!test_bit(SDMA_REQ_SEND_DONE, &req->flags)) {
761 ret = user_sdma_send_pkts(req, pcount);
762 if (ret < 0) {
763 if (ret != -EBUSY) {
764 req->status = ret;
765 set_bit(SDMA_REQ_DONE_ERROR, &req->flags);
Mitko Haralanova402d6a2016-02-03 14:37:41 -0800766 if (ACCESS_ONCE(req->seqcomp) ==
767 req->seqsubmitted - 1)
768 goto free_req;
Mitko Haralanov0f2d87d2016-02-03 14:35:06 -0800769 return ret;
Mike Marciniszyn77241052015-07-30 15:17:43 -0400770 }
Mitko Haralanov0f2d87d2016-02-03 14:35:06 -0800771 wait_event_interruptible_timeout(
772 pq->busy.wait_dma,
773 (pq->state == SDMA_PKT_Q_ACTIVE),
774 msecs_to_jiffies(
775 SDMA_IOWAIT_TIMEOUT));
Mike Marciniszyn77241052015-07-30 15:17:43 -0400776 }
Mike Marciniszyn77241052015-07-30 15:17:43 -0400777 }
Mike Marciniszyn77241052015-07-30 15:17:43 -0400778 *count += idx;
Mitko Haralanova0d40692015-12-08 17:10:13 -0500779 return 0;
Mike Marciniszyn77241052015-07-30 15:17:43 -0400780free_req:
Mitko Haralanov0f2d87d2016-02-03 14:35:06 -0800781 user_sdma_free_request(req, true);
Jianxin Xiongb583faf2016-05-19 05:21:57 -0700782 if (req_queued)
783 pq_update(pq);
Mitko Haralanov0f2d87d2016-02-03 14:35:06 -0800784 set_comp_state(pq, cq, info.comp_idx, ERROR, req->status);
Mike Marciniszyn77241052015-07-30 15:17:43 -0400785 return ret;
786}
787
788static inline u32 compute_data_length(struct user_sdma_request *req,
Jubin John17fb4f22016-02-14 20:21:52 -0800789 struct user_sdma_txreq *tx)
Mike Marciniszyn77241052015-07-30 15:17:43 -0400790{
791 /*
792 * Determine the proper size of the packet data.
793 * The size of the data of the first packet is in the header
794 * template. However, it includes the header and ICRC, which need
795 * to be subtracted.
796 * The size of the remaining packets is the minimum of the frag
797 * size (MTU) or remaining data in the request.
798 */
799 u32 len;
800
801 if (!req->seqnum) {
802 len = ((be16_to_cpu(req->hdr.lrh[2]) << 2) -
803 (sizeof(tx->hdr) - 4));
804 } else if (req_opcode(req->info.ctrl) == EXPECTED) {
805 u32 tidlen = EXP_TID_GET(req->tids[req->tididx], LEN) *
806 PAGE_SIZE;
Jubin John4d114fd2016-02-14 20:21:43 -0800807 /*
808 * Get the data length based on the remaining space in the
809 * TID pair.
810 */
Mike Marciniszyn77241052015-07-30 15:17:43 -0400811 len = min(tidlen - req->tidoffset, (u32)req->info.fragsize);
812 /* If we've filled up the TID pair, move to the next one. */
813 if (unlikely(!len) && ++req->tididx < req->n_tids &&
814 req->tids[req->tididx]) {
815 tidlen = EXP_TID_GET(req->tids[req->tididx],
816 LEN) * PAGE_SIZE;
817 req->tidoffset = 0;
818 len = min_t(u32, tidlen, req->info.fragsize);
819 }
Jubin John4d114fd2016-02-14 20:21:43 -0800820 /*
821 * Since the TID pairs map entire pages, make sure that we
Mike Marciniszyn77241052015-07-30 15:17:43 -0400822 * are not going to try to send more data that we have
Jubin John4d114fd2016-02-14 20:21:43 -0800823 * remaining.
824 */
Mike Marciniszyn77241052015-07-30 15:17:43 -0400825 len = min(len, req->data_len - req->sent);
Jubin Johne4909742016-02-14 20:22:00 -0800826 } else {
Mike Marciniszyn77241052015-07-30 15:17:43 -0400827 len = min(req->data_len - req->sent, (u32)req->info.fragsize);
Jubin Johne4909742016-02-14 20:22:00 -0800828 }
Mike Marciniszyn77241052015-07-30 15:17:43 -0400829 SDMA_DBG(req, "Data Length = %u", len);
830 return len;
831}
832
833static inline u32 get_lrh_len(struct hfi1_pkt_header hdr, u32 len)
834{
835 /* (Size of complete header - size of PBC) + 4B ICRC + data length */
836 return ((sizeof(hdr) - sizeof(hdr.pbc)) + 4 + len);
837}
838
839static int user_sdma_send_pkts(struct user_sdma_request *req, unsigned maxpkts)
840{
841 int ret = 0;
842 unsigned npkts = 0;
843 struct user_sdma_txreq *tx = NULL;
844 struct hfi1_user_sdma_pkt_q *pq = NULL;
845 struct user_sdma_iovec *iovec = NULL;
846
Mitko Haralanovfaa98b82015-12-08 17:10:11 -0500847 if (!req->pq)
848 return -EINVAL;
Mike Marciniszyn77241052015-07-30 15:17:43 -0400849
850 pq = req->pq;
851
Mitko Haralanov6a5464f2015-12-08 17:10:12 -0500852 /* If tx completion has reported an error, we are done. */
853 if (test_bit(SDMA_REQ_HAS_ERROR, &req->flags)) {
854 set_bit(SDMA_REQ_DONE_ERROR, &req->flags);
855 return -EFAULT;
856 }
857
Mike Marciniszyn77241052015-07-30 15:17:43 -0400858 /*
859 * Check if we might have sent the entire request already
860 */
861 if (unlikely(req->seqnum == req->info.npkts)) {
862 if (!list_empty(&req->txps))
863 goto dosend;
Mitko Haralanovfaa98b82015-12-08 17:10:11 -0500864 return ret;
Mike Marciniszyn77241052015-07-30 15:17:43 -0400865 }
866
867 if (!maxpkts || maxpkts > req->info.npkts - req->seqnum)
868 maxpkts = req->info.npkts - req->seqnum;
869
870 while (npkts < maxpkts) {
871 u32 datalen = 0, queued = 0, data_sent = 0;
872 u64 iov_offset = 0;
873
874 /*
875 * Check whether any of the completions have come back
876 * with errors. If so, we are not going to process any
877 * more packets from this request.
878 */
879 if (test_bit(SDMA_REQ_HAS_ERROR, &req->flags)) {
880 set_bit(SDMA_REQ_DONE_ERROR, &req->flags);
Mitko Haralanovfaa98b82015-12-08 17:10:11 -0500881 return -EFAULT;
Mike Marciniszyn77241052015-07-30 15:17:43 -0400882 }
883
884 tx = kmem_cache_alloc(pq->txreq_cache, GFP_KERNEL);
Mitko Haralanovfaa98b82015-12-08 17:10:11 -0500885 if (!tx)
886 return -ENOMEM;
887
Mike Marciniszyn77241052015-07-30 15:17:43 -0400888 tx->flags = 0;
889 tx->req = req;
890 tx->busycount = 0;
Mitko Haralanova0d40692015-12-08 17:10:13 -0500891 INIT_LIST_HEAD(&tx->list);
Mike Marciniszyn77241052015-07-30 15:17:43 -0400892
893 if (req->seqnum == req->info.npkts - 1)
Mitko Haralanovb9fb63182015-10-26 10:28:37 -0400894 tx->flags |= TXREQ_FLAGS_REQ_LAST_PKT;
Mike Marciniszyn77241052015-07-30 15:17:43 -0400895
896 /*
897 * Calculate the payload size - this is min of the fragment
898 * (MTU) size or the remaining bytes in the request but only
899 * if we have payload data.
900 */
901 if (req->data_len) {
902 iovec = &req->iovs[req->iov_idx];
903 if (ACCESS_ONCE(iovec->offset) == iovec->iov.iov_len) {
904 if (++req->iov_idx == req->data_iovs) {
905 ret = -EFAULT;
906 goto free_txreq;
907 }
908 iovec = &req->iovs[req->iov_idx];
909 WARN_ON(iovec->offset);
910 }
911
Mike Marciniszyn77241052015-07-30 15:17:43 -0400912 datalen = compute_data_length(req, tx);
913 if (!datalen) {
914 SDMA_DBG(req,
915 "Request has data but pkt len is 0");
916 ret = -EFAULT;
917 goto free_tx;
918 }
919 }
920
921 if (test_bit(SDMA_REQ_HAVE_AHG, &req->flags)) {
922 if (!req->seqnum) {
923 u16 pbclen = le16_to_cpu(req->hdr.pbc[0]);
924 u32 lrhlen = get_lrh_len(req->hdr, datalen);
925 /*
926 * Copy the request header into the tx header
927 * because the HW needs a cacheline-aligned
928 * address.
929 * This copy can be optimized out if the hdr
930 * member of user_sdma_request were also
931 * cacheline aligned.
932 */
933 memcpy(&tx->hdr, &req->hdr, sizeof(tx->hdr));
934 if (PBC2LRH(pbclen) != lrhlen) {
935 pbclen = (pbclen & 0xf000) |
936 LRH2PBC(lrhlen);
937 tx->hdr.pbc[0] = cpu_to_le16(pbclen);
938 }
939 ret = sdma_txinit_ahg(&tx->txreq,
940 SDMA_TXREQ_F_AHG_COPY,
941 sizeof(tx->hdr) + datalen,
942 req->ahg_idx, 0, NULL, 0,
943 user_sdma_txreq_cb);
944 if (ret)
945 goto free_tx;
946 ret = sdma_txadd_kvaddr(pq->dd, &tx->txreq,
947 &tx->hdr,
948 sizeof(tx->hdr));
949 if (ret)
950 goto free_txreq;
951 } else {
952 int changes;
953
954 changes = set_txreq_header_ahg(req, tx,
955 datalen);
956 if (changes < 0)
957 goto free_tx;
958 sdma_txinit_ahg(&tx->txreq,
959 SDMA_TXREQ_F_USE_AHG,
960 datalen, req->ahg_idx, changes,
961 req->ahg, sizeof(req->hdr),
962 user_sdma_txreq_cb);
963 }
964 } else {
965 ret = sdma_txinit(&tx->txreq, 0, sizeof(req->hdr) +
966 datalen, user_sdma_txreq_cb);
967 if (ret)
968 goto free_tx;
969 /*
970 * Modify the header for this packet. This only needs
971 * to be done if we are not going to use AHG. Otherwise,
972 * the HW will do it based on the changes we gave it
973 * during sdma_txinit_ahg().
974 */
975 ret = set_txreq_header(req, tx, datalen);
976 if (ret)
977 goto free_txreq;
978 }
979
980 /*
981 * If the request contains any data vectors, add up to
982 * fragsize bytes to the descriptor.
983 */
984 while (queued < datalen &&
985 (req->sent + data_sent) < req->data_len) {
986 unsigned long base, offset;
987 unsigned pageidx, len;
988
989 base = (unsigned long)iovec->iov.iov_base;
Amitoj Kaur Chawla72a5f6a2016-02-20 19:08:02 +0530990 offset = offset_in_page(base + iovec->offset +
991 iov_offset);
Mike Marciniszyn77241052015-07-30 15:17:43 -0400992 pageidx = (((iovec->offset + iov_offset +
993 base) - (base & PAGE_MASK)) >> PAGE_SHIFT);
994 len = offset + req->info.fragsize > PAGE_SIZE ?
995 PAGE_SIZE - offset : req->info.fragsize;
996 len = min((datalen - queued), len);
997 ret = sdma_txadd_page(pq->dd, &tx->txreq,
998 iovec->pages[pageidx],
999 offset, len);
1000 if (ret) {
Mitko Haralanova0d40692015-12-08 17:10:13 -05001001 SDMA_DBG(req, "SDMA txreq add page failed %d\n",
1002 ret);
Mike Marciniszyn77241052015-07-30 15:17:43 -04001003 goto free_txreq;
1004 }
1005 iov_offset += len;
1006 queued += len;
1007 data_sent += len;
1008 if (unlikely(queued < datalen &&
1009 pageidx == iovec->npages &&
Mitko Haralanov5cd3a88d2016-03-08 11:15:22 -08001010 req->iov_idx < req->data_iovs - 1)) {
Mike Marciniszyn77241052015-07-30 15:17:43 -04001011 iovec->offset += iov_offset;
1012 iovec = &req->iovs[++req->iov_idx];
Mike Marciniszyn77241052015-07-30 15:17:43 -04001013 iov_offset = 0;
Mike Marciniszyn77241052015-07-30 15:17:43 -04001014 }
1015 }
1016 /*
1017 * The txreq was submitted successfully so we can update
1018 * the counters.
1019 */
1020 req->koffset += datalen;
1021 if (req_opcode(req->info.ctrl) == EXPECTED)
1022 req->tidoffset += datalen;
1023 req->sent += data_sent;
Mitko Haralanov5cd3a88d2016-03-08 11:15:22 -08001024 if (req->data_len)
1025 iovec->offset += iov_offset;
Mitko Haralanovc7cbf2f2016-02-03 14:35:23 -08001026 list_add_tail(&tx->txreq.list, &req->txps);
Mike Marciniszyn77241052015-07-30 15:17:43 -04001027 /*
1028 * It is important to increment this here as it is used to
1029 * generate the BTH.PSN and, therefore, can't be bulk-updated
1030 * outside of the loop.
1031 */
1032 tx->seqnum = req->seqnum++;
Mike Marciniszyn77241052015-07-30 15:17:43 -04001033 npkts++;
1034 }
1035dosend:
1036 ret = sdma_send_txlist(req->sde, &pq->busy, &req->txps);
Mitko Haralanovc7cbf2f2016-02-03 14:35:23 -08001037 if (list_empty(&req->txps)) {
1038 req->seqsubmitted = req->seqnum;
Mike Marciniszyn77241052015-07-30 15:17:43 -04001039 if (req->seqnum == req->info.npkts) {
1040 set_bit(SDMA_REQ_SEND_DONE, &req->flags);
1041 /*
1042 * The txreq has already been submitted to the HW queue
1043 * so we can free the AHG entry now. Corruption will not
1044 * happen due to the sequential manner in which
1045 * descriptors are processed.
1046 */
1047 if (test_bit(SDMA_REQ_HAVE_AHG, &req->flags))
1048 sdma_ahg_free(req->sde, req->ahg_idx);
1049 }
Mitko Haralanovc7cbf2f2016-02-03 14:35:23 -08001050 } else if (ret > 0) {
1051 req->seqsubmitted += ret;
1052 ret = 0;
1053 }
Mitko Haralanovfaa98b82015-12-08 17:10:11 -05001054 return ret;
1055
Mike Marciniszyn77241052015-07-30 15:17:43 -04001056free_txreq:
1057 sdma_txclean(pq->dd, &tx->txreq);
1058free_tx:
1059 kmem_cache_free(pq->txreq_cache, tx);
Mike Marciniszyn77241052015-07-30 15:17:43 -04001060 return ret;
1061}
1062
1063/*
1064 * How many pages in this iovec element?
1065 */
1066static inline int num_user_pages(const struct iovec *iov)
1067{
Jubin John50e5dcb2016-02-14 20:19:41 -08001068 const unsigned long addr = (unsigned long)iov->iov_base;
Mike Marciniszyn77241052015-07-30 15:17:43 -04001069 const unsigned long len = iov->iov_len;
1070 const unsigned long spage = addr & PAGE_MASK;
1071 const unsigned long epage = (addr + len - 1) & PAGE_MASK;
1072
1073 return 1 + ((epage - spage) >> PAGE_SHIFT);
1074}
1075
Mitko Haralanov5511d782016-03-08 11:15:44 -08001076static u32 sdma_cache_evict(struct hfi1_user_sdma_pkt_q *pq, u32 npages)
1077{
1078 u32 cleared = 0;
1079 struct sdma_mmu_node *node, *ptr;
Mitko Haralanove88c9272016-04-12 10:46:53 -07001080 struct list_head to_evict = LIST_HEAD_INIT(to_evict);
Mike Marciniszyn77241052015-07-30 15:17:43 -04001081
Mitko Haralanove88c9272016-04-12 10:46:53 -07001082 spin_lock(&pq->evict_lock);
Mitko Haralanov5511d782016-03-08 11:15:44 -08001083 list_for_each_entry_safe_reverse(node, ptr, &pq->evict, list) {
1084 /* Make sure that no one is still using the node. */
1085 if (!atomic_read(&node->refcount)) {
Mitko Haralanove88c9272016-04-12 10:46:53 -07001086 set_bit(SDMA_CACHE_NODE_EVICT, &node->flags);
1087 list_del_init(&node->list);
1088 list_add(&node->list, &to_evict);
Mitko Haralanov5511d782016-03-08 11:15:44 -08001089 cleared += node->npages;
Mitko Haralanov5511d782016-03-08 11:15:44 -08001090 if (cleared >= npages)
1091 break;
1092 }
Mike Marciniszyn77241052015-07-30 15:17:43 -04001093 }
Mitko Haralanove88c9272016-04-12 10:46:53 -07001094 spin_unlock(&pq->evict_lock);
1095
1096 list_for_each_entry_safe(node, ptr, &to_evict, list)
1097 hfi1_mmu_rb_remove(&pq->sdma_rb_root, &node->rb);
1098
Mitko Haralanov5511d782016-03-08 11:15:44 -08001099 return cleared;
Mike Marciniszyn77241052015-07-30 15:17:43 -04001100}
1101
Mike Marciniszyn77241052015-07-30 15:17:43 -04001102static int pin_vector_pages(struct user_sdma_request *req,
1103 struct user_sdma_iovec *iovec) {
Mitko Haralanov5511d782016-03-08 11:15:44 -08001104 int ret = 0, pinned, npages, cleared;
Mitko Haralanov5cd3a88d2016-03-08 11:15:22 -08001105 struct page **pages;
1106 struct hfi1_user_sdma_pkt_q *pq = req->pq;
1107 struct sdma_mmu_node *node = NULL;
1108 struct mmu_rb_node *rb_node;
Mike Marciniszyn77241052015-07-30 15:17:43 -04001109
Mitko Haralanovf53af852016-04-12 10:46:47 -07001110 rb_node = hfi1_mmu_rb_extract(&pq->sdma_rb_root,
1111 (unsigned long)iovec->iov.iov_base,
1112 iovec->iov.iov_len);
Mitko Haralanovf19bd642016-04-12 10:45:57 -07001113 if (rb_node && !IS_ERR(rb_node))
Mitko Haralanov5cd3a88d2016-03-08 11:15:22 -08001114 node = container_of(rb_node, struct sdma_mmu_node, rb);
Mitko Haralanovf19bd642016-04-12 10:45:57 -07001115 else
1116 rb_node = NULL;
Mitko Haralanova0d40692015-12-08 17:10:13 -05001117
Mitko Haralanov5cd3a88d2016-03-08 11:15:22 -08001118 if (!node) {
1119 node = kzalloc(sizeof(*node), GFP_KERNEL);
1120 if (!node)
1121 return -ENOMEM;
1122
1123 node->rb.addr = (unsigned long)iovec->iov.iov_base;
Mitko Haralanov5511d782016-03-08 11:15:44 -08001124 node->pq = pq;
Mitko Haralanov5cd3a88d2016-03-08 11:15:22 -08001125 atomic_set(&node->refcount, 0);
Mitko Haralanov5511d782016-03-08 11:15:44 -08001126 INIT_LIST_HEAD(&node->list);
Mike Marciniszyn77241052015-07-30 15:17:43 -04001127 }
Mitko Haralanova0d40692015-12-08 17:10:13 -05001128
Mike Marciniszyn77241052015-07-30 15:17:43 -04001129 npages = num_user_pages(&iovec->iov);
Mitko Haralanov5cd3a88d2016-03-08 11:15:22 -08001130 if (node->npages < npages) {
1131 pages = kcalloc(npages, sizeof(*pages), GFP_KERNEL);
1132 if (!pages) {
1133 SDMA_DBG(req, "Failed page array alloc");
1134 ret = -ENOMEM;
1135 goto bail;
1136 }
1137 memcpy(pages, node->pages, node->npages * sizeof(*pages));
1138
1139 npages -= node->npages;
Mitko Haralanove88c9272016-04-12 10:46:53 -07001140
1141 /*
1142 * If rb_node is NULL, it means that this is brand new node
1143 * and, therefore not on the eviction list.
1144 * If, however, the rb_node is non-NULL, it means that the
1145 * node is already in RB tree and, therefore on the eviction
1146 * list (nodes are unconditionally inserted in the eviction
1147 * list). In that case, we have to remove the node prior to
1148 * calling the eviction function in order to prevent it from
1149 * freeing this node.
1150 */
1151 if (rb_node) {
1152 spin_lock(&pq->evict_lock);
1153 list_del_init(&node->list);
1154 spin_unlock(&pq->evict_lock);
1155 }
Mitko Haralanov5511d782016-03-08 11:15:44 -08001156retry:
1157 if (!hfi1_can_pin_pages(pq->dd, pq->n_locked, npages)) {
Mitko Haralanov5511d782016-03-08 11:15:44 -08001158 cleared = sdma_cache_evict(pq, npages);
Mitko Haralanov5511d782016-03-08 11:15:44 -08001159 if (cleared >= npages)
1160 goto retry;
1161 }
Mitko Haralanov5cd3a88d2016-03-08 11:15:22 -08001162 pinned = hfi1_acquire_user_pages(
1163 ((unsigned long)iovec->iov.iov_base +
1164 (node->npages * PAGE_SIZE)), npages, 0,
1165 pages + node->npages);
1166 if (pinned < 0) {
1167 kfree(pages);
1168 ret = pinned;
1169 goto bail;
1170 }
1171 if (pinned != npages) {
Mitko Haralanov849e3e92016-04-12 10:46:16 -07001172 unpin_vector_pages(current->mm, pages, node->npages,
1173 pinned);
Mitko Haralanov5cd3a88d2016-03-08 11:15:22 -08001174 ret = -EFAULT;
1175 goto bail;
1176 }
1177 kfree(node->pages);
Mitko Haralanovde790932016-04-12 10:46:41 -07001178 node->rb.len = iovec->iov.iov_len;
Mitko Haralanov5cd3a88d2016-03-08 11:15:22 -08001179 node->pages = pages;
1180 node->npages += pinned;
1181 npages = node->npages;
Mitko Haralanov5511d782016-03-08 11:15:44 -08001182 spin_lock(&pq->evict_lock);
Mitko Haralanove88c9272016-04-12 10:46:53 -07001183 list_add(&node->list, &pq->evict);
Mitko Haralanov5511d782016-03-08 11:15:44 -08001184 pq->n_locked += pinned;
1185 spin_unlock(&pq->evict_lock);
Mike Marciniszyn77241052015-07-30 15:17:43 -04001186 }
Mitko Haralanov5cd3a88d2016-03-08 11:15:22 -08001187 iovec->pages = node->pages;
1188 iovec->npages = npages;
Mitko Haralanov9565c6a2016-05-19 05:21:18 -07001189 iovec->node = node;
Mike Marciniszyn77241052015-07-30 15:17:43 -04001190
Mitko Haralanovf53af852016-04-12 10:46:47 -07001191 ret = hfi1_mmu_rb_insert(&req->pq->sdma_rb_root, &node->rb);
1192 if (ret) {
1193 spin_lock(&pq->evict_lock);
1194 if (!list_empty(&node->list))
1195 list_del(&node->list);
1196 pq->n_locked -= node->npages;
1197 spin_unlock(&pq->evict_lock);
1198 goto bail;
Mike Marciniszyn77241052015-07-30 15:17:43 -04001199 }
1200 return 0;
Mitko Haralanov5cd3a88d2016-03-08 11:15:22 -08001201bail:
Mitko Haralanovf53af852016-04-12 10:46:47 -07001202 if (rb_node)
1203 unpin_vector_pages(current->mm, node->pages, 0, node->npages);
1204 kfree(node);
Mitko Haralanov5cd3a88d2016-03-08 11:15:22 -08001205 return ret;
Mike Marciniszyn77241052015-07-30 15:17:43 -04001206}
1207
Mitko Haralanovbd3a8942016-03-08 11:15:33 -08001208static void unpin_vector_pages(struct mm_struct *mm, struct page **pages,
Mitko Haralanov849e3e92016-04-12 10:46:16 -07001209 unsigned start, unsigned npages)
Mike Marciniszyn77241052015-07-30 15:17:43 -04001210{
Mitko Haralanov849e3e92016-04-12 10:46:16 -07001211 hfi1_release_user_pages(mm, pages + start, npages, 0);
Mitko Haralanov5cd3a88d2016-03-08 11:15:22 -08001212 kfree(pages);
Mike Marciniszyn77241052015-07-30 15:17:43 -04001213}
1214
1215static int check_header_template(struct user_sdma_request *req,
1216 struct hfi1_pkt_header *hdr, u32 lrhlen,
1217 u32 datalen)
1218{
1219 /*
1220 * Perform safety checks for any type of packet:
1221 * - transfer size is multiple of 64bytes
1222 * - packet length is multiple of 4bytes
1223 * - entire request length is multiple of 4bytes
1224 * - packet length is not larger than MTU size
1225 *
1226 * These checks are only done for the first packet of the
1227 * transfer since the header is "given" to us by user space.
1228 * For the remainder of the packets we compute the values.
1229 */
1230 if (req->info.fragsize % PIO_BLOCK_SIZE ||
1231 lrhlen & 0x3 || req->data_len & 0x3 ||
1232 lrhlen > get_lrh_len(*hdr, req->info.fragsize))
1233 return -EINVAL;
1234
1235 if (req_opcode(req->info.ctrl) == EXPECTED) {
1236 /*
1237 * The header is checked only on the first packet. Furthermore,
1238 * we ensure that at least one TID entry is copied when the
1239 * request is submitted. Therefore, we don't have to verify that
1240 * tididx points to something sane.
1241 */
1242 u32 tidval = req->tids[req->tididx],
1243 tidlen = EXP_TID_GET(tidval, LEN) * PAGE_SIZE,
1244 tididx = EXP_TID_GET(tidval, IDX),
1245 tidctrl = EXP_TID_GET(tidval, CTRL),
1246 tidoff;
1247 __le32 kval = hdr->kdeth.ver_tid_offset;
1248
1249 tidoff = KDETH_GET(kval, OFFSET) *
1250 (KDETH_GET(req->hdr.kdeth.ver_tid_offset, OM) ?
1251 KDETH_OM_LARGE : KDETH_OM_SMALL);
1252 /*
1253 * Expected receive packets have the following
1254 * additional checks:
1255 * - offset is not larger than the TID size
1256 * - TIDCtrl values match between header and TID array
1257 * - TID indexes match between header and TID array
1258 */
1259 if ((tidoff + datalen > tidlen) ||
1260 KDETH_GET(kval, TIDCTRL) != tidctrl ||
1261 KDETH_GET(kval, TID) != tididx)
1262 return -EINVAL;
1263 }
1264 return 0;
1265}
1266
1267/*
1268 * Correctly set the BTH.PSN field based on type of
1269 * transfer - eager packets can just increment the PSN but
1270 * expected packets encode generation and sequence in the
1271 * BTH.PSN field so just incrementing will result in errors.
1272 */
1273static inline u32 set_pkt_bth_psn(__be32 bthpsn, u8 expct, u32 frags)
1274{
1275 u32 val = be32_to_cpu(bthpsn),
1276 mask = (HFI1_CAP_IS_KSET(EXTENDED_PSN) ? 0x7fffffffull :
1277 0xffffffull),
1278 psn = val & mask;
1279 if (expct)
1280 psn = (psn & ~BTH_SEQ_MASK) | ((psn + frags) & BTH_SEQ_MASK);
1281 else
1282 psn = psn + frags;
1283 return psn & mask;
1284}
1285
1286static int set_txreq_header(struct user_sdma_request *req,
1287 struct user_sdma_txreq *tx, u32 datalen)
1288{
1289 struct hfi1_user_sdma_pkt_q *pq = req->pq;
1290 struct hfi1_pkt_header *hdr = &tx->hdr;
1291 u16 pbclen;
1292 int ret;
1293 u32 tidval = 0, lrhlen = get_lrh_len(*hdr, datalen);
1294
1295 /* Copy the header template to the request before modification */
1296 memcpy(hdr, &req->hdr, sizeof(*hdr));
1297
1298 /*
1299 * Check if the PBC and LRH length are mismatched. If so
1300 * adjust both in the header.
1301 */
1302 pbclen = le16_to_cpu(hdr->pbc[0]);
1303 if (PBC2LRH(pbclen) != lrhlen) {
1304 pbclen = (pbclen & 0xf000) | LRH2PBC(lrhlen);
1305 hdr->pbc[0] = cpu_to_le16(pbclen);
1306 hdr->lrh[2] = cpu_to_be16(lrhlen >> 2);
1307 /*
1308 * Third packet
1309 * This is the first packet in the sequence that has
1310 * a "static" size that can be used for the rest of
1311 * the packets (besides the last one).
1312 */
1313 if (unlikely(req->seqnum == 2)) {
1314 /*
1315 * From this point on the lengths in both the
1316 * PBC and LRH are the same until the last
1317 * packet.
1318 * Adjust the template so we don't have to update
1319 * every packet
1320 */
1321 req->hdr.pbc[0] = hdr->pbc[0];
1322 req->hdr.lrh[2] = hdr->lrh[2];
1323 }
1324 }
1325 /*
1326 * We only have to modify the header if this is not the
1327 * first packet in the request. Otherwise, we use the
1328 * header given to us.
1329 */
1330 if (unlikely(!req->seqnum)) {
1331 ret = check_header_template(req, hdr, lrhlen, datalen);
1332 if (ret)
1333 return ret;
1334 goto done;
Mike Marciniszyn77241052015-07-30 15:17:43 -04001335 }
1336
1337 hdr->bth[2] = cpu_to_be32(
1338 set_pkt_bth_psn(hdr->bth[2],
1339 (req_opcode(req->info.ctrl) == EXPECTED),
1340 req->seqnum));
1341
1342 /* Set ACK request on last packet */
Mitko Haralanovb9fb63182015-10-26 10:28:37 -04001343 if (unlikely(tx->flags & TXREQ_FLAGS_REQ_LAST_PKT))
Jubin John8638b772016-02-14 20:19:24 -08001344 hdr->bth[2] |= cpu_to_be32(1UL << 31);
Mike Marciniszyn77241052015-07-30 15:17:43 -04001345
1346 /* Set the new offset */
1347 hdr->kdeth.swdata[6] = cpu_to_le32(req->koffset);
1348 /* Expected packets have to fill in the new TID information */
1349 if (req_opcode(req->info.ctrl) == EXPECTED) {
1350 tidval = req->tids[req->tididx];
1351 /*
1352 * If the offset puts us at the end of the current TID,
1353 * advance everything.
1354 */
1355 if ((req->tidoffset) == (EXP_TID_GET(tidval, LEN) *
1356 PAGE_SIZE)) {
1357 req->tidoffset = 0;
Jubin John4d114fd2016-02-14 20:21:43 -08001358 /*
1359 * Since we don't copy all the TIDs, all at once,
1360 * we have to check again.
1361 */
Mike Marciniszyn77241052015-07-30 15:17:43 -04001362 if (++req->tididx > req->n_tids - 1 ||
1363 !req->tids[req->tididx]) {
1364 return -EINVAL;
1365 }
1366 tidval = req->tids[req->tididx];
1367 }
1368 req->omfactor = EXP_TID_GET(tidval, LEN) * PAGE_SIZE >=
1369 KDETH_OM_MAX_SIZE ? KDETH_OM_LARGE : KDETH_OM_SMALL;
1370 /* Set KDETH.TIDCtrl based on value for this TID. */
1371 KDETH_SET(hdr->kdeth.ver_tid_offset, TIDCTRL,
1372 EXP_TID_GET(tidval, CTRL));
1373 /* Set KDETH.TID based on value for this TID */
1374 KDETH_SET(hdr->kdeth.ver_tid_offset, TID,
1375 EXP_TID_GET(tidval, IDX));
1376 /* Clear KDETH.SH only on the last packet */
Mitko Haralanovb9fb63182015-10-26 10:28:37 -04001377 if (unlikely(tx->flags & TXREQ_FLAGS_REQ_LAST_PKT))
Mike Marciniszyn77241052015-07-30 15:17:43 -04001378 KDETH_SET(hdr->kdeth.ver_tid_offset, SH, 0);
1379 /*
1380 * Set the KDETH.OFFSET and KDETH.OM based on size of
1381 * transfer.
1382 */
1383 SDMA_DBG(req, "TID offset %ubytes %uunits om%u",
1384 req->tidoffset, req->tidoffset / req->omfactor,
Bart Van Assche55c406482016-06-03 12:11:16 -07001385 req->omfactor != KDETH_OM_SMALL);
Mike Marciniszyn77241052015-07-30 15:17:43 -04001386 KDETH_SET(hdr->kdeth.ver_tid_offset, OFFSET,
1387 req->tidoffset / req->omfactor);
1388 KDETH_SET(hdr->kdeth.ver_tid_offset, OM,
Bart Van Assche55c406482016-06-03 12:11:16 -07001389 req->omfactor != KDETH_OM_SMALL);
Mike Marciniszyn77241052015-07-30 15:17:43 -04001390 }
1391done:
1392 trace_hfi1_sdma_user_header(pq->dd, pq->ctxt, pq->subctxt,
1393 req->info.comp_idx, hdr, tidval);
1394 return sdma_txadd_kvaddr(pq->dd, &tx->txreq, hdr, sizeof(*hdr));
1395}
1396
1397static int set_txreq_header_ahg(struct user_sdma_request *req,
1398 struct user_sdma_txreq *tx, u32 len)
1399{
1400 int diff = 0;
1401 struct hfi1_user_sdma_pkt_q *pq = req->pq;
1402 struct hfi1_pkt_header *hdr = &req->hdr;
1403 u16 pbclen = le16_to_cpu(hdr->pbc[0]);
1404 u32 val32, tidval = 0, lrhlen = get_lrh_len(*hdr, len);
1405
1406 if (PBC2LRH(pbclen) != lrhlen) {
1407 /* PBC.PbcLengthDWs */
1408 AHG_HEADER_SET(req->ahg, diff, 0, 0, 12,
1409 cpu_to_le16(LRH2PBC(lrhlen)));
1410 /* LRH.PktLen (we need the full 16 bits due to byte swap) */
1411 AHG_HEADER_SET(req->ahg, diff, 3, 0, 16,
1412 cpu_to_be16(lrhlen >> 2));
1413 }
1414
1415 /*
1416 * Do the common updates
1417 */
1418 /* BTH.PSN and BTH.A */
1419 val32 = (be32_to_cpu(hdr->bth[2]) + req->seqnum) &
1420 (HFI1_CAP_IS_KSET(EXTENDED_PSN) ? 0x7fffffff : 0xffffff);
Mitko Haralanovb9fb63182015-10-26 10:28:37 -04001421 if (unlikely(tx->flags & TXREQ_FLAGS_REQ_LAST_PKT))
Mike Marciniszyn77241052015-07-30 15:17:43 -04001422 val32 |= 1UL << 31;
1423 AHG_HEADER_SET(req->ahg, diff, 6, 0, 16, cpu_to_be16(val32 >> 16));
1424 AHG_HEADER_SET(req->ahg, diff, 6, 16, 16, cpu_to_be16(val32 & 0xffff));
1425 /* KDETH.Offset */
1426 AHG_HEADER_SET(req->ahg, diff, 15, 0, 16,
1427 cpu_to_le16(req->koffset & 0xffff));
1428 AHG_HEADER_SET(req->ahg, diff, 15, 16, 16,
1429 cpu_to_le16(req->koffset >> 16));
1430 if (req_opcode(req->info.ctrl) == EXPECTED) {
1431 __le16 val;
1432
1433 tidval = req->tids[req->tididx];
1434
1435 /*
1436 * If the offset puts us at the end of the current TID,
1437 * advance everything.
1438 */
1439 if ((req->tidoffset) == (EXP_TID_GET(tidval, LEN) *
1440 PAGE_SIZE)) {
1441 req->tidoffset = 0;
Jubin John4d114fd2016-02-14 20:21:43 -08001442 /*
1443 * Since we don't copy all the TIDs, all at once,
1444 * we have to check again.
1445 */
Mike Marciniszyn77241052015-07-30 15:17:43 -04001446 if (++req->tididx > req->n_tids - 1 ||
1447 !req->tids[req->tididx]) {
1448 return -EINVAL;
1449 }
1450 tidval = req->tids[req->tididx];
1451 }
1452 req->omfactor = ((EXP_TID_GET(tidval, LEN) *
1453 PAGE_SIZE) >=
1454 KDETH_OM_MAX_SIZE) ? KDETH_OM_LARGE :
1455 KDETH_OM_SMALL;
1456 /* KDETH.OM and KDETH.OFFSET (TID) */
1457 AHG_HEADER_SET(req->ahg, diff, 7, 0, 16,
1458 ((!!(req->omfactor - KDETH_OM_SMALL)) << 15 |
1459 ((req->tidoffset / req->omfactor) & 0x7fff)));
1460 /* KDETH.TIDCtrl, KDETH.TID */
1461 val = cpu_to_le16(((EXP_TID_GET(tidval, CTRL) & 0x3) << 10) |
1462 (EXP_TID_GET(tidval, IDX) & 0x3ff));
1463 /* Clear KDETH.SH on last packet */
Mitko Haralanovb9fb63182015-10-26 10:28:37 -04001464 if (unlikely(tx->flags & TXREQ_FLAGS_REQ_LAST_PKT)) {
Mike Marciniszyn77241052015-07-30 15:17:43 -04001465 val |= cpu_to_le16(KDETH_GET(hdr->kdeth.ver_tid_offset,
1466 INTR) >> 16);
1467 val &= cpu_to_le16(~(1U << 13));
1468 AHG_HEADER_SET(req->ahg, diff, 7, 16, 14, val);
Jubin Johne4909742016-02-14 20:22:00 -08001469 } else {
Mike Marciniszyn77241052015-07-30 15:17:43 -04001470 AHG_HEADER_SET(req->ahg, diff, 7, 16, 12, val);
Jubin Johne4909742016-02-14 20:22:00 -08001471 }
Mike Marciniszyn77241052015-07-30 15:17:43 -04001472 }
1473
1474 trace_hfi1_sdma_user_header_ahg(pq->dd, pq->ctxt, pq->subctxt,
1475 req->info.comp_idx, req->sde->this_idx,
1476 req->ahg_idx, req->ahg, diff, tidval);
1477 return diff;
1478}
1479
Mitko Haralanova0d40692015-12-08 17:10:13 -05001480/*
1481 * SDMA tx request completion callback. Called when the SDMA progress
1482 * state machine gets notification that the SDMA descriptors for this
1483 * tx request have been processed by the DMA engine. Called in
1484 * interrupt context.
1485 */
Mike Marciniszyna545f532016-02-14 12:45:53 -08001486static void user_sdma_txreq_cb(struct sdma_txreq *txreq, int status)
Mike Marciniszyn77241052015-07-30 15:17:43 -04001487{
1488 struct user_sdma_txreq *tx =
1489 container_of(txreq, struct user_sdma_txreq, txreq);
Mitko Haralanova0d40692015-12-08 17:10:13 -05001490 struct user_sdma_request *req;
Mitko Haralanov0f2d87d2016-02-03 14:35:06 -08001491 struct hfi1_user_sdma_pkt_q *pq;
1492 struct hfi1_user_sdma_comp_q *cq;
1493 u16 idx;
Mike Marciniszyn77241052015-07-30 15:17:43 -04001494
Mitko Haralanova0d40692015-12-08 17:10:13 -05001495 if (!tx->req)
Mike Marciniszyn77241052015-07-30 15:17:43 -04001496 return;
1497
Mitko Haralanova0d40692015-12-08 17:10:13 -05001498 req = tx->req;
Mitko Haralanov0f2d87d2016-02-03 14:35:06 -08001499 pq = req->pq;
1500 cq = req->cq;
Mitko Haralanovb9fb63182015-10-26 10:28:37 -04001501
Mike Marciniszyn77241052015-07-30 15:17:43 -04001502 if (status != SDMA_TXREQ_S_OK) {
Mitko Haralanova0d40692015-12-08 17:10:13 -05001503 SDMA_DBG(req, "SDMA completion with error %d",
1504 status);
Mike Marciniszyn77241052015-07-30 15:17:43 -04001505 set_bit(SDMA_REQ_HAS_ERROR, &req->flags);
Mitko Haralanova0d40692015-12-08 17:10:13 -05001506 }
1507
Mitko Haralanov0f2d87d2016-02-03 14:35:06 -08001508 req->seqcomp = tx->seqnum;
1509 kmem_cache_free(pq->txreq_cache, tx);
1510 tx = NULL;
1511
1512 idx = req->info.comp_idx;
1513 if (req->status == -1 && status == SDMA_TXREQ_S_OK) {
1514 if (req->seqcomp == req->info.npkts - 1) {
1515 req->status = 0;
1516 user_sdma_free_request(req, false);
1517 pq_update(pq);
1518 set_comp_state(pq, cq, idx, COMPLETE, 0);
1519 }
Mike Marciniszyn77241052015-07-30 15:17:43 -04001520 } else {
Mitko Haralanov0f2d87d2016-02-03 14:35:06 -08001521 if (status != SDMA_TXREQ_S_OK)
1522 req->status = status;
Mitko Haralanovc7cbf2f2016-02-03 14:35:23 -08001523 if (req->seqcomp == (ACCESS_ONCE(req->seqsubmitted) - 1) &&
1524 (test_bit(SDMA_REQ_SEND_DONE, &req->flags) ||
1525 test_bit(SDMA_REQ_DONE_ERROR, &req->flags))) {
Mitko Haralanov0f2d87d2016-02-03 14:35:06 -08001526 user_sdma_free_request(req, false);
1527 pq_update(pq);
1528 set_comp_state(pq, cq, idx, ERROR, req->status);
1529 }
Mitko Haralanova0d40692015-12-08 17:10:13 -05001530 }
1531}
1532
Mitko Haralanov0f2d87d2016-02-03 14:35:06 -08001533static inline void pq_update(struct hfi1_user_sdma_pkt_q *pq)
Mitko Haralanova0d40692015-12-08 17:10:13 -05001534{
Mitko Haralanov0f2d87d2016-02-03 14:35:06 -08001535 if (atomic_dec_and_test(&pq->n_reqs)) {
Mike Marciniszyn77241052015-07-30 15:17:43 -04001536 xchg(&pq->state, SDMA_PKT_Q_INACTIVE);
Mitko Haralanova0d40692015-12-08 17:10:13 -05001537 wake_up(&pq->wait);
1538 }
Mike Marciniszyn77241052015-07-30 15:17:43 -04001539}
1540
Mitko Haralanov0f2d87d2016-02-03 14:35:06 -08001541static void user_sdma_free_request(struct user_sdma_request *req, bool unpin)
Mike Marciniszyn77241052015-07-30 15:17:43 -04001542{
1543 if (!list_empty(&req->txps)) {
1544 struct sdma_txreq *t, *p;
1545
1546 list_for_each_entry_safe(t, p, &req->txps, list) {
1547 struct user_sdma_txreq *tx =
1548 container_of(t, struct user_sdma_txreq, txreq);
1549 list_del_init(&t->list);
1550 sdma_txclean(req->pq->dd, t);
1551 kmem_cache_free(req->pq->txreq_cache, tx);
1552 }
1553 }
1554 if (req->data_iovs) {
Mitko Haralanov5cd3a88d2016-03-08 11:15:22 -08001555 struct sdma_mmu_node *node;
Mike Marciniszyn77241052015-07-30 15:17:43 -04001556 int i;
1557
Mitko Haralanov5cd3a88d2016-03-08 11:15:22 -08001558 for (i = 0; i < req->data_iovs; i++) {
Mitko Haralanov9565c6a2016-05-19 05:21:18 -07001559 node = req->iovs[i].node;
1560 if (!node)
Mitko Haralanov5cd3a88d2016-03-08 11:15:22 -08001561 continue;
1562
Mitko Haralanov5cd3a88d2016-03-08 11:15:22 -08001563 if (unpin)
1564 hfi1_mmu_rb_remove(&req->pq->sdma_rb_root,
1565 &node->rb);
1566 else
1567 atomic_dec(&node->refcount);
1568 }
Mike Marciniszyn77241052015-07-30 15:17:43 -04001569 }
Mike Marciniszyn77241052015-07-30 15:17:43 -04001570 kfree(req->tids);
1571 clear_bit(SDMA_REQ_IN_USE, &req->flags);
1572}
1573
Mitko Haralanov0f2d87d2016-02-03 14:35:06 -08001574static inline void set_comp_state(struct hfi1_user_sdma_pkt_q *pq,
1575 struct hfi1_user_sdma_comp_q *cq,
1576 u16 idx, enum hfi1_sdma_comp_state state,
1577 int ret)
Mike Marciniszyn77241052015-07-30 15:17:43 -04001578{
Mitko Haralanov0f2d87d2016-02-03 14:35:06 -08001579 hfi1_cdbg(SDMA, "[%u:%u:%u:%u] Setting completion status %u %d",
1580 pq->dd->unit, pq->ctxt, pq->subctxt, idx, state, ret);
1581 cq->comps[idx].status = state;
Mike Marciniszyn77241052015-07-30 15:17:43 -04001582 if (state == ERROR)
Mitko Haralanov0f2d87d2016-02-03 14:35:06 -08001583 cq->comps[idx].errcode = -ret;
1584 trace_hfi1_sdma_user_completion(pq->dd, pq->ctxt, pq->subctxt,
1585 idx, state, ret);
Mike Marciniszyn77241052015-07-30 15:17:43 -04001586}
Mitko Haralanov5cd3a88d2016-03-08 11:15:22 -08001587
1588static bool sdma_rb_filter(struct mmu_rb_node *node, unsigned long addr,
1589 unsigned long len)
1590{
1591 return (bool)(node->addr == addr);
1592}
1593
1594static int sdma_rb_insert(struct rb_root *root, struct mmu_rb_node *mnode)
1595{
1596 struct sdma_mmu_node *node =
1597 container_of(mnode, struct sdma_mmu_node, rb);
1598
1599 atomic_inc(&node->refcount);
1600 return 0;
1601}
1602
1603static void sdma_rb_remove(struct rb_root *root, struct mmu_rb_node *mnode,
Mitko Haralanovf19bd642016-04-12 10:45:57 -07001604 struct mm_struct *mm)
Mitko Haralanov5cd3a88d2016-03-08 11:15:22 -08001605{
1606 struct sdma_mmu_node *node =
1607 container_of(mnode, struct sdma_mmu_node, rb);
1608
Mitko Haralanov5511d782016-03-08 11:15:44 -08001609 spin_lock(&node->pq->evict_lock);
Mitko Haralanove88c9272016-04-12 10:46:53 -07001610 /*
1611 * We've been called by the MMU notifier but this node has been
1612 * scheduled for eviction. The eviction function will take care
1613 * of freeing this node.
1614 * We have to take the above lock first because we are racing
1615 * against the setting of the bit in the eviction function.
1616 */
1617 if (mm && test_bit(SDMA_CACHE_NODE_EVICT, &node->flags)) {
1618 spin_unlock(&node->pq->evict_lock);
1619 return;
1620 }
1621
Mitko Haralanov4787bc52016-04-12 10:46:23 -07001622 if (!list_empty(&node->list))
1623 list_del(&node->list);
Mitko Haralanov5511d782016-03-08 11:15:44 -08001624 node->pq->n_locked -= node->npages;
1625 spin_unlock(&node->pq->evict_lock);
1626
Mitko Haralanovf19bd642016-04-12 10:45:57 -07001627 /*
1628 * If mm is set, we are being called by the MMU notifier and we
1629 * should not pass a mm_struct to unpin_vector_page(). This is to
1630 * prevent a deadlock when hfi1_release_user_pages() attempts to
1631 * take the mmap_sem, which the MMU notifier has already taken.
1632 */
Mitko Haralanov849e3e92016-04-12 10:46:16 -07001633 unpin_vector_pages(mm ? NULL : current->mm, node->pages, 0,
1634 node->npages);
Mitko Haralanovbd3a8942016-03-08 11:15:33 -08001635 /*
1636 * If called by the MMU notifier, we have to adjust the pinned
1637 * page count ourselves.
1638 */
Mitko Haralanovf19bd642016-04-12 10:45:57 -07001639 if (mm)
1640 mm->pinned_vm -= node->npages;
Mitko Haralanov5cd3a88d2016-03-08 11:15:22 -08001641 kfree(node);
1642}
1643
1644static int sdma_rb_invalidate(struct rb_root *root, struct mmu_rb_node *mnode)
1645{
1646 struct sdma_mmu_node *node =
1647 container_of(mnode, struct sdma_mmu_node, rb);
1648
1649 if (!atomic_read(&node->refcount))
1650 return 1;
1651 return 0;
Mike Marciniszyn77241052015-07-30 15:17:43 -04001652}