Linus Walleij | 978577e | 2013-04-08 11:38:50 +0200 | [diff] [blame] | 1 | /* |
| 2 | * Device Tree for the ST-Ericsson U300 Machine and SoC |
| 3 | */ |
| 4 | |
| 5 | /dts-v1/; |
| 6 | /include/ "skeleton.dtsi" |
| 7 | |
| 8 | / { |
| 9 | model = "ST-Ericsson U300"; |
| 10 | compatible = "stericsson,u300"; |
| 11 | #address-cells = <1>; |
| 12 | #size-cells = <1>; |
| 13 | |
| 14 | chosen { |
| 15 | bootargs = "root=/dev/ram0 console=ttyAMA0,115200n8 earlyprintk"; |
| 16 | }; |
| 17 | |
| 18 | aliases { |
| 19 | serial0 = &uart0; |
| 20 | serial1 = &uart1; |
| 21 | }; |
| 22 | |
| 23 | memory { |
| 24 | reg = <0x48000000 0x03c00000>; |
| 25 | }; |
| 26 | |
Linus Walleij | ecf5b39 | 2013-04-19 10:51:59 +0200 | [diff] [blame] | 27 | s365 { |
| 28 | compatible = "stericsson,s365"; |
| 29 | vana15-supply = <&ab3100_ldo_d_reg>; |
Linus Walleij | cf0ce09 | 2013-05-22 16:15:13 +0200 | [diff] [blame] | 30 | syscon = <&syscon>; |
| 31 | }; |
| 32 | |
| 33 | syscon: syscon@c0011000 { |
| 34 | compatible = "stericsson,u300-syscon"; |
| 35 | reg = <0xc0011000 0x1000>; |
Linus Walleij | 14c2607 | 2013-05-23 11:09:57 +0200 | [diff] [blame^] | 36 | clk32: app_32_clk@32k { |
| 37 | #clock-cells = <0>; |
| 38 | compatible = "fixed-clock"; |
| 39 | clock-frequency = <32768>; |
| 40 | }; |
| 41 | pll13: pll13@13M { |
| 42 | #clock-cells = <0>; |
| 43 | compatible = "fixed-clock"; |
| 44 | clock-frequency = <13000000>; |
| 45 | }; |
| 46 | pll208: pll208@208M { |
| 47 | #clock-cells = <0>; |
| 48 | compatible = "fixed-clock"; |
| 49 | clock-frequency = <208000000>; |
| 50 | }; |
| 51 | app208: app_208_clk@208M { |
| 52 | #clock-cells = <0>; |
| 53 | compatible = "fixed-factor-clock"; |
| 54 | clock-div = <1>; |
| 55 | clock-mult = <1>; |
| 56 | clocks = <&pll208>; |
| 57 | }; |
| 58 | app104: app_104_clk@104M { |
| 59 | #clock-cells = <0>; |
| 60 | compatible = "fixed-factor-clock"; |
| 61 | clock-div = <2>; |
| 62 | clock-mult = <1>; |
| 63 | clocks = <&pll208>; |
| 64 | }; |
| 65 | app52: app_52_clk@52M { |
| 66 | #clock-cells = <0>; |
| 67 | compatible = "fixed-factor-clock"; |
| 68 | clock-div = <4>; |
| 69 | clock-mult = <1>; |
| 70 | clocks = <&pll208>; |
| 71 | }; |
| 72 | app26: app_26_clk@26M { |
| 73 | #clock-cells = <0>; |
| 74 | compatible = "fixed-factor-clock"; |
| 75 | clock-div = <2>; |
| 76 | clock-mult = <1>; |
| 77 | clocks = <&app52>; |
| 78 | }; |
Linus Walleij | ecf5b39 | 2013-04-19 10:51:59 +0200 | [diff] [blame] | 79 | }; |
| 80 | |
Linus Walleij | 978577e | 2013-04-08 11:38:50 +0200 | [diff] [blame] | 81 | timer: timer@c0014000 { |
| 82 | compatible = "stericsson,u300-apptimer"; |
| 83 | reg = <0xc0014000 0x1000>; |
| 84 | interrupt-parent = <&vica>; |
| 85 | interrupts = <24 25 26 27>; |
| 86 | }; |
| 87 | |
| 88 | gpio: gpio@c0016000 { |
| 89 | compatible = "stericsson,gpio-coh901"; |
| 90 | reg = <0xc0016000 0x1000>; |
| 91 | interrupt-parent = <&vicb>; |
| 92 | interrupts = <0 1 2 18 21 22 23>; |
| 93 | interrupt-names = "gpio0", "gpio1", "gpio2", "gpio3", |
| 94 | "gpio4", "gpio5", "gpio6"; |
| 95 | interrupt-controller; |
| 96 | #interrupt-cells = <2>; |
| 97 | gpio-controller; |
| 98 | #gpio-cells = <2>; |
| 99 | }; |
| 100 | |
| 101 | pinctrl: pinctrl@c0011000 { |
| 102 | compatible = "stericsson,pinctrl-u300"; |
| 103 | reg = <0xc0011000 0x1000>; |
| 104 | }; |
| 105 | |
Linus Walleij | 63a62ec | 2013-04-19 12:59:59 +0200 | [diff] [blame] | 106 | watchdog: watchdog@c0012000 { |
| 107 | compatible = "stericsson,coh901327"; |
| 108 | reg = <0xc0012000 0x1000>; |
| 109 | interrupt-parent = <&vicb>; |
| 110 | interrupts = <3>; |
Linus Walleij | 14c2607 | 2013-05-23 11:09:57 +0200 | [diff] [blame^] | 111 | clocks = <&clk32>; |
Linus Walleij | 63a62ec | 2013-04-19 12:59:59 +0200 | [diff] [blame] | 112 | }; |
| 113 | |
Linus Walleij | ae87bb8 | 2013-04-19 13:22:57 +0200 | [diff] [blame] | 114 | rtc: rtc@c0017000 { |
| 115 | compatible = "stericsson,coh901331"; |
| 116 | reg = <0xc0017000 0x1000>; |
| 117 | interrupt-parent = <&vicb>; |
| 118 | interrupts = <10>; |
| 119 | }; |
| 120 | |
Linus Walleij | 39738cc | 2013-04-19 13:44:25 +0200 | [diff] [blame] | 121 | dmac: dma-controller@c00020000 { |
| 122 | compatible = "stericsson,coh901318"; |
| 123 | reg = <0xc0020000 0x1000>; |
| 124 | interrupt-parent = <&vica>; |
| 125 | interrupts = <2>; |
| 126 | #dma-cells = <1>; |
| 127 | dma-channels = <40>; |
| 128 | }; |
| 129 | |
Linus Walleij | d134636 | 2013-04-22 11:00:02 +0200 | [diff] [blame] | 130 | /* A NAND flash of 128 MiB */ |
| 131 | fsmc: flash@40000000 { |
| 132 | compatible = "stericsson,fsmc-nand"; |
| 133 | #address-cells = <1>; |
| 134 | #size-cells = <1>; |
| 135 | reg = <0x9f800000 0x1000>, /* FSMC Register*/ |
| 136 | <0x80000000 0x4000>, /* NAND Base DATA */ |
| 137 | <0x80020000 0x4000>, /* NAND Base ADDR */ |
| 138 | <0x80010000 0x4000>; /* NAND Base CMD */ |
| 139 | reg-names = "fsmc_regs", "nand_data", "nand_addr", "nand_cmd"; |
| 140 | nand-skip-bbtscan; |
| 141 | |
| 142 | partition@0 { |
| 143 | label = "boot records"; |
| 144 | reg = <0x0 0x20000>; |
| 145 | }; |
| 146 | partition@20000 { |
| 147 | label = "free"; |
| 148 | reg = <0x20000 0x7e0000>; |
| 149 | }; |
| 150 | partition@800000 { |
| 151 | label = "platform"; |
| 152 | reg = <0x800000 0xf800000>; |
| 153 | }; |
| 154 | }; |
| 155 | |
Linus Walleij | c023b8b | 2013-04-11 15:13:39 +0200 | [diff] [blame] | 156 | i2c0: i2c@c0004000 { |
| 157 | compatible = "st,ddci2c"; |
| 158 | reg = <0xc0004000 0x1000>; |
| 159 | interrupt-parent = <&vicb>; |
| 160 | interrupts = <8>; |
| 161 | #address-cells = <1>; |
| 162 | #size-cells = <0>; |
Linus Walleij | ecf5b39 | 2013-04-19 10:51:59 +0200 | [diff] [blame] | 163 | ab3100: ab3100@0x48 { |
| 164 | compatible = "stericsson,ab3100"; |
| 165 | reg = <0x48>; |
| 166 | interrupt-parent = <&vica>; |
| 167 | interrupts = <0>; /* EXT0 IRQ */ |
| 168 | ab3100-regulators { |
| 169 | compatible = "stericsson,ab3100-regulators"; |
| 170 | ab3100_ldo_a_reg: ab3100_ldo_a { |
| 171 | regulator-compatible = "ab3100_ldo_a"; |
| 172 | startup-delay-us = <200>; |
| 173 | regulator-always-on; |
| 174 | regulator-boot-on; |
| 175 | }; |
| 176 | ab3100_ldo_c_reg: ab3100_ldo_c { |
| 177 | regulator-compatible = "ab3100_ldo_c"; |
| 178 | startup-delay-us = <200>; |
| 179 | }; |
| 180 | ab3100_ldo_d_reg: ab3100_ldo_d { |
| 181 | regulator-compatible = "ab3100_ldo_d"; |
| 182 | startup-delay-us = <200>; |
| 183 | }; |
| 184 | ab3100_ldo_e_reg: ab3100_ldo_e { |
| 185 | regulator-compatible = "ab3100_ldo_e"; |
| 186 | regulator-min-microvolt = <1800000>; |
| 187 | regulator-max-microvolt = <1800000>; |
| 188 | startup-delay-us = <200>; |
| 189 | regulator-always-on; |
| 190 | regulator-boot-on; |
| 191 | }; |
| 192 | ab3100_ldo_f_reg: ab3100_ldo_f { |
| 193 | regulator-compatible = "ab3100_ldo_f"; |
| 194 | regulator-min-microvolt = <2500000>; |
| 195 | regulator-max-microvolt = <2500000>; |
| 196 | startup-delay-us = <600>; |
| 197 | regulator-always-on; |
| 198 | regulator-boot-on; |
| 199 | }; |
| 200 | ab3100_ldo_g_reg: ab3100_ldo_g { |
| 201 | regulator-compatible = "ab3100_ldo_g"; |
| 202 | regulator-min-microvolt = <1500000>; |
| 203 | regulator-max-microvolt = <2850000>; |
| 204 | startup-delay-us = <400>; |
| 205 | }; |
| 206 | ab3100_ldo_h_reg: ab3100_ldo_h { |
| 207 | regulator-compatible = "ab3100_ldo_h"; |
| 208 | regulator-min-microvolt = <1200000>; |
| 209 | regulator-max-microvolt = <2750000>; |
| 210 | startup-delay-us = <200>; |
| 211 | }; |
| 212 | ab3100_ldo_k_reg: ab3100_ldo_k { |
| 213 | regulator-compatible = "ab3100_ldo_k"; |
| 214 | regulator-min-microvolt = <1800000>; |
| 215 | regulator-max-microvolt = <2750000>; |
| 216 | startup-delay-us = <200>; |
| 217 | }; |
| 218 | ab3100_ext_reg: ab3100_ext { |
| 219 | regulator-compatible = "ab3100_ext"; |
| 220 | }; |
| 221 | ab3100_buck_reg: ab3100_buck { |
| 222 | regulator-compatible = "ab3100_buck"; |
| 223 | regulator-min-microvolt = <1200000>; |
| 224 | regulator-max-microvolt = <1800000>; |
| 225 | startup-delay-us = <1000>; |
| 226 | regulator-always-on; |
| 227 | regulator-boot-on; |
| 228 | }; |
| 229 | }; |
| 230 | }; |
Linus Walleij | c023b8b | 2013-04-11 15:13:39 +0200 | [diff] [blame] | 231 | }; |
| 232 | |
| 233 | i2c1: i2c@c0005000 { |
| 234 | compatible = "st,ddci2c"; |
| 235 | reg = <0xc0005000 0x1000>; |
| 236 | interrupt-parent = <&vicb>; |
| 237 | interrupts = <9>; |
| 238 | #address-cells = <1>; |
| 239 | #size-cells = <0>; |
Linus Walleij | ecf5b39 | 2013-04-19 10:51:59 +0200 | [diff] [blame] | 240 | fwcam0: fwcam@0x10 { |
| 241 | reg = <0x10>; |
| 242 | }; |
| 243 | fwcam1: fwcam@0x5d { |
| 244 | reg = <0x5d>; |
| 245 | }; |
Linus Walleij | c023b8b | 2013-04-11 15:13:39 +0200 | [diff] [blame] | 246 | }; |
| 247 | |
Linus Walleij | 978577e | 2013-04-08 11:38:50 +0200 | [diff] [blame] | 248 | amba { |
| 249 | compatible = "arm,amba-bus"; |
| 250 | #address-cells = <1>; |
| 251 | #size-cells = <1>; |
| 252 | ranges; |
| 253 | |
| 254 | vica: interrupt-controller@a0001000 { |
| 255 | compatible = "arm,versatile-vic"; |
| 256 | interrupt-controller; |
| 257 | #interrupt-cells = <1>; |
| 258 | reg = <0xa0001000 0x20>; |
| 259 | }; |
| 260 | |
| 261 | vicb: interrupt-controller@a0002000 { |
| 262 | compatible = "arm,versatile-vic"; |
| 263 | interrupt-controller; |
| 264 | #interrupt-cells = <1>; |
| 265 | reg = <0xa0002000 0x20>; |
| 266 | }; |
| 267 | |
| 268 | uart0: serial@c0013000 { |
| 269 | compatible = "arm,pl011", "arm,primecell"; |
| 270 | reg = <0xc0013000 0x1000>; |
| 271 | interrupt-parent = <&vica>; |
| 272 | interrupts = <22>; |
Linus Walleij | efb9bc2 | 2013-05-02 10:38:52 +0200 | [diff] [blame] | 273 | dmas = <&dmac 17 &dmac 18>; |
| 274 | dma-names = "tx", "rx"; |
Linus Walleij | 978577e | 2013-04-08 11:38:50 +0200 | [diff] [blame] | 275 | }; |
| 276 | |
| 277 | uart1: serial@c0007000 { |
| 278 | compatible = "arm,pl011", "arm,primecell"; |
| 279 | reg = <0xc0007000 0x1000>; |
| 280 | interrupt-parent = <&vicb>; |
| 281 | interrupts = <20>; |
Linus Walleij | efb9bc2 | 2013-05-02 10:38:52 +0200 | [diff] [blame] | 282 | dmas = <&dmac 38 &dmac 39>; |
| 283 | dma-names = "tx", "rx"; |
Linus Walleij | 978577e | 2013-04-08 11:38:50 +0200 | [diff] [blame] | 284 | }; |
Linus Walleij | ba078d1 | 2013-04-10 14:34:00 +0200 | [diff] [blame] | 285 | |
| 286 | mmcsd: mmcsd@c0001000 { |
| 287 | compatible = "arm,pl18x", "arm,primecell"; |
| 288 | reg = <0xc0001000 0x1000>; |
| 289 | interrupt-parent = <&vicb>; |
| 290 | interrupts = <6 7>; |
| 291 | max-frequency = <24000000>; |
| 292 | bus-width = <4>; // SD-card slot |
| 293 | mmc-cap-mmc-highspeed; |
| 294 | mmc-cap-sd-highspeed; |
| 295 | cd-gpios = <&gpio 12 0x4>; |
| 296 | cd-inverted; |
| 297 | vmmc-supply = <&ab3100_ldo_g_reg>; |
Linus Walleij | efb9bc2 | 2013-05-02 10:38:52 +0200 | [diff] [blame] | 298 | dmas = <&dmac 14>; |
| 299 | dma-names = "rx"; |
Linus Walleij | ba078d1 | 2013-04-10 14:34:00 +0200 | [diff] [blame] | 300 | }; |
Linus Walleij | cf4af86 | 2013-04-19 14:56:46 +0200 | [diff] [blame] | 301 | |
| 302 | spi: ssp@c0006000 { |
| 303 | compatible = "arm,pl022", "arm,primecell"; |
| 304 | reg = <0xc0006000 0x1000>; |
| 305 | interrupt-parent = <&vica>; |
| 306 | interrupts = <23>; |
| 307 | dmas = <&dmac 27 &dmac 28>; |
| 308 | dma-names = "tx", "rx"; |
| 309 | num-cs = <3>; |
| 310 | #address-cells = <1>; |
| 311 | #size-cells = <0>; |
Linus Walleij | 20d4af6 | 2013-04-21 21:39:46 +0200 | [diff] [blame] | 312 | spi-dummy@1 { |
| 313 | compatible = "arm,pl022-dummy"; |
| 314 | reg = <1>; |
| 315 | spi-max-frequency = <20000000>; |
| 316 | }; |
Linus Walleij | cf4af86 | 2013-04-19 14:56:46 +0200 | [diff] [blame] | 317 | }; |
Linus Walleij | 978577e | 2013-04-08 11:38:50 +0200 | [diff] [blame] | 318 | }; |
| 319 | }; |