| Srinivas Pandruvada | eeb2d80 | 2017-10-05 16:24:03 -0700 | [diff] [blame] | 1 | To enumerate platform Low Power Idle states, Intel platforms are using |
| 2 | “Low Power Idle Table” (LPIT). More details about this table can be |
| 3 | downloaded from: |
| 4 | http://www.uefi.org/sites/default/files/resources/Intel_ACPI_Low_Power_S0_Idle.pdf |
| 5 | |
| 6 | Residencies for each low power state can be read via FFH |
| 7 | (Function fixed hardware) or a memory mapped interface. |
| 8 | |
| 9 | On platforms supporting S0ix sleep states, there can be two types of |
| 10 | residencies: |
| 11 | - CPU PKG C10 (Read via FFH interface) |
| 12 | - Platform Controller Hub (PCH) SLP_S0 (Read via memory mapped interface) |
| 13 | |
| 14 | The following attributes are added dynamically to the cpuidle |
| 15 | sysfs attribute group: |
| 16 | /sys/devices/system/cpu/cpuidle/low_power_idle_cpu_residency_us |
| 17 | /sys/devices/system/cpu/cpuidle/low_power_idle_system_residency_us |
| 18 | |
| 19 | The "low_power_idle_cpu_residency_us" attribute shows time spent |
| 20 | by the CPU package in PKG C10 |
| 21 | |
| 22 | The "low_power_idle_system_residency_us" attribute shows SLP_S0 |
| 23 | residency, or system time spent with the SLP_S0# signal asserted. |
| 24 | This is the lowest possible system power state, achieved only when CPU is in |
| 25 | PKG C10 and all functional blocks in PCH are in a low power state. |