blob: 4126b56fbc01c664d64e5ffa43b98fef8857ee00 [file] [log] [blame]
Dan Williamsb2f46fd2009-07-14 12:20:36 -07001/*
2 * Copyright(c) 2007 Yuri Tikhonov <yur@emcraft.com>
3 * Copyright(c) 2009 Intel Corporation
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License as published by the Free
7 * Software Foundation; either version 2 of the License, or (at your option)
8 * any later version.
9 *
10 * This program is distributed in the hope that it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * more details.
14 *
15 * You should have received a copy of the GNU General Public License along with
16 * this program; if not, write to the Free Software Foundation, Inc., 59
17 * Temple Place - Suite 330, Boston, MA 02111-1307, USA.
18 *
19 * The full GNU General Public License is included in this distribution in the
20 * file called COPYING.
21 */
22#include <linux/kernel.h>
23#include <linux/interrupt.h>
Paul Gortmaker4bb33cc2011-05-27 14:41:48 -040024#include <linux/module.h>
Dan Williamsb2f46fd2009-07-14 12:20:36 -070025#include <linux/dma-mapping.h>
26#include <linux/raid/pq.h>
27#include <linux/async_tx.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090028#include <linux/gfp.h>
Dan Williamsb2f46fd2009-07-14 12:20:36 -070029
30/**
Dan Williams030b0772009-10-19 18:09:32 -070031 * pq_scribble_page - space to hold throwaway P or Q buffer for
32 * synchronous gen_syndrome
Dan Williamsb2f46fd2009-07-14 12:20:36 -070033 */
Dan Williams030b0772009-10-19 18:09:32 -070034static struct page *pq_scribble_page;
Dan Williamsb2f46fd2009-07-14 12:20:36 -070035
Dan Williamsb2f46fd2009-07-14 12:20:36 -070036/* the struct page *blocks[] parameter passed to async_gen_syndrome()
37 * and async_syndrome_val() contains the 'P' destination address at
38 * blocks[disks-2] and the 'Q' destination address at blocks[disks-1]
39 *
40 * note: these are macros as they are used as lvalues
41 */
42#define P(b, d) (b[d-2])
43#define Q(b, d) (b[d-1])
44
45/**
46 * do_async_gen_syndrome - asynchronously calculate P and/or Q
47 */
48static __async_inline struct dma_async_tx_descriptor *
Dan Williams7476bd72013-10-18 19:35:29 +020049do_async_gen_syndrome(struct dma_chan *chan,
50 const unsigned char *scfs, int disks,
51 struct dmaengine_unmap_data *unmap,
52 enum dma_ctrl_flags dma_flags,
Dan Williamsb2f46fd2009-07-14 12:20:36 -070053 struct async_submit_ctl *submit)
54{
55 struct dma_async_tx_descriptor *tx = NULL;
56 struct dma_device *dma = chan->device;
Dan Williamsb2f46fd2009-07-14 12:20:36 -070057 enum async_tx_flags flags_orig = submit->flags;
58 dma_async_tx_callback cb_fn_orig = submit->cb_fn;
59 dma_async_tx_callback cb_param_orig = submit->cb_param;
60 int src_cnt = disks - 2;
Dan Williamsb2f46fd2009-07-14 12:20:36 -070061 unsigned short pq_src_cnt;
62 dma_addr_t dma_dest[2];
63 int src_off = 0;
Dan Williamsb2f46fd2009-07-14 12:20:36 -070064
Dan Williams7476bd72013-10-18 19:35:29 +020065 dma_flags |= DMA_COMPL_SKIP_SRC_UNMAP | DMA_COMPL_SKIP_DEST_UNMAP;
66 if (submit->flags & ASYNC_TX_FENCE)
67 dma_flags |= DMA_PREP_FENCE;
Dan Williamsb2f46fd2009-07-14 12:20:36 -070068
69 while (src_cnt > 0) {
70 submit->flags = flags_orig;
71 pq_src_cnt = min(src_cnt, dma_maxpq(dma, dma_flags));
72 /* if we are submitting additional pqs, leave the chain open,
73 * clear the callback parameters, and leave the destination
74 * buffers mapped
75 */
76 if (src_cnt > pq_src_cnt) {
77 submit->flags &= ~ASYNC_TX_ACK;
Dan Williams0403e382009-09-08 17:42:50 -070078 submit->flags |= ASYNC_TX_FENCE;
Dan Williamsb2f46fd2009-07-14 12:20:36 -070079 submit->cb_fn = NULL;
80 submit->cb_param = NULL;
81 } else {
Dan Williamsb2f46fd2009-07-14 12:20:36 -070082 submit->cb_fn = cb_fn_orig;
83 submit->cb_param = cb_param_orig;
84 if (cb_fn_orig)
85 dma_flags |= DMA_PREP_INTERRUPT;
86 }
87
Dan Williams7476bd72013-10-18 19:35:29 +020088 /* Drivers force forward progress in case they can not provide
89 * a descriptor
Dan Williamsb2f46fd2009-07-14 12:20:36 -070090 */
91 for (;;) {
Dan Williams7476bd72013-10-18 19:35:29 +020092 dma_dest[0] = unmap->addr[disks - 2];
93 dma_dest[1] = unmap->addr[disks - 1];
Dan Williamsb2f46fd2009-07-14 12:20:36 -070094 tx = dma->device_prep_dma_pq(chan, dma_dest,
Dan Williams7476bd72013-10-18 19:35:29 +020095 &unmap->addr[src_off],
Dan Williamsb2f46fd2009-07-14 12:20:36 -070096 pq_src_cnt,
Dan Williams7476bd72013-10-18 19:35:29 +020097 &scfs[src_off], unmap->len,
Dan Williamsb2f46fd2009-07-14 12:20:36 -070098 dma_flags);
99 if (likely(tx))
100 break;
101 async_tx_quiesce(&submit->depend_tx);
102 dma_async_issue_pending(chan);
103 }
104
Dan Williams7476bd72013-10-18 19:35:29 +0200105 dma_set_unmap(tx, unmap);
Dan Williamsb2f46fd2009-07-14 12:20:36 -0700106 async_tx_submit(chan, tx, submit);
107 submit->depend_tx = tx;
108
109 /* drop completed sources */
110 src_cnt -= pq_src_cnt;
111 src_off += pq_src_cnt;
112
113 dma_flags |= DMA_PREP_CONTINUE;
114 }
115
116 return tx;
117}
118
119/**
120 * do_sync_gen_syndrome - synchronously calculate a raid6 syndrome
121 */
122static void
123do_sync_gen_syndrome(struct page **blocks, unsigned int offset, int disks,
124 size_t len, struct async_submit_ctl *submit)
125{
126 void **srcs;
127 int i;
128
129 if (submit->scribble)
130 srcs = submit->scribble;
131 else
132 srcs = (void **) blocks;
133
134 for (i = 0; i < disks; i++) {
NeilBrown5dd33c92009-10-16 16:40:25 +1100135 if (blocks[i] == NULL) {
Dan Williamsb2f46fd2009-07-14 12:20:36 -0700136 BUG_ON(i > disks - 3); /* P or Q can't be zero */
NeilBrown5dd33c92009-10-16 16:40:25 +1100137 srcs[i] = (void*)raid6_empty_zero_page;
Dan Williamsb2f46fd2009-07-14 12:20:36 -0700138 } else
139 srcs[i] = page_address(blocks[i]) + offset;
140 }
141 raid6_call.gen_syndrome(disks, len, srcs);
142 async_tx_sync_epilog(submit);
143}
144
145/**
146 * async_gen_syndrome - asynchronously calculate a raid6 syndrome
147 * @blocks: source blocks from idx 0..disks-3, P @ disks-2 and Q @ disks-1
148 * @offset: common offset into each block (src and dest) to start transaction
149 * @disks: number of blocks (including missing P or Q, see below)
150 * @len: length of operation in bytes
151 * @submit: submission/completion modifiers
152 *
153 * General note: This routine assumes a field of GF(2^8) with a
154 * primitive polynomial of 0x11d and a generator of {02}.
155 *
156 * 'disks' note: callers can optionally omit either P or Q (but not
157 * both) from the calculation by setting blocks[disks-2] or
158 * blocks[disks-1] to NULL. When P or Q is omitted 'len' must be <=
159 * PAGE_SIZE as a temporary buffer of this size is used in the
160 * synchronous path. 'disks' always accounts for both destination
Dan Williams56764702009-10-19 18:09:32 -0700161 * buffers. If any source buffers (blocks[i] where i < disks - 2) are
162 * set to NULL those buffers will be replaced with the raid6_zero_page
163 * in the synchronous path and omitted in the hardware-asynchronous
164 * path.
Dan Williamsb2f46fd2009-07-14 12:20:36 -0700165 */
166struct dma_async_tx_descriptor *
167async_gen_syndrome(struct page **blocks, unsigned int offset, int disks,
168 size_t len, struct async_submit_ctl *submit)
169{
170 int src_cnt = disks - 2;
171 struct dma_chan *chan = async_tx_find_channel(submit, DMA_PQ,
172 &P(blocks, disks), 2,
173 blocks, src_cnt, len);
174 struct dma_device *device = chan ? chan->device : NULL;
Dan Williams7476bd72013-10-18 19:35:29 +0200175 struct dmaengine_unmap_data *unmap = NULL;
Dan Williamsb2f46fd2009-07-14 12:20:36 -0700176
177 BUG_ON(disks > 255 || !(P(blocks, disks) || Q(blocks, disks)));
178
Dan Williams7476bd72013-10-18 19:35:29 +0200179 if (device)
180 unmap = dmaengine_get_unmap_data(device->dev, disks, GFP_NOIO);
Dan Williamsb2f46fd2009-07-14 12:20:36 -0700181
Dan Williams7476bd72013-10-18 19:35:29 +0200182 if (unmap &&
Dan Williamsb2f46fd2009-07-14 12:20:36 -0700183 (src_cnt <= dma_maxpq(device, 0) ||
Dan Williams83544ae2009-09-08 17:42:53 -0700184 dma_maxpq(device, DMA_PREP_CONTINUE) > 0) &&
185 is_dma_pq_aligned(device, offset, 0, len)) {
Dan Williams7476bd72013-10-18 19:35:29 +0200186 struct dma_async_tx_descriptor *tx;
187 enum dma_ctrl_flags dma_flags = 0;
188 unsigned char coefs[src_cnt];
189 int i, j;
190
Dan Williamsb2f46fd2009-07-14 12:20:36 -0700191 /* run the p+q asynchronously */
192 pr_debug("%s: (async) disks: %d len: %zu\n",
193 __func__, disks, len);
Dan Williams7476bd72013-10-18 19:35:29 +0200194
195 /* convert source addresses being careful to collapse 'empty'
196 * sources and update the coefficients accordingly
197 */
198 unmap->len = len;
199 for (i = 0, j = 0; i < src_cnt; i++) {
200 if (blocks[i] == NULL)
201 continue;
202 unmap->addr[j] = dma_map_page(device->dev, blocks[i], offset,
203 len, DMA_TO_DEVICE);
204 coefs[j] = raid6_gfexp[i];
205 unmap->to_cnt++;
206 j++;
207 }
208
209 /*
210 * DMAs use destinations as sources,
211 * so use BIDIRECTIONAL mapping
212 */
213 unmap->bidi_cnt++;
214 if (P(blocks, disks))
215 unmap->addr[j++] = dma_map_page(device->dev, P(blocks, disks),
216 offset, len, DMA_BIDIRECTIONAL);
217 else {
218 unmap->addr[j++] = 0;
219 dma_flags |= DMA_PREP_PQ_DISABLE_P;
220 }
221
222 unmap->bidi_cnt++;
223 if (Q(blocks, disks))
224 unmap->addr[j++] = dma_map_page(device->dev, Q(blocks, disks),
225 offset, len, DMA_BIDIRECTIONAL);
226 else {
227 unmap->addr[j++] = 0;
228 dma_flags |= DMA_PREP_PQ_DISABLE_Q;
229 }
230
231 tx = do_async_gen_syndrome(chan, coefs, j, unmap, dma_flags, submit);
232 dmaengine_unmap_put(unmap);
233 return tx;
Dan Williamsb2f46fd2009-07-14 12:20:36 -0700234 }
235
Dan Williams7476bd72013-10-18 19:35:29 +0200236 dmaengine_unmap_put(unmap);
237
Dan Williamsb2f46fd2009-07-14 12:20:36 -0700238 /* run the pq synchronously */
239 pr_debug("%s: (sync) disks: %d len: %zu\n", __func__, disks, len);
240
241 /* wait for any prerequisite operations */
242 async_tx_quiesce(&submit->depend_tx);
243
244 if (!P(blocks, disks)) {
Dan Williams030b0772009-10-19 18:09:32 -0700245 P(blocks, disks) = pq_scribble_page;
Dan Williamsb2f46fd2009-07-14 12:20:36 -0700246 BUG_ON(len + offset > PAGE_SIZE);
247 }
248 if (!Q(blocks, disks)) {
Dan Williams030b0772009-10-19 18:09:32 -0700249 Q(blocks, disks) = pq_scribble_page;
Dan Williamsb2f46fd2009-07-14 12:20:36 -0700250 BUG_ON(len + offset > PAGE_SIZE);
251 }
252 do_sync_gen_syndrome(blocks, offset, disks, len, submit);
253
254 return NULL;
255}
256EXPORT_SYMBOL_GPL(async_gen_syndrome);
257
Dan Williams7b3cc2b2009-11-19 17:10:37 -0700258static inline struct dma_chan *
259pq_val_chan(struct async_submit_ctl *submit, struct page **blocks, int disks, size_t len)
260{
261 #ifdef CONFIG_ASYNC_TX_DISABLE_PQ_VAL_DMA
262 return NULL;
263 #endif
264 return async_tx_find_channel(submit, DMA_PQ_VAL, NULL, 0, blocks,
265 disks, len);
266}
267
Dan Williamsb2f46fd2009-07-14 12:20:36 -0700268/**
269 * async_syndrome_val - asynchronously validate a raid6 syndrome
270 * @blocks: source blocks from idx 0..disks-3, P @ disks-2 and Q @ disks-1
271 * @offset: common offset into each block (src and dest) to start transaction
272 * @disks: number of blocks (including missing P or Q, see below)
273 * @len: length of operation in bytes
274 * @pqres: on val failure SUM_CHECK_P_RESULT and/or SUM_CHECK_Q_RESULT are set
275 * @spare: temporary result buffer for the synchronous case
276 * @submit: submission / completion modifiers
277 *
278 * The same notes from async_gen_syndrome apply to the 'blocks',
279 * and 'disks' parameters of this routine. The synchronous path
280 * requires a temporary result buffer and submit->scribble to be
281 * specified.
282 */
283struct dma_async_tx_descriptor *
284async_syndrome_val(struct page **blocks, unsigned int offset, int disks,
285 size_t len, enum sum_check_flags *pqres, struct page *spare,
286 struct async_submit_ctl *submit)
287{
Dan Williams7b3cc2b2009-11-19 17:10:37 -0700288 struct dma_chan *chan = pq_val_chan(submit, blocks, disks, len);
Dan Williamsb2f46fd2009-07-14 12:20:36 -0700289 struct dma_device *device = chan ? chan->device : NULL;
290 struct dma_async_tx_descriptor *tx;
NeilBrownb2141e62009-10-16 16:40:34 +1100291 unsigned char coefs[disks-2];
Dan Williamsb2f46fd2009-07-14 12:20:36 -0700292 enum dma_ctrl_flags dma_flags = submit->cb_fn ? DMA_PREP_INTERRUPT : 0;
Dan Williams1786b942013-10-18 19:35:30 +0200293 struct dmaengine_unmap_data *unmap = NULL;
Dan Williamsb2f46fd2009-07-14 12:20:36 -0700294
295 BUG_ON(disks < 4);
296
Dan Williams1786b942013-10-18 19:35:30 +0200297 if (device)
298 unmap = dmaengine_get_unmap_data(device->dev, disks, GFP_NOIO);
Dan Williamsb2f46fd2009-07-14 12:20:36 -0700299
Dan Williams1786b942013-10-18 19:35:30 +0200300 if (unmap && disks <= dma_maxpq(device, 0) &&
Dan Williams83544ae2009-09-08 17:42:53 -0700301 is_dma_pq_aligned(device, offset, 0, len)) {
Dan Williamsb2f46fd2009-07-14 12:20:36 -0700302 struct device *dev = device->dev;
Dan Williams1786b942013-10-18 19:35:30 +0200303 dma_addr_t pq[2];
304 int i, j = 0, src_cnt = 0;
Dan Williamsb2f46fd2009-07-14 12:20:36 -0700305
306 pr_debug("%s: (async) disks: %d len: %zu\n",
307 __func__, disks, len);
Dan Williams1786b942013-10-18 19:35:30 +0200308
309 unmap->len = len;
310 for (i = 0; i < disks-2; i++)
311 if (likely(blocks[i])) {
312 unmap->addr[j] = dma_map_page(dev, blocks[i],
313 offset, len,
314 DMA_TO_DEVICE);
315 coefs[j] = raid6_gfexp[i];
316 unmap->to_cnt++;
317 src_cnt++;
318 j++;
319 }
320
321 if (!P(blocks, disks)) {
322 pq[0] = 0;
Dan Williamsb2f46fd2009-07-14 12:20:36 -0700323 dma_flags |= DMA_PREP_PQ_DISABLE_P;
Dan Williams1786b942013-10-18 19:35:30 +0200324 } else {
Dan Williams56764702009-10-19 18:09:32 -0700325 pq[0] = dma_map_page(dev, P(blocks, disks),
NeilBrownb2141e62009-10-16 16:40:34 +1100326 offset, len,
327 DMA_TO_DEVICE);
Dan Williams1786b942013-10-18 19:35:30 +0200328 unmap->addr[j++] = pq[0];
329 unmap->to_cnt++;
330 }
331 if (!Q(blocks, disks)) {
332 pq[1] = 0;
Dan Williamsb2f46fd2009-07-14 12:20:36 -0700333 dma_flags |= DMA_PREP_PQ_DISABLE_Q;
Dan Williams1786b942013-10-18 19:35:30 +0200334 } else {
Dan Williams56764702009-10-19 18:09:32 -0700335 pq[1] = dma_map_page(dev, Q(blocks, disks),
NeilBrownb2141e62009-10-16 16:40:34 +1100336 offset, len,
337 DMA_TO_DEVICE);
Dan Williams1786b942013-10-18 19:35:30 +0200338 unmap->addr[j++] = pq[1];
339 unmap->to_cnt++;
340 }
NeilBrownb2141e62009-10-16 16:40:34 +1100341
Dan Williams0403e382009-09-08 17:42:50 -0700342 if (submit->flags & ASYNC_TX_FENCE)
343 dma_flags |= DMA_PREP_FENCE;
Dan Williamsb2f46fd2009-07-14 12:20:36 -0700344 for (;;) {
Dan Williams1786b942013-10-18 19:35:30 +0200345 tx = device->device_prep_dma_pq_val(chan, pq,
346 unmap->addr,
NeilBrownb2141e62009-10-16 16:40:34 +1100347 src_cnt,
348 coefs,
Dan Williamsb2f46fd2009-07-14 12:20:36 -0700349 len, pqres,
350 dma_flags);
351 if (likely(tx))
352 break;
353 async_tx_quiesce(&submit->depend_tx);
354 dma_async_issue_pending(chan);
355 }
Dan Williams1786b942013-10-18 19:35:30 +0200356
357 dma_set_unmap(tx, unmap);
Dan Williamsb2f46fd2009-07-14 12:20:36 -0700358 async_tx_submit(chan, tx, submit);
359
360 return tx;
361 } else {
362 struct page *p_src = P(blocks, disks);
363 struct page *q_src = Q(blocks, disks);
364 enum async_tx_flags flags_orig = submit->flags;
365 dma_async_tx_callback cb_fn_orig = submit->cb_fn;
366 void *scribble = submit->scribble;
367 void *cb_param_orig = submit->cb_param;
368 void *p, *q, *s;
369
370 pr_debug("%s: (sync) disks: %d len: %zu\n",
371 __func__, disks, len);
372
373 /* caller must provide a temporary result buffer and
374 * allow the input parameters to be preserved
375 */
376 BUG_ON(!spare || !scribble);
377
378 /* wait for any prerequisite operations */
379 async_tx_quiesce(&submit->depend_tx);
380
381 /* recompute p and/or q into the temporary buffer and then
382 * check to see the result matches the current value
383 */
384 tx = NULL;
385 *pqres = 0;
386 if (p_src) {
387 init_async_submit(submit, ASYNC_TX_XOR_ZERO_DST, NULL,
388 NULL, NULL, scribble);
389 tx = async_xor(spare, blocks, offset, disks-2, len, submit);
390 async_tx_quiesce(&tx);
391 p = page_address(p_src) + offset;
392 s = page_address(spare) + offset;
393 *pqres |= !!memcmp(p, s, len) << SUM_CHECK_P;
394 }
395
396 if (q_src) {
397 P(blocks, disks) = NULL;
398 Q(blocks, disks) = spare;
399 init_async_submit(submit, 0, NULL, NULL, NULL, scribble);
400 tx = async_gen_syndrome(blocks, offset, disks, len, submit);
401 async_tx_quiesce(&tx);
402 q = page_address(q_src) + offset;
403 s = page_address(spare) + offset;
404 *pqres |= !!memcmp(q, s, len) << SUM_CHECK_Q;
405 }
406
407 /* restore P, Q and submit */
408 P(blocks, disks) = p_src;
409 Q(blocks, disks) = q_src;
410
411 submit->cb_fn = cb_fn_orig;
412 submit->cb_param = cb_param_orig;
413 submit->flags = flags_orig;
414 async_tx_sync_epilog(submit);
415
416 return NULL;
417 }
418}
419EXPORT_SYMBOL_GPL(async_syndrome_val);
420
421static int __init async_pq_init(void)
422{
Dan Williams030b0772009-10-19 18:09:32 -0700423 pq_scribble_page = alloc_page(GFP_KERNEL);
Dan Williamsb2f46fd2009-07-14 12:20:36 -0700424
Dan Williams030b0772009-10-19 18:09:32 -0700425 if (pq_scribble_page)
Dan Williamsb2f46fd2009-07-14 12:20:36 -0700426 return 0;
427
428 pr_err("%s: failed to allocate required spare page\n", __func__);
429
430 return -ENOMEM;
431}
432
433static void __exit async_pq_exit(void)
434{
Dan Williams030b0772009-10-19 18:09:32 -0700435 put_page(pq_scribble_page);
Dan Williamsb2f46fd2009-07-14 12:20:36 -0700436}
437
438module_init(async_pq_init);
439module_exit(async_pq_exit);
440
441MODULE_DESCRIPTION("asynchronous raid6 syndrome generation/validation");
442MODULE_LICENSE("GPL");