blob: ff04ed2bb7a3df3f1ffaf97b509279b9b3369819 [file] [log] [blame]
Benjamin Gaignard54026262014-07-30 19:24:55 +02001/*
2 * Copyright (C) STMicroelectronics SA 2014
3 * Author: Vincent Abriou <vincent.abriou@st.com> for STMicroelectronics.
4 * License terms: GNU General Public License (GPL), version 2
5 */
6
7#include <linux/clk.h>
8#include <linux/component.h>
9#include <linux/hdmi.h>
10#include <linux/module.h>
11#include <linux/of_gpio.h>
12#include <linux/platform_device.h>
13#include <linux/reset.h>
14
15#include <drm/drmP.h>
Benjamin Gaignardde4b00b2015-03-19 13:35:16 +010016#include <drm/drm_atomic_helper.h>
Benjamin Gaignard54026262014-07-30 19:24:55 +020017#include <drm/drm_crtc_helper.h>
18#include <drm/drm_edid.h>
19
20#include "sti_hdmi.h"
21#include "sti_hdmi_tx3g4c28phy.h"
22#include "sti_hdmi_tx3g0c55phy.h"
23#include "sti_vtg.h"
24
25#define HDMI_CFG 0x0000
26#define HDMI_INT_EN 0x0004
27#define HDMI_INT_STA 0x0008
28#define HDMI_INT_CLR 0x000C
29#define HDMI_STA 0x0010
30#define HDMI_ACTIVE_VID_XMIN 0x0100
31#define HDMI_ACTIVE_VID_XMAX 0x0104
32#define HDMI_ACTIVE_VID_YMIN 0x0108
33#define HDMI_ACTIVE_VID_YMAX 0x010C
34#define HDMI_DFLT_CHL0_DAT 0x0110
35#define HDMI_DFLT_CHL1_DAT 0x0114
36#define HDMI_DFLT_CHL2_DAT 0x0118
37#define HDMI_SW_DI_1_HEAD_WORD 0x0210
38#define HDMI_SW_DI_1_PKT_WORD0 0x0214
39#define HDMI_SW_DI_1_PKT_WORD1 0x0218
40#define HDMI_SW_DI_1_PKT_WORD2 0x021C
41#define HDMI_SW_DI_1_PKT_WORD3 0x0220
42#define HDMI_SW_DI_1_PKT_WORD4 0x0224
43#define HDMI_SW_DI_1_PKT_WORD5 0x0228
44#define HDMI_SW_DI_1_PKT_WORD6 0x022C
45#define HDMI_SW_DI_CFG 0x0230
Arnaud Pouliquencffe1e82015-02-05 11:55:02 +010046#define HDMI_SW_DI_2_HEAD_WORD 0x0600
47#define HDMI_SW_DI_2_PKT_WORD0 0x0604
48#define HDMI_SW_DI_2_PKT_WORD1 0x0608
49#define HDMI_SW_DI_2_PKT_WORD2 0x060C
50#define HDMI_SW_DI_2_PKT_WORD3 0x0610
51#define HDMI_SW_DI_2_PKT_WORD4 0x0614
52#define HDMI_SW_DI_2_PKT_WORD5 0x0618
53#define HDMI_SW_DI_2_PKT_WORD6 0x061C
Benjamin Gaignard54026262014-07-30 19:24:55 +020054
55#define HDMI_IFRAME_SLOT_AVI 1
Arnaud Pouliquencffe1e82015-02-05 11:55:02 +010056#define HDMI_IFRAME_SLOT_AUDIO 2
Benjamin Gaignard54026262014-07-30 19:24:55 +020057
58#define XCAT(prefix, x, suffix) prefix ## x ## suffix
59#define HDMI_SW_DI_N_HEAD_WORD(x) XCAT(HDMI_SW_DI_, x, _HEAD_WORD)
60#define HDMI_SW_DI_N_PKT_WORD0(x) XCAT(HDMI_SW_DI_, x, _PKT_WORD0)
61#define HDMI_SW_DI_N_PKT_WORD1(x) XCAT(HDMI_SW_DI_, x, _PKT_WORD1)
62#define HDMI_SW_DI_N_PKT_WORD2(x) XCAT(HDMI_SW_DI_, x, _PKT_WORD2)
63#define HDMI_SW_DI_N_PKT_WORD3(x) XCAT(HDMI_SW_DI_, x, _PKT_WORD3)
64#define HDMI_SW_DI_N_PKT_WORD4(x) XCAT(HDMI_SW_DI_, x, _PKT_WORD4)
65#define HDMI_SW_DI_N_PKT_WORD5(x) XCAT(HDMI_SW_DI_, x, _PKT_WORD5)
66#define HDMI_SW_DI_N_PKT_WORD6(x) XCAT(HDMI_SW_DI_, x, _PKT_WORD6)
67
Vincent Abriou181975a2016-02-01 10:32:42 +010068#define HDMI_SW_DI_MAX_WORD 7
69
Benjamin Gaignard54026262014-07-30 19:24:55 +020070#define HDMI_IFRAME_DISABLED 0x0
71#define HDMI_IFRAME_SINGLE_SHOT 0x1
72#define HDMI_IFRAME_FIELD 0x2
73#define HDMI_IFRAME_FRAME 0x3
74#define HDMI_IFRAME_MASK 0x3
75#define HDMI_IFRAME_CFG_DI_N(x, n) ((x) << ((n-1)*4)) /* n from 1 to 6 */
76
77#define HDMI_CFG_DEVICE_EN BIT(0)
78#define HDMI_CFG_HDMI_NOT_DVI BIT(1)
79#define HDMI_CFG_HDCP_EN BIT(2)
80#define HDMI_CFG_ESS_NOT_OESS BIT(3)
81#define HDMI_CFG_H_SYNC_POL_NEG BIT(4)
82#define HDMI_CFG_SINK_TERM_DET_EN BIT(5)
83#define HDMI_CFG_V_SYNC_POL_NEG BIT(6)
84#define HDMI_CFG_422_EN BIT(8)
85#define HDMI_CFG_FIFO_OVERRUN_CLR BIT(12)
86#define HDMI_CFG_FIFO_UNDERRUN_CLR BIT(13)
87#define HDMI_CFG_SW_RST_EN BIT(31)
88
89#define HDMI_INT_GLOBAL BIT(0)
90#define HDMI_INT_SW_RST BIT(1)
91#define HDMI_INT_PIX_CAP BIT(3)
92#define HDMI_INT_HOT_PLUG BIT(4)
93#define HDMI_INT_DLL_LCK BIT(5)
94#define HDMI_INT_NEW_FRAME BIT(6)
95#define HDMI_INT_GENCTRL_PKT BIT(7)
96#define HDMI_INT_SINK_TERM_PRESENT BIT(11)
97
98#define HDMI_DEFAULT_INT (HDMI_INT_SINK_TERM_PRESENT \
99 | HDMI_INT_DLL_LCK \
100 | HDMI_INT_HOT_PLUG \
101 | HDMI_INT_GLOBAL)
102
103#define HDMI_WORKING_INT (HDMI_INT_SINK_TERM_PRESENT \
104 | HDMI_INT_GENCTRL_PKT \
105 | HDMI_INT_NEW_FRAME \
106 | HDMI_INT_DLL_LCK \
107 | HDMI_INT_HOT_PLUG \
108 | HDMI_INT_PIX_CAP \
109 | HDMI_INT_SW_RST \
110 | HDMI_INT_GLOBAL)
111
112#define HDMI_STA_SW_RST BIT(1)
113
Arnaud Pouliquencffe1e82015-02-05 11:55:02 +0100114#define HDMI_INFOFRAME_HEADER_TYPE(x) (((x) & 0xff) << 0)
115#define HDMI_INFOFRAME_HEADER_VERSION(x) (((x) & 0xff) << 8)
116#define HDMI_INFOFRAME_HEADER_LEN(x) (((x) & 0x0f) << 16)
117
Benjamin Gaignard54026262014-07-30 19:24:55 +0200118struct sti_hdmi_connector {
119 struct drm_connector drm_connector;
120 struct drm_encoder *encoder;
121 struct sti_hdmi *hdmi;
122};
123
124#define to_sti_hdmi_connector(x) \
125 container_of(x, struct sti_hdmi_connector, drm_connector)
126
127u32 hdmi_read(struct sti_hdmi *hdmi, int offset)
128{
129 return readl(hdmi->regs + offset);
130}
131
132void hdmi_write(struct sti_hdmi *hdmi, u32 val, int offset)
133{
134 writel(val, hdmi->regs + offset);
135}
136
137/**
138 * HDMI interrupt handler threaded
139 *
140 * @irq: irq number
141 * @arg: connector structure
142 */
143static irqreturn_t hdmi_irq_thread(int irq, void *arg)
144{
145 struct sti_hdmi *hdmi = arg;
146
147 /* Hot plug/unplug IRQ */
148 if (hdmi->irq_status & HDMI_INT_HOT_PLUG) {
Benjamin Gaignard76569202014-10-09 08:53:35 +0200149 hdmi->hpd = readl(hdmi->regs + HDMI_STA) & HDMI_STA_HOT_PLUG;
Benjamin Gaignard54026262014-07-30 19:24:55 +0200150 if (hdmi->drm_dev)
151 drm_helper_hpd_irq_event(hdmi->drm_dev);
152 }
153
154 /* Sw reset and PLL lock are exclusive so we can use the same
155 * event to signal them
156 */
157 if (hdmi->irq_status & (HDMI_INT_SW_RST | HDMI_INT_DLL_LCK)) {
158 hdmi->event_received = true;
159 wake_up_interruptible(&hdmi->wait_event);
160 }
161
162 return IRQ_HANDLED;
163}
164
165/**
166 * HDMI interrupt handler
167 *
168 * @irq: irq number
169 * @arg: connector structure
170 */
171static irqreturn_t hdmi_irq(int irq, void *arg)
172{
173 struct sti_hdmi *hdmi = arg;
174
175 /* read interrupt status */
176 hdmi->irq_status = hdmi_read(hdmi, HDMI_INT_STA);
177
178 /* clear interrupt status */
179 hdmi_write(hdmi, hdmi->irq_status, HDMI_INT_CLR);
180
181 /* force sync bus write */
182 hdmi_read(hdmi, HDMI_INT_STA);
183
184 return IRQ_WAKE_THREAD;
185}
186
187/**
188 * Set hdmi active area depending on the drm display mode selected
189 *
190 * @hdmi: pointer on the hdmi internal structure
191 */
192static void hdmi_active_area(struct sti_hdmi *hdmi)
193{
194 u32 xmin, xmax;
195 u32 ymin, ymax;
196
Vincent Abriou86615322015-06-05 10:24:43 +0200197 xmin = sti_vtg_get_pixel_number(hdmi->mode, 1);
198 xmax = sti_vtg_get_pixel_number(hdmi->mode, hdmi->mode.hdisplay);
Benjamin Gaignard54026262014-07-30 19:24:55 +0200199 ymin = sti_vtg_get_line_number(hdmi->mode, 0);
200 ymax = sti_vtg_get_line_number(hdmi->mode, hdmi->mode.vdisplay - 1);
201
202 hdmi_write(hdmi, xmin, HDMI_ACTIVE_VID_XMIN);
203 hdmi_write(hdmi, xmax, HDMI_ACTIVE_VID_XMAX);
204 hdmi_write(hdmi, ymin, HDMI_ACTIVE_VID_YMIN);
205 hdmi_write(hdmi, ymax, HDMI_ACTIVE_VID_YMAX);
206}
207
208/**
209 * Overall hdmi configuration
210 *
211 * @hdmi: pointer on the hdmi internal structure
212 */
213static void hdmi_config(struct sti_hdmi *hdmi)
214{
215 u32 conf;
216
217 DRM_DEBUG_DRIVER("\n");
218
219 /* Clear overrun and underrun fifo */
220 conf = HDMI_CFG_FIFO_OVERRUN_CLR | HDMI_CFG_FIFO_UNDERRUN_CLR;
221
222 /* Enable HDMI mode not DVI */
223 conf |= HDMI_CFG_HDMI_NOT_DVI | HDMI_CFG_ESS_NOT_OESS;
224
225 /* Enable sink term detection */
226 conf |= HDMI_CFG_SINK_TERM_DET_EN;
227
228 /* Set Hsync polarity */
229 if (hdmi->mode.flags & DRM_MODE_FLAG_NHSYNC) {
230 DRM_DEBUG_DRIVER("H Sync Negative\n");
231 conf |= HDMI_CFG_H_SYNC_POL_NEG;
232 }
233
234 /* Set Vsync polarity */
235 if (hdmi->mode.flags & DRM_MODE_FLAG_NVSYNC) {
236 DRM_DEBUG_DRIVER("V Sync Negative\n");
237 conf |= HDMI_CFG_V_SYNC_POL_NEG;
238 }
239
240 /* Enable HDMI */
241 conf |= HDMI_CFG_DEVICE_EN;
242
243 hdmi_write(hdmi, conf, HDMI_CFG);
244}
245
Vincent Abriou181975a2016-02-01 10:32:42 +0100246/*
247 * Helper to reset info frame
248 *
249 * @hdmi: pointer on the hdmi internal structure
250 * @slot: infoframe to reset
251 */
252static void hdmi_infoframe_reset(struct sti_hdmi *hdmi,
253 u32 slot)
254{
255 u32 val, i;
256 u32 head_offset, pack_offset;
257
258 switch (slot) {
259 case HDMI_IFRAME_SLOT_AVI:
260 head_offset = HDMI_SW_DI_N_HEAD_WORD(HDMI_IFRAME_SLOT_AVI);
261 pack_offset = HDMI_SW_DI_N_PKT_WORD0(HDMI_IFRAME_SLOT_AVI);
262 break;
263 case HDMI_IFRAME_SLOT_AUDIO:
264 head_offset = HDMI_SW_DI_N_HEAD_WORD(HDMI_IFRAME_SLOT_AUDIO);
265 pack_offset = HDMI_SW_DI_N_PKT_WORD0(HDMI_IFRAME_SLOT_AUDIO);
266 break;
267 default:
268 DRM_ERROR("unsupported infoframe slot: %#x\n", slot);
269 return;
270 }
271
272 /* Disable transmission for the selected slot */
273 val = hdmi_read(hdmi, HDMI_SW_DI_CFG);
274 val &= ~HDMI_IFRAME_CFG_DI_N(HDMI_IFRAME_MASK, slot);
275 hdmi_write(hdmi, val, HDMI_SW_DI_CFG);
276
277 /* Reset info frame registers */
278 hdmi_write(hdmi, 0x0, head_offset);
279 for (i = 0; i < HDMI_SW_DI_MAX_WORD; i += sizeof(u32))
280 hdmi_write(hdmi, 0x0, pack_offset + i);
281}
282
Benjamin Gaignard54026262014-07-30 19:24:55 +0200283/**
Arnaud Pouliquencffe1e82015-02-05 11:55:02 +0100284 * Helper to concatenate infoframe in 32 bits word
285 *
286 * @ptr: pointer on the hdmi internal structure
287 * @data: infoframe to write
288 * @size: size to write
289 */
290static inline unsigned int hdmi_infoframe_subpack(const u8 *ptr, size_t size)
291{
292 unsigned long value = 0;
293 size_t i;
294
295 for (i = size; i > 0; i--)
296 value = (value << 8) | ptr[i - 1];
297
298 return value;
299}
300
301/**
302 * Helper to write info frame
303 *
304 * @hdmi: pointer on the hdmi internal structure
305 * @data: infoframe to write
306 * @size: size to write
307 */
308static void hdmi_infoframe_write_infopack(struct sti_hdmi *hdmi, const u8 *data)
309{
310 const u8 *ptr = data;
311 u32 val, slot, mode, i;
312 u32 head_offset, pack_offset;
313 size_t size;
314
315 switch (*ptr) {
316 case HDMI_INFOFRAME_TYPE_AVI:
317 slot = HDMI_IFRAME_SLOT_AVI;
318 mode = HDMI_IFRAME_FIELD;
319 head_offset = HDMI_SW_DI_N_HEAD_WORD(HDMI_IFRAME_SLOT_AVI);
320 pack_offset = HDMI_SW_DI_N_PKT_WORD0(HDMI_IFRAME_SLOT_AVI);
321 size = HDMI_AVI_INFOFRAME_SIZE;
322 break;
323
324 case HDMI_INFOFRAME_TYPE_AUDIO:
325 slot = HDMI_IFRAME_SLOT_AUDIO;
326 mode = HDMI_IFRAME_FRAME;
327 head_offset = HDMI_SW_DI_N_HEAD_WORD(HDMI_IFRAME_SLOT_AUDIO);
328 pack_offset = HDMI_SW_DI_N_PKT_WORD0(HDMI_IFRAME_SLOT_AUDIO);
329 size = HDMI_AUDIO_INFOFRAME_SIZE;
330 break;
331
332 default:
333 DRM_ERROR("unsupported infoframe type: %#x\n", *ptr);
334 return;
335 }
336
337 /* Disable transmission slot for updated infoframe */
338 val = hdmi_read(hdmi, HDMI_SW_DI_CFG);
339 val &= ~HDMI_IFRAME_CFG_DI_N(HDMI_IFRAME_MASK, slot);
340 hdmi_write(hdmi, val, HDMI_SW_DI_CFG);
341
342 val = HDMI_INFOFRAME_HEADER_TYPE(*ptr++);
343 val |= HDMI_INFOFRAME_HEADER_VERSION(*ptr++);
344 val |= HDMI_INFOFRAME_HEADER_LEN(*ptr++);
345 writel(val, hdmi->regs + head_offset);
346
347 /*
348 * Each subpack contains 4 bytes
349 * The First Bytes of the first subpacket must contain the checksum
350 * Packet size in increase by one.
351 */
352 for (i = 0; i < size; i += sizeof(u32)) {
353 size_t num;
354
355 num = min_t(size_t, size - i, sizeof(u32));
356 val = hdmi_infoframe_subpack(ptr, num);
357 ptr += sizeof(u32);
358 writel(val, hdmi->regs + pack_offset + i);
359 }
360
361 /* Enable transmission slot for updated infoframe */
362 val = hdmi_read(hdmi, HDMI_SW_DI_CFG);
Vincent Abriou50f21382016-02-02 17:03:57 +0100363 val |= HDMI_IFRAME_CFG_DI_N(mode, slot);
Arnaud Pouliquencffe1e82015-02-05 11:55:02 +0100364 hdmi_write(hdmi, val, HDMI_SW_DI_CFG);
365}
366
367/**
Benjamin Gaignard54026262014-07-30 19:24:55 +0200368 * Prepare and configure the AVI infoframe
369 *
370 * AVI infoframe are transmitted at least once per two video field and
371 * contains information about HDMI transmission mode such as color space,
372 * colorimetry, ...
373 *
374 * @hdmi: pointer on the hdmi internal structure
375 *
376 * Return negative value if error occurs
377 */
378static int hdmi_avi_infoframe_config(struct sti_hdmi *hdmi)
379{
380 struct drm_display_mode *mode = &hdmi->mode;
381 struct hdmi_avi_infoframe infoframe;
382 u8 buffer[HDMI_INFOFRAME_SIZE(AVI)];
Benjamin Gaignard54026262014-07-30 19:24:55 +0200383 int ret;
384
385 DRM_DEBUG_DRIVER("\n");
386
387 ret = drm_hdmi_avi_infoframe_from_display_mode(&infoframe, mode);
388 if (ret < 0) {
389 DRM_ERROR("failed to setup AVI infoframe: %d\n", ret);
390 return ret;
391 }
392
393 /* fixed infoframe configuration not linked to the mode */
394 infoframe.colorspace = HDMI_COLORSPACE_RGB;
395 infoframe.quantization_range = HDMI_QUANTIZATION_RANGE_DEFAULT;
396 infoframe.colorimetry = HDMI_COLORIMETRY_NONE;
397
398 ret = hdmi_avi_infoframe_pack(&infoframe, buffer, sizeof(buffer));
399 if (ret < 0) {
400 DRM_ERROR("failed to pack AVI infoframe: %d\n", ret);
401 return ret;
402 }
403
Arnaud Pouliquencffe1e82015-02-05 11:55:02 +0100404 hdmi_infoframe_write_infopack(hdmi, buffer);
Benjamin Gaignard54026262014-07-30 19:24:55 +0200405
Arnaud Pouliquencffe1e82015-02-05 11:55:02 +0100406 return 0;
407}
Benjamin Gaignard54026262014-07-30 19:24:55 +0200408
Arnaud Pouliquencffe1e82015-02-05 11:55:02 +0100409/**
410 * Prepare and configure the AUDIO infoframe
411 *
412 * AUDIO infoframe are transmitted once per frame and
413 * contains information about HDMI transmission mode such as audio codec,
414 * sample size, ...
415 *
416 * @hdmi: pointer on the hdmi internal structure
417 *
418 * Return negative value if error occurs
419 */
420static int hdmi_audio_infoframe_config(struct sti_hdmi *hdmi)
421{
422 struct hdmi_audio_infoframe infofame;
423 u8 buffer[HDMI_INFOFRAME_SIZE(AUDIO)];
424 int ret;
Benjamin Gaignard54026262014-07-30 19:24:55 +0200425
Arnaud Pouliquencffe1e82015-02-05 11:55:02 +0100426 ret = hdmi_audio_infoframe_init(&infofame);
427 if (ret < 0) {
428 DRM_ERROR("failed to setup audio infoframe: %d\n", ret);
429 return ret;
430 }
Benjamin Gaignard54026262014-07-30 19:24:55 +0200431
Arnaud Pouliquencffe1e82015-02-05 11:55:02 +0100432 infofame.channels = 2;
Benjamin Gaignard54026262014-07-30 19:24:55 +0200433
Arnaud Pouliquencffe1e82015-02-05 11:55:02 +0100434 ret = hdmi_audio_infoframe_pack(&infofame, buffer, sizeof(buffer));
435 if (ret < 0) {
436 DRM_ERROR("failed to pack audio infoframe: %d\n", ret);
437 return ret;
438 }
Benjamin Gaignard54026262014-07-30 19:24:55 +0200439
Arnaud Pouliquencffe1e82015-02-05 11:55:02 +0100440 hdmi_infoframe_write_infopack(hdmi, buffer);
Benjamin Gaignard54026262014-07-30 19:24:55 +0200441
442 return 0;
443}
444
445/**
446 * Software reset of the hdmi subsystem
447 *
448 * @hdmi: pointer on the hdmi internal structure
449 *
450 */
451#define HDMI_TIMEOUT_SWRESET 100 /*milliseconds */
452static void hdmi_swreset(struct sti_hdmi *hdmi)
453{
454 u32 val;
455
456 DRM_DEBUG_DRIVER("\n");
457
458 /* Enable hdmi_audio clock only during hdmi reset */
459 if (clk_prepare_enable(hdmi->clk_audio))
460 DRM_INFO("Failed to prepare/enable hdmi_audio clk\n");
461
462 /* Sw reset */
463 hdmi->event_received = false;
464
465 val = hdmi_read(hdmi, HDMI_CFG);
466 val |= HDMI_CFG_SW_RST_EN;
467 hdmi_write(hdmi, val, HDMI_CFG);
468
469 /* Wait reset completed */
470 wait_event_interruptible_timeout(hdmi->wait_event,
471 hdmi->event_received == true,
472 msecs_to_jiffies
473 (HDMI_TIMEOUT_SWRESET));
474
475 /*
476 * HDMI_STA_SW_RST bit is set to '1' when SW_RST bit in HDMI_CFG is
477 * set to '1' and clk_audio is running.
478 */
479 if ((hdmi_read(hdmi, HDMI_STA) & HDMI_STA_SW_RST) == 0)
480 DRM_DEBUG_DRIVER("Warning: HDMI sw reset timeout occurs\n");
481
482 val = hdmi_read(hdmi, HDMI_CFG);
483 val &= ~HDMI_CFG_SW_RST_EN;
484 hdmi_write(hdmi, val, HDMI_CFG);
485
486 /* Disable hdmi_audio clock. Not used anymore for drm purpose */
487 clk_disable_unprepare(hdmi->clk_audio);
488}
489
490static void sti_hdmi_disable(struct drm_bridge *bridge)
491{
492 struct sti_hdmi *hdmi = bridge->driver_private;
493
494 u32 val = hdmi_read(hdmi, HDMI_CFG);
495
496 if (!hdmi->enabled)
497 return;
498
499 DRM_DEBUG_DRIVER("\n");
500
501 /* Disable HDMI */
502 val &= ~HDMI_CFG_DEVICE_EN;
503 hdmi_write(hdmi, val, HDMI_CFG);
504
505 hdmi_write(hdmi, 0xffffffff, HDMI_INT_CLR);
506
507 /* Stop the phy */
508 hdmi->phy_ops->stop(hdmi);
509
Vincent Abriou181975a2016-02-01 10:32:42 +0100510 /* Reset info frame transmission */
511 hdmi_infoframe_reset(hdmi, HDMI_IFRAME_SLOT_AVI);
512 hdmi_infoframe_reset(hdmi, HDMI_IFRAME_SLOT_AUDIO);
513
Benjamin Gaignard54026262014-07-30 19:24:55 +0200514 /* Set the default channel data to be a dark red */
515 hdmi_write(hdmi, 0x0000, HDMI_DFLT_CHL0_DAT);
516 hdmi_write(hdmi, 0x0000, HDMI_DFLT_CHL1_DAT);
517 hdmi_write(hdmi, 0x0060, HDMI_DFLT_CHL2_DAT);
518
519 /* Disable/unprepare hdmi clock */
520 clk_disable_unprepare(hdmi->clk_phy);
521 clk_disable_unprepare(hdmi->clk_tmds);
522 clk_disable_unprepare(hdmi->clk_pix);
523
524 hdmi->enabled = false;
525}
526
527static void sti_hdmi_pre_enable(struct drm_bridge *bridge)
528{
529 struct sti_hdmi *hdmi = bridge->driver_private;
530
531 DRM_DEBUG_DRIVER("\n");
532
533 if (hdmi->enabled)
534 return;
535
536 /* Prepare/enable clocks */
537 if (clk_prepare_enable(hdmi->clk_pix))
538 DRM_ERROR("Failed to prepare/enable hdmi_pix clk\n");
539 if (clk_prepare_enable(hdmi->clk_tmds))
540 DRM_ERROR("Failed to prepare/enable hdmi_tmds clk\n");
541 if (clk_prepare_enable(hdmi->clk_phy))
542 DRM_ERROR("Failed to prepare/enable hdmi_rejec_pll clk\n");
543
544 hdmi->enabled = true;
545
546 /* Program hdmi serializer and start phy */
547 if (!hdmi->phy_ops->start(hdmi)) {
548 DRM_ERROR("Unable to start hdmi phy\n");
549 return;
550 }
551
552 /* Program hdmi active area */
553 hdmi_active_area(hdmi);
554
555 /* Enable working interrupts */
556 hdmi_write(hdmi, HDMI_WORKING_INT, HDMI_INT_EN);
557
558 /* Program hdmi config */
559 hdmi_config(hdmi);
560
561 /* Program AVI infoframe */
562 if (hdmi_avi_infoframe_config(hdmi))
563 DRM_ERROR("Unable to configure AVI infoframe\n");
564
Arnaud Pouliquencffe1e82015-02-05 11:55:02 +0100565 /* Program AUDIO infoframe */
566 if (hdmi_audio_infoframe_config(hdmi))
567 DRM_ERROR("Unable to configure AUDIO infoframe\n");
568
Benjamin Gaignard54026262014-07-30 19:24:55 +0200569 /* Sw reset */
570 hdmi_swreset(hdmi);
571}
572
573static void sti_hdmi_set_mode(struct drm_bridge *bridge,
574 struct drm_display_mode *mode,
575 struct drm_display_mode *adjusted_mode)
576{
577 struct sti_hdmi *hdmi = bridge->driver_private;
578 int ret;
579
580 DRM_DEBUG_DRIVER("\n");
581
582 /* Copy the drm display mode in the connector local structure */
583 memcpy(&hdmi->mode, mode, sizeof(struct drm_display_mode));
584
585 /* Update clock framerate according to the selected mode */
586 ret = clk_set_rate(hdmi->clk_pix, mode->clock * 1000);
587 if (ret < 0) {
588 DRM_ERROR("Cannot set rate (%dHz) for hdmi_pix clk\n",
589 mode->clock * 1000);
590 return;
591 }
592 ret = clk_set_rate(hdmi->clk_phy, mode->clock * 1000);
593 if (ret < 0) {
594 DRM_ERROR("Cannot set rate (%dHz) for hdmi_rejection_pll clk\n",
595 mode->clock * 1000);
596 return;
597 }
598}
599
600static void sti_hdmi_bridge_nope(struct drm_bridge *bridge)
601{
602 /* do nothing */
603}
604
Benjamin Gaignard54026262014-07-30 19:24:55 +0200605static const struct drm_bridge_funcs sti_hdmi_bridge_funcs = {
606 .pre_enable = sti_hdmi_pre_enable,
607 .enable = sti_hdmi_bridge_nope,
608 .disable = sti_hdmi_disable,
609 .post_disable = sti_hdmi_bridge_nope,
610 .mode_set = sti_hdmi_set_mode,
Benjamin Gaignard54026262014-07-30 19:24:55 +0200611};
612
613static int sti_hdmi_connector_get_modes(struct drm_connector *connector)
614{
Benjamin Gaignard41a14622014-09-08 15:52:08 +0200615 struct sti_hdmi_connector *hdmi_connector
616 = to_sti_hdmi_connector(connector);
617 struct sti_hdmi *hdmi = hdmi_connector->hdmi;
Benjamin Gaignard54026262014-07-30 19:24:55 +0200618 struct edid *edid;
619 int count;
620
621 DRM_DEBUG_DRIVER("\n");
622
Benjamin Gaignard41a14622014-09-08 15:52:08 +0200623 edid = drm_get_edid(connector, hdmi->ddc_adapt);
Benjamin Gaignard54026262014-07-30 19:24:55 +0200624 if (!edid)
625 goto fail;
626
627 count = drm_add_edid_modes(connector, edid);
628 drm_mode_connector_update_edid_property(connector, edid);
629
630 kfree(edid);
631 return count;
632
633fail:
Vincent Abriou871bcdf2015-07-31 11:32:13 +0200634 DRM_ERROR("Can't read HDMI EDID\n");
Benjamin Gaignard54026262014-07-30 19:24:55 +0200635 return 0;
636}
637
638#define CLK_TOLERANCE_HZ 50
639
640static int sti_hdmi_connector_mode_valid(struct drm_connector *connector,
641 struct drm_display_mode *mode)
642{
643 int target = mode->clock * 1000;
644 int target_min = target - CLK_TOLERANCE_HZ;
645 int target_max = target + CLK_TOLERANCE_HZ;
646 int result;
647 struct sti_hdmi_connector *hdmi_connector
648 = to_sti_hdmi_connector(connector);
649 struct sti_hdmi *hdmi = hdmi_connector->hdmi;
650
651
652 result = clk_round_rate(hdmi->clk_pix, target);
653
654 DRM_DEBUG_DRIVER("target rate = %d => available rate = %d\n",
655 target, result);
656
657 if ((result < target_min) || (result > target_max)) {
658 DRM_DEBUG_DRIVER("hdmi pixclk=%d not supported\n", target);
659 return MODE_BAD;
660 }
661
662 return MODE_OK;
663}
664
665struct drm_encoder *sti_hdmi_best_encoder(struct drm_connector *connector)
666{
667 struct sti_hdmi_connector *hdmi_connector
668 = to_sti_hdmi_connector(connector);
669
670 /* Best encoder is the one associated during connector creation */
671 return hdmi_connector->encoder;
672}
673
Ville Syrjäläc5de4852015-09-02 13:44:15 +0300674static const
675struct drm_connector_helper_funcs sti_hdmi_connector_helper_funcs = {
Benjamin Gaignard54026262014-07-30 19:24:55 +0200676 .get_modes = sti_hdmi_connector_get_modes,
677 .mode_valid = sti_hdmi_connector_mode_valid,
678 .best_encoder = sti_hdmi_best_encoder,
679};
680
681/* get detection status of display device */
682static enum drm_connector_status
683sti_hdmi_connector_detect(struct drm_connector *connector, bool force)
684{
685 struct sti_hdmi_connector *hdmi_connector
686 = to_sti_hdmi_connector(connector);
687 struct sti_hdmi *hdmi = hdmi_connector->hdmi;
688
689 DRM_DEBUG_DRIVER("\n");
690
691 if (hdmi->hpd) {
692 DRM_DEBUG_DRIVER("hdmi cable connected\n");
693 return connector_status_connected;
694 }
695
696 DRM_DEBUG_DRIVER("hdmi cable disconnected\n");
697 return connector_status_disconnected;
698}
699
700static void sti_hdmi_connector_destroy(struct drm_connector *connector)
701{
702 struct sti_hdmi_connector *hdmi_connector
703 = to_sti_hdmi_connector(connector);
704
705 drm_connector_unregister(connector);
706 drm_connector_cleanup(connector);
707 kfree(hdmi_connector);
708}
709
Ville Syrjäläc5de4852015-09-02 13:44:15 +0300710static const struct drm_connector_funcs sti_hdmi_connector_funcs = {
Benjamin Gaignardde4b00b2015-03-19 13:35:16 +0100711 .dpms = drm_atomic_helper_connector_dpms,
Benjamin Gaignard54026262014-07-30 19:24:55 +0200712 .fill_modes = drm_helper_probe_single_connector_modes,
713 .detect = sti_hdmi_connector_detect,
714 .destroy = sti_hdmi_connector_destroy,
Benjamin Gaignardde4b00b2015-03-19 13:35:16 +0100715 .reset = drm_atomic_helper_connector_reset,
716 .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
717 .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
Benjamin Gaignard54026262014-07-30 19:24:55 +0200718};
719
720static struct drm_encoder *sti_hdmi_find_encoder(struct drm_device *dev)
721{
722 struct drm_encoder *encoder;
723
724 list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
725 if (encoder->encoder_type == DRM_MODE_ENCODER_TMDS)
726 return encoder;
727 }
728
729 return NULL;
730}
731
732static int sti_hdmi_bind(struct device *dev, struct device *master, void *data)
733{
734 struct sti_hdmi *hdmi = dev_get_drvdata(dev);
735 struct drm_device *drm_dev = data;
736 struct drm_encoder *encoder;
737 struct sti_hdmi_connector *connector;
738 struct drm_connector *drm_connector;
739 struct drm_bridge *bridge;
Benjamin Gaignard54026262014-07-30 19:24:55 +0200740 int err;
741
Benjamin Gaignard54026262014-07-30 19:24:55 +0200742 /* Set the drm device handle */
743 hdmi->drm_dev = drm_dev;
744
745 encoder = sti_hdmi_find_encoder(drm_dev);
746 if (!encoder)
Vladimir Zapolskiy807642d2015-09-21 18:51:26 +0300747 return -EINVAL;
Benjamin Gaignard54026262014-07-30 19:24:55 +0200748
749 connector = devm_kzalloc(dev, sizeof(*connector), GFP_KERNEL);
750 if (!connector)
Vladimir Zapolskiy807642d2015-09-21 18:51:26 +0300751 return -EINVAL;
Benjamin Gaignard54026262014-07-30 19:24:55 +0200752
753 connector->hdmi = hdmi;
754
755 bridge = devm_kzalloc(dev, sizeof(*bridge), GFP_KERNEL);
756 if (!bridge)
Vladimir Zapolskiy807642d2015-09-21 18:51:26 +0300757 return -EINVAL;
Benjamin Gaignard54026262014-07-30 19:24:55 +0200758
759 bridge->driver_private = hdmi;
Ajay Kumarb07b90f2015-01-20 22:08:43 +0530760 bridge->funcs = &sti_hdmi_bridge_funcs;
Ajay Kumar3d3f8b12015-01-20 22:08:44 +0530761 drm_bridge_attach(drm_dev, bridge);
Benjamin Gaignard54026262014-07-30 19:24:55 +0200762
763 encoder->bridge = bridge;
764 connector->encoder = encoder;
765
766 drm_connector = (struct drm_connector *)connector;
767
768 drm_connector->polled = DRM_CONNECTOR_POLL_HPD;
769
770 drm_connector_init(drm_dev, drm_connector,
771 &sti_hdmi_connector_funcs, DRM_MODE_CONNECTOR_HDMIA);
772 drm_connector_helper_add(drm_connector,
773 &sti_hdmi_connector_helper_funcs);
774
775 err = drm_connector_register(drm_connector);
776 if (err)
777 goto err_connector;
778
779 err = drm_mode_connector_attach_encoder(drm_connector, encoder);
780 if (err) {
781 DRM_ERROR("Failed to attach a connector to a encoder\n");
782 goto err_sysfs;
783 }
784
785 /* Enable default interrupts */
786 hdmi_write(hdmi, HDMI_DEFAULT_INT, HDMI_INT_EN);
787
788 return 0;
789
790err_sysfs:
791 drm_connector_unregister(drm_connector);
792err_connector:
Benjamin Gaignard54026262014-07-30 19:24:55 +0200793 drm_connector_cleanup(drm_connector);
Vladimir Zapolskiy807642d2015-09-21 18:51:26 +0300794
Benjamin Gaignard54026262014-07-30 19:24:55 +0200795 return -EINVAL;
796}
797
798static void sti_hdmi_unbind(struct device *dev,
799 struct device *master, void *data)
800{
801 /* do nothing */
802}
803
804static const struct component_ops sti_hdmi_ops = {
805 .bind = sti_hdmi_bind,
806 .unbind = sti_hdmi_unbind,
807};
808
Kiran Padwal8e932cf2014-08-26 12:25:24 +0200809static const struct of_device_id hdmi_of_match[] = {
Benjamin Gaignard54026262014-07-30 19:24:55 +0200810 {
811 .compatible = "st,stih416-hdmi",
812 .data = &tx3g0c55phy_ops,
813 }, {
814 .compatible = "st,stih407-hdmi",
815 .data = &tx3g4c28phy_ops,
816 }, {
817 /* end node */
818 }
819};
820MODULE_DEVICE_TABLE(of, hdmi_of_match);
821
822static int sti_hdmi_probe(struct platform_device *pdev)
823{
824 struct device *dev = &pdev->dev;
825 struct sti_hdmi *hdmi;
826 struct device_node *np = dev->of_node;
827 struct resource *res;
Benjamin Gaignard53bdcf52015-07-17 12:06:11 +0200828 struct device_node *ddc;
Benjamin Gaignard54026262014-07-30 19:24:55 +0200829 int ret;
830
831 DRM_INFO("%s\n", __func__);
832
833 hdmi = devm_kzalloc(dev, sizeof(*hdmi), GFP_KERNEL);
834 if (!hdmi)
835 return -ENOMEM;
836
Benjamin Gaignard53bdcf52015-07-17 12:06:11 +0200837 ddc = of_parse_phandle(pdev->dev.of_node, "ddc", 0);
838 if (ddc) {
Vladimir Zapolskiy4d5821a2015-09-21 18:51:27 +0300839 hdmi->ddc_adapt = of_get_i2c_adapter_by_node(ddc);
Benjamin Gaignard53bdcf52015-07-17 12:06:11 +0200840 of_node_put(ddc);
Vladimir Zapolskiy4d5821a2015-09-21 18:51:27 +0300841 if (!hdmi->ddc_adapt)
842 return -EPROBE_DEFER;
Benjamin Gaignard53bdcf52015-07-17 12:06:11 +0200843 }
844
Benjamin Gaignard54026262014-07-30 19:24:55 +0200845 hdmi->dev = pdev->dev;
846
847 /* Get resources */
848 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "hdmi-reg");
849 if (!res) {
850 DRM_ERROR("Invalid hdmi resource\n");
Vladimir Zapolskiy807642d2015-09-21 18:51:26 +0300851 ret = -ENOMEM;
852 goto release_adapter;
Benjamin Gaignard54026262014-07-30 19:24:55 +0200853 }
854 hdmi->regs = devm_ioremap_nocache(dev, res->start, resource_size(res));
Vladimir Zapolskiy807642d2015-09-21 18:51:26 +0300855 if (!hdmi->regs) {
856 ret = -ENOMEM;
857 goto release_adapter;
858 }
Benjamin Gaignard54026262014-07-30 19:24:55 +0200859
860 if (of_device_is_compatible(np, "st,stih416-hdmi")) {
861 res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
862 "syscfg");
863 if (!res) {
864 DRM_ERROR("Invalid syscfg resource\n");
Vladimir Zapolskiy807642d2015-09-21 18:51:26 +0300865 ret = -ENOMEM;
866 goto release_adapter;
Benjamin Gaignard54026262014-07-30 19:24:55 +0200867 }
868 hdmi->syscfg = devm_ioremap_nocache(dev, res->start,
869 resource_size(res));
Vladimir Zapolskiy807642d2015-09-21 18:51:26 +0300870 if (!hdmi->syscfg) {
871 ret = -ENOMEM;
872 goto release_adapter;
873 }
Benjamin Gaignard54026262014-07-30 19:24:55 +0200874 }
875
876 hdmi->phy_ops = (struct hdmi_phy_ops *)
877 of_match_node(hdmi_of_match, np)->data;
878
879 /* Get clock resources */
880 hdmi->clk_pix = devm_clk_get(dev, "pix");
881 if (IS_ERR(hdmi->clk_pix)) {
882 DRM_ERROR("Cannot get hdmi_pix clock\n");
Vladimir Zapolskiy807642d2015-09-21 18:51:26 +0300883 ret = PTR_ERR(hdmi->clk_pix);
884 goto release_adapter;
Benjamin Gaignard54026262014-07-30 19:24:55 +0200885 }
886
887 hdmi->clk_tmds = devm_clk_get(dev, "tmds");
888 if (IS_ERR(hdmi->clk_tmds)) {
889 DRM_ERROR("Cannot get hdmi_tmds clock\n");
Vladimir Zapolskiy807642d2015-09-21 18:51:26 +0300890 ret = PTR_ERR(hdmi->clk_tmds);
891 goto release_adapter;
Benjamin Gaignard54026262014-07-30 19:24:55 +0200892 }
893
894 hdmi->clk_phy = devm_clk_get(dev, "phy");
895 if (IS_ERR(hdmi->clk_phy)) {
896 DRM_ERROR("Cannot get hdmi_phy clock\n");
Vladimir Zapolskiy807642d2015-09-21 18:51:26 +0300897 ret = PTR_ERR(hdmi->clk_phy);
898 goto release_adapter;
Benjamin Gaignard54026262014-07-30 19:24:55 +0200899 }
900
901 hdmi->clk_audio = devm_clk_get(dev, "audio");
902 if (IS_ERR(hdmi->clk_audio)) {
903 DRM_ERROR("Cannot get hdmi_audio clock\n");
Vladimir Zapolskiy807642d2015-09-21 18:51:26 +0300904 ret = PTR_ERR(hdmi->clk_audio);
905 goto release_adapter;
Benjamin Gaignard54026262014-07-30 19:24:55 +0200906 }
907
Benjamin Gaignard76569202014-10-09 08:53:35 +0200908 hdmi->hpd = readl(hdmi->regs + HDMI_STA) & HDMI_STA_HOT_PLUG;
Benjamin Gaignard54026262014-07-30 19:24:55 +0200909
910 init_waitqueue_head(&hdmi->wait_event);
911
912 hdmi->irq = platform_get_irq_byname(pdev, "irq");
913
914 ret = devm_request_threaded_irq(dev, hdmi->irq, hdmi_irq,
915 hdmi_irq_thread, IRQF_ONESHOT, dev_name(dev), hdmi);
916 if (ret) {
917 DRM_ERROR("Failed to register HDMI interrupt\n");
Vladimir Zapolskiy807642d2015-09-21 18:51:26 +0300918 goto release_adapter;
Benjamin Gaignard54026262014-07-30 19:24:55 +0200919 }
920
921 hdmi->reset = devm_reset_control_get(dev, "hdmi");
922 /* Take hdmi out of reset */
923 if (!IS_ERR(hdmi->reset))
924 reset_control_deassert(hdmi->reset);
925
926 platform_set_drvdata(pdev, hdmi);
927
928 return component_add(&pdev->dev, &sti_hdmi_ops);
Vladimir Zapolskiy807642d2015-09-21 18:51:26 +0300929
930 release_adapter:
Vladimir Zapolskiy4d5821a2015-09-21 18:51:27 +0300931 i2c_put_adapter(hdmi->ddc_adapt);
Vladimir Zapolskiy807642d2015-09-21 18:51:26 +0300932
933 return ret;
Benjamin Gaignard54026262014-07-30 19:24:55 +0200934}
935
936static int sti_hdmi_remove(struct platform_device *pdev)
937{
Benjamin Gaignard41a14622014-09-08 15:52:08 +0200938 struct sti_hdmi *hdmi = dev_get_drvdata(&pdev->dev);
939
Vladimir Zapolskiy4d5821a2015-09-21 18:51:27 +0300940 i2c_put_adapter(hdmi->ddc_adapt);
Benjamin Gaignard54026262014-07-30 19:24:55 +0200941 component_del(&pdev->dev, &sti_hdmi_ops);
Vladimir Zapolskiy4d5821a2015-09-21 18:51:27 +0300942
Benjamin Gaignard54026262014-07-30 19:24:55 +0200943 return 0;
944}
945
946struct platform_driver sti_hdmi_driver = {
947 .driver = {
948 .name = "sti-hdmi",
949 .owner = THIS_MODULE,
950 .of_match_table = hdmi_of_match,
951 },
952 .probe = sti_hdmi_probe,
953 .remove = sti_hdmi_remove,
954};
955
Benjamin Gaignard54026262014-07-30 19:24:55 +0200956MODULE_AUTHOR("Benjamin Gaignard <benjamin.gaignard@st.com>");
957MODULE_DESCRIPTION("STMicroelectronics SoC DRM driver");
958MODULE_LICENSE("GPL");