blob: d24b7ce7914261e64eabefb07093fe4275fd14e8 [file] [log] [blame]
Hariprasad Shenai324429d2016-08-17 12:33:05 +05301/*
2 * This file is part of the Chelsio T6 Crypto driver for Linux.
3 *
4 * Copyright (c) 2003-2016 Chelsio Communications, Inc. All rights reserved.
5 *
6 * This software is available to you under a choice of one of two
7 * licenses. You may choose to be licensed under the terms of the GNU
8 * General Public License (GPL) Version 2, available from the file
9 * COPYING in the main directory of this source tree, or the
10 * OpenIB.org BSD license below:
11 *
12 * Redistribution and use in source and binary forms, with or
13 * without modification, are permitted provided that the following
14 * conditions are met:
15 *
16 * - Redistributions of source code must retain the above
17 * copyright notice, this list of conditions and the following
18 * disclaimer.
19 *
20 * - Redistributions in binary form must reproduce the above
21 * copyright notice, this list of conditions and the following
22 * disclaimer in the documentation and/or other materials
23 * provided with the distribution.
24 *
25 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
26 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
27 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
28 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
29 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
30 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
31 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
32 * SOFTWARE.
33 *
34 * Written and Maintained by:
35 * Manoj Malviya (manojmalviya@chelsio.com)
36 * Atul Gupta (atul.gupta@chelsio.com)
37 * Jitendra Lulla (jlulla@chelsio.com)
38 * Yeshaswi M R Gowda (yeshaswi@chelsio.com)
39 * Harsh Jain (harsh@chelsio.com)
40 */
41
42#define pr_fmt(fmt) "chcr:" fmt
43
44#include <linux/kernel.h>
45#include <linux/module.h>
46#include <linux/crypto.h>
47#include <linux/cryptohash.h>
48#include <linux/skbuff.h>
49#include <linux/rtnetlink.h>
50#include <linux/highmem.h>
51#include <linux/scatterlist.h>
52
53#include <crypto/aes.h>
54#include <crypto/algapi.h>
55#include <crypto/hash.h>
56#include <crypto/sha.h>
57#include <crypto/internal/hash.h>
58
59#include "t4fw_api.h"
60#include "t4_msg.h"
61#include "chcr_core.h"
62#include "chcr_algo.h"
63#include "chcr_crypto.h"
64
65static inline struct ablk_ctx *ABLK_CTX(struct chcr_context *ctx)
66{
67 return ctx->crypto_ctx->ablkctx;
68}
69
70static inline struct hmac_ctx *HMAC_CTX(struct chcr_context *ctx)
71{
72 return ctx->crypto_ctx->hmacctx;
73}
74
75static inline struct uld_ctx *ULD_CTX(struct chcr_context *ctx)
76{
77 return ctx->dev->u_ctx;
78}
79
80static inline int is_ofld_imm(const struct sk_buff *skb)
81{
82 return (skb->len <= CRYPTO_MAX_IMM_TX_PKT_LEN);
83}
84
85/*
86 * sgl_len - calculates the size of an SGL of the given capacity
87 * @n: the number of SGL entries
88 * Calculates the number of flits needed for a scatter/gather list that
89 * can hold the given number of entries.
90 */
91static inline unsigned int sgl_len(unsigned int n)
92{
93 n--;
94 return (3 * n) / 2 + (n & 1) + 2;
95}
96
97/*
98 * chcr_handle_resp - Unmap the DMA buffers associated with the request
99 * @req: crypto request
100 */
101int chcr_handle_resp(struct crypto_async_request *req, unsigned char *input,
102 int error_status)
103{
104 struct crypto_tfm *tfm = req->tfm;
105 struct chcr_context *ctx = crypto_tfm_ctx(tfm);
106 struct uld_ctx *u_ctx = ULD_CTX(ctx);
107 struct chcr_req_ctx ctx_req;
108 struct cpl_fw6_pld *fw6_pld;
109 unsigned int digestsize, updated_digestsize;
110
111 switch (tfm->__crt_alg->cra_flags & CRYPTO_ALG_TYPE_MASK) {
112 case CRYPTO_ALG_TYPE_BLKCIPHER:
113 ctx_req.req.ablk_req = (struct ablkcipher_request *)req;
114 ctx_req.ctx.ablk_ctx =
115 ablkcipher_request_ctx(ctx_req.req.ablk_req);
116 if (!error_status) {
117 fw6_pld = (struct cpl_fw6_pld *)input;
118 memcpy(ctx_req.req.ablk_req->info, &fw6_pld->data[2],
119 AES_BLOCK_SIZE);
120 }
121 dma_unmap_sg(&u_ctx->lldi.pdev->dev, ctx_req.req.ablk_req->dst,
122 ABLK_CTX(ctx)->dst_nents, DMA_FROM_DEVICE);
123 if (ctx_req.ctx.ablk_ctx->skb) {
124 kfree_skb(ctx_req.ctx.ablk_ctx->skb);
125 ctx_req.ctx.ablk_ctx->skb = NULL;
126 }
127 break;
128
129 case CRYPTO_ALG_TYPE_AHASH:
130 ctx_req.req.ahash_req = (struct ahash_request *)req;
131 ctx_req.ctx.ahash_ctx =
132 ahash_request_ctx(ctx_req.req.ahash_req);
133 digestsize =
134 crypto_ahash_digestsize(crypto_ahash_reqtfm(
135 ctx_req.req.ahash_req));
136 updated_digestsize = digestsize;
137 if (digestsize == SHA224_DIGEST_SIZE)
138 updated_digestsize = SHA256_DIGEST_SIZE;
139 else if (digestsize == SHA384_DIGEST_SIZE)
140 updated_digestsize = SHA512_DIGEST_SIZE;
141 if (ctx_req.ctx.ahash_ctx->skb)
142 ctx_req.ctx.ahash_ctx->skb = NULL;
143 if (ctx_req.ctx.ahash_ctx->result == 1) {
144 ctx_req.ctx.ahash_ctx->result = 0;
145 memcpy(ctx_req.req.ahash_req->result, input +
146 sizeof(struct cpl_fw6_pld),
147 digestsize);
148 } else {
149 memcpy(ctx_req.ctx.ahash_ctx->partial_hash, input +
150 sizeof(struct cpl_fw6_pld),
151 updated_digestsize);
152 }
153 kfree(ctx_req.ctx.ahash_ctx->dummy_payload_ptr);
154 ctx_req.ctx.ahash_ctx->dummy_payload_ptr = NULL;
155 break;
156 }
157 return 0;
158}
159
160/*
161 * calc_tx_flits_ofld - calculate # of flits for an offload packet
162 * @skb: the packet
163 * Returns the number of flits needed for the given offload packet.
164 * These packets are already fully constructed and no additional headers
165 * will be added.
166 */
167static inline unsigned int calc_tx_flits_ofld(const struct sk_buff *skb)
168{
169 unsigned int flits, cnt;
170
171 if (is_ofld_imm(skb))
172 return DIV_ROUND_UP(skb->len, 8);
173
174 flits = skb_transport_offset(skb) / 8; /* headers */
175 cnt = skb_shinfo(skb)->nr_frags;
176 if (skb_tail_pointer(skb) != skb_transport_header(skb))
177 cnt++;
178 return flits + sgl_len(cnt);
179}
180
Harsh Jain39f91a32016-11-29 19:00:35 +0530181static inline void get_aes_decrypt_key(unsigned char *dec_key,
182 const unsigned char *key,
183 unsigned int keylength)
184{
185 u32 temp;
186 u32 w_ring[MAX_NK];
187 int i, j, k;
188 u8 nr, nk;
189
190 switch (keylength) {
191 case AES_KEYLENGTH_128BIT:
192 nk = KEYLENGTH_4BYTES;
193 nr = NUMBER_OF_ROUNDS_10;
194 break;
195 case AES_KEYLENGTH_192BIT:
196 nk = KEYLENGTH_6BYTES;
197 nr = NUMBER_OF_ROUNDS_12;
198 break;
199 case AES_KEYLENGTH_256BIT:
200 nk = KEYLENGTH_8BYTES;
201 nr = NUMBER_OF_ROUNDS_14;
202 break;
203 default:
204 return;
205 }
206 for (i = 0; i < nk; i++)
207 w_ring[i] = be32_to_cpu(*(u32 *)&key[4 * i]);
208
209 i = 0;
210 temp = w_ring[nk - 1];
211 while (i + nk < (nr + 1) * 4) {
212 if (!(i % nk)) {
213 /* RotWord(temp) */
214 temp = (temp << 8) | (temp >> 24);
215 temp = aes_ks_subword(temp);
216 temp ^= round_constant[i / nk];
217 } else if (nk == 8 && (i % 4 == 0)) {
218 temp = aes_ks_subword(temp);
219 }
220 w_ring[i % nk] ^= temp;
221 temp = w_ring[i % nk];
222 i++;
223 }
224 i--;
225 for (k = 0, j = i % nk; k < nk; k++) {
226 *((u32 *)dec_key + k) = htonl(w_ring[j]);
227 j--;
228 if (j < 0)
229 j += nk;
230 }
231}
232
Hariprasad Shenai324429d2016-08-17 12:33:05 +0530233static struct shash_desc *chcr_alloc_shash(unsigned int ds)
234{
235 struct crypto_shash *base_hash = NULL;
236 struct shash_desc *desc;
237
238 switch (ds) {
239 case SHA1_DIGEST_SIZE:
240 base_hash = crypto_alloc_shash("sha1-generic", 0, 0);
241 break;
242 case SHA224_DIGEST_SIZE:
243 base_hash = crypto_alloc_shash("sha224-generic", 0, 0);
244 break;
245 case SHA256_DIGEST_SIZE:
246 base_hash = crypto_alloc_shash("sha256-generic", 0, 0);
247 break;
248 case SHA384_DIGEST_SIZE:
249 base_hash = crypto_alloc_shash("sha384-generic", 0, 0);
250 break;
251 case SHA512_DIGEST_SIZE:
252 base_hash = crypto_alloc_shash("sha512-generic", 0, 0);
253 break;
254 }
255 if (IS_ERR(base_hash)) {
256 pr_err("Can not allocate sha-generic algo.\n");
257 return (void *)base_hash;
258 }
259
260 desc = kmalloc(sizeof(*desc) + crypto_shash_descsize(base_hash),
261 GFP_KERNEL);
262 if (!desc)
263 return ERR_PTR(-ENOMEM);
264 desc->tfm = base_hash;
265 desc->flags = crypto_shash_get_flags(base_hash);
266 return desc;
267}
268
269static int chcr_compute_partial_hash(struct shash_desc *desc,
270 char *iopad, char *result_hash,
271 int digest_size)
272{
273 struct sha1_state sha1_st;
274 struct sha256_state sha256_st;
275 struct sha512_state sha512_st;
276 int error;
277
278 if (digest_size == SHA1_DIGEST_SIZE) {
279 error = crypto_shash_init(desc) ?:
280 crypto_shash_update(desc, iopad, SHA1_BLOCK_SIZE) ?:
281 crypto_shash_export(desc, (void *)&sha1_st);
282 memcpy(result_hash, sha1_st.state, SHA1_DIGEST_SIZE);
283 } else if (digest_size == SHA224_DIGEST_SIZE) {
284 error = crypto_shash_init(desc) ?:
285 crypto_shash_update(desc, iopad, SHA256_BLOCK_SIZE) ?:
286 crypto_shash_export(desc, (void *)&sha256_st);
287 memcpy(result_hash, sha256_st.state, SHA256_DIGEST_SIZE);
288
289 } else if (digest_size == SHA256_DIGEST_SIZE) {
290 error = crypto_shash_init(desc) ?:
291 crypto_shash_update(desc, iopad, SHA256_BLOCK_SIZE) ?:
292 crypto_shash_export(desc, (void *)&sha256_st);
293 memcpy(result_hash, sha256_st.state, SHA256_DIGEST_SIZE);
294
295 } else if (digest_size == SHA384_DIGEST_SIZE) {
296 error = crypto_shash_init(desc) ?:
297 crypto_shash_update(desc, iopad, SHA512_BLOCK_SIZE) ?:
298 crypto_shash_export(desc, (void *)&sha512_st);
299 memcpy(result_hash, sha512_st.state, SHA512_DIGEST_SIZE);
300
301 } else if (digest_size == SHA512_DIGEST_SIZE) {
302 error = crypto_shash_init(desc) ?:
303 crypto_shash_update(desc, iopad, SHA512_BLOCK_SIZE) ?:
304 crypto_shash_export(desc, (void *)&sha512_st);
305 memcpy(result_hash, sha512_st.state, SHA512_DIGEST_SIZE);
306 } else {
307 error = -EINVAL;
308 pr_err("Unknown digest size %d\n", digest_size);
309 }
310 return error;
311}
312
313static void chcr_change_order(char *buf, int ds)
314{
315 int i;
316
317 if (ds == SHA512_DIGEST_SIZE) {
318 for (i = 0; i < (ds / sizeof(u64)); i++)
319 *((__be64 *)buf + i) =
320 cpu_to_be64(*((u64 *)buf + i));
321 } else {
322 for (i = 0; i < (ds / sizeof(u32)); i++)
323 *((__be32 *)buf + i) =
324 cpu_to_be32(*((u32 *)buf + i));
325 }
326}
327
328static inline int is_hmac(struct crypto_tfm *tfm)
329{
330 struct crypto_alg *alg = tfm->__crt_alg;
331 struct chcr_alg_template *chcr_crypto_alg =
332 container_of(__crypto_ahash_alg(alg), struct chcr_alg_template,
333 alg.hash);
334 if ((chcr_crypto_alg->type & CRYPTO_ALG_SUB_TYPE_MASK) ==
335 CRYPTO_ALG_SUB_TYPE_HASH_HMAC)
336 return 1;
337 return 0;
338}
339
340static inline unsigned int ch_nents(struct scatterlist *sg,
341 unsigned int *total_size)
342{
343 unsigned int nents;
344
345 for (nents = 0, *total_size = 0; sg; sg = sg_next(sg)) {
346 nents++;
347 *total_size += sg->length;
348 }
349 return nents;
350}
351
352static void write_phys_cpl(struct cpl_rx_phys_dsgl *phys_cpl,
353 struct scatterlist *sg,
354 struct phys_sge_parm *sg_param)
355{
356 struct phys_sge_pairs *to;
357 unsigned int out_buf_size = sg_param->obsize;
358 unsigned int nents = sg_param->nents, i, j, tot_len = 0;
359
360 phys_cpl->op_to_tid = htonl(CPL_RX_PHYS_DSGL_OPCODE_V(CPL_RX_PHYS_DSGL)
361 | CPL_RX_PHYS_DSGL_ISRDMA_V(0));
362 phys_cpl->pcirlxorder_to_noofsgentr =
363 htonl(CPL_RX_PHYS_DSGL_PCIRLXORDER_V(0) |
364 CPL_RX_PHYS_DSGL_PCINOSNOOP_V(0) |
365 CPL_RX_PHYS_DSGL_PCITPHNTENB_V(0) |
366 CPL_RX_PHYS_DSGL_PCITPHNT_V(0) |
367 CPL_RX_PHYS_DSGL_DCAID_V(0) |
368 CPL_RX_PHYS_DSGL_NOOFSGENTR_V(nents));
369 phys_cpl->rss_hdr_int.opcode = CPL_RX_PHYS_ADDR;
370 phys_cpl->rss_hdr_int.qid = htons(sg_param->qid);
371 phys_cpl->rss_hdr_int.hash_val = 0;
372 to = (struct phys_sge_pairs *)((unsigned char *)phys_cpl +
373 sizeof(struct cpl_rx_phys_dsgl));
374
375 for (i = 0; nents; to++) {
376 for (j = i; (nents && (j < (8 + i))); j++, nents--) {
377 to->len[j] = htons(sg->length);
378 to->addr[j] = cpu_to_be64(sg_dma_address(sg));
379 if (out_buf_size) {
380 if (tot_len + sg_dma_len(sg) >= out_buf_size) {
381 to->len[j] = htons(out_buf_size -
382 tot_len);
383 return;
384 }
385 tot_len += sg_dma_len(sg);
386 }
387 sg = sg_next(sg);
388 }
389 }
390}
391
392static inline unsigned
393int map_writesg_phys_cpl(struct device *dev, struct cpl_rx_phys_dsgl *phys_cpl,
394 struct scatterlist *sg, struct phys_sge_parm *sg_param)
395{
396 if (!sg || !sg_param->nents)
397 return 0;
398
399 sg_param->nents = dma_map_sg(dev, sg, sg_param->nents, DMA_FROM_DEVICE);
400 if (sg_param->nents == 0) {
401 pr_err("CHCR : DMA mapping failed\n");
402 return -EINVAL;
403 }
404 write_phys_cpl(phys_cpl, sg, sg_param);
405 return 0;
406}
407
408static inline int get_cryptoalg_subtype(struct crypto_tfm *tfm)
409{
410 struct crypto_alg *alg = tfm->__crt_alg;
411 struct chcr_alg_template *chcr_crypto_alg =
412 container_of(alg, struct chcr_alg_template, alg.crypto);
413
414 return chcr_crypto_alg->type & CRYPTO_ALG_SUB_TYPE_MASK;
415}
416
Harsh Jain358961d2016-11-29 19:00:36 +0530417static inline void write_buffer_to_skb(struct sk_buff *skb,
418 unsigned int *frags,
419 char *bfr,
420 u8 bfr_len)
421{
422 skb->len += bfr_len;
423 skb->data_len += bfr_len;
424 skb->truesize += bfr_len;
425 get_page(virt_to_page(bfr));
426 skb_fill_page_desc(skb, *frags, virt_to_page(bfr),
427 offset_in_page(bfr), bfr_len);
428 (*frags)++;
429}
430
431
Hariprasad Shenai324429d2016-08-17 12:33:05 +0530432static inline void
Harsh Jain358961d2016-11-29 19:00:36 +0530433write_sg_to_skb(struct sk_buff *skb, unsigned int *frags,
Hariprasad Shenai324429d2016-08-17 12:33:05 +0530434 struct scatterlist *sg, unsigned int count)
435{
436 struct page *spage;
437 unsigned int page_len;
438
439 skb->len += count;
440 skb->data_len += count;
441 skb->truesize += count;
442 while (count > 0) {
443 if (sg && (!(sg->length)))
444 break;
445 spage = sg_page(sg);
446 get_page(spage);
447 page_len = min(sg->length, count);
448 skb_fill_page_desc(skb, *frags, spage, sg->offset, page_len);
449 (*frags)++;
450 count -= page_len;
451 sg = sg_next(sg);
452 }
453}
454
455static int generate_copy_rrkey(struct ablk_ctx *ablkctx,
456 struct _key_ctx *key_ctx)
457{
458 if (ablkctx->ciph_mode == CHCR_SCMD_CIPHER_MODE_AES_CBC) {
459 get_aes_decrypt_key(key_ctx->key, ablkctx->key,
460 ablkctx->enckey_len << 3);
461 memset(key_ctx->key + ablkctx->enckey_len, 0,
462 CHCR_AES_MAX_KEY_LEN - ablkctx->enckey_len);
463 } else {
464 memcpy(key_ctx->key,
465 ablkctx->key + (ablkctx->enckey_len >> 1),
466 ablkctx->enckey_len >> 1);
467 get_aes_decrypt_key(key_ctx->key + (ablkctx->enckey_len >> 1),
468 ablkctx->key, ablkctx->enckey_len << 2);
469 }
470 return 0;
471}
472
473static inline void create_wreq(struct chcr_context *ctx,
Harsh Jain358961d2016-11-29 19:00:36 +0530474 struct chcr_wr *chcr_req,
Hariprasad Shenai324429d2016-08-17 12:33:05 +0530475 void *req, struct sk_buff *skb,
476 int kctx_len, int hash_sz,
477 unsigned int phys_dsgl)
478{
479 struct uld_ctx *u_ctx = ULD_CTX(ctx);
Hariprasad Shenai324429d2016-08-17 12:33:05 +0530480 int iv_loc = IV_DSGL;
481 int qid = u_ctx->lldi.rxq_ids[ctx->tx_channel_id];
482 unsigned int immdatalen = 0, nr_frags = 0;
483
484 if (is_ofld_imm(skb)) {
485 immdatalen = skb->data_len;
486 iv_loc = IV_IMMEDIATE;
487 } else {
488 nr_frags = skb_shinfo(skb)->nr_frags;
489 }
490
Harsh Jain358961d2016-11-29 19:00:36 +0530491 chcr_req->wreq.op_to_cctx_size = FILL_WR_OP_CCTX_SIZE(immdatalen,
492 ((sizeof(chcr_req->key_ctx) + kctx_len) >> 4));
493 chcr_req->wreq.pld_size_hash_size =
Hariprasad Shenai324429d2016-08-17 12:33:05 +0530494 htonl(FW_CRYPTO_LOOKASIDE_WR_PLD_SIZE_V(sgl_lengths[nr_frags]) |
495 FW_CRYPTO_LOOKASIDE_WR_HASH_SIZE_V(hash_sz));
Harsh Jain358961d2016-11-29 19:00:36 +0530496 chcr_req->wreq.len16_pkd =
497 htonl(FW_CRYPTO_LOOKASIDE_WR_LEN16_V(DIV_ROUND_UP(
Hariprasad Shenai324429d2016-08-17 12:33:05 +0530498 (calc_tx_flits_ofld(skb) * 8), 16)));
Harsh Jain358961d2016-11-29 19:00:36 +0530499 chcr_req->wreq.cookie = cpu_to_be64((uintptr_t)req);
500 chcr_req->wreq.rx_chid_to_rx_q_id =
Hariprasad Shenai324429d2016-08-17 12:33:05 +0530501 FILL_WR_RX_Q_ID(ctx->dev->tx_channel_id, qid,
502 (hash_sz) ? IV_NOP : iv_loc);
503
Harsh Jain358961d2016-11-29 19:00:36 +0530504 chcr_req->ulptx.cmd_dest = FILL_ULPTX_CMD_DEST(ctx->dev->tx_channel_id);
505 chcr_req->ulptx.len = htonl((DIV_ROUND_UP((calc_tx_flits_ofld(skb) * 8),
506 16) - ((sizeof(chcr_req->wreq)) >> 4)));
Hariprasad Shenai324429d2016-08-17 12:33:05 +0530507
Harsh Jain358961d2016-11-29 19:00:36 +0530508 chcr_req->sc_imm.cmd_more = FILL_CMD_MORE(immdatalen);
509 chcr_req->sc_imm.len = cpu_to_be32(sizeof(struct cpl_tx_sec_pdu) +
510 sizeof(chcr_req->key_ctx) +
511 kctx_len +
Hariprasad Shenai324429d2016-08-17 12:33:05 +0530512 ((hash_sz) ? DUMMY_BYTES :
513 (sizeof(struct cpl_rx_phys_dsgl) +
514 phys_dsgl)) + immdatalen);
515}
516
517/**
518 * create_cipher_wr - form the WR for cipher operations
519 * @req: cipher req.
520 * @ctx: crypto driver context of the request.
521 * @qid: ingress qid where response of this WR should be received.
522 * @op_type: encryption or decryption
523 */
524static struct sk_buff
Harsh Jain358961d2016-11-29 19:00:36 +0530525*create_cipher_wr(struct ablkcipher_request *req,
526 unsigned short qid,
Hariprasad Shenai324429d2016-08-17 12:33:05 +0530527 unsigned short op_type)
528{
Hariprasad Shenai324429d2016-08-17 12:33:05 +0530529 struct crypto_ablkcipher *tfm = crypto_ablkcipher_reqtfm(req);
Harsh Jain358961d2016-11-29 19:00:36 +0530530 struct chcr_context *ctx = crypto_ablkcipher_ctx(tfm);
Hariprasad Shenai324429d2016-08-17 12:33:05 +0530531 struct uld_ctx *u_ctx = ULD_CTX(ctx);
532 struct ablk_ctx *ablkctx = ABLK_CTX(ctx);
533 struct sk_buff *skb = NULL;
Harsh Jain358961d2016-11-29 19:00:36 +0530534 struct chcr_wr *chcr_req;
Hariprasad Shenai324429d2016-08-17 12:33:05 +0530535 struct cpl_rx_phys_dsgl *phys_cpl;
536 struct chcr_blkcipher_req_ctx *req_ctx = ablkcipher_request_ctx(req);
537 struct phys_sge_parm sg_param;
538 unsigned int frags = 0, transhdr_len, phys_dsgl, dst_bufsize = 0;
539 unsigned int ivsize = crypto_ablkcipher_ivsize(tfm), kctx_len;
Harsh Jain358961d2016-11-29 19:00:36 +0530540 gfp_t flags = req->base.flags & CRYPTO_TFM_REQ_MAY_SLEEP ? GFP_KERNEL :
541 GFP_ATOMIC;
Hariprasad Shenai324429d2016-08-17 12:33:05 +0530542
543 if (!req->info)
544 return ERR_PTR(-EINVAL);
545 ablkctx->dst_nents = ch_nents(req->dst, &dst_bufsize);
546 ablkctx->enc = op_type;
547
548 if ((ablkctx->enckey_len == 0) || (ivsize > AES_BLOCK_SIZE) ||
Harsh Jain358961d2016-11-29 19:00:36 +0530549 (req->nbytes <= 0) || (req->nbytes % AES_BLOCK_SIZE)) {
550 pr_err("AES: Invalid value of Key Len %d nbytes %d IV Len %d\n",
551 ablkctx->enckey_len, req->nbytes, ivsize);
Hariprasad Shenai324429d2016-08-17 12:33:05 +0530552 return ERR_PTR(-EINVAL);
Harsh Jain358961d2016-11-29 19:00:36 +0530553 }
Hariprasad Shenai324429d2016-08-17 12:33:05 +0530554
555 phys_dsgl = get_space_for_phys_dsgl(ablkctx->dst_nents);
556
Harsh Jain358961d2016-11-29 19:00:36 +0530557 kctx_len = (DIV_ROUND_UP(ablkctx->enckey_len, 16) * 16);
Hariprasad Shenai324429d2016-08-17 12:33:05 +0530558 transhdr_len = CIPHER_TRANSHDR_SIZE(kctx_len, phys_dsgl);
Harsh Jain358961d2016-11-29 19:00:36 +0530559 skb = alloc_skb((transhdr_len + sizeof(struct sge_opaque_hdr)), flags);
Hariprasad Shenai324429d2016-08-17 12:33:05 +0530560 if (!skb)
561 return ERR_PTR(-ENOMEM);
562 skb_reserve(skb, sizeof(struct sge_opaque_hdr));
Harsh Jain358961d2016-11-29 19:00:36 +0530563 chcr_req = (struct chcr_wr *)__skb_put(skb, transhdr_len);
564 memset(chcr_req, 0, transhdr_len);
565 chcr_req->sec_cpl.op_ivinsrtofst =
566 FILL_SEC_CPL_OP_IVINSR(ctx->dev->tx_channel_id, 2, 1);
Hariprasad Shenai324429d2016-08-17 12:33:05 +0530567
Harsh Jain358961d2016-11-29 19:00:36 +0530568 chcr_req->sec_cpl.pldlen = htonl(ivsize + req->nbytes);
569 chcr_req->sec_cpl.aadstart_cipherstop_hi =
570 FILL_SEC_CPL_CIPHERSTOP_HI(0, 0, ivsize + 1, 0);
Hariprasad Shenai324429d2016-08-17 12:33:05 +0530571
Harsh Jain358961d2016-11-29 19:00:36 +0530572 chcr_req->sec_cpl.cipherstop_lo_authinsert =
573 FILL_SEC_CPL_AUTHINSERT(0, 0, 0, 0);
574 chcr_req->sec_cpl.seqno_numivs = FILL_SEC_CPL_SCMD0_SEQNO(op_type, 0,
Hariprasad Shenai324429d2016-08-17 12:33:05 +0530575 ablkctx->ciph_mode,
Harsh Jain358961d2016-11-29 19:00:36 +0530576 0, 0, ivsize >> 1);
577 chcr_req->sec_cpl.ivgen_hdrlen = FILL_SEC_CPL_IVGEN_HDRLEN(0, 0, 0,
Hariprasad Shenai324429d2016-08-17 12:33:05 +0530578 0, 1, phys_dsgl);
579
Harsh Jain358961d2016-11-29 19:00:36 +0530580 chcr_req->key_ctx.ctx_hdr = ablkctx->key_ctx_hdr;
Hariprasad Shenai324429d2016-08-17 12:33:05 +0530581 if (op_type == CHCR_DECRYPT_OP) {
Harsh Jain358961d2016-11-29 19:00:36 +0530582 generate_copy_rrkey(ablkctx, &chcr_req->key_ctx);
Hariprasad Shenai324429d2016-08-17 12:33:05 +0530583 } else {
584 if (ablkctx->ciph_mode == CHCR_SCMD_CIPHER_MODE_AES_CBC) {
Harsh Jain358961d2016-11-29 19:00:36 +0530585 memcpy(chcr_req->key_ctx.key, ablkctx->key,
586 ablkctx->enckey_len);
Hariprasad Shenai324429d2016-08-17 12:33:05 +0530587 } else {
Harsh Jain358961d2016-11-29 19:00:36 +0530588 memcpy(chcr_req->key_ctx.key, ablkctx->key +
Hariprasad Shenai324429d2016-08-17 12:33:05 +0530589 (ablkctx->enckey_len >> 1),
590 ablkctx->enckey_len >> 1);
Harsh Jain358961d2016-11-29 19:00:36 +0530591 memcpy(chcr_req->key_ctx.key +
Hariprasad Shenai324429d2016-08-17 12:33:05 +0530592 (ablkctx->enckey_len >> 1),
593 ablkctx->key,
594 ablkctx->enckey_len >> 1);
595 }
596 }
Harsh Jain358961d2016-11-29 19:00:36 +0530597 phys_cpl = (struct cpl_rx_phys_dsgl *)((u8 *)(chcr_req + 1) + kctx_len);
Hariprasad Shenai324429d2016-08-17 12:33:05 +0530598 sg_param.nents = ablkctx->dst_nents;
Harsh Jain358961d2016-11-29 19:00:36 +0530599 sg_param.obsize = req->nbytes;
Hariprasad Shenai324429d2016-08-17 12:33:05 +0530600 sg_param.qid = qid;
601 sg_param.align = 1;
602 if (map_writesg_phys_cpl(&u_ctx->lldi.pdev->dev, phys_cpl, req->dst,
603 &sg_param))
604 goto map_fail1;
605
606 skb_set_transport_header(skb, transhdr_len);
Harsh Jain358961d2016-11-29 19:00:36 +0530607 memcpy(ablkctx->iv, req->info, ivsize);
608 write_buffer_to_skb(skb, &frags, ablkctx->iv, ivsize);
609 write_sg_to_skb(skb, &frags, req->src, req->nbytes);
610 create_wreq(ctx, chcr_req, req, skb, kctx_len, 0, phys_dsgl);
Hariprasad Shenai324429d2016-08-17 12:33:05 +0530611 req_ctx->skb = skb;
612 skb_get(skb);
613 return skb;
614map_fail1:
615 kfree_skb(skb);
616 return ERR_PTR(-ENOMEM);
617}
618
619static int chcr_aes_cbc_setkey(struct crypto_ablkcipher *tfm, const u8 *key,
620 unsigned int keylen)
621{
622 struct chcr_context *ctx = crypto_ablkcipher_ctx(tfm);
623 struct ablk_ctx *ablkctx = ABLK_CTX(ctx);
624 struct ablkcipher_alg *alg = crypto_ablkcipher_alg(tfm);
625 unsigned int ck_size, context_size;
626 u16 alignment = 0;
627
628 if ((keylen < alg->min_keysize) || (keylen > alg->max_keysize))
629 goto badkey_err;
630
631 memcpy(ablkctx->key, key, keylen);
632 ablkctx->enckey_len = keylen;
633 if (keylen == AES_KEYSIZE_128) {
634 ck_size = CHCR_KEYCTX_CIPHER_KEY_SIZE_128;
635 } else if (keylen == AES_KEYSIZE_192) {
636 alignment = 8;
637 ck_size = CHCR_KEYCTX_CIPHER_KEY_SIZE_192;
638 } else if (keylen == AES_KEYSIZE_256) {
639 ck_size = CHCR_KEYCTX_CIPHER_KEY_SIZE_256;
640 } else {
641 goto badkey_err;
642 }
643
644 context_size = (KEY_CONTEXT_HDR_SALT_AND_PAD +
645 keylen + alignment) >> 4;
646
647 ablkctx->key_ctx_hdr = FILL_KEY_CTX_HDR(ck_size, CHCR_KEYCTX_NO_KEY,
648 0, 0, context_size);
649 ablkctx->ciph_mode = CHCR_SCMD_CIPHER_MODE_AES_CBC;
650 return 0;
651badkey_err:
652 crypto_ablkcipher_set_flags(tfm, CRYPTO_TFM_RES_BAD_KEY_LEN);
653 ablkctx->enckey_len = 0;
654 return -EINVAL;
655}
656
Wei Yongjun73b86bb2016-08-26 14:21:08 +0000657static int cxgb4_is_crypto_q_full(struct net_device *dev, unsigned int idx)
Hariprasad Shenai324429d2016-08-17 12:33:05 +0530658{
659 int ret = 0;
660 struct sge_ofld_txq *q;
661 struct adapter *adap = netdev2adap(dev);
662
663 local_bh_disable();
664 q = &adap->sge.ofldtxq[idx];
665 spin_lock(&q->sendq.lock);
666 if (q->full)
667 ret = -1;
668 spin_unlock(&q->sendq.lock);
669 local_bh_enable();
670 return ret;
671}
672
673static int chcr_aes_encrypt(struct ablkcipher_request *req)
674{
675 struct crypto_ablkcipher *tfm = crypto_ablkcipher_reqtfm(req);
676 struct chcr_context *ctx = crypto_ablkcipher_ctx(tfm);
Hariprasad Shenai324429d2016-08-17 12:33:05 +0530677 struct uld_ctx *u_ctx = ULD_CTX(ctx);
678 struct sk_buff *skb;
679
680 if (unlikely(cxgb4_is_crypto_q_full(u_ctx->lldi.ports[0],
681 ctx->tx_channel_id))) {
682 if (!(req->base.flags & CRYPTO_TFM_REQ_MAY_BACKLOG))
683 return -EBUSY;
684 }
685
Harsh Jain358961d2016-11-29 19:00:36 +0530686 skb = create_cipher_wr(req, u_ctx->lldi.rxq_ids[ctx->tx_channel_id],
Hariprasad Shenai324429d2016-08-17 12:33:05 +0530687 CHCR_ENCRYPT_OP);
688 if (IS_ERR(skb)) {
689 pr_err("chcr : %s : Failed to form WR. No memory\n", __func__);
690 return PTR_ERR(skb);
691 }
692 skb->dev = u_ctx->lldi.ports[0];
693 set_wr_txq(skb, CPL_PRIORITY_DATA, ctx->tx_channel_id);
694 chcr_send_wr(skb);
695 return -EINPROGRESS;
696}
697
698static int chcr_aes_decrypt(struct ablkcipher_request *req)
699{
700 struct crypto_ablkcipher *tfm = crypto_ablkcipher_reqtfm(req);
701 struct chcr_context *ctx = crypto_ablkcipher_ctx(tfm);
Hariprasad Shenai324429d2016-08-17 12:33:05 +0530702 struct uld_ctx *u_ctx = ULD_CTX(ctx);
703 struct sk_buff *skb;
704
705 if (unlikely(cxgb4_is_crypto_q_full(u_ctx->lldi.ports[0],
706 ctx->tx_channel_id))) {
707 if (!(req->base.flags & CRYPTO_TFM_REQ_MAY_BACKLOG))
708 return -EBUSY;
709 }
710
Harsh Jain358961d2016-11-29 19:00:36 +0530711 skb = create_cipher_wr(req, u_ctx->lldi.rxq_ids[0],
Hariprasad Shenai324429d2016-08-17 12:33:05 +0530712 CHCR_DECRYPT_OP);
713 if (IS_ERR(skb)) {
714 pr_err("chcr : %s : Failed to form WR. No memory\n", __func__);
715 return PTR_ERR(skb);
716 }
717 skb->dev = u_ctx->lldi.ports[0];
718 set_wr_txq(skb, CPL_PRIORITY_DATA, ctx->tx_channel_id);
719 chcr_send_wr(skb);
720 return -EINPROGRESS;
721}
722
723static int chcr_device_init(struct chcr_context *ctx)
724{
725 struct uld_ctx *u_ctx;
726 unsigned int id;
727 int err = 0, rxq_perchan, rxq_idx;
728
729 id = smp_processor_id();
730 if (!ctx->dev) {
731 err = assign_chcr_device(&ctx->dev);
732 if (err) {
733 pr_err("chcr device assignment fails\n");
734 goto out;
735 }
736 u_ctx = ULD_CTX(ctx);
737 rxq_perchan = u_ctx->lldi.nrxq / u_ctx->lldi.nchan;
738 ctx->dev->tx_channel_id = 0;
739 rxq_idx = ctx->dev->tx_channel_id * rxq_perchan;
740 rxq_idx += id % rxq_perchan;
741 spin_lock(&ctx->dev->lock_chcr_dev);
742 ctx->tx_channel_id = rxq_idx;
743 spin_unlock(&ctx->dev->lock_chcr_dev);
744 }
745out:
746 return err;
747}
748
749static int chcr_cra_init(struct crypto_tfm *tfm)
750{
751 tfm->crt_ablkcipher.reqsize = sizeof(struct chcr_blkcipher_req_ctx);
752 return chcr_device_init(crypto_tfm_ctx(tfm));
753}
754
755static int get_alg_config(struct algo_param *params,
756 unsigned int auth_size)
757{
758 switch (auth_size) {
759 case SHA1_DIGEST_SIZE:
760 params->mk_size = CHCR_KEYCTX_MAC_KEY_SIZE_160;
761 params->auth_mode = CHCR_SCMD_AUTH_MODE_SHA1;
762 params->result_size = SHA1_DIGEST_SIZE;
763 break;
764 case SHA224_DIGEST_SIZE:
765 params->mk_size = CHCR_KEYCTX_MAC_KEY_SIZE_256;
766 params->auth_mode = CHCR_SCMD_AUTH_MODE_SHA224;
767 params->result_size = SHA256_DIGEST_SIZE;
768 break;
769 case SHA256_DIGEST_SIZE:
770 params->mk_size = CHCR_KEYCTX_MAC_KEY_SIZE_256;
771 params->auth_mode = CHCR_SCMD_AUTH_MODE_SHA256;
772 params->result_size = SHA256_DIGEST_SIZE;
773 break;
774 case SHA384_DIGEST_SIZE:
775 params->mk_size = CHCR_KEYCTX_MAC_KEY_SIZE_512;
776 params->auth_mode = CHCR_SCMD_AUTH_MODE_SHA512_384;
777 params->result_size = SHA512_DIGEST_SIZE;
778 break;
779 case SHA512_DIGEST_SIZE:
780 params->mk_size = CHCR_KEYCTX_MAC_KEY_SIZE_512;
781 params->auth_mode = CHCR_SCMD_AUTH_MODE_SHA512_512;
782 params->result_size = SHA512_DIGEST_SIZE;
783 break;
784 default:
785 pr_err("chcr : ERROR, unsupported digest size\n");
786 return -EINVAL;
787 }
788 return 0;
789}
790
Hariprasad Shenai324429d2016-08-17 12:33:05 +0530791/**
Harsh Jain358961d2016-11-29 19:00:36 +0530792 * create_hash_wr - Create hash work request
Hariprasad Shenai324429d2016-08-17 12:33:05 +0530793 * @req - Cipher req base
794 */
Harsh Jain358961d2016-11-29 19:00:36 +0530795static struct sk_buff *create_hash_wr(struct ahash_request *req,
Hariprasad Shenai324429d2016-08-17 12:33:05 +0530796 struct hash_wr_param *param)
797{
798 struct chcr_ahash_req_ctx *req_ctx = ahash_request_ctx(req);
799 struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);
800 struct chcr_context *ctx = crypto_tfm_ctx(crypto_ahash_tfm(tfm));
801 struct hmac_ctx *hmacctx = HMAC_CTX(ctx);
802 struct sk_buff *skb = NULL;
Harsh Jain358961d2016-11-29 19:00:36 +0530803 struct chcr_wr *chcr_req;
Hariprasad Shenai324429d2016-08-17 12:33:05 +0530804 unsigned int frags = 0, transhdr_len, iopad_alignment = 0;
805 unsigned int digestsize = crypto_ahash_digestsize(tfm);
Harsh Jain358961d2016-11-29 19:00:36 +0530806 unsigned int kctx_len = 0;
Hariprasad Shenai324429d2016-08-17 12:33:05 +0530807 u8 hash_size_in_response = 0;
Harsh Jain358961d2016-11-29 19:00:36 +0530808 gfp_t flags = req->base.flags & CRYPTO_TFM_REQ_MAY_SLEEP ? GFP_KERNEL :
809 GFP_ATOMIC;
Hariprasad Shenai324429d2016-08-17 12:33:05 +0530810
811 iopad_alignment = KEYCTX_ALIGN_PAD(digestsize);
Harsh Jain358961d2016-11-29 19:00:36 +0530812 kctx_len = param->alg_prm.result_size + iopad_alignment;
Hariprasad Shenai324429d2016-08-17 12:33:05 +0530813 if (param->opad_needed)
814 kctx_len += param->alg_prm.result_size + iopad_alignment;
815
816 if (req_ctx->result)
817 hash_size_in_response = digestsize;
818 else
819 hash_size_in_response = param->alg_prm.result_size;
820 transhdr_len = HASH_TRANSHDR_SIZE(kctx_len);
Harsh Jain358961d2016-11-29 19:00:36 +0530821 skb = alloc_skb((transhdr_len + sizeof(struct sge_opaque_hdr)), flags);
Hariprasad Shenai324429d2016-08-17 12:33:05 +0530822 if (!skb)
823 return skb;
824
825 skb_reserve(skb, sizeof(struct sge_opaque_hdr));
Harsh Jain358961d2016-11-29 19:00:36 +0530826 chcr_req = (struct chcr_wr *)__skb_put(skb, transhdr_len);
827 memset(chcr_req, 0, transhdr_len);
Hariprasad Shenai324429d2016-08-17 12:33:05 +0530828
Harsh Jain358961d2016-11-29 19:00:36 +0530829 chcr_req->sec_cpl.op_ivinsrtofst =
830 FILL_SEC_CPL_OP_IVINSR(ctx->dev->tx_channel_id, 2, 0);
831 chcr_req->sec_cpl.pldlen = htonl(param->bfr_len + param->sg_len);
Hariprasad Shenai324429d2016-08-17 12:33:05 +0530832
Harsh Jain358961d2016-11-29 19:00:36 +0530833 chcr_req->sec_cpl.aadstart_cipherstop_hi =
Hariprasad Shenai324429d2016-08-17 12:33:05 +0530834 FILL_SEC_CPL_CIPHERSTOP_HI(0, 0, 0, 0);
Harsh Jain358961d2016-11-29 19:00:36 +0530835 chcr_req->sec_cpl.cipherstop_lo_authinsert =
Hariprasad Shenai324429d2016-08-17 12:33:05 +0530836 FILL_SEC_CPL_AUTHINSERT(0, 1, 0, 0);
Harsh Jain358961d2016-11-29 19:00:36 +0530837 chcr_req->sec_cpl.seqno_numivs =
Hariprasad Shenai324429d2016-08-17 12:33:05 +0530838 FILL_SEC_CPL_SCMD0_SEQNO(0, 0, 0, param->alg_prm.auth_mode,
Harsh Jain358961d2016-11-29 19:00:36 +0530839 param->opad_needed, 0);
Hariprasad Shenai324429d2016-08-17 12:33:05 +0530840
Harsh Jain358961d2016-11-29 19:00:36 +0530841 chcr_req->sec_cpl.ivgen_hdrlen =
Hariprasad Shenai324429d2016-08-17 12:33:05 +0530842 FILL_SEC_CPL_IVGEN_HDRLEN(param->last, param->more, 0, 1, 0, 0);
843
Harsh Jain358961d2016-11-29 19:00:36 +0530844 memcpy(chcr_req->key_ctx.key, req_ctx->partial_hash,
845 param->alg_prm.result_size);
Hariprasad Shenai324429d2016-08-17 12:33:05 +0530846
847 if (param->opad_needed)
Harsh Jain358961d2016-11-29 19:00:36 +0530848 memcpy(chcr_req->key_ctx.key +
849 ((param->alg_prm.result_size <= 32) ? 32 :
850 CHCR_HASH_MAX_DIGEST_SIZE),
Hariprasad Shenai324429d2016-08-17 12:33:05 +0530851 hmacctx->opad, param->alg_prm.result_size);
852
Harsh Jain358961d2016-11-29 19:00:36 +0530853 chcr_req->key_ctx.ctx_hdr = FILL_KEY_CTX_HDR(CHCR_KEYCTX_NO_KEY,
Hariprasad Shenai324429d2016-08-17 12:33:05 +0530854 param->alg_prm.mk_size, 0,
855 param->opad_needed,
Harsh Jain358961d2016-11-29 19:00:36 +0530856 ((kctx_len +
857 sizeof(chcr_req->key_ctx)) >> 4));
858 chcr_req->sec_cpl.scmd1 = cpu_to_be64((u64)param->scmd1);
Hariprasad Shenai324429d2016-08-17 12:33:05 +0530859
860 skb_set_transport_header(skb, transhdr_len);
861 if (param->bfr_len != 0)
Harsh Jain358961d2016-11-29 19:00:36 +0530862 write_buffer_to_skb(skb, &frags, req_ctx->bfr,
Hariprasad Shenai324429d2016-08-17 12:33:05 +0530863 param->bfr_len);
864 if (param->sg_len != 0)
Harsh Jain358961d2016-11-29 19:00:36 +0530865 write_sg_to_skb(skb, &frags, req->src, param->sg_len);
Hariprasad Shenai324429d2016-08-17 12:33:05 +0530866
Harsh Jain358961d2016-11-29 19:00:36 +0530867 create_wreq(ctx, chcr_req, req, skb, kctx_len, hash_size_in_response,
Hariprasad Shenai324429d2016-08-17 12:33:05 +0530868 0);
869 req_ctx->skb = skb;
870 skb_get(skb);
871 return skb;
872}
873
874static int chcr_ahash_update(struct ahash_request *req)
875{
876 struct chcr_ahash_req_ctx *req_ctx = ahash_request_ctx(req);
877 struct crypto_ahash *rtfm = crypto_ahash_reqtfm(req);
878 struct chcr_context *ctx = crypto_tfm_ctx(crypto_ahash_tfm(rtfm));
879 struct uld_ctx *u_ctx = NULL;
880 struct sk_buff *skb;
881 u8 remainder = 0, bs;
882 unsigned int nbytes = req->nbytes;
883 struct hash_wr_param params;
884
885 bs = crypto_tfm_alg_blocksize(crypto_ahash_tfm(rtfm));
886
887 u_ctx = ULD_CTX(ctx);
888 if (unlikely(cxgb4_is_crypto_q_full(u_ctx->lldi.ports[0],
889 ctx->tx_channel_id))) {
890 if (!(req->base.flags & CRYPTO_TFM_REQ_MAY_BACKLOG))
891 return -EBUSY;
892 }
893
894 if (nbytes + req_ctx->bfr_len >= bs) {
895 remainder = (nbytes + req_ctx->bfr_len) % bs;
896 nbytes = nbytes + req_ctx->bfr_len - remainder;
897 } else {
898 sg_pcopy_to_buffer(req->src, sg_nents(req->src), req_ctx->bfr +
899 req_ctx->bfr_len, nbytes, 0);
900 req_ctx->bfr_len += nbytes;
901 return 0;
902 }
903
904 params.opad_needed = 0;
905 params.more = 1;
906 params.last = 0;
Hariprasad Shenai324429d2016-08-17 12:33:05 +0530907 params.scmd1 = 0;
908 get_alg_config(&params.alg_prm, crypto_ahash_digestsize(rtfm));
909 req_ctx->result = 0;
910 req_ctx->data_len += params.sg_len + params.bfr_len;
Harsh Jain358961d2016-11-29 19:00:36 +0530911 skb = create_hash_wr(req, &params);
Hariprasad Shenai324429d2016-08-17 12:33:05 +0530912
913 req_ctx->bfr_len = remainder;
914 if (remainder)
915 sg_pcopy_to_buffer(req->src, sg_nents(req->src),
916 req_ctx->bfr, remainder, req->nbytes -
917 remainder);
918 skb->dev = u_ctx->lldi.ports[0];
919 set_wr_txq(skb, CPL_PRIORITY_DATA, ctx->tx_channel_id);
920 chcr_send_wr(skb);
921
922 return -EINPROGRESS;
923}
924
925static void create_last_hash_block(char *bfr_ptr, unsigned int bs, u64 scmd1)
926{
927 memset(bfr_ptr, 0, bs);
928 *bfr_ptr = 0x80;
929 if (bs == 64)
930 *(__be64 *)(bfr_ptr + 56) = cpu_to_be64(scmd1 << 3);
931 else
932 *(__be64 *)(bfr_ptr + 120) = cpu_to_be64(scmd1 << 3);
933}
934
935static int chcr_ahash_final(struct ahash_request *req)
936{
937 struct chcr_ahash_req_ctx *req_ctx = ahash_request_ctx(req);
938 struct crypto_ahash *rtfm = crypto_ahash_reqtfm(req);
939 struct chcr_context *ctx = crypto_tfm_ctx(crypto_ahash_tfm(rtfm));
940 struct hash_wr_param params;
941 struct sk_buff *skb;
942 struct uld_ctx *u_ctx = NULL;
943 u8 bs = crypto_tfm_alg_blocksize(crypto_ahash_tfm(rtfm));
944
945 u_ctx = ULD_CTX(ctx);
946 if (is_hmac(crypto_ahash_tfm(rtfm)))
947 params.opad_needed = 1;
948 else
949 params.opad_needed = 0;
950 params.sg_len = 0;
951 get_alg_config(&params.alg_prm, crypto_ahash_digestsize(rtfm));
952 req_ctx->result = 1;
953 params.bfr_len = req_ctx->bfr_len;
954 req_ctx->data_len += params.bfr_len + params.sg_len;
955 if (req_ctx->bfr && (req_ctx->bfr_len == 0)) {
956 create_last_hash_block(req_ctx->bfr, bs, req_ctx->data_len);
957 params.last = 0;
958 params.more = 1;
959 params.scmd1 = 0;
960 params.bfr_len = bs;
961
962 } else {
963 params.scmd1 = req_ctx->data_len;
964 params.last = 1;
965 params.more = 0;
966 }
Harsh Jain358961d2016-11-29 19:00:36 +0530967 skb = create_hash_wr(req, &params);
968 if (IS_ERR(skb))
969 return PTR_ERR(skb);
970
Hariprasad Shenai324429d2016-08-17 12:33:05 +0530971 skb->dev = u_ctx->lldi.ports[0];
972 set_wr_txq(skb, CPL_PRIORITY_DATA, ctx->tx_channel_id);
973 chcr_send_wr(skb);
974 return -EINPROGRESS;
975}
976
977static int chcr_ahash_finup(struct ahash_request *req)
978{
979 struct chcr_ahash_req_ctx *req_ctx = ahash_request_ctx(req);
980 struct crypto_ahash *rtfm = crypto_ahash_reqtfm(req);
981 struct chcr_context *ctx = crypto_tfm_ctx(crypto_ahash_tfm(rtfm));
982 struct uld_ctx *u_ctx = NULL;
983 struct sk_buff *skb;
984 struct hash_wr_param params;
985 u8 bs;
986
987 bs = crypto_tfm_alg_blocksize(crypto_ahash_tfm(rtfm));
988 u_ctx = ULD_CTX(ctx);
989
990 if (unlikely(cxgb4_is_crypto_q_full(u_ctx->lldi.ports[0],
991 ctx->tx_channel_id))) {
992 if (!(req->base.flags & CRYPTO_TFM_REQ_MAY_BACKLOG))
993 return -EBUSY;
994 }
995
996 if (is_hmac(crypto_ahash_tfm(rtfm)))
997 params.opad_needed = 1;
998 else
999 params.opad_needed = 0;
1000
1001 params.sg_len = req->nbytes;
1002 params.bfr_len = req_ctx->bfr_len;
1003 get_alg_config(&params.alg_prm, crypto_ahash_digestsize(rtfm));
1004 req_ctx->data_len += params.bfr_len + params.sg_len;
1005 req_ctx->result = 1;
1006 if (req_ctx->bfr && (req_ctx->bfr_len + req->nbytes) == 0) {
1007 create_last_hash_block(req_ctx->bfr, bs, req_ctx->data_len);
1008 params.last = 0;
1009 params.more = 1;
1010 params.scmd1 = 0;
1011 params.bfr_len = bs;
1012 } else {
1013 params.scmd1 = req_ctx->data_len;
1014 params.last = 1;
1015 params.more = 0;
1016 }
1017
Harsh Jain358961d2016-11-29 19:00:36 +05301018 skb = create_hash_wr(req, &params);
1019 if (IS_ERR(skb))
1020 return PTR_ERR(skb);
1021
Hariprasad Shenai324429d2016-08-17 12:33:05 +05301022 skb->dev = u_ctx->lldi.ports[0];
1023 set_wr_txq(skb, CPL_PRIORITY_DATA, ctx->tx_channel_id);
1024 chcr_send_wr(skb);
1025
1026 return -EINPROGRESS;
1027}
1028
1029static int chcr_ahash_digest(struct ahash_request *req)
1030{
1031 struct chcr_ahash_req_ctx *req_ctx = ahash_request_ctx(req);
1032 struct crypto_ahash *rtfm = crypto_ahash_reqtfm(req);
1033 struct chcr_context *ctx = crypto_tfm_ctx(crypto_ahash_tfm(rtfm));
1034 struct uld_ctx *u_ctx = NULL;
1035 struct sk_buff *skb;
1036 struct hash_wr_param params;
1037 u8 bs;
1038
1039 rtfm->init(req);
1040 bs = crypto_tfm_alg_blocksize(crypto_ahash_tfm(rtfm));
1041
1042 u_ctx = ULD_CTX(ctx);
1043 if (unlikely(cxgb4_is_crypto_q_full(u_ctx->lldi.ports[0],
1044 ctx->tx_channel_id))) {
1045 if (!(req->base.flags & CRYPTO_TFM_REQ_MAY_BACKLOG))
1046 return -EBUSY;
1047 }
1048
1049 if (is_hmac(crypto_ahash_tfm(rtfm)))
1050 params.opad_needed = 1;
1051 else
1052 params.opad_needed = 0;
1053
1054 params.last = 0;
1055 params.more = 0;
1056 params.sg_len = req->nbytes;
1057 params.bfr_len = 0;
1058 params.scmd1 = 0;
1059 get_alg_config(&params.alg_prm, crypto_ahash_digestsize(rtfm));
1060 req_ctx->result = 1;
1061 req_ctx->data_len += params.bfr_len + params.sg_len;
1062
1063 if (req_ctx->bfr && req->nbytes == 0) {
1064 create_last_hash_block(req_ctx->bfr, bs, 0);
1065 params.more = 1;
1066 params.bfr_len = bs;
1067 }
1068
Harsh Jain358961d2016-11-29 19:00:36 +05301069 skb = create_hash_wr(req, &params);
1070 if (IS_ERR(skb))
1071 return PTR_ERR(skb);
Hariprasad Shenai324429d2016-08-17 12:33:05 +05301072
1073 skb->dev = u_ctx->lldi.ports[0];
1074 set_wr_txq(skb, CPL_PRIORITY_DATA, ctx->tx_channel_id);
1075 chcr_send_wr(skb);
1076 return -EINPROGRESS;
1077}
1078
1079static int chcr_ahash_export(struct ahash_request *areq, void *out)
1080{
1081 struct chcr_ahash_req_ctx *req_ctx = ahash_request_ctx(areq);
1082 struct chcr_ahash_req_ctx *state = out;
1083
1084 state->bfr_len = req_ctx->bfr_len;
1085 state->data_len = req_ctx->data_len;
1086 memcpy(state->bfr, req_ctx->bfr, CHCR_HASH_MAX_BLOCK_SIZE_128);
1087 memcpy(state->partial_hash, req_ctx->partial_hash,
1088 CHCR_HASH_MAX_DIGEST_SIZE);
1089 return 0;
1090}
1091
1092static int chcr_ahash_import(struct ahash_request *areq, const void *in)
1093{
1094 struct chcr_ahash_req_ctx *req_ctx = ahash_request_ctx(areq);
1095 struct chcr_ahash_req_ctx *state = (struct chcr_ahash_req_ctx *)in;
1096
1097 req_ctx->bfr_len = state->bfr_len;
1098 req_ctx->data_len = state->data_len;
1099 req_ctx->dummy_payload_ptr = NULL;
1100 memcpy(req_ctx->bfr, state->bfr, CHCR_HASH_MAX_BLOCK_SIZE_128);
1101 memcpy(req_ctx->partial_hash, state->partial_hash,
1102 CHCR_HASH_MAX_DIGEST_SIZE);
1103 return 0;
1104}
1105
1106static int chcr_ahash_setkey(struct crypto_ahash *tfm, const u8 *key,
1107 unsigned int keylen)
1108{
1109 struct chcr_context *ctx = crypto_tfm_ctx(crypto_ahash_tfm(tfm));
1110 struct hmac_ctx *hmacctx = HMAC_CTX(ctx);
1111 unsigned int digestsize = crypto_ahash_digestsize(tfm);
1112 unsigned int bs = crypto_tfm_alg_blocksize(crypto_ahash_tfm(tfm));
1113 unsigned int i, err = 0, updated_digestsize;
1114
1115 /*
1116 * use the key to calculate the ipad and opad. ipad will sent with the
1117 * first request's data. opad will be sent with the final hash result
1118 * ipad in hmacctx->ipad and opad in hmacctx->opad location
1119 */
1120 if (!hmacctx->desc)
1121 return -EINVAL;
1122 if (keylen > bs) {
1123 err = crypto_shash_digest(hmacctx->desc, key, keylen,
1124 hmacctx->ipad);
1125 if (err)
1126 goto out;
1127 keylen = digestsize;
1128 } else {
1129 memcpy(hmacctx->ipad, key, keylen);
1130 }
1131 memset(hmacctx->ipad + keylen, 0, bs - keylen);
1132 memcpy(hmacctx->opad, hmacctx->ipad, bs);
1133
1134 for (i = 0; i < bs / sizeof(int); i++) {
1135 *((unsigned int *)(&hmacctx->ipad) + i) ^= IPAD_DATA;
1136 *((unsigned int *)(&hmacctx->opad) + i) ^= OPAD_DATA;
1137 }
1138
1139 updated_digestsize = digestsize;
1140 if (digestsize == SHA224_DIGEST_SIZE)
1141 updated_digestsize = SHA256_DIGEST_SIZE;
1142 else if (digestsize == SHA384_DIGEST_SIZE)
1143 updated_digestsize = SHA512_DIGEST_SIZE;
1144 err = chcr_compute_partial_hash(hmacctx->desc, hmacctx->ipad,
1145 hmacctx->ipad, digestsize);
1146 if (err)
1147 goto out;
1148 chcr_change_order(hmacctx->ipad, updated_digestsize);
1149
1150 err = chcr_compute_partial_hash(hmacctx->desc, hmacctx->opad,
1151 hmacctx->opad, digestsize);
1152 if (err)
1153 goto out;
1154 chcr_change_order(hmacctx->opad, updated_digestsize);
1155out:
1156 return err;
1157}
1158
1159static int chcr_aes_xts_setkey(struct crypto_ablkcipher *tfm, const u8 *key,
1160 unsigned int key_len)
1161{
1162 struct chcr_context *ctx = crypto_ablkcipher_ctx(tfm);
1163 struct ablk_ctx *ablkctx = ABLK_CTX(ctx);
1164 int status = 0;
1165 unsigned short context_size = 0;
1166
1167 if ((key_len == (AES_KEYSIZE_128 << 1)) ||
1168 (key_len == (AES_KEYSIZE_256 << 1))) {
1169 memcpy(ablkctx->key, key, key_len);
1170 ablkctx->enckey_len = key_len;
1171 context_size = (KEY_CONTEXT_HDR_SALT_AND_PAD + key_len) >> 4;
1172 ablkctx->key_ctx_hdr =
1173 FILL_KEY_CTX_HDR((key_len == AES_KEYSIZE_256) ?
1174 CHCR_KEYCTX_CIPHER_KEY_SIZE_128 :
1175 CHCR_KEYCTX_CIPHER_KEY_SIZE_256,
1176 CHCR_KEYCTX_NO_KEY, 1,
1177 0, context_size);
1178 ablkctx->ciph_mode = CHCR_SCMD_CIPHER_MODE_AES_XTS;
1179 } else {
1180 crypto_tfm_set_flags((struct crypto_tfm *)tfm,
1181 CRYPTO_TFM_RES_BAD_KEY_LEN);
1182 ablkctx->enckey_len = 0;
1183 status = -EINVAL;
1184 }
1185 return status;
1186}
1187
1188static int chcr_sha_init(struct ahash_request *areq)
1189{
1190 struct chcr_ahash_req_ctx *req_ctx = ahash_request_ctx(areq);
1191 struct crypto_ahash *tfm = crypto_ahash_reqtfm(areq);
1192 int digestsize = crypto_ahash_digestsize(tfm);
1193
1194 req_ctx->data_len = 0;
1195 req_ctx->dummy_payload_ptr = NULL;
1196 req_ctx->bfr_len = 0;
1197 req_ctx->skb = NULL;
1198 req_ctx->result = 0;
1199 copy_hash_init_values(req_ctx->partial_hash, digestsize);
1200 return 0;
1201}
1202
1203static int chcr_sha_cra_init(struct crypto_tfm *tfm)
1204{
1205 crypto_ahash_set_reqsize(__crypto_ahash_cast(tfm),
1206 sizeof(struct chcr_ahash_req_ctx));
1207 return chcr_device_init(crypto_tfm_ctx(tfm));
1208}
1209
1210static int chcr_hmac_init(struct ahash_request *areq)
1211{
1212 struct chcr_ahash_req_ctx *req_ctx = ahash_request_ctx(areq);
1213 struct crypto_ahash *rtfm = crypto_ahash_reqtfm(areq);
1214 struct chcr_context *ctx = crypto_tfm_ctx(crypto_ahash_tfm(rtfm));
1215 struct hmac_ctx *hmacctx = HMAC_CTX(ctx);
1216 unsigned int digestsize = crypto_ahash_digestsize(rtfm);
1217 unsigned int bs = crypto_tfm_alg_blocksize(crypto_ahash_tfm(rtfm));
1218
1219 chcr_sha_init(areq);
1220 req_ctx->data_len = bs;
1221 if (is_hmac(crypto_ahash_tfm(rtfm))) {
1222 if (digestsize == SHA224_DIGEST_SIZE)
1223 memcpy(req_ctx->partial_hash, hmacctx->ipad,
1224 SHA256_DIGEST_SIZE);
1225 else if (digestsize == SHA384_DIGEST_SIZE)
1226 memcpy(req_ctx->partial_hash, hmacctx->ipad,
1227 SHA512_DIGEST_SIZE);
1228 else
1229 memcpy(req_ctx->partial_hash, hmacctx->ipad,
1230 digestsize);
1231 }
1232 return 0;
1233}
1234
1235static int chcr_hmac_cra_init(struct crypto_tfm *tfm)
1236{
1237 struct chcr_context *ctx = crypto_tfm_ctx(tfm);
1238 struct hmac_ctx *hmacctx = HMAC_CTX(ctx);
1239 unsigned int digestsize =
1240 crypto_ahash_digestsize(__crypto_ahash_cast(tfm));
1241
1242 crypto_ahash_set_reqsize(__crypto_ahash_cast(tfm),
1243 sizeof(struct chcr_ahash_req_ctx));
1244 hmacctx->desc = chcr_alloc_shash(digestsize);
1245 if (IS_ERR(hmacctx->desc))
1246 return PTR_ERR(hmacctx->desc);
1247 return chcr_device_init(crypto_tfm_ctx(tfm));
1248}
1249
1250static void chcr_free_shash(struct shash_desc *desc)
1251{
1252 crypto_free_shash(desc->tfm);
1253 kfree(desc);
1254}
1255
1256static void chcr_hmac_cra_exit(struct crypto_tfm *tfm)
1257{
1258 struct chcr_context *ctx = crypto_tfm_ctx(tfm);
1259 struct hmac_ctx *hmacctx = HMAC_CTX(ctx);
1260
1261 if (hmacctx->desc) {
1262 chcr_free_shash(hmacctx->desc);
1263 hmacctx->desc = NULL;
1264 }
1265}
1266
1267static struct chcr_alg_template driver_algs[] = {
1268 /* AES-CBC */
1269 {
1270 .type = CRYPTO_ALG_TYPE_ABLKCIPHER,
1271 .is_registered = 0,
1272 .alg.crypto = {
1273 .cra_name = "cbc(aes)",
1274 .cra_driver_name = "cbc(aes-chcr)",
1275 .cra_priority = CHCR_CRA_PRIORITY,
1276 .cra_flags = CRYPTO_ALG_TYPE_BLKCIPHER |
1277 CRYPTO_ALG_ASYNC,
1278 .cra_blocksize = AES_BLOCK_SIZE,
1279 .cra_ctxsize = sizeof(struct chcr_context)
1280 + sizeof(struct ablk_ctx),
1281 .cra_alignmask = 0,
1282 .cra_type = &crypto_ablkcipher_type,
1283 .cra_module = THIS_MODULE,
1284 .cra_init = chcr_cra_init,
1285 .cra_exit = NULL,
1286 .cra_u.ablkcipher = {
1287 .min_keysize = AES_MIN_KEY_SIZE,
1288 .max_keysize = AES_MAX_KEY_SIZE,
1289 .ivsize = AES_BLOCK_SIZE,
1290 .setkey = chcr_aes_cbc_setkey,
1291 .encrypt = chcr_aes_encrypt,
1292 .decrypt = chcr_aes_decrypt,
1293 }
1294 }
1295 },
1296 {
1297 .type = CRYPTO_ALG_TYPE_ABLKCIPHER,
1298 .is_registered = 0,
1299 .alg.crypto = {
1300 .cra_name = "xts(aes)",
1301 .cra_driver_name = "xts(aes-chcr)",
1302 .cra_priority = CHCR_CRA_PRIORITY,
1303 .cra_flags = CRYPTO_ALG_TYPE_BLKCIPHER |
1304 CRYPTO_ALG_ASYNC,
1305 .cra_blocksize = AES_BLOCK_SIZE,
1306 .cra_ctxsize = sizeof(struct chcr_context) +
1307 sizeof(struct ablk_ctx),
1308 .cra_alignmask = 0,
1309 .cra_type = &crypto_ablkcipher_type,
1310 .cra_module = THIS_MODULE,
1311 .cra_init = chcr_cra_init,
1312 .cra_exit = NULL,
1313 .cra_u = {
1314 .ablkcipher = {
1315 .min_keysize = 2 * AES_MIN_KEY_SIZE,
1316 .max_keysize = 2 * AES_MAX_KEY_SIZE,
1317 .ivsize = AES_BLOCK_SIZE,
1318 .setkey = chcr_aes_xts_setkey,
1319 .encrypt = chcr_aes_encrypt,
1320 .decrypt = chcr_aes_decrypt,
1321 }
1322 }
1323 }
1324 },
1325 /* SHA */
1326 {
1327 .type = CRYPTO_ALG_TYPE_AHASH,
1328 .is_registered = 0,
1329 .alg.hash = {
1330 .halg.digestsize = SHA1_DIGEST_SIZE,
1331 .halg.base = {
1332 .cra_name = "sha1",
1333 .cra_driver_name = "sha1-chcr",
1334 .cra_blocksize = SHA1_BLOCK_SIZE,
1335 }
1336 }
1337 },
1338 {
1339 .type = CRYPTO_ALG_TYPE_AHASH,
1340 .is_registered = 0,
1341 .alg.hash = {
1342 .halg.digestsize = SHA256_DIGEST_SIZE,
1343 .halg.base = {
1344 .cra_name = "sha256",
1345 .cra_driver_name = "sha256-chcr",
1346 .cra_blocksize = SHA256_BLOCK_SIZE,
1347 }
1348 }
1349 },
1350 {
1351 .type = CRYPTO_ALG_TYPE_AHASH,
1352 .is_registered = 0,
1353 .alg.hash = {
1354 .halg.digestsize = SHA224_DIGEST_SIZE,
1355 .halg.base = {
1356 .cra_name = "sha224",
1357 .cra_driver_name = "sha224-chcr",
1358 .cra_blocksize = SHA224_BLOCK_SIZE,
1359 }
1360 }
1361 },
1362 {
1363 .type = CRYPTO_ALG_TYPE_AHASH,
1364 .is_registered = 0,
1365 .alg.hash = {
1366 .halg.digestsize = SHA384_DIGEST_SIZE,
1367 .halg.base = {
1368 .cra_name = "sha384",
1369 .cra_driver_name = "sha384-chcr",
1370 .cra_blocksize = SHA384_BLOCK_SIZE,
1371 }
1372 }
1373 },
1374 {
1375 .type = CRYPTO_ALG_TYPE_AHASH,
1376 .is_registered = 0,
1377 .alg.hash = {
1378 .halg.digestsize = SHA512_DIGEST_SIZE,
1379 .halg.base = {
1380 .cra_name = "sha512",
1381 .cra_driver_name = "sha512-chcr",
1382 .cra_blocksize = SHA512_BLOCK_SIZE,
1383 }
1384 }
1385 },
1386 /* HMAC */
1387 {
1388 .type = CRYPTO_ALG_TYPE_HMAC,
1389 .is_registered = 0,
1390 .alg.hash = {
1391 .halg.digestsize = SHA1_DIGEST_SIZE,
1392 .halg.base = {
1393 .cra_name = "hmac(sha1)",
1394 .cra_driver_name = "hmac(sha1-chcr)",
1395 .cra_blocksize = SHA1_BLOCK_SIZE,
1396 }
1397 }
1398 },
1399 {
1400 .type = CRYPTO_ALG_TYPE_HMAC,
1401 .is_registered = 0,
1402 .alg.hash = {
1403 .halg.digestsize = SHA224_DIGEST_SIZE,
1404 .halg.base = {
1405 .cra_name = "hmac(sha224)",
1406 .cra_driver_name = "hmac(sha224-chcr)",
1407 .cra_blocksize = SHA224_BLOCK_SIZE,
1408 }
1409 }
1410 },
1411 {
1412 .type = CRYPTO_ALG_TYPE_HMAC,
1413 .is_registered = 0,
1414 .alg.hash = {
1415 .halg.digestsize = SHA256_DIGEST_SIZE,
1416 .halg.base = {
1417 .cra_name = "hmac(sha256)",
1418 .cra_driver_name = "hmac(sha256-chcr)",
1419 .cra_blocksize = SHA256_BLOCK_SIZE,
1420 }
1421 }
1422 },
1423 {
1424 .type = CRYPTO_ALG_TYPE_HMAC,
1425 .is_registered = 0,
1426 .alg.hash = {
1427 .halg.digestsize = SHA384_DIGEST_SIZE,
1428 .halg.base = {
1429 .cra_name = "hmac(sha384)",
1430 .cra_driver_name = "hmac(sha384-chcr)",
1431 .cra_blocksize = SHA384_BLOCK_SIZE,
1432 }
1433 }
1434 },
1435 {
1436 .type = CRYPTO_ALG_TYPE_HMAC,
1437 .is_registered = 0,
1438 .alg.hash = {
1439 .halg.digestsize = SHA512_DIGEST_SIZE,
1440 .halg.base = {
1441 .cra_name = "hmac(sha512)",
1442 .cra_driver_name = "hmac(sha512-chcr)",
1443 .cra_blocksize = SHA512_BLOCK_SIZE,
1444 }
1445 }
1446 },
1447};
1448
1449/*
1450 * chcr_unregister_alg - Deregister crypto algorithms with
1451 * kernel framework.
1452 */
1453static int chcr_unregister_alg(void)
1454{
1455 int i;
1456
1457 for (i = 0; i < ARRAY_SIZE(driver_algs); i++) {
1458 switch (driver_algs[i].type & CRYPTO_ALG_TYPE_MASK) {
1459 case CRYPTO_ALG_TYPE_ABLKCIPHER:
1460 if (driver_algs[i].is_registered)
1461 crypto_unregister_alg(
1462 &driver_algs[i].alg.crypto);
1463 break;
1464 case CRYPTO_ALG_TYPE_AHASH:
1465 if (driver_algs[i].is_registered)
1466 crypto_unregister_ahash(
1467 &driver_algs[i].alg.hash);
1468 break;
1469 }
1470 driver_algs[i].is_registered = 0;
1471 }
1472 return 0;
1473}
1474
1475#define SZ_AHASH_CTX sizeof(struct chcr_context)
1476#define SZ_AHASH_H_CTX (sizeof(struct chcr_context) + sizeof(struct hmac_ctx))
1477#define SZ_AHASH_REQ_CTX sizeof(struct chcr_ahash_req_ctx)
1478#define AHASH_CRA_FLAGS (CRYPTO_ALG_TYPE_AHASH | CRYPTO_ALG_ASYNC)
1479
1480/*
1481 * chcr_register_alg - Register crypto algorithms with kernel framework.
1482 */
1483static int chcr_register_alg(void)
1484{
1485 struct crypto_alg ai;
1486 struct ahash_alg *a_hash;
1487 int err = 0, i;
1488 char *name = NULL;
1489
1490 for (i = 0; i < ARRAY_SIZE(driver_algs); i++) {
1491 if (driver_algs[i].is_registered)
1492 continue;
1493 switch (driver_algs[i].type & CRYPTO_ALG_TYPE_MASK) {
1494 case CRYPTO_ALG_TYPE_ABLKCIPHER:
1495 err = crypto_register_alg(&driver_algs[i].alg.crypto);
1496 name = driver_algs[i].alg.crypto.cra_driver_name;
1497 break;
1498 case CRYPTO_ALG_TYPE_AHASH:
1499 a_hash = &driver_algs[i].alg.hash;
1500 a_hash->update = chcr_ahash_update;
1501 a_hash->final = chcr_ahash_final;
1502 a_hash->finup = chcr_ahash_finup;
1503 a_hash->digest = chcr_ahash_digest;
1504 a_hash->export = chcr_ahash_export;
1505 a_hash->import = chcr_ahash_import;
1506 a_hash->halg.statesize = SZ_AHASH_REQ_CTX;
1507 a_hash->halg.base.cra_priority = CHCR_CRA_PRIORITY;
1508 a_hash->halg.base.cra_module = THIS_MODULE;
1509 a_hash->halg.base.cra_flags = AHASH_CRA_FLAGS;
1510 a_hash->halg.base.cra_alignmask = 0;
1511 a_hash->halg.base.cra_exit = NULL;
1512 a_hash->halg.base.cra_type = &crypto_ahash_type;
1513
1514 if (driver_algs[i].type == CRYPTO_ALG_TYPE_HMAC) {
1515 a_hash->halg.base.cra_init = chcr_hmac_cra_init;
1516 a_hash->halg.base.cra_exit = chcr_hmac_cra_exit;
1517 a_hash->init = chcr_hmac_init;
1518 a_hash->setkey = chcr_ahash_setkey;
1519 a_hash->halg.base.cra_ctxsize = SZ_AHASH_H_CTX;
1520 } else {
1521 a_hash->init = chcr_sha_init;
1522 a_hash->halg.base.cra_ctxsize = SZ_AHASH_CTX;
1523 a_hash->halg.base.cra_init = chcr_sha_cra_init;
1524 }
1525 err = crypto_register_ahash(&driver_algs[i].alg.hash);
1526 ai = driver_algs[i].alg.hash.halg.base;
1527 name = ai.cra_driver_name;
1528 break;
1529 }
1530 if (err) {
1531 pr_err("chcr : %s : Algorithm registration failed\n",
1532 name);
1533 goto register_err;
1534 } else {
1535 driver_algs[i].is_registered = 1;
1536 }
1537 }
1538 return 0;
1539
1540register_err:
1541 chcr_unregister_alg();
1542 return err;
1543}
1544
1545/*
1546 * start_crypto - Register the crypto algorithms.
1547 * This should called once when the first device comesup. After this
1548 * kernel will start calling driver APIs for crypto operations.
1549 */
1550int start_crypto(void)
1551{
1552 return chcr_register_alg();
1553}
1554
1555/*
1556 * stop_crypto - Deregister all the crypto algorithms with kernel.
1557 * This should be called once when the last device goes down. After this
1558 * kernel will not call the driver API for crypto operations.
1559 */
1560int stop_crypto(void)
1561{
1562 chcr_unregister_alg();
1563 return 0;
1564}