blob: 3888b43e1b3194bf84a1927d95b8902b89821aa1 [file] [log] [blame]
Bryan Wu1394f032007-05-06 14:50:22 -07001/*
Robin Getz96f10502009-09-24 14:11:24 +00002 * Copyright 2004-2009 Analog Devices Inc.
3 * 2005 National ICT Australia (NICTA)
4 * Aidan Williams <aidan@nicta.com.au>
Bryan Wu1394f032007-05-06 14:50:22 -07005 *
Robin Getz96f10502009-09-24 14:11:24 +00006 * Licensed under the GPL-2 or later.
Bryan Wu1394f032007-05-06 14:50:22 -07007 */
8
9#include <linux/device.h>
Mike Frysingerfc689112008-06-25 11:41:42 +080010#include <linux/kernel.h>
Bryan Wu1394f032007-05-06 14:50:22 -070011#include <linux/platform_device.h>
Barry Song6e364752009-09-29 03:01:40 +000012#include <linux/io.h>
Bryan Wu1394f032007-05-06 14:50:22 -070013#include <linux/mtd/mtd.h>
Mike Frysingerfc689112008-06-25 11:41:42 +080014#include <linux/mtd/nand.h>
Bryan Wu1394f032007-05-06 14:50:22 -070015#include <linux/mtd/partitions.h>
Mike Frysingerfc689112008-06-25 11:41:42 +080016#include <linux/mtd/plat-ram.h>
Mike Frysingerde8c43f2008-01-24 17:14:04 +080017#include <linux/mtd/physmap.h>
Bryan Wu1394f032007-05-06 14:50:22 -070018#include <linux/spi/spi.h>
19#include <linux/spi/flash.h>
20#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
Mike Frysingerf02bcec2007-11-15 21:29:15 +080021#include <linux/usb/isp1362.h>
Bryan Wu1394f032007-05-06 14:50:22 -070022#endif
Sonic Zhang7a9cc482009-12-22 04:47:04 +000023#include <linux/i2c.h>
24#include <linux/i2c/adp5588.h>
Mike Frysinger0531c462010-01-19 07:04:29 +000025#include <linux/etherdevice.h>
Jeff Garzik0a87e3e2008-02-01 18:02:30 -050026#include <linux/ata_platform.h>
Bryan Wu1394f032007-05-06 14:50:22 -070027#include <linux/irq.h>
28#include <linux/interrupt.h>
David Brownell27f5d752007-10-04 18:06:16 -070029#include <linux/usb/sl811.h>
Yi Lif79ea4c2009-01-07 23:14:38 +080030#include <linux/spi/mmc_spi.h>
Michael Hennerich78756c62009-10-13 15:28:33 +000031#include <linux/leds.h>
32#include <linux/input.h>
Bryan Wuc6c4d7b2007-10-11 01:20:06 +080033#include <asm/dma.h>
Mike Frysinger1f83b8f2007-07-12 22:58:21 +080034#include <asm/bfin5xx_spi.h>
Bryan Wuc6c4d7b2007-10-11 01:20:06 +080035#include <asm/reboot.h>
Bryan Wu5d448dd2007-11-12 23:24:42 +080036#include <asm/portmux.h>
Michael Hennerich14b03202008-05-07 11:41:26 +080037#include <asm/dpmc.h>
Sonic Zhang1b04cbe2010-06-02 05:00:21 +000038#ifdef CONFIG_REGULATOR_FIXED_VOLTAGE
39#include <linux/regulator/fixed.h>
Sonic Zhangf8e6dbf2010-02-10 09:09:05 +000040#endif
Sonic Zhangf32792d2010-02-09 02:47:09 +000041#ifdef CONFIG_REGULATOR_AD5398
42#include <linux/regulator/ad5398.h>
43#endif
Sonic Zhang1b04cbe2010-06-02 05:00:21 +000044#include <linux/regulator/machine.h>
Sonic Zhangf32792d2010-02-09 02:47:09 +000045#include <linux/regulator/consumer.h>
46#include <linux/regulator/userspace-consumer.h>
Bryan Wu1394f032007-05-06 14:50:22 -070047
48/*
49 * Name the Board for the /proc/cpuinfo
50 */
Mike Frysingerfe85cad2008-11-18 17:48:22 +080051const char bfin_board_name[] = "ADI BF537-STAMP";
Bryan Wu1394f032007-05-06 14:50:22 -070052
53/*
54 * Driver needs to know address, irq and flag pin.
55 */
56
Bryan Wu1394f032007-05-06 14:50:22 -070057#if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
Michael Hennerich3f375692008-11-18 17:48:22 +080058#include <linux/usb/isp1760.h>
59static struct resource bfin_isp1760_resources[] = {
Bryan Wu1394f032007-05-06 14:50:22 -070060 [0] = {
Michael Hennerich3f375692008-11-18 17:48:22 +080061 .start = 0x203C0000,
62 .end = 0x203C0000 + 0x000fffff,
Bryan Wu1394f032007-05-06 14:50:22 -070063 .flags = IORESOURCE_MEM,
64 },
65 [1] = {
Michael Hennerich3f375692008-11-18 17:48:22 +080066 .start = IRQ_PF7,
67 .end = IRQ_PF7,
Michael Hennerich6a6be3d2009-01-07 23:14:39 +080068 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
Bryan Wu1394f032007-05-06 14:50:22 -070069 },
70};
71
Michael Hennerich3f375692008-11-18 17:48:22 +080072static struct isp1760_platform_data isp1760_priv = {
73 .is_isp1761 = 0,
Michael Hennerich3f375692008-11-18 17:48:22 +080074 .bus_width_16 = 1,
75 .port1_otg = 0,
76 .analog_oc = 0,
77 .dack_polarity_high = 0,
78 .dreq_polarity_high = 0,
79};
80
81static struct platform_device bfin_isp1760_device = {
Michael Hennerichc6feb762009-10-15 10:37:33 +000082 .name = "isp1760",
Bryan Wu1394f032007-05-06 14:50:22 -070083 .id = 0,
Michael Hennerich3f375692008-11-18 17:48:22 +080084 .dev = {
85 .platform_data = &isp1760_priv,
86 },
87 .num_resources = ARRAY_SIZE(bfin_isp1760_resources),
88 .resource = bfin_isp1760_resources,
Bryan Wu1394f032007-05-06 14:50:22 -070089};
Bryan Wu1394f032007-05-06 14:50:22 -070090#endif
91
Michael Hennerich2463ef22008-01-27 16:49:48 +080092#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
Michael Hennerich2463ef22008-01-27 16:49:48 +080093#include <linux/gpio_keys.h>
94
95static struct gpio_keys_button bfin_gpio_keys_table[] = {
96 {BTN_0, GPIO_PF2, 1, "gpio-keys: BTN0"},
97 {BTN_1, GPIO_PF3, 1, "gpio-keys: BTN1"},
98 {BTN_2, GPIO_PF4, 1, "gpio-keys: BTN2"},
99 {BTN_3, GPIO_PF5, 1, "gpio-keys: BTN3"},
100};
101
102static struct gpio_keys_platform_data bfin_gpio_keys_data = {
103 .buttons = bfin_gpio_keys_table,
104 .nbuttons = ARRAY_SIZE(bfin_gpio_keys_table),
105};
106
107static struct platform_device bfin_device_gpiokeys = {
108 .name = "gpio-keys",
109 .dev = {
110 .platform_data = &bfin_gpio_keys_data,
111 },
112};
113#endif
114
Bryan Wu1394f032007-05-06 14:50:22 -0700115#if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
116static struct resource bfin_pcmcia_cf_resources[] = {
117 {
118 .start = 0x20310000, /* IO PORT */
119 .end = 0x20312000,
120 .flags = IORESOURCE_MEM,
Mike Frysinger1f83b8f2007-07-12 22:58:21 +0800121 }, {
Simon Arlottd2d50aa2007-06-11 15:31:30 +0800122 .start = 0x20311000, /* Attribute Memory */
Bryan Wu1394f032007-05-06 14:50:22 -0700123 .end = 0x20311FFF,
124 .flags = IORESOURCE_MEM,
Mike Frysinger1f83b8f2007-07-12 22:58:21 +0800125 }, {
Bryan Wu1394f032007-05-06 14:50:22 -0700126 .start = IRQ_PF4,
127 .end = IRQ_PF4,
128 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
Mike Frysinger1f83b8f2007-07-12 22:58:21 +0800129 }, {
Bryan Wu1394f032007-05-06 14:50:22 -0700130 .start = 6, /* Card Detect PF6 */
131 .end = 6,
132 .flags = IORESOURCE_IRQ,
133 },
134};
135
136static struct platform_device bfin_pcmcia_cf_device = {
137 .name = "bfin_cf_pcmcia",
138 .id = -1,
139 .num_resources = ARRAY_SIZE(bfin_pcmcia_cf_resources),
140 .resource = bfin_pcmcia_cf_resources,
141};
142#endif
143
144#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
145static struct platform_device rtc_device = {
146 .name = "rtc-bfin",
147 .id = -1,
148};
149#endif
150
151#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
Michael Hennerich61f09b52009-07-24 08:48:31 +0000152#include <linux/smc91x.h>
153
154static struct smc91x_platdata smc91x_info = {
155 .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
156 .leda = RPC_LED_100_10,
157 .ledb = RPC_LED_TX_RX,
158};
159
Bryan Wu1394f032007-05-06 14:50:22 -0700160static struct resource smc91x_resources[] = {
161 {
162 .name = "smc91x-regs",
163 .start = 0x20300300,
164 .end = 0x20300300 + 16,
165 .flags = IORESOURCE_MEM,
Mike Frysinger1f83b8f2007-07-12 22:58:21 +0800166 }, {
Bryan Wu1394f032007-05-06 14:50:22 -0700167
168 .start = IRQ_PF7,
169 .end = IRQ_PF7,
170 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
171 },
172};
173static struct platform_device smc91x_device = {
174 .name = "smc91x",
175 .id = 0,
176 .num_resources = ARRAY_SIZE(smc91x_resources),
177 .resource = smc91x_resources,
Michael Hennerich61f09b52009-07-24 08:48:31 +0000178 .dev = {
179 .platform_data = &smc91x_info,
180 },
Bryan Wu1394f032007-05-06 14:50:22 -0700181};
182#endif
183
Alex Landauf40d24d2007-07-12 12:11:48 +0800184#if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
185static struct resource dm9000_resources[] = {
186 [0] = {
187 .start = 0x203FB800,
Barry Songb3dec4a2009-07-27 06:42:50 +0000188 .end = 0x203FB800 + 1,
Alex Landauf40d24d2007-07-12 12:11:48 +0800189 .flags = IORESOURCE_MEM,
190 },
191 [1] = {
Barry Songb3dec4a2009-07-27 06:42:50 +0000192 .start = 0x203FB804,
193 .end = 0x203FB804 + 1,
194 .flags = IORESOURCE_MEM,
195 },
196 [2] = {
Alex Landauf40d24d2007-07-12 12:11:48 +0800197 .start = IRQ_PF9,
198 .end = IRQ_PF9,
199 .flags = (IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE),
200 },
201};
202
203static struct platform_device dm9000_device = {
204 .name = "dm9000",
205 .id = -1,
206 .num_resources = ARRAY_SIZE(dm9000_resources),
207 .resource = dm9000_resources,
208};
209#endif
210
Bryan Wu1394f032007-05-06 14:50:22 -0700211#if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE)
212static struct resource sl811_hcd_resources[] = {
213 {
214 .start = 0x20340000,
215 .end = 0x20340000,
216 .flags = IORESOURCE_MEM,
Mike Frysinger1f83b8f2007-07-12 22:58:21 +0800217 }, {
Bryan Wu1394f032007-05-06 14:50:22 -0700218 .start = 0x20340004,
219 .end = 0x20340004,
220 .flags = IORESOURCE_MEM,
Mike Frysinger1f83b8f2007-07-12 22:58:21 +0800221 }, {
Mike Frysinger01218652009-12-21 15:07:43 +0000222 .start = IRQ_PF4,
223 .end = IRQ_PF4,
Bryan Wu1394f032007-05-06 14:50:22 -0700224 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
225 },
226};
227
228#if defined(CONFIG_USB_SL811_BFIN_USE_VBUS)
229void sl811_port_power(struct device *dev, int is_on)
230{
Bryan Wuc6c4d7b2007-10-11 01:20:06 +0800231 gpio_request(CONFIG_USB_SL811_BFIN_GPIO_VBUS, "usb:SL811_VBUS");
Michael Hennerichacbcd262008-01-22 18:36:20 +0800232 gpio_direction_output(CONFIG_USB_SL811_BFIN_GPIO_VBUS, is_on);
Bryan Wu1394f032007-05-06 14:50:22 -0700233}
234#endif
235
236static struct sl811_platform_data sl811_priv = {
237 .potpg = 10,
238 .power = 250, /* == 500mA */
239#if defined(CONFIG_USB_SL811_BFIN_USE_VBUS)
240 .port_power = &sl811_port_power,
241#endif
242};
243
244static struct platform_device sl811_hcd_device = {
245 .name = "sl811-hcd",
246 .id = 0,
247 .dev = {
248 .platform_data = &sl811_priv,
249 },
250 .num_resources = ARRAY_SIZE(sl811_hcd_resources),
251 .resource = sl811_hcd_resources,
252};
253#endif
254
255#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
256static struct resource isp1362_hcd_resources[] = {
257 {
258 .start = 0x20360000,
259 .end = 0x20360000,
260 .flags = IORESOURCE_MEM,
Mike Frysinger1f83b8f2007-07-12 22:58:21 +0800261 }, {
Bryan Wu1394f032007-05-06 14:50:22 -0700262 .start = 0x20360004,
263 .end = 0x20360004,
264 .flags = IORESOURCE_MEM,
Mike Frysinger1f83b8f2007-07-12 22:58:21 +0800265 }, {
Mike Frysinger21b03cf2009-09-24 05:44:36 +0000266 .start = IRQ_PF3,
267 .end = IRQ_PF3,
Michael Hennerich9e758942010-03-18 12:51:49 +0000268 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE,
Bryan Wu1394f032007-05-06 14:50:22 -0700269 },
270};
271
272static struct isp1362_platform_data isp1362_priv = {
273 .sel15Kres = 1,
274 .clknotstop = 0,
275 .oc_enable = 0,
276 .int_act_high = 0,
277 .int_edge_triggered = 0,
278 .remote_wakeup_connected = 0,
279 .no_power_switching = 1,
280 .power_switching_mode = 0,
281};
282
283static struct platform_device isp1362_hcd_device = {
284 .name = "isp1362-hcd",
285 .id = 0,
286 .dev = {
287 .platform_data = &isp1362_priv,
288 },
289 .num_resources = ARRAY_SIZE(isp1362_hcd_resources),
290 .resource = isp1362_hcd_resources,
291};
292#endif
293
Barry Song706a01b2009-11-02 07:29:07 +0000294#if defined(CONFIG_CAN_BFIN) || defined(CONFIG_CAN_BFIN_MODULE)
295unsigned short bfin_can_peripherals[] = {
296 P_CAN0_RX, P_CAN0_TX, 0
297};
298
299static struct resource bfin_can_resources[] = {
300 {
301 .start = 0xFFC02A00,
302 .end = 0xFFC02FFF,
303 .flags = IORESOURCE_MEM,
304 },
305 {
306 .start = IRQ_CAN_RX,
307 .end = IRQ_CAN_RX,
308 .flags = IORESOURCE_IRQ,
309 },
310 {
311 .start = IRQ_CAN_TX,
312 .end = IRQ_CAN_TX,
313 .flags = IORESOURCE_IRQ,
314 },
315 {
316 .start = IRQ_CAN_ERROR,
317 .end = IRQ_CAN_ERROR,
318 .flags = IORESOURCE_IRQ,
319 },
320};
321
322static struct platform_device bfin_can_device = {
323 .name = "bfin_can",
324 .num_resources = ARRAY_SIZE(bfin_can_resources),
325 .resource = bfin_can_resources,
326 .dev = {
327 .platform_data = &bfin_can_peripherals, /* Passed to driver */
328 },
329};
330#endif
331
Bryan Wu1394f032007-05-06 14:50:22 -0700332#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
Graf Yang65319622009-02-04 16:49:45 +0800333static struct platform_device bfin_mii_bus = {
334 .name = "bfin_mii_bus",
335};
336
Bryan Wu1394f032007-05-06 14:50:22 -0700337static struct platform_device bfin_mac_device = {
338 .name = "bfin_mac",
Graf Yang65319622009-02-04 16:49:45 +0800339 .dev.platform_data = &bfin_mii_bus,
Bryan Wu1394f032007-05-06 14:50:22 -0700340};
341#endif
342
343#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
344static struct resource net2272_bfin_resources[] = {
345 {
346 .start = 0x20300000,
347 .end = 0x20300000 + 0x100,
348 .flags = IORESOURCE_MEM,
Mike Frysinger1f83b8f2007-07-12 22:58:21 +0800349 }, {
Bryan Wu1394f032007-05-06 14:50:22 -0700350 .start = IRQ_PF7,
351 .end = IRQ_PF7,
352 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
353 },
354};
355
356static struct platform_device net2272_bfin_device = {
357 .name = "net2272",
358 .id = -1,
359 .num_resources = ARRAY_SIZE(net2272_bfin_resources),
360 .resource = net2272_bfin_resources,
361};
362#endif
363
Mike Frysingerfc689112008-06-25 11:41:42 +0800364#if defined(CONFIG_MTD_NAND_PLATFORM) || defined(CONFIG_MTD_NAND_PLATFORM_MODULE)
365#ifdef CONFIG_MTD_PARTITIONS
366const char *part_probes[] = { "cmdlinepart", "RedBoot", NULL };
367
368static struct mtd_partition bfin_plat_nand_partitions[] = {
369 {
Robin Getzaa582972008-08-05 17:47:29 +0800370 .name = "linux kernel(nand)",
Mike Frysingerfc689112008-06-25 11:41:42 +0800371 .size = 0x400000,
372 .offset = 0,
373 }, {
Robin Getzaa582972008-08-05 17:47:29 +0800374 .name = "file system(nand)",
Mike Frysingerfc689112008-06-25 11:41:42 +0800375 .size = MTDPART_SIZ_FULL,
376 .offset = MTDPART_OFS_APPEND,
377 },
378};
379#endif
380
381#define BFIN_NAND_PLAT_CLE 2
382#define BFIN_NAND_PLAT_ALE 1
383static void bfin_plat_nand_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl)
384{
385 struct nand_chip *this = mtd->priv;
386
387 if (cmd == NAND_CMD_NONE)
388 return;
389
390 if (ctrl & NAND_CLE)
391 writeb(cmd, this->IO_ADDR_W + (1 << BFIN_NAND_PLAT_CLE));
392 else
393 writeb(cmd, this->IO_ADDR_W + (1 << BFIN_NAND_PLAT_ALE));
394}
395
396#define BFIN_NAND_PLAT_READY GPIO_PF3
397static int bfin_plat_nand_dev_ready(struct mtd_info *mtd)
398{
399 return gpio_get_value(BFIN_NAND_PLAT_READY);
400}
401
402static struct platform_nand_data bfin_plat_nand_data = {
403 .chip = {
Marek Vasutef566092010-08-12 03:53:54 +0100404 .nr_chips = 1,
Mike Frysingerfc689112008-06-25 11:41:42 +0800405 .chip_delay = 30,
406#ifdef CONFIG_MTD_PARTITIONS
407 .part_probe_types = part_probes,
408 .partitions = bfin_plat_nand_partitions,
409 .nr_partitions = ARRAY_SIZE(bfin_plat_nand_partitions),
410#endif
411 },
412 .ctrl = {
413 .cmd_ctrl = bfin_plat_nand_cmd_ctrl,
414 .dev_ready = bfin_plat_nand_dev_ready,
415 },
416};
417
418#define MAX(x, y) (x > y ? x : y)
419static struct resource bfin_plat_nand_resources = {
420 .start = 0x20212000,
421 .end = 0x20212000 + (1 << MAX(BFIN_NAND_PLAT_CLE, BFIN_NAND_PLAT_ALE)),
Mike Frysinger67d99632010-03-16 14:28:44 +0000422 .flags = IORESOURCE_MEM,
Mike Frysingerfc689112008-06-25 11:41:42 +0800423};
424
425static struct platform_device bfin_async_nand_device = {
426 .name = "gen_nand",
427 .id = -1,
428 .num_resources = 1,
429 .resource = &bfin_plat_nand_resources,
430 .dev = {
431 .platform_data = &bfin_plat_nand_data,
432 },
433};
434
435static void bfin_plat_nand_init(void)
436{
437 gpio_request(BFIN_NAND_PLAT_READY, "bfin_nand_plat");
438}
439#else
440static void bfin_plat_nand_init(void) {}
441#endif
442
Mike Frysinger793dc272008-03-26 08:09:12 +0800443#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
Mike Frysingerde8c43f2008-01-24 17:14:04 +0800444static struct mtd_partition stamp_partitions[] = {
445 {
Robin Getzaa582972008-08-05 17:47:29 +0800446 .name = "bootloader(nor)",
Mike Frysingeredf05642008-02-25 11:38:11 +0800447 .size = 0x40000,
Mike Frysingerde8c43f2008-01-24 17:14:04 +0800448 .offset = 0,
449 }, {
Robin Getzaa582972008-08-05 17:47:29 +0800450 .name = "linux kernel(nor)",
Grace Pan6ecb5b62009-01-07 23:14:38 +0800451 .size = 0x180000,
Mike Frysingerde8c43f2008-01-24 17:14:04 +0800452 .offset = MTDPART_OFS_APPEND,
453 }, {
Robin Getzaa582972008-08-05 17:47:29 +0800454 .name = "file system(nor)",
Grace Pan6ecb5b62009-01-07 23:14:38 +0800455 .size = 0x400000 - 0x40000 - 0x180000 - 0x10000,
Mike Frysingerde8c43f2008-01-24 17:14:04 +0800456 .offset = MTDPART_OFS_APPEND,
457 }, {
Robin Getzaa582972008-08-05 17:47:29 +0800458 .name = "MAC Address(nor)",
Mike Frysingerde8c43f2008-01-24 17:14:04 +0800459 .size = MTDPART_SIZ_FULL,
460 .offset = 0x3F0000,
461 .mask_flags = MTD_WRITEABLE,
462 }
463};
464
465static struct physmap_flash_data stamp_flash_data = {
466 .width = 2,
467 .parts = stamp_partitions,
468 .nr_parts = ARRAY_SIZE(stamp_partitions),
Barry Song38e76732010-01-15 03:24:39 +0000469#ifdef CONFIG_ROMKERNEL
470 .probe_type = "map_rom",
471#endif
Mike Frysingerde8c43f2008-01-24 17:14:04 +0800472};
473
474static struct resource stamp_flash_resource = {
475 .start = 0x20000000,
476 .end = 0x203fffff,
477 .flags = IORESOURCE_MEM,
478};
479
480static struct platform_device stamp_flash_device = {
481 .name = "physmap-flash",
482 .id = 0,
483 .dev = {
484 .platform_data = &stamp_flash_data,
485 },
486 .num_resources = 1,
487 .resource = &stamp_flash_resource,
488};
Mike Frysinger793dc272008-03-26 08:09:12 +0800489#endif
Mike Frysingerde8c43f2008-01-24 17:14:04 +0800490
Bryan Wu1394f032007-05-06 14:50:22 -0700491#if defined(CONFIG_MTD_M25P80) \
492 || defined(CONFIG_MTD_M25P80_MODULE)
493static struct mtd_partition bfin_spi_flash_partitions[] = {
494 {
Robin Getzaa582972008-08-05 17:47:29 +0800495 .name = "bootloader(spi)",
Mike Frysingeredf05642008-02-25 11:38:11 +0800496 .size = 0x00040000,
Bryan Wu1394f032007-05-06 14:50:22 -0700497 .offset = 0,
498 .mask_flags = MTD_CAP_ROM
Mike Frysinger1f83b8f2007-07-12 22:58:21 +0800499 }, {
Robin Getzaa582972008-08-05 17:47:29 +0800500 .name = "linux kernel(spi)",
Grace Pan6ecb5b62009-01-07 23:14:38 +0800501 .size = 0x180000,
Mike Frysingeredf05642008-02-25 11:38:11 +0800502 .offset = MTDPART_OFS_APPEND,
Mike Frysinger1f83b8f2007-07-12 22:58:21 +0800503 }, {
Robin Getzaa582972008-08-05 17:47:29 +0800504 .name = "file system(spi)",
Mike Frysingeredf05642008-02-25 11:38:11 +0800505 .size = MTDPART_SIZ_FULL,
506 .offset = MTDPART_OFS_APPEND,
Bryan Wu1394f032007-05-06 14:50:22 -0700507 }
508};
509
510static struct flash_platform_data bfin_spi_flash_data = {
511 .name = "m25p80",
512 .parts = bfin_spi_flash_partitions,
513 .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
Michael Hennerich88a80782008-11-18 17:48:22 +0800514 /* .type = "m25p64", */
Bryan Wu1394f032007-05-06 14:50:22 -0700515};
516
517/* SPI flash chip (m25p64) */
518static struct bfin5xx_spi_chip spi_flash_chip_info = {
519 .enable_dma = 0, /* use dma transfer with this chip*/
520 .bits_per_word = 8,
521};
522#endif
523
Mike Frysingera261eec2009-05-20 14:05:36 +0000524#if defined(CONFIG_BFIN_SPI_ADC) \
525 || defined(CONFIG_BFIN_SPI_ADC_MODULE)
Bryan Wu1394f032007-05-06 14:50:22 -0700526/* SPI ADC chip */
527static struct bfin5xx_spi_chip spi_adc_chip_info = {
528 .enable_dma = 1, /* use dma transfer with this chip*/
529 .bits_per_word = 16,
530};
531#endif
532
Barry Songd40bd712010-02-22 10:31:06 +0000533#if defined(CONFIG_SND_BF5XX_SOC_AD183X) \
534 || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE)
Bryan Wu1394f032007-05-06 14:50:22 -0700535static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
536 .enable_dma = 0,
537 .bits_per_word = 16,
538};
539#endif
540
Barry Song3b827902010-01-27 09:01:36 +0000541#if defined(CONFIG_SND_BF5XX_SOC_AD193X) \
542 || defined(CONFIG_SND_BF5XX_SOC_AD193X_MODULE)
Barry Songd4b834c2009-06-04 10:14:17 +0000543static struct bfin5xx_spi_chip ad1938_spi_chip_info = {
544 .enable_dma = 0,
545 .bits_per_word = 8,
Barry Songd4b834c2009-06-04 10:14:17 +0000546};
547#endif
548
Yi Lia65912c2010-04-06 05:53:16 +0000549#if defined(CONFIG_SND_BF5XX_SOC_ADAV80X) \
550 || defined(CONFIG_SND_BF5XX_SOC_ADAV80X_MODULE)
551static struct bfin5xx_spi_chip adav801_spi_chip_info = {
552 .enable_dma = 0,
553 .bits_per_word = 8,
554};
555#endif
556
Mike Frysinger5b7c5772009-10-12 15:56:58 +0000557#if defined(CONFIG_INPUT_AD714X_SPI) || defined(CONFIG_INPUT_AD714X_SPI_MODULE)
Barry Song427f2772009-07-17 07:04:55 +0000558#include <linux/input/ad714x.h>
559static struct bfin5xx_spi_chip ad7147_spi_chip_info = {
560 .enable_dma = 0,
561 .bits_per_word = 16,
562};
563
Mike Frysinger5b7c5772009-10-12 15:56:58 +0000564static struct ad714x_slider_plat ad7147_spi_slider_plat[] = {
Barry Song427f2772009-07-17 07:04:55 +0000565 {
566 .start_stage = 0,
567 .end_stage = 7,
568 .max_coord = 128,
569 },
570};
571
Mike Frysinger5b7c5772009-10-12 15:56:58 +0000572static struct ad714x_button_plat ad7147_spi_button_plat[] = {
Barry Song427f2772009-07-17 07:04:55 +0000573 {
574 .keycode = BTN_FORWARD,
575 .l_mask = 0,
576 .h_mask = 0x600,
577 },
578 {
579 .keycode = BTN_LEFT,
580 .l_mask = 0,
581 .h_mask = 0x500,
582 },
583 {
584 .keycode = BTN_MIDDLE,
585 .l_mask = 0,
586 .h_mask = 0x800,
587 },
588 {
589 .keycode = BTN_RIGHT,
590 .l_mask = 0x100,
591 .h_mask = 0x400,
592 },
593 {
594 .keycode = BTN_BACK,
595 .l_mask = 0x200,
596 .h_mask = 0x400,
597 },
598};
Mike Frysinger5b7c5772009-10-12 15:56:58 +0000599static struct ad714x_platform_data ad7147_spi_platform_data = {
Barry Song427f2772009-07-17 07:04:55 +0000600 .slider_num = 1,
601 .button_num = 5,
Mike Frysinger5b7c5772009-10-12 15:56:58 +0000602 .slider = ad7147_spi_slider_plat,
603 .button = ad7147_spi_button_plat,
Barry Song427f2772009-07-17 07:04:55 +0000604 .stage_cfg_reg = {
605 {0xFBFF, 0x1FFF, 0, 0x2626, 1600, 1600, 1600, 1600},
606 {0xEFFF, 0x1FFF, 0, 0x2626, 1650, 1650, 1650, 1650},
607 {0xFFFF, 0x1FFE, 0, 0x2626, 1650, 1650, 1650, 1650},
608 {0xFFFF, 0x1FFB, 0, 0x2626, 1650, 1650, 1650, 1650},
609 {0xFFFF, 0x1FEF, 0, 0x2626, 1650, 1650, 1650, 1650},
610 {0xFFFF, 0x1FBF, 0, 0x2626, 1650, 1650, 1650, 1650},
611 {0xFFFF, 0x1EFF, 0, 0x2626, 1650, 1650, 1650, 1650},
612 {0xFFFF, 0x1BFF, 0, 0x2626, 1600, 1600, 1600, 1600},
613 {0xFF7B, 0x3FFF, 0x506, 0x2626, 1100, 1100, 1150, 1150},
614 {0xFDFE, 0x3FFF, 0x606, 0x2626, 1100, 1100, 1150, 1150},
615 {0xFEBA, 0x1FFF, 0x1400, 0x2626, 1200, 1200, 1300, 1300},
616 {0xFFEF, 0x1FFF, 0x0, 0x2626, 1100, 1100, 1150, 1150},
617 },
618 .sys_cfg_reg = {0x2B2, 0x0, 0x3233, 0x819, 0x832, 0xCFF, 0xCFF, 0x0},
619};
620#endif
621
Mike Frysinger5b7c5772009-10-12 15:56:58 +0000622#if defined(CONFIG_INPUT_AD714X_I2C) || defined(CONFIG_INPUT_AD714X_I2C_MODULE)
Barry Song427f2772009-07-17 07:04:55 +0000623#include <linux/input/ad714x.h>
Mike Frysinger5b7c5772009-10-12 15:56:58 +0000624static struct ad714x_button_plat ad7142_i2c_button_plat[] = {
Barry Song427f2772009-07-17 07:04:55 +0000625 {
626 .keycode = BTN_1,
627 .l_mask = 0,
628 .h_mask = 0x1,
629 },
630 {
631 .keycode = BTN_2,
632 .l_mask = 0,
633 .h_mask = 0x2,
634 },
635 {
636 .keycode = BTN_3,
637 .l_mask = 0,
638 .h_mask = 0x4,
639 },
640 {
641 .keycode = BTN_4,
642 .l_mask = 0x0,
643 .h_mask = 0x8,
644 },
645};
Mike Frysinger5b7c5772009-10-12 15:56:58 +0000646static struct ad714x_platform_data ad7142_i2c_platform_data = {
Barry Song427f2772009-07-17 07:04:55 +0000647 .button_num = 4,
Mike Frysinger5b7c5772009-10-12 15:56:58 +0000648 .button = ad7142_i2c_button_plat,
Barry Song427f2772009-07-17 07:04:55 +0000649 .stage_cfg_reg = {
650 /* fixme: figure out right setting for all comoponent according
651 * to hardware feature of EVAL-AD7142EB board */
652 {0xE7FF, 0x3FFF, 0x0005, 0x2626, 0x01F4, 0x01F4, 0x028A, 0x028A},
653 {0xFDBF, 0x3FFF, 0x0001, 0x2626, 0x01F4, 0x01F4, 0x028A, 0x028A},
654 {0xFFFF, 0x2DFF, 0x0001, 0x2626, 0x01F4, 0x01F4, 0x028A, 0x028A},
655 {0xFFFF, 0x37BF, 0x0001, 0x2626, 0x01F4, 0x01F4, 0x028A, 0x028A},
656 {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
657 {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
658 {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
659 {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
660 {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
661 {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
662 {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
663 {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
664 },
665 .sys_cfg_reg = {0x0B2, 0x0, 0x690, 0x664, 0x290F, 0xF, 0xF, 0x0},
666};
667#endif
668
Graf Yangf5f95312010-02-10 07:15:59 +0000669#if defined(CONFIG_AD2S90) || defined(CONFIG_AD2S90_MODULE)
670static struct bfin5xx_spi_chip ad2s90_spi_chip_info = {
671 .enable_dma = 0,
672 .bits_per_word = 16,
673};
674#endif
675
Graf Yangdf6a9492010-02-21 10:23:07 +0000676#if defined(CONFIG_AD2S120X) || defined(CONFIG_AD2S120X_MODULE)
677unsigned short ad2s120x_platform_data[] = {
678 /* used as SAMPLE and RDVEL */
679 GPIO_PF5, GPIO_PF6, 0
680};
681
682static struct bfin5xx_spi_chip ad2s120x_spi_chip_info = {
683 .enable_dma = 0,
684 .bits_per_word = 16,
685};
686#endif
687
Graf Yang848c51c2010-02-26 11:49:52 +0000688#if defined(CONFIG_AD2S1210) || defined(CONFIG_AD2S1210_MODULE)
689unsigned short ad2s1210_platform_data[] = {
690 /* use as SAMPLE, A0, A1 */
691 GPIO_PF7, GPIO_PF8, GPIO_PF9,
692# if defined(CONFIG_AD2S1210_GPIO_INPUT) || defined(CONFIG_AD2S1210_GPIO_OUTPUT)
693 /* the RES0 and RES1 pins */
694 GPIO_PF4, GPIO_PF5,
695# endif
696 0,
697};
698
699static struct bfin5xx_spi_chip ad2s1210_spi_chip_info = {
700 .enable_dma = 0,
701 .bits_per_word = 8,
702};
703#endif
704
Michael Hennerich0891bae2010-03-08 11:58:53 +0000705#if defined(CONFIG_AD7314) || defined(CONFIG_AD7314_MODULE)
706static struct bfin5xx_spi_chip ad7314_spi_chip_info = {
707 .enable_dma = 0,
708 .bits_per_word = 16,
709};
710#endif
711
712#if defined(CONFIG_AD7816) || defined(CONFIG_AD7816_MODULE)
713static unsigned short ad7816_platform_data[] = {
714 GPIO_PF4, /* rdwr_pin */
715 GPIO_PF5, /* convert_pin */
716 GPIO_PF7, /* busy_pin */
717 0,
718};
719
720static struct bfin5xx_spi_chip ad7816_spi_chip_info = {
721 .enable_dma = 0,
722 .bits_per_word = 8,
723};
724#endif
725
726#if defined(CONFIG_ADT7310) || defined(CONFIG_ADT7310_MODULE)
727static unsigned long adt7310_platform_data[3] = {
728/* INT bound temperature alarm event. line 1 */
729 IRQ_PG4, IRQF_TRIGGER_LOW,
730/* CT bound temperature alarm event irq_flags. line 0 */
731 IRQF_TRIGGER_LOW,
732};
733
734static struct bfin5xx_spi_chip adt7310_spi_chip_info = {
735 .enable_dma = 0,
736 .bits_per_word = 8,
737};
738#endif
739
740#if defined(CONFIG_AD7298) || defined(CONFIG_AD7298_MODULE)
741static unsigned short ad7298_platform_data[] = {
742 GPIO_PF7, /* busy_pin */
743 0,
744};
745
746static struct bfin5xx_spi_chip ad7298_spi_chip_info = {
747 .enable_dma = 0,
748 .bits_per_word = 16,
749};
750#endif
751
752#if defined(CONFIG_ADT7316_SPI) || defined(CONFIG_ADT7316_SPI_MODULE)
753static unsigned long adt7316_spi_data[2] = {
754 IRQF_TRIGGER_LOW, /* interrupt flags */
755 GPIO_PF7, /* ldac_pin, 0 means DAC/LDAC registers control DAC update */
756};
757
758static struct bfin5xx_spi_chip adt7316_spi_chip_info = {
759 .enable_dma = 0,
760 .bits_per_word = 8,
761};
762#endif
763
Yi Lif79ea4c2009-01-07 23:14:38 +0800764#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
765#define MMC_SPI_CARD_DETECT_INT IRQ_PF5
766
767static int bfin_mmc_spi_init(struct device *dev,
768 irqreturn_t (*detect_int)(int, void *), void *data)
769{
770 return request_irq(MMC_SPI_CARD_DETECT_INT, detect_int,
771 IRQF_TRIGGER_FALLING, "mmc-spi-detect", data);
772}
773
774static void bfin_mmc_spi_exit(struct device *dev, void *data)
775{
776 free_irq(MMC_SPI_CARD_DETECT_INT, data);
777}
778
779static struct mmc_spi_platform_data bfin_mmc_spi_pdata = {
780 .init = bfin_mmc_spi_init,
781 .exit = bfin_mmc_spi_exit,
782 .detect_delay = 100, /* msecs */
783};
784
785static struct bfin5xx_spi_chip mmc_spi_chip_info = {
786 .enable_dma = 0,
787 .bits_per_word = 8,
Yi Lie68d1eb2009-06-03 09:46:22 +0000788 .pio_interrupt = 0,
Yi Lif79ea4c2009-01-07 23:14:38 +0800789};
790#endif
791
Bryan Wu1394f032007-05-06 14:50:22 -0700792#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
Michael Hennerich46aa04f2008-10-13 11:30:17 +0800793#include <linux/spi/ad7877.h>
Bryan Wu1394f032007-05-06 14:50:22 -0700794static struct bfin5xx_spi_chip spi_ad7877_chip_info = {
Bryan Wu1394f032007-05-06 14:50:22 -0700795 .enable_dma = 0,
796 .bits_per_word = 16,
797};
798
799static const struct ad7877_platform_data bfin_ad7877_ts_info = {
800 .model = 7877,
801 .vref_delay_usecs = 50, /* internal, no capacitor */
802 .x_plate_ohms = 419,
803 .y_plate_ohms = 486,
804 .pressure_max = 1000,
805 .pressure_min = 0,
Michael Hennerich6ba255f2009-12-08 11:34:07 +0000806 .stopacq_polarity = 1,
807 .first_conversion_delay = 3,
808 .acquisition_time = 1,
809 .averaging = 1,
810 .pen_down_acc_interval = 1,
Bryan Wu1394f032007-05-06 14:50:22 -0700811};
812#endif
813
Michael Hennerich46aa04f2008-10-13 11:30:17 +0800814#if defined(CONFIG_TOUCHSCREEN_AD7879) || defined(CONFIG_TOUCHSCREEN_AD7879_MODULE)
815#include <linux/spi/ad7879.h>
Michael Hennerich46aa04f2008-10-13 11:30:17 +0800816static const struct ad7879_platform_data bfin_ad7879_ts_info = {
817 .model = 7879, /* Model = AD7879 */
818 .x_plate_ohms = 620, /* 620 Ohm from the touch datasheet */
819 .pressure_max = 10000,
820 .pressure_min = 0,
Michael Hennerich6ba255f2009-12-08 11:34:07 +0000821 .first_conversion_delay = 3, /* wait 512us before do a first conversion */
822 .acquisition_time = 1, /* 4us acquisition time per sample */
Michael Hennerich46aa04f2008-10-13 11:30:17 +0800823 .median = 2, /* do 8 measurements */
Michael Hennerich6ba255f2009-12-08 11:34:07 +0000824 .averaging = 1, /* take the average of 4 middle samples */
825 .pen_down_acc_interval = 255, /* 9.4 ms */
Michael Hennerich244d3422009-12-18 09:29:39 +0000826 .gpio_export = 1, /* Export GPIO to gpiolib */
827 .gpio_base = -1, /* Dynamic allocation */
Michael Hennerich46aa04f2008-10-13 11:30:17 +0800828};
829#endif
830
Michael Hennerichffc4d8b2009-05-29 15:41:18 +0000831#if defined(CONFIG_INPUT_ADXL34X) || defined(CONFIG_INPUT_ADXL34X_MODULE)
Michael Hennerich57af8ed2009-10-16 12:35:20 +0000832#include <linux/input/adxl34x.h>
Michael Hennerichffc4d8b2009-05-29 15:41:18 +0000833static const struct adxl34x_platform_data adxl34x_info = {
834 .x_axis_offset = 0,
835 .y_axis_offset = 0,
836 .z_axis_offset = 0,
837 .tap_threshold = 0x31,
838 .tap_duration = 0x10,
839 .tap_latency = 0x60,
840 .tap_window = 0xF0,
841 .tap_axis_control = ADXL_TAP_X_EN | ADXL_TAP_Y_EN | ADXL_TAP_Z_EN,
842 .act_axis_control = 0xFF,
843 .activity_threshold = 5,
844 .inactivity_threshold = 3,
845 .inactivity_time = 4,
846 .free_fall_threshold = 0x7,
847 .free_fall_time = 0x20,
848 .data_rate = 0x8,
849 .data_range = ADXL_FULL_RES,
850
851 .ev_type = EV_ABS,
852 .ev_code_x = ABS_X, /* EV_REL */
853 .ev_code_y = ABS_Y, /* EV_REL */
854 .ev_code_z = ABS_Z, /* EV_REL */
855
Michael Hennerich57af8ed2009-10-16 12:35:20 +0000856 .ev_code_tap = {BTN_TOUCH, BTN_TOUCH, BTN_TOUCH}, /* EV_KEY x,y,z */
Michael Hennerichffc4d8b2009-05-29 15:41:18 +0000857
858/* .ev_code_ff = KEY_F,*/ /* EV_KEY */
859/* .ev_code_act_inactivity = KEY_A,*/ /* EV_KEY */
860 .power_mode = ADXL_AUTO_SLEEP | ADXL_LINK,
861 .fifo_mode = ADXL_FIFO_STREAM,
Michael Hennerich6ba255f2009-12-08 11:34:07 +0000862 .orientation_enable = ADXL_EN_ORIENTATION_3D,
863 .deadzone_angle = ADXL_DEADZONE_ANGLE_10p8,
864 .divisor_length = ADXL_LP_FILTER_DIVISOR_16,
865 /* EV_KEY {+Z, +Y, +X, -X, -Y, -Z} */
866 .ev_codes_orient_3d = {BTN_Z, BTN_Y, BTN_X, BTN_A, BTN_B, BTN_C},
Michael Hennerichffc4d8b2009-05-29 15:41:18 +0000867};
868#endif
869
Michael Hennerichf5150152008-10-16 23:23:18 +0800870#if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)
871static struct bfin5xx_spi_chip spi_ad7879_chip_info = {
872 .enable_dma = 0,
873 .bits_per_word = 16,
874};
875#endif
876
Michael Hennerich6e668932008-02-09 01:54:09 +0800877#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
878static struct bfin5xx_spi_chip spidev_chip_info = {
879 .enable_dma = 0,
880 .bits_per_word = 8,
881};
882#endif
883
Michael Hennerich2043f3f2008-10-13 14:46:30 +0800884#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
885static struct bfin5xx_spi_chip lq035q1_spi_chip_info = {
886 .enable_dma = 0,
887 .bits_per_word = 8,
888};
889#endif
890
Michael Hennerich85a192e2009-01-07 23:14:38 +0800891#if defined(CONFIG_ENC28J60) || defined(CONFIG_ENC28J60_MODULE)
892static struct bfin5xx_spi_chip enc28j60_spi_chip_info = {
893 .enable_dma = 1,
894 .bits_per_word = 8,
Michael Hennerich85a192e2009-01-07 23:14:38 +0800895};
896#endif
897
Michael Hennerichefaf7cd2009-11-12 16:54:08 +0000898#if defined(CONFIG_ADF702X) || defined(CONFIG_ADF702X_MODULE)
899static struct bfin5xx_spi_chip adf7021_spi_chip_info = {
900 .bits_per_word = 16,
Michael Hennerichefaf7cd2009-11-12 16:54:08 +0000901};
902
903#include <linux/spi/adf702x.h>
904#define TXREG 0x0160A470
905static const u32 adf7021_regs[] = {
906 0x09608FA0,
907 0x00575011,
908 0x00A7F092,
909 0x2B141563,
910 0x81F29E94,
911 0x00003155,
912 0x050A4F66,
913 0x00000007,
914 0x00000008,
915 0x000231E9,
916 0x3296354A,
917 0x891A2B3B,
918 0x00000D9C,
919 0x0000000D,
920 0x0000000E,
921 0x0000000F,
922};
923
924static struct adf702x_platform_data adf7021_platform_data = {
925 .regs_base = (void *)SPORT1_TCR1,
926 .dma_ch_rx = CH_SPORT1_RX,
927 .dma_ch_tx = CH_SPORT1_TX,
928 .irq_sport_err = IRQ_SPORT1_ERROR,
929 .gpio_int_rfs = GPIO_PF8,
930 .pin_req = {P_SPORT1_DTPRI, P_SPORT1_RFS, P_SPORT1_DRPRI,
931 P_SPORT1_RSCLK, P_SPORT1_TSCLK, 0},
932 .adf702x_model = MODEL_ADF7021,
933 .adf702x_regs = adf7021_regs,
934 .tx_reg = TXREG,
935};
Mike Frysinger0531c462010-01-19 07:04:29 +0000936static inline void adf702x_mac_init(void)
937{
938 random_ether_addr(adf7021_platform_data.mac_addr);
939}
940#else
941static inline void adf702x_mac_init(void) {}
Michael Hennerichefaf7cd2009-11-12 16:54:08 +0000942#endif
943
Michael Hennerichfe5b25c2010-02-04 14:41:39 +0000944#if defined(CONFIG_TOUCHSCREEN_ADS7846) || defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE)
945#include <linux/spi/ads7846.h>
946static struct bfin5xx_spi_chip ad7873_spi_chip_info = {
947 .bits_per_word = 8,
948};
949
950static int ads7873_get_pendown_state(void)
951{
952 return gpio_get_value(GPIO_PF6);
953}
954
955static struct ads7846_platform_data __initdata ad7873_pdata = {
956 .model = 7873, /* AD7873 */
957 .x_max = 0xfff,
958 .y_max = 0xfff,
959 .x_plate_ohms = 620,
960 .debounce_max = 1,
961 .debounce_rep = 0,
962 .debounce_tol = (~0),
963 .get_pendown_state = ads7873_get_pendown_state,
964};
965#endif
966
Michael Hennerich8e9d5c72008-04-24 08:46:19 +0800967#if defined(CONFIG_MTD_DATAFLASH) \
968 || defined(CONFIG_MTD_DATAFLASH_MODULE)
Michael Hennerichceac2652008-08-25 17:39:11 +0800969
970static struct mtd_partition bfin_spi_dataflash_partitions[] = {
971 {
972 .name = "bootloader(spi)",
973 .size = 0x00040000,
974 .offset = 0,
975 .mask_flags = MTD_CAP_ROM
976 }, {
977 .name = "linux kernel(spi)",
Grace Pan6ecb5b62009-01-07 23:14:38 +0800978 .size = 0x180000,
Michael Hennerichceac2652008-08-25 17:39:11 +0800979 .offset = MTDPART_OFS_APPEND,
980 }, {
981 .name = "file system(spi)",
982 .size = MTDPART_SIZ_FULL,
983 .offset = MTDPART_OFS_APPEND,
984 }
985};
986
987static struct flash_platform_data bfin_spi_dataflash_data = {
988 .name = "SPI Dataflash",
989 .parts = bfin_spi_dataflash_partitions,
990 .nr_parts = ARRAY_SIZE(bfin_spi_dataflash_partitions),
991};
992
Michael Hennerich8e9d5c72008-04-24 08:46:19 +0800993/* DataFlash chip */
994static struct bfin5xx_spi_chip data_flash_chip_info = {
995 .enable_dma = 0, /* use dma transfer with this chip*/
996 .bits_per_word = 8,
997};
998#endif
999
Michael Hennerich57af8ed2009-10-16 12:35:20 +00001000#if defined(CONFIG_INPUT_ADXL34X_SPI) || defined(CONFIG_INPUT_ADXL34X_SPI_MODULE)
1001static struct bfin5xx_spi_chip spi_adxl34x_chip_info = {
1002 .enable_dma = 0, /* use dma transfer with this chip*/
1003 .bits_per_word = 8,
1004};
1005#endif
1006
Michael Hennerich0891bae2010-03-08 11:58:53 +00001007#if defined(CONFIG_AD7476) || defined(CONFIG_AD7476_MODULE)
1008static struct bfin5xx_spi_chip spi_ad7476_chip_info = {
1009 .enable_dma = 0, /* use dma transfer with this chip*/
1010 .bits_per_word = 8,
1011};
1012#endif
1013
Bryan Wu1394f032007-05-06 14:50:22 -07001014static struct spi_board_info bfin_spi_board_info[] __initdata = {
1015#if defined(CONFIG_MTD_M25P80) \
1016 || defined(CONFIG_MTD_M25P80_MODULE)
1017 {
1018 /* the modalias must be the same as spi device driver name */
1019 .modalias = "m25p80", /* Name of spi_driver for this device */
1020 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08001021 .bus_num = 0, /* Framework bus number */
Bryan Wu1394f032007-05-06 14:50:22 -07001022 .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
1023 .platform_data = &bfin_spi_flash_data,
1024 .controller_data = &spi_flash_chip_info,
1025 .mode = SPI_MODE_3,
1026 },
1027#endif
Michael Hennerich8e9d5c72008-04-24 08:46:19 +08001028#if defined(CONFIG_MTD_DATAFLASH) \
1029 || defined(CONFIG_MTD_DATAFLASH_MODULE)
1030 { /* DataFlash chip */
1031 .modalias = "mtd_dataflash",
Michael Hennerichceac2652008-08-25 17:39:11 +08001032 .max_speed_hz = 33250000, /* max spi clock (SCK) speed in HZ */
Michael Hennerich8e9d5c72008-04-24 08:46:19 +08001033 .bus_num = 0, /* Framework bus number */
1034 .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
Michael Hennerichceac2652008-08-25 17:39:11 +08001035 .platform_data = &bfin_spi_dataflash_data,
Michael Hennerich8e9d5c72008-04-24 08:46:19 +08001036 .controller_data = &data_flash_chip_info,
1037 .mode = SPI_MODE_3,
1038 },
1039#endif
Mike Frysingera261eec2009-05-20 14:05:36 +00001040#if defined(CONFIG_BFIN_SPI_ADC) \
1041 || defined(CONFIG_BFIN_SPI_ADC_MODULE)
Bryan Wu1394f032007-05-06 14:50:22 -07001042 {
1043 .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
1044 .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08001045 .bus_num = 0, /* Framework bus number */
Bryan Wu1394f032007-05-06 14:50:22 -07001046 .chip_select = 1, /* Framework chip select. */
1047 .platform_data = NULL, /* No spi_driver specific config */
1048 .controller_data = &spi_adc_chip_info,
1049 },
1050#endif
1051
Barry Songd40bd712010-02-22 10:31:06 +00001052#if defined(CONFIG_SND_BF5XX_SOC_AD183X) \
1053 || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE)
Bryan Wu1394f032007-05-06 14:50:22 -07001054 {
Barry Songd40bd712010-02-22 10:31:06 +00001055 .modalias = "ad183x",
Bryan Wu1394f032007-05-06 14:50:22 -07001056 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08001057 .bus_num = 0,
Barry Song7ba80062010-01-28 09:37:21 +00001058 .chip_select = 4,
Barry Songd40bd712010-02-22 10:31:06 +00001059 .platform_data = "ad1836", /* only includes chip name for the moment */
Bryan Wu1394f032007-05-06 14:50:22 -07001060 .controller_data = &ad1836_spi_chip_info,
Barry Song83124402009-08-06 21:03:02 +00001061 .mode = SPI_MODE_3,
Bryan Wu1394f032007-05-06 14:50:22 -07001062 },
1063#endif
Barry Songd4b834c2009-06-04 10:14:17 +00001064
Barry Song3b827902010-01-27 09:01:36 +00001065#if defined(CONFIG_SND_BF5XX_SOC_AD193X) || defined(CONFIG_SND_BF5XX_SOC_AD193X_MODULE)
Barry Songd4b834c2009-06-04 10:14:17 +00001066 {
Barry Song3b827902010-01-27 09:01:36 +00001067 .modalias = "ad193x",
Barry Songd4b834c2009-06-04 10:14:17 +00001068 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
1069 .bus_num = 0,
Barry Song08a54bf2009-09-18 09:14:38 +00001070 .chip_select = 5,
Barry Songd4b834c2009-06-04 10:14:17 +00001071 .controller_data = &ad1938_spi_chip_info,
1072 .mode = SPI_MODE_3,
1073 },
1074#endif
1075
Yi Lia65912c2010-04-06 05:53:16 +00001076#if defined(CONFIG_SND_BF5XX_SOC_ADAV80X) || defined(CONFIG_SND_BF5XX_SOC_ADAV80X_MODULE)
1077 {
1078 .modalias = "adav80x",
1079 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
1080 .bus_num = 0,
1081 .chip_select = 1,
1082 .controller_data = &adav801_spi_chip_info,
1083 .mode = SPI_MODE_3,
1084 },
1085#endif
1086
Mike Frysinger5b7c5772009-10-12 15:56:58 +00001087#if defined(CONFIG_INPUT_AD714X_SPI) || defined(CONFIG_INPUT_AD714X_SPI_MODULE)
Barry Song427f2772009-07-17 07:04:55 +00001088 {
1089 .modalias = "ad714x_captouch",
1090 .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
1091 .irq = IRQ_PF4,
1092 .bus_num = 0,
1093 .chip_select = 5,
1094 .mode = SPI_MODE_3,
Mike Frysinger5b7c5772009-10-12 15:56:58 +00001095 .platform_data = &ad7147_spi_platform_data,
Barry Song427f2772009-07-17 07:04:55 +00001096 .controller_data = &ad7147_spi_chip_info,
1097 },
1098#endif
1099
Graf Yangf5f95312010-02-10 07:15:59 +00001100#if defined(CONFIG_AD2S90) || defined(CONFIG_AD2S90_MODULE)
1101 {
1102 .modalias = "ad2s90",
1103 .bus_num = 0,
1104 .chip_select = 3, /* change it for your board */
Barry Song6fbfa0c2010-04-12 05:04:15 +00001105 .mode = SPI_MODE_3,
Graf Yangf5f95312010-02-10 07:15:59 +00001106 .platform_data = NULL,
1107 .controller_data = &ad2s90_spi_chip_info,
1108 },
1109#endif
1110
Graf Yangdf6a9492010-02-21 10:23:07 +00001111#if defined(CONFIG_AD2S120X) || defined(CONFIG_AD2S120X_MODULE)
1112 {
1113 .modalias = "ad2s120x",
1114 .bus_num = 0,
1115 .chip_select = 4, /* CS, change it for your board */
1116 .platform_data = ad2s120x_platform_data,
1117 .controller_data = &ad2s120x_spi_chip_info,
1118 },
1119#endif
1120
Graf Yang848c51c2010-02-26 11:49:52 +00001121#if defined(CONFIG_AD2S1210) || defined(CONFIG_AD2S1210_MODULE)
1122 {
1123 .modalias = "ad2s1210",
1124 .max_speed_hz = 8192000,
1125 .bus_num = 0,
1126 .chip_select = 4, /* CS, change it for your board */
1127 .platform_data = ad2s1210_platform_data,
1128 .controller_data = &ad2s1210_spi_chip_info,
1129 },
1130#endif
1131
Michael Hennerich0891bae2010-03-08 11:58:53 +00001132#if defined(CONFIG_AD7314) || defined(CONFIG_AD7314_MODULE)
1133 {
1134 .modalias = "ad7314",
1135 .max_speed_hz = 1000000,
1136 .bus_num = 0,
1137 .chip_select = 4, /* CS, change it for your board */
1138 .controller_data = &ad7314_spi_chip_info,
1139 .mode = SPI_MODE_1,
1140 },
1141#endif
1142
1143#if defined(CONFIG_AD7816) || defined(CONFIG_AD7816_MODULE)
1144 {
1145 .modalias = "ad7818",
1146 .max_speed_hz = 1000000,
1147 .bus_num = 0,
1148 .chip_select = 4, /* CS, change it for your board */
1149 .platform_data = ad7816_platform_data,
1150 .controller_data = &ad7816_spi_chip_info,
1151 .mode = SPI_MODE_3,
1152 },
1153#endif
1154
1155#if defined(CONFIG_ADT7310) || defined(CONFIG_ADT7310_MODULE)
1156 {
1157 .modalias = "adt7310",
1158 .max_speed_hz = 1000000,
1159 .irq = IRQ_PG5, /* CT alarm event. Line 0 */
1160 .bus_num = 0,
1161 .chip_select = 4, /* CS, change it for your board */
1162 .platform_data = adt7310_platform_data,
1163 .controller_data = &adt7310_spi_chip_info,
1164 .mode = SPI_MODE_3,
1165 },
1166#endif
1167
1168#if defined(CONFIG_AD7298) || defined(CONFIG_AD7298_MODULE)
1169 {
1170 .modalias = "ad7298",
1171 .max_speed_hz = 1000000,
1172 .bus_num = 0,
1173 .chip_select = 4, /* CS, change it for your board */
1174 .platform_data = ad7298_platform_data,
1175 .controller_data = &ad7298_spi_chip_info,
1176 .mode = SPI_MODE_3,
1177 },
1178#endif
1179
1180#if defined(CONFIG_ADT7316_SPI) || defined(CONFIG_ADT7316_SPI_MODULE)
1181 {
1182 .modalias = "adt7316",
1183 .max_speed_hz = 1000000,
1184 .irq = IRQ_PG5, /* interrupt line */
1185 .bus_num = 0,
1186 .chip_select = 4, /* CS, change it for your board */
1187 .platform_data = adt7316_spi_data,
1188 .controller_data = &adt7316_spi_chip_info,
1189 .mode = SPI_MODE_3,
1190 },
1191#endif
1192
Yi Lif79ea4c2009-01-07 23:14:38 +08001193#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
1194 {
1195 .modalias = "mmc_spi",
1196 .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
1197 .bus_num = 0,
1198 .chip_select = 4,
1199 .platform_data = &bfin_mmc_spi_pdata,
1200 .controller_data = &mmc_spi_chip_info,
1201 .mode = SPI_MODE_3,
1202 },
1203#endif
Bryan Wu1394f032007-05-06 14:50:22 -07001204#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
1205 {
1206 .modalias = "ad7877",
1207 .platform_data = &bfin_ad7877_ts_info,
1208 .irq = IRQ_PF6,
1209 .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
Michael Hennerichc7d48962007-11-15 21:33:31 +08001210 .bus_num = 0,
Bryan Wu1394f032007-05-06 14:50:22 -07001211 .chip_select = 1,
1212 .controller_data = &spi_ad7877_chip_info,
1213 },
1214#endif
Michael Hennerichf5150152008-10-16 23:23:18 +08001215#if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)
Michael Hennerich46aa04f2008-10-13 11:30:17 +08001216 {
1217 .modalias = "ad7879",
1218 .platform_data = &bfin_ad7879_ts_info,
1219 .irq = IRQ_PF7,
1220 .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */
1221 .bus_num = 0,
1222 .chip_select = 1,
1223 .controller_data = &spi_ad7879_chip_info,
1224 .mode = SPI_CPHA | SPI_CPOL,
1225 },
1226#endif
Michael Hennerich6e668932008-02-09 01:54:09 +08001227#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
1228 {
1229 .modalias = "spidev",
1230 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
1231 .bus_num = 0,
1232 .chip_select = 1,
1233 .controller_data = &spidev_chip_info,
1234 },
1235#endif
Michael Hennerich2043f3f2008-10-13 14:46:30 +08001236#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
1237 {
1238 .modalias = "bfin-lq035q1-spi",
1239 .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
1240 .bus_num = 0,
Michael Hennerich46aa04f2008-10-13 11:30:17 +08001241 .chip_select = 2,
Michael Hennerich2043f3f2008-10-13 14:46:30 +08001242 .controller_data = &lq035q1_spi_chip_info,
1243 .mode = SPI_CPHA | SPI_CPOL,
1244 },
1245#endif
Michael Hennerich85a192e2009-01-07 23:14:38 +08001246#if defined(CONFIG_ENC28J60) || defined(CONFIG_ENC28J60_MODULE)
1247 {
1248 .modalias = "enc28j60",
1249 .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
1250 .irq = IRQ_PF6,
1251 .bus_num = 0,
Barry Songf9f0e3b2009-11-17 09:45:59 +00001252 .chip_select = GPIO_PF10 + MAX_CTRL_CS, /* GPIO controlled SSEL */
Michael Hennerich85a192e2009-01-07 23:14:38 +08001253 .controller_data = &enc28j60_spi_chip_info,
1254 .mode = SPI_MODE_0,
1255 },
1256#endif
Michael Hennerich57af8ed2009-10-16 12:35:20 +00001257#if defined(CONFIG_INPUT_ADXL34X_SPI) || defined(CONFIG_INPUT_ADXL34X_SPI_MODULE)
1258 {
1259 .modalias = "adxl34x",
1260 .platform_data = &adxl34x_info,
1261 .irq = IRQ_PF6,
1262 .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */
1263 .bus_num = 0,
1264 .chip_select = 2,
1265 .controller_data = &spi_adxl34x_chip_info,
1266 .mode = SPI_MODE_3,
1267 },
1268#endif
Michael Hennerichefaf7cd2009-11-12 16:54:08 +00001269#if defined(CONFIG_ADF702X) || defined(CONFIG_ADF702X_MODULE)
1270 {
1271 .modalias = "adf702x",
1272 .max_speed_hz = 16000000, /* max spi clock (SCK) speed in HZ */
1273 .bus_num = 0,
Barry Songf9f0e3b2009-11-17 09:45:59 +00001274 .chip_select = GPIO_PF10 + MAX_CTRL_CS, /* GPIO controlled SSEL */
Michael Hennerichefaf7cd2009-11-12 16:54:08 +00001275 .controller_data = &adf7021_spi_chip_info,
1276 .platform_data = &adf7021_platform_data,
1277 .mode = SPI_MODE_0,
1278 },
1279#endif
Michael Hennerichfe5b25c2010-02-04 14:41:39 +00001280#if defined(CONFIG_TOUCHSCREEN_ADS7846) || defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE)
1281 {
1282 .modalias = "ads7846",
1283 .max_speed_hz = 2000000, /* max spi clock (SCK) speed in HZ */
1284 .bus_num = 0,
1285 .irq = IRQ_PF6,
1286 .chip_select = GPIO_PF10 + MAX_CTRL_CS, /* GPIO controlled SSEL */
1287 .controller_data = &ad7873_spi_chip_info,
1288 .platform_data = &ad7873_pdata,
1289 .mode = SPI_MODE_0,
1290 },
1291#endif
Michael Hennerich0891bae2010-03-08 11:58:53 +00001292#if defined(CONFIG_AD7476) \
1293 || defined(CONFIG_AD7476_MODULE)
1294 {
1295 .modalias = "ad7476", /* Name of spi_driver for this device */
1296 .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
1297 .bus_num = 0, /* Framework bus number */
1298 .chip_select = 1, /* Framework chip select. */
1299 .platform_data = NULL, /* No spi_driver specific config */
1300 .controller_data = &spi_ad7476_chip_info,
1301 .mode = SPI_MODE_3,
1302 },
1303#endif
1304#if defined(CONFIG_ADE7753) \
1305 || defined(CONFIG_ADE7753_MODULE)
1306 {
1307 .modalias = "ade7753",
1308 .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
1309 .bus_num = 0,
1310 .chip_select = 1, /* CS, change it for your board */
1311 .platform_data = NULL, /* No spi_driver specific config */
1312 .mode = SPI_MODE_1,
1313 },
1314#endif
1315#if defined(CONFIG_ADE7754) \
1316 || defined(CONFIG_ADE7754_MODULE)
1317 {
1318 .modalias = "ade7754",
1319 .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
1320 .bus_num = 0,
1321 .chip_select = 1, /* CS, change it for your board */
1322 .platform_data = NULL, /* No spi_driver specific config */
1323 .mode = SPI_MODE_1,
1324 },
1325#endif
1326#if defined(CONFIG_ADE7758) \
1327 || defined(CONFIG_ADE7758_MODULE)
1328 {
1329 .modalias = "ade7758",
1330 .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
1331 .bus_num = 0,
1332 .chip_select = 1, /* CS, change it for your board */
1333 .platform_data = NULL, /* No spi_driver specific config */
1334 .mode = SPI_MODE_1,
1335 },
1336#endif
1337#if defined(CONFIG_ADE7759) \
1338 || defined(CONFIG_ADE7759_MODULE)
1339 {
1340 .modalias = "ade7759",
1341 .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
1342 .bus_num = 0,
1343 .chip_select = 1, /* CS, change it for your board */
1344 .platform_data = NULL, /* No spi_driver specific config */
1345 .mode = SPI_MODE_1,
1346 },
1347#endif
1348#if defined(CONFIG_ADE7854_SPI) \
1349 || defined(CONFIG_ADE7854_SPI_MODULE)
1350 {
1351 .modalias = "ade7854",
1352 .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
1353 .bus_num = 0,
1354 .chip_select = 1, /* CS, change it for your board */
1355 .platform_data = NULL, /* No spi_driver specific config */
1356 .mode = SPI_MODE_3,
1357 },
1358#endif
1359#if defined(CONFIG_ADIS16060) \
1360 || defined(CONFIG_ADIS16060_MODULE)
1361 {
1362 .modalias = "adis16060_r",
1363 .max_speed_hz = 2900000, /* max spi clock (SCK) speed in HZ */
1364 .bus_num = 0,
1365 .chip_select = MAX_CTRL_CS + 1, /* CS for read, change it for your board */
1366 .platform_data = NULL, /* No spi_driver specific config */
1367 .mode = SPI_MODE_0,
1368 },
1369 {
1370 .modalias = "adis16060_w",
1371 .max_speed_hz = 2900000, /* max spi clock (SCK) speed in HZ */
1372 .bus_num = 0,
1373 .chip_select = 2, /* CS for write, change it for your board */
1374 .platform_data = NULL, /* No spi_driver specific config */
1375 .mode = SPI_MODE_1,
1376 },
1377#endif
1378#if defined(CONFIG_ADIS16130) \
1379 || defined(CONFIG_ADIS16130_MODULE)
1380 {
1381 .modalias = "adis16130",
1382 .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
1383 .bus_num = 0,
1384 .chip_select = 1, /* CS for read, change it for your board */
1385 .platform_data = NULL, /* No spi_driver specific config */
1386 .mode = SPI_MODE_3,
1387 },
1388#endif
1389#if defined(CONFIG_ADIS16201) \
1390 || defined(CONFIG_ADIS16201_MODULE)
1391 {
1392 .modalias = "adis16201",
1393 .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
1394 .bus_num = 0,
1395 .chip_select = 5, /* CS, change it for your board */
1396 .platform_data = NULL, /* No spi_driver specific config */
1397 .mode = SPI_MODE_3,
1398 .irq = IRQ_PF4,
1399 },
1400#endif
1401#if defined(CONFIG_ADIS16203) \
1402 || defined(CONFIG_ADIS16203_MODULE)
1403 {
1404 .modalias = "adis16203",
1405 .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
1406 .bus_num = 0,
1407 .chip_select = 5, /* CS, change it for your board */
1408 .platform_data = NULL, /* No spi_driver specific config */
1409 .mode = SPI_MODE_3,
1410 .irq = IRQ_PF4,
1411 },
1412#endif
1413#if defined(CONFIG_ADIS16204) \
1414 || defined(CONFIG_ADIS16204_MODULE)
1415 {
1416 .modalias = "adis16204",
1417 .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
1418 .bus_num = 0,
1419 .chip_select = 5, /* CS, change it for your board */
1420 .platform_data = NULL, /* No spi_driver specific config */
1421 .mode = SPI_MODE_3,
1422 .irq = IRQ_PF4,
1423 },
1424#endif
1425#if defined(CONFIG_ADIS16209) \
1426 || defined(CONFIG_ADIS16209_MODULE)
1427 {
1428 .modalias = "adis16209",
1429 .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
1430 .bus_num = 0,
1431 .chip_select = 5, /* CS, change it for your board */
1432 .platform_data = NULL, /* No spi_driver specific config */
1433 .mode = SPI_MODE_3,
1434 .irq = IRQ_PF4,
1435 },
1436#endif
1437#if defined(CONFIG_ADIS16220) \
1438 || defined(CONFIG_ADIS16220_MODULE)
1439 {
1440 .modalias = "adis16220",
1441 .max_speed_hz = 2000000, /* max spi clock (SCK) speed in HZ */
1442 .bus_num = 0,
1443 .chip_select = 5, /* CS, change it for your board */
1444 .platform_data = NULL, /* No spi_driver specific config */
1445 .mode = SPI_MODE_3,
1446 .irq = IRQ_PF4,
1447 },
1448#endif
1449#if defined(CONFIG_ADIS16240) \
1450 || defined(CONFIG_ADIS16240_MODULE)
1451 {
1452 .modalias = "adis16240",
1453 .max_speed_hz = 1500000, /* max spi clock (SCK) speed in HZ */
1454 .bus_num = 0,
1455 .chip_select = 5, /* CS, change it for your board */
1456 .platform_data = NULL, /* No spi_driver specific config */
1457 .mode = SPI_MODE_3,
1458 .irq = IRQ_PF4,
1459 },
1460#endif
1461#if defined(CONFIG_ADIS16260) \
1462 || defined(CONFIG_ADIS16260_MODULE)
1463 {
1464 .modalias = "adis16260",
1465 .max_speed_hz = 1500000, /* max spi clock (SCK) speed in HZ */
1466 .bus_num = 0,
1467 .chip_select = 5, /* CS, change it for your board */
1468 .platform_data = NULL, /* No spi_driver specific config */
1469 .mode = SPI_MODE_3,
1470 .irq = IRQ_PF4,
1471 },
1472#endif
1473#if defined(CONFIG_ADIS16261) \
1474 || defined(CONFIG_ADIS16261_MODULE)
1475 {
1476 .modalias = "adis16261",
1477 .max_speed_hz = 2500000, /* max spi clock (SCK) speed in HZ */
1478 .bus_num = 0,
1479 .chip_select = 1, /* CS, change it for your board */
1480 .platform_data = NULL, /* No spi_driver specific config */
1481 .mode = SPI_MODE_3,
1482 },
1483#endif
1484#if defined(CONFIG_ADIS16300) \
1485 || defined(CONFIG_ADIS16300_MODULE)
1486 {
1487 .modalias = "adis16300",
1488 .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
1489 .bus_num = 0,
1490 .chip_select = 5, /* CS, change it for your board */
1491 .platform_data = NULL, /* No spi_driver specific config */
1492 .mode = SPI_MODE_3,
1493 .irq = IRQ_PF4,
1494 },
1495#endif
1496#if defined(CONFIG_ADIS16350) \
1497 || defined(CONFIG_ADIS16350_MODULE)
1498 {
1499 .modalias = "adis16364",
1500 .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
1501 .bus_num = 0,
1502 .chip_select = 5, /* CS, change it for your board */
1503 .platform_data = NULL, /* No spi_driver specific config */
1504 .mode = SPI_MODE_3,
1505 .irq = IRQ_PF4,
1506 },
1507#endif
1508#if defined(CONFIG_ADIS16400) \
1509 || defined(CONFIG_ADIS16400_MODULE)
1510 {
1511 .modalias = "adis16400",
1512 .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
1513 .bus_num = 0,
1514 .chip_select = 1, /* CS, change it for your board */
1515 .platform_data = NULL, /* No spi_driver specific config */
1516 .mode = SPI_MODE_3,
1517 },
1518#endif
Bryan Wu1394f032007-05-06 14:50:22 -07001519};
1520
Mike Frysinger5bda2722008-06-07 15:03:01 +08001521#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
Bryan Wu1394f032007-05-06 14:50:22 -07001522/* SPI controller data */
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08001523static struct bfin5xx_spi_master bfin_spi0_info = {
Barry Songf9f0e3b2009-11-17 09:45:59 +00001524 .num_chipselect = MAX_CTRL_CS + MAX_BLACKFIN_GPIOS,
Bryan Wu1394f032007-05-06 14:50:22 -07001525 .enable_dma = 1, /* master has the ability to do dma transfer */
Bryan Wu5d448dd2007-11-12 23:24:42 +08001526 .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
Bryan Wu1394f032007-05-06 14:50:22 -07001527};
1528
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08001529/* SPI (0) */
1530static struct resource bfin_spi0_resource[] = {
1531 [0] = {
1532 .start = SPI0_REGBASE,
1533 .end = SPI0_REGBASE + 0xFF,
1534 .flags = IORESOURCE_MEM,
1535 },
1536 [1] = {
1537 .start = CH_SPI,
1538 .end = CH_SPI,
Yi Lie68d1eb2009-06-03 09:46:22 +00001539 .flags = IORESOURCE_DMA,
1540 },
1541 [2] = {
1542 .start = IRQ_SPI,
1543 .end = IRQ_SPI,
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08001544 .flags = IORESOURCE_IRQ,
1545 },
1546};
1547
1548static struct platform_device bfin_spi0_device = {
1549 .name = "bfin-spi",
1550 .id = 0, /* Bus number */
1551 .num_resources = ARRAY_SIZE(bfin_spi0_resource),
1552 .resource = bfin_spi0_resource,
Bryan Wu1394f032007-05-06 14:50:22 -07001553 .dev = {
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08001554 .platform_data = &bfin_spi0_info, /* Passed to driver */
Bryan Wu1394f032007-05-06 14:50:22 -07001555 },
1556};
1557#endif /* spi master and devices */
1558
Cliff Cai1e9aa952009-03-28 23:28:51 +08001559#if defined(CONFIG_SPI_BFIN_SPORT) || defined(CONFIG_SPI_BFIN_SPORT_MODULE)
1560
1561/* SPORT SPI controller data */
1562static struct bfin5xx_spi_master bfin_sport_spi0_info = {
1563 .num_chipselect = 1, /* master only supports one device */
1564 .enable_dma = 0, /* master don't support DMA */
1565 .pin_req = {P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_DRPRI,
1566 P_SPORT0_RSCLK, P_SPORT0_TFS, P_SPORT0_RFS, 0},
1567};
1568
1569static struct resource bfin_sport_spi0_resource[] = {
1570 [0] = {
1571 .start = SPORT0_TCR1,
1572 .end = SPORT0_TCR1 + 0xFF,
1573 .flags = IORESOURCE_MEM,
1574 },
1575 [1] = {
1576 .start = IRQ_SPORT0_ERROR,
1577 .end = IRQ_SPORT0_ERROR,
1578 .flags = IORESOURCE_IRQ,
1579 },
1580};
1581
1582static struct platform_device bfin_sport_spi0_device = {
1583 .name = "bfin-sport-spi",
1584 .id = 1, /* Bus number */
1585 .num_resources = ARRAY_SIZE(bfin_sport_spi0_resource),
1586 .resource = bfin_sport_spi0_resource,
1587 .dev = {
1588 .platform_data = &bfin_sport_spi0_info, /* Passed to driver */
1589 },
1590};
1591
1592static struct bfin5xx_spi_master bfin_sport_spi1_info = {
1593 .num_chipselect = 1, /* master only supports one device */
1594 .enable_dma = 0, /* master don't support DMA */
1595 .pin_req = {P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_DRPRI,
1596 P_SPORT1_RSCLK, P_SPORT1_TFS, P_SPORT1_RFS, 0},
1597};
1598
1599static struct resource bfin_sport_spi1_resource[] = {
1600 [0] = {
1601 .start = SPORT1_TCR1,
1602 .end = SPORT1_TCR1 + 0xFF,
1603 .flags = IORESOURCE_MEM,
1604 },
1605 [1] = {
1606 .start = IRQ_SPORT1_ERROR,
1607 .end = IRQ_SPORT1_ERROR,
1608 .flags = IORESOURCE_IRQ,
1609 },
1610};
1611
1612static struct platform_device bfin_sport_spi1_device = {
1613 .name = "bfin-sport-spi",
1614 .id = 2, /* Bus number */
1615 .num_resources = ARRAY_SIZE(bfin_sport_spi1_resource),
1616 .resource = bfin_sport_spi1_resource,
1617 .dev = {
1618 .platform_data = &bfin_sport_spi1_info, /* Passed to driver */
1619 },
1620};
1621
1622#endif /* sport spi master and devices */
1623
Bryan Wu1394f032007-05-06 14:50:22 -07001624#if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
1625static struct platform_device bfin_fb_device = {
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08001626 .name = "bf537-lq035",
1627};
1628#endif
1629
Michael Hennerich2043f3f2008-10-13 14:46:30 +08001630#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
1631#include <asm/bfin-lq035q1.h>
1632
1633static struct bfin_lq035q1fb_disp_info bfin_lq035q1_data = {
Michael Hennerichd94a1aa2009-12-08 11:45:55 +00001634 .mode = LQ035_NORM | LQ035_RGB | LQ035_RL | LQ035_TB,
1635 .ppi_mode = USE_RGB565_16_BIT_PPI,
1636 .use_bl = 0, /* let something else control the LCD Blacklight */
1637 .gpio_bl = GPIO_PF7,
Michael Hennerich2043f3f2008-10-13 14:46:30 +08001638};
1639
1640static struct resource bfin_lq035q1_resources[] = {
1641 {
1642 .start = IRQ_PPI_ERROR,
1643 .end = IRQ_PPI_ERROR,
1644 .flags = IORESOURCE_IRQ,
1645 },
1646};
1647
1648static struct platform_device bfin_lq035q1_device = {
1649 .name = "bfin-lq035q1",
1650 .id = -1,
Michael Hennerichd94a1aa2009-12-08 11:45:55 +00001651 .num_resources = ARRAY_SIZE(bfin_lq035q1_resources),
1652 .resource = bfin_lq035q1_resources,
Michael Hennerich2043f3f2008-10-13 14:46:30 +08001653 .dev = {
1654 .platform_data = &bfin_lq035q1_data,
1655 },
1656};
1657#endif
1658
Bryan Wu1394f032007-05-06 14:50:22 -07001659#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
Sonic Zhang233b28a2007-11-21 17:04:41 +08001660#ifdef CONFIG_SERIAL_BFIN_UART0
Sonic Zhang6bd1fbe2009-09-09 10:46:19 +00001661static struct resource bfin_uart0_resources[] = {
Bryan Wu1394f032007-05-06 14:50:22 -07001662 {
Sonic Zhang6bd1fbe2009-09-09 10:46:19 +00001663 .start = UART0_THR,
1664 .end = UART0_GCTL+2,
Bryan Wu1394f032007-05-06 14:50:22 -07001665 .flags = IORESOURCE_MEM,
Sonic Zhang233b28a2007-11-21 17:04:41 +08001666 },
Sonic Zhang233b28a2007-11-21 17:04:41 +08001667 {
Sonic Zhang6bd1fbe2009-09-09 10:46:19 +00001668 .start = IRQ_UART0_RX,
1669 .end = IRQ_UART0_RX+1,
1670 .flags = IORESOURCE_IRQ,
1671 },
1672 {
1673 .start = IRQ_UART0_ERROR,
1674 .end = IRQ_UART0_ERROR,
1675 .flags = IORESOURCE_IRQ,
1676 },
1677 {
1678 .start = CH_UART0_TX,
1679 .end = CH_UART0_TX,
1680 .flags = IORESOURCE_DMA,
1681 },
1682 {
1683 .start = CH_UART0_RX,
1684 .end = CH_UART0_RX,
1685 .flags = IORESOURCE_DMA,
1686 },
1687#ifdef CONFIG_BFIN_UART0_CTSRTS
1688 { /* CTS pin */
1689 .start = GPIO_PG7,
1690 .end = GPIO_PG7,
1691 .flags = IORESOURCE_IO,
1692 },
1693 { /* RTS pin */
1694 .start = GPIO_PG6,
1695 .end = GPIO_PG6,
1696 .flags = IORESOURCE_IO,
Bryan Wu1394f032007-05-06 14:50:22 -07001697 },
Sonic Zhang233b28a2007-11-21 17:04:41 +08001698#endif
Bryan Wu1394f032007-05-06 14:50:22 -07001699};
1700
Sonic Zhang6bd1fbe2009-09-09 10:46:19 +00001701unsigned short bfin_uart0_peripherals[] = {
1702 P_UART0_TX, P_UART0_RX, 0
1703};
1704
1705static struct platform_device bfin_uart0_device = {
1706 .name = "bfin-uart",
1707 .id = 0,
1708 .num_resources = ARRAY_SIZE(bfin_uart0_resources),
1709 .resource = bfin_uart0_resources,
1710 .dev = {
1711 .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
1712 },
1713};
1714#endif
1715#ifdef CONFIG_SERIAL_BFIN_UART1
1716static struct resource bfin_uart1_resources[] = {
1717 {
1718 .start = UART1_THR,
1719 .end = UART1_GCTL+2,
1720 .flags = IORESOURCE_MEM,
1721 },
1722 {
1723 .start = IRQ_UART1_RX,
1724 .end = IRQ_UART1_RX+1,
1725 .flags = IORESOURCE_IRQ,
1726 },
1727 {
1728 .start = IRQ_UART1_ERROR,
1729 .end = IRQ_UART1_ERROR,
1730 .flags = IORESOURCE_IRQ,
1731 },
1732 {
1733 .start = CH_UART1_TX,
1734 .end = CH_UART1_TX,
1735 .flags = IORESOURCE_DMA,
1736 },
1737 {
1738 .start = CH_UART1_RX,
1739 .end = CH_UART1_RX,
1740 .flags = IORESOURCE_DMA,
1741 },
1742};
1743
1744unsigned short bfin_uart1_peripherals[] = {
1745 P_UART1_TX, P_UART1_RX, 0
1746};
1747
1748static struct platform_device bfin_uart1_device = {
Bryan Wu1394f032007-05-06 14:50:22 -07001749 .name = "bfin-uart",
1750 .id = 1,
Sonic Zhang6bd1fbe2009-09-09 10:46:19 +00001751 .num_resources = ARRAY_SIZE(bfin_uart1_resources),
1752 .resource = bfin_uart1_resources,
1753 .dev = {
1754 .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
1755 },
Bryan Wu1394f032007-05-06 14:50:22 -07001756};
1757#endif
Sonic Zhang6bd1fbe2009-09-09 10:46:19 +00001758#endif
Bryan Wu1394f032007-05-06 14:50:22 -07001759
Graf Yang5be36d22008-04-25 03:09:15 +08001760#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
Graf Yang5be36d22008-04-25 03:09:15 +08001761#ifdef CONFIG_BFIN_SIR0
Graf Yang42bd8bc2009-01-07 23:14:39 +08001762static struct resource bfin_sir0_resources[] = {
Graf Yang5be36d22008-04-25 03:09:15 +08001763 {
1764 .start = 0xFFC00400,
1765 .end = 0xFFC004FF,
1766 .flags = IORESOURCE_MEM,
1767 },
Graf Yang42bd8bc2009-01-07 23:14:39 +08001768 {
1769 .start = IRQ_UART0_RX,
1770 .end = IRQ_UART0_RX+1,
1771 .flags = IORESOURCE_IRQ,
1772 },
1773 {
1774 .start = CH_UART0_RX,
1775 .end = CH_UART0_RX+1,
1776 .flags = IORESOURCE_DMA,
1777 },
1778};
1779
1780static struct platform_device bfin_sir0_device = {
1781 .name = "bfin_sir",
1782 .id = 0,
1783 .num_resources = ARRAY_SIZE(bfin_sir0_resources),
1784 .resource = bfin_sir0_resources,
1785};
Graf Yang5be36d22008-04-25 03:09:15 +08001786#endif
1787#ifdef CONFIG_BFIN_SIR1
Graf Yang42bd8bc2009-01-07 23:14:39 +08001788static struct resource bfin_sir1_resources[] = {
Graf Yang5be36d22008-04-25 03:09:15 +08001789 {
1790 .start = 0xFFC02000,
1791 .end = 0xFFC020FF,
1792 .flags = IORESOURCE_MEM,
1793 },
Graf Yang42bd8bc2009-01-07 23:14:39 +08001794 {
1795 .start = IRQ_UART1_RX,
1796 .end = IRQ_UART1_RX+1,
1797 .flags = IORESOURCE_IRQ,
1798 },
1799 {
1800 .start = CH_UART1_RX,
1801 .end = CH_UART1_RX+1,
1802 .flags = IORESOURCE_DMA,
1803 },
Graf Yang5be36d22008-04-25 03:09:15 +08001804};
1805
Graf Yang42bd8bc2009-01-07 23:14:39 +08001806static struct platform_device bfin_sir1_device = {
Graf Yang5be36d22008-04-25 03:09:15 +08001807 .name = "bfin_sir",
Graf Yang42bd8bc2009-01-07 23:14:39 +08001808 .id = 1,
1809 .num_resources = ARRAY_SIZE(bfin_sir1_resources),
1810 .resource = bfin_sir1_resources,
Graf Yang5be36d22008-04-25 03:09:15 +08001811};
1812#endif
Graf Yang42bd8bc2009-01-07 23:14:39 +08001813#endif
Graf Yang5be36d22008-04-25 03:09:15 +08001814
Bryan Wu1394f032007-05-06 14:50:22 -07001815#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08001816static struct resource bfin_twi0_resource[] = {
1817 [0] = {
1818 .start = TWI0_REGBASE,
1819 .end = TWI0_REGBASE,
1820 .flags = IORESOURCE_MEM,
1821 },
1822 [1] = {
1823 .start = IRQ_TWI,
1824 .end = IRQ_TWI,
1825 .flags = IORESOURCE_IRQ,
1826 },
1827};
1828
Bryan Wu1394f032007-05-06 14:50:22 -07001829static struct platform_device i2c_bfin_twi_device = {
1830 .name = "i2c-bfin-twi",
1831 .id = 0,
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08001832 .num_resources = ARRAY_SIZE(bfin_twi0_resource),
1833 .resource = bfin_twi0_resource,
Bryan Wu1394f032007-05-06 14:50:22 -07001834};
1835#endif
1836
Michael Hennerich51ed9ad2009-01-07 23:14:38 +08001837#if defined(CONFIG_KEYBOARD_ADP5588) || defined(CONFIG_KEYBOARD_ADP5588_MODULE)
Michael Hennerich51ed9ad2009-01-07 23:14:38 +08001838static const unsigned short adp5588_keymap[ADP5588_KEYMAPSIZE] = {
1839 [0] = KEY_GRAVE,
1840 [1] = KEY_1,
1841 [2] = KEY_2,
1842 [3] = KEY_3,
1843 [4] = KEY_4,
1844 [5] = KEY_5,
1845 [6] = KEY_6,
1846 [7] = KEY_7,
1847 [8] = KEY_8,
1848 [9] = KEY_9,
1849 [10] = KEY_0,
1850 [11] = KEY_MINUS,
1851 [12] = KEY_EQUAL,
1852 [13] = KEY_BACKSLASH,
1853 [15] = KEY_KP0,
1854 [16] = KEY_Q,
1855 [17] = KEY_W,
1856 [18] = KEY_E,
1857 [19] = KEY_R,
1858 [20] = KEY_T,
1859 [21] = KEY_Y,
1860 [22] = KEY_U,
1861 [23] = KEY_I,
1862 [24] = KEY_O,
1863 [25] = KEY_P,
1864 [26] = KEY_LEFTBRACE,
1865 [27] = KEY_RIGHTBRACE,
1866 [29] = KEY_KP1,
1867 [30] = KEY_KP2,
1868 [31] = KEY_KP3,
1869 [32] = KEY_A,
1870 [33] = KEY_S,
1871 [34] = KEY_D,
1872 [35] = KEY_F,
1873 [36] = KEY_G,
1874 [37] = KEY_H,
1875 [38] = KEY_J,
1876 [39] = KEY_K,
1877 [40] = KEY_L,
1878 [41] = KEY_SEMICOLON,
1879 [42] = KEY_APOSTROPHE,
1880 [43] = KEY_BACKSLASH,
1881 [45] = KEY_KP4,
1882 [46] = KEY_KP5,
1883 [47] = KEY_KP6,
1884 [48] = KEY_102ND,
1885 [49] = KEY_Z,
1886 [50] = KEY_X,
1887 [51] = KEY_C,
1888 [52] = KEY_V,
1889 [53] = KEY_B,
1890 [54] = KEY_N,
1891 [55] = KEY_M,
1892 [56] = KEY_COMMA,
1893 [57] = KEY_DOT,
1894 [58] = KEY_SLASH,
1895 [60] = KEY_KPDOT,
1896 [61] = KEY_KP7,
1897 [62] = KEY_KP8,
1898 [63] = KEY_KP9,
1899 [64] = KEY_SPACE,
1900 [65] = KEY_BACKSPACE,
1901 [66] = KEY_TAB,
1902 [67] = KEY_KPENTER,
1903 [68] = KEY_ENTER,
1904 [69] = KEY_ESC,
1905 [70] = KEY_DELETE,
1906 [74] = KEY_KPMINUS,
1907 [76] = KEY_UP,
1908 [77] = KEY_DOWN,
1909 [78] = KEY_RIGHT,
1910 [79] = KEY_LEFT,
1911};
1912
1913static struct adp5588_kpad_platform_data adp5588_kpad_data = {
1914 .rows = 8,
1915 .cols = 10,
1916 .keymap = adp5588_keymap,
1917 .keymapsize = ARRAY_SIZE(adp5588_keymap),
1918 .repeat = 0,
1919};
1920#endif
1921
Michael Hennerich3ea57212009-03-28 22:15:07 +08001922#if defined(CONFIG_PMIC_ADP5520) || defined(CONFIG_PMIC_ADP5520_MODULE)
1923#include <linux/mfd/adp5520.h>
1924
1925 /*
1926 * ADP5520/5501 Backlight Data
1927 */
1928
Michael Hennerich1d23dc82009-10-05 13:33:11 +00001929static struct adp5520_backlight_platform_data adp5520_backlight_data = {
1930 .fade_in = ADP5520_FADE_T_1200ms,
1931 .fade_out = ADP5520_FADE_T_1200ms,
1932 .fade_led_law = ADP5520_BL_LAW_LINEAR,
1933 .en_ambl_sens = 1,
1934 .abml_filt = ADP5520_BL_AMBL_FILT_640ms,
1935 .l1_daylight_max = ADP5520_BL_CUR_mA(15),
1936 .l1_daylight_dim = ADP5520_BL_CUR_mA(0),
1937 .l2_office_max = ADP5520_BL_CUR_mA(7),
1938 .l2_office_dim = ADP5520_BL_CUR_mA(0),
1939 .l3_dark_max = ADP5520_BL_CUR_mA(3),
1940 .l3_dark_dim = ADP5520_BL_CUR_mA(0),
1941 .l2_trip = ADP5520_L2_COMP_CURR_uA(700),
1942 .l2_hyst = ADP5520_L2_COMP_CURR_uA(50),
1943 .l3_trip = ADP5520_L3_COMP_CURR_uA(80),
1944 .l3_hyst = ADP5520_L3_COMP_CURR_uA(20),
Michael Hennerich3ea57212009-03-28 22:15:07 +08001945};
1946
1947 /*
1948 * ADP5520/5501 LEDs Data
1949 */
1950
Michael Hennerich3ea57212009-03-28 22:15:07 +08001951static struct led_info adp5520_leds[] = {
1952 {
1953 .name = "adp5520-led1",
1954 .default_trigger = "none",
Michael Hennerich1d23dc82009-10-05 13:33:11 +00001955 .flags = FLAG_ID_ADP5520_LED1_ADP5501_LED0 | ADP5520_LED_OFFT_600ms,
Michael Hennerich3ea57212009-03-28 22:15:07 +08001956 },
1957#ifdef ADP5520_EN_ALL_LEDS
1958 {
1959 .name = "adp5520-led2",
1960 .default_trigger = "none",
1961 .flags = FLAG_ID_ADP5520_LED2_ADP5501_LED1,
1962 },
1963 {
1964 .name = "adp5520-led3",
1965 .default_trigger = "none",
1966 .flags = FLAG_ID_ADP5520_LED3_ADP5501_LED2,
1967 },
1968#endif
1969};
1970
Michael Hennerich1d23dc82009-10-05 13:33:11 +00001971static struct adp5520_leds_platform_data adp5520_leds_data = {
Michael Hennerich3ea57212009-03-28 22:15:07 +08001972 .num_leds = ARRAY_SIZE(adp5520_leds),
1973 .leds = adp5520_leds,
Michael Hennerich1d23dc82009-10-05 13:33:11 +00001974 .fade_in = ADP5520_FADE_T_600ms,
1975 .fade_out = ADP5520_FADE_T_600ms,
1976 .led_on_time = ADP5520_LED_ONT_600ms,
Michael Hennerich3ea57212009-03-28 22:15:07 +08001977};
1978
1979 /*
1980 * ADP5520 GPIO Data
1981 */
1982
Michael Hennerich1d23dc82009-10-05 13:33:11 +00001983static struct adp5520_gpio_platform_data adp5520_gpio_data = {
Michael Hennerich3ea57212009-03-28 22:15:07 +08001984 .gpio_start = 50,
Michael Hennerich1d23dc82009-10-05 13:33:11 +00001985 .gpio_en_mask = ADP5520_GPIO_C1 | ADP5520_GPIO_C2 | ADP5520_GPIO_R2,
1986 .gpio_pullup_mask = ADP5520_GPIO_C1 | ADP5520_GPIO_C2 | ADP5520_GPIO_R2,
Michael Hennerich3ea57212009-03-28 22:15:07 +08001987};
1988
1989 /*
1990 * ADP5520 Keypad Data
1991 */
1992
Michael Hennerich3ea57212009-03-28 22:15:07 +08001993static const unsigned short adp5520_keymap[ADP5520_KEYMAPSIZE] = {
Michael Hennerich1d23dc82009-10-05 13:33:11 +00001994 [ADP5520_KEY(0, 0)] = KEY_GRAVE,
1995 [ADP5520_KEY(0, 1)] = KEY_1,
1996 [ADP5520_KEY(0, 2)] = KEY_2,
1997 [ADP5520_KEY(0, 3)] = KEY_3,
1998 [ADP5520_KEY(1, 0)] = KEY_4,
1999 [ADP5520_KEY(1, 1)] = KEY_5,
2000 [ADP5520_KEY(1, 2)] = KEY_6,
2001 [ADP5520_KEY(1, 3)] = KEY_7,
2002 [ADP5520_KEY(2, 0)] = KEY_8,
2003 [ADP5520_KEY(2, 1)] = KEY_9,
2004 [ADP5520_KEY(2, 2)] = KEY_0,
2005 [ADP5520_KEY(2, 3)] = KEY_MINUS,
2006 [ADP5520_KEY(3, 0)] = KEY_EQUAL,
2007 [ADP5520_KEY(3, 1)] = KEY_BACKSLASH,
2008 [ADP5520_KEY(3, 2)] = KEY_BACKSPACE,
2009 [ADP5520_KEY(3, 3)] = KEY_ENTER,
Michael Hennerich3ea57212009-03-28 22:15:07 +08002010};
2011
Michael Hennerich1d23dc82009-10-05 13:33:11 +00002012static struct adp5520_keys_platform_data adp5520_keys_data = {
2013 .rows_en_mask = ADP5520_ROW_R3 | ADP5520_ROW_R2 | ADP5520_ROW_R1 | ADP5520_ROW_R0,
2014 .cols_en_mask = ADP5520_COL_C3 | ADP5520_COL_C2 | ADP5520_COL_C1 | ADP5520_COL_C0,
Michael Hennerich3ea57212009-03-28 22:15:07 +08002015 .keymap = adp5520_keymap,
2016 .keymapsize = ARRAY_SIZE(adp5520_keymap),
2017 .repeat = 0,
2018};
2019
2020 /*
2021 * ADP5520/5501 Multifuction Device Init Data
2022 */
2023
Michael Hennerich3ea57212009-03-28 22:15:07 +08002024static struct adp5520_platform_data adp5520_pdev_data = {
Michael Hennerich1d23dc82009-10-05 13:33:11 +00002025 .backlight = &adp5520_backlight_data,
2026 .leds = &adp5520_leds_data,
2027 .gpio = &adp5520_gpio_data,
2028 .keys = &adp5520_keys_data,
Michael Hennerich3ea57212009-03-28 22:15:07 +08002029};
2030
2031#endif
2032
Michael Hennerichba877d42009-08-27 04:09:32 +00002033#if defined(CONFIG_GPIO_ADP5588) || defined(CONFIG_GPIO_ADP5588_MODULE)
Michael Hennerich1d23dc82009-10-05 13:33:11 +00002034static struct adp5588_gpio_platform_data adp5588_gpio_data = {
Michael Hennerichba877d42009-08-27 04:09:32 +00002035 .gpio_start = 50,
2036 .pullup_dis_mask = 0,
2037};
2038#endif
2039
Michael Hennerich78756c62009-10-13 15:28:33 +00002040#if defined(CONFIG_BACKLIGHT_ADP8870) || defined(CONFIG_BACKLIGHT_ADP8870_MODULE)
2041#include <linux/i2c/adp8870.h>
2042static struct led_info adp8870_leds[] = {
2043 {
2044 .name = "adp8870-led7",
2045 .default_trigger = "none",
2046 .flags = ADP8870_LED_D7 | ADP8870_LED_OFFT_600ms,
2047 },
2048};
2049
2050
2051static struct adp8870_backlight_platform_data adp8870_pdata = {
2052 .bl_led_assign = ADP8870_BL_D1 | ADP8870_BL_D2 | ADP8870_BL_D3 |
2053 ADP8870_BL_D4 | ADP8870_BL_D5 | ADP8870_BL_D6, /* 1 = Backlight 0 = Individual LED */
2054 .pwm_assign = 0, /* 1 = Enables PWM mode */
2055
2056 .bl_fade_in = ADP8870_FADE_T_1200ms, /* Backlight Fade-In Timer */
2057 .bl_fade_out = ADP8870_FADE_T_1200ms, /* Backlight Fade-Out Timer */
2058 .bl_fade_law = ADP8870_FADE_LAW_CUBIC1, /* fade-on/fade-off transfer characteristic */
2059
2060 .en_ambl_sens = 1, /* 1 = enable ambient light sensor */
2061 .abml_filt = ADP8870_BL_AMBL_FILT_320ms, /* Light sensor filter time */
2062
2063 .l1_daylight_max = ADP8870_BL_CUR_mA(20), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
2064 .l1_daylight_dim = ADP8870_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
2065 .l2_bright_max = ADP8870_BL_CUR_mA(14), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
2066 .l2_bright_dim = ADP8870_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
2067 .l3_office_max = ADP8870_BL_CUR_mA(6), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
2068 .l3_office_dim = ADP8870_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
2069 .l4_indoor_max = ADP8870_BL_CUR_mA(3), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
2070 .l4_indor_dim = ADP8870_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
2071 .l5_dark_max = ADP8870_BL_CUR_mA(2), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
2072 .l5_dark_dim = ADP8870_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
2073
2074 .l2_trip = ADP8870_L2_COMP_CURR_uA(710), /* use L2_COMP_CURR_uA(I) 0 <= I <= 1106 uA */
2075 .l2_hyst = ADP8870_L2_COMP_CURR_uA(73), /* use L2_COMP_CURR_uA(I) 0 <= I <= 1106 uA */
2076 .l3_trip = ADP8870_L3_COMP_CURR_uA(389), /* use L3_COMP_CURR_uA(I) 0 <= I <= 551 uA */
2077 .l3_hyst = ADP8870_L3_COMP_CURR_uA(54), /* use L3_COMP_CURR_uA(I) 0 <= I <= 551 uA */
2078 .l4_trip = ADP8870_L4_COMP_CURR_uA(167), /* use L4_COMP_CURR_uA(I) 0 <= I <= 275 uA */
2079 .l4_hyst = ADP8870_L4_COMP_CURR_uA(16), /* use L4_COMP_CURR_uA(I) 0 <= I <= 275 uA */
2080 .l5_trip = ADP8870_L5_COMP_CURR_uA(43), /* use L5_COMP_CURR_uA(I) 0 <= I <= 138 uA */
2081 .l5_hyst = ADP8870_L5_COMP_CURR_uA(11), /* use L6_COMP_CURR_uA(I) 0 <= I <= 138 uA */
2082
2083 .leds = adp8870_leds,
2084 .num_leds = ARRAY_SIZE(adp8870_leds),
2085 .led_fade_law = ADP8870_FADE_LAW_SQUARE, /* fade-on/fade-off transfer characteristic */
2086 .led_fade_in = ADP8870_FADE_T_600ms,
2087 .led_fade_out = ADP8870_FADE_T_600ms,
2088 .led_on_time = ADP8870_LED_ONT_200ms,
2089};
2090#endif
2091
Michael Hennerich72fa2e92010-02-24 21:05:35 +00002092#if defined(CONFIG_BACKLIGHT_ADP8860) || defined(CONFIG_BACKLIGHT_ADP8860_MODULE)
2093#include <linux/i2c/adp8860.h>
2094static struct led_info adp8860_leds[] = {
2095 {
2096 .name = "adp8860-led7",
2097 .default_trigger = "none",
2098 .flags = ADP8860_LED_D7 | ADP8860_LED_OFFT_600ms,
2099 },
2100};
2101
2102static struct adp8860_backlight_platform_data adp8860_pdata = {
2103 .bl_led_assign = ADP8860_BL_D1 | ADP8860_BL_D2 | ADP8860_BL_D3 |
2104 ADP8860_BL_D4 | ADP8860_BL_D5 | ADP8860_BL_D6, /* 1 = Backlight 0 = Individual LED */
2105
2106 .bl_fade_in = ADP8860_FADE_T_1200ms, /* Backlight Fade-In Timer */
2107 .bl_fade_out = ADP8860_FADE_T_1200ms, /* Backlight Fade-Out Timer */
2108 .bl_fade_law = ADP8860_FADE_LAW_CUBIC1, /* fade-on/fade-off transfer characteristic */
2109
2110 .en_ambl_sens = 1, /* 1 = enable ambient light sensor */
2111 .abml_filt = ADP8860_BL_AMBL_FILT_320ms, /* Light sensor filter time */
2112
2113 .l1_daylight_max = ADP8860_BL_CUR_mA(20), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
2114 .l1_daylight_dim = ADP8860_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
2115 .l2_office_max = ADP8860_BL_CUR_mA(6), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
2116 .l2_office_dim = ADP8860_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
2117 .l3_dark_max = ADP8860_BL_CUR_mA(2), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
2118 .l3_dark_dim = ADP8860_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
2119
2120 .l2_trip = ADP8860_L2_COMP_CURR_uA(710), /* use L2_COMP_CURR_uA(I) 0 <= I <= 1106 uA */
2121 .l2_hyst = ADP8860_L2_COMP_CURR_uA(73), /* use L2_COMP_CURR_uA(I) 0 <= I <= 1106 uA */
2122 .l3_trip = ADP8860_L3_COMP_CURR_uA(43), /* use L3_COMP_CURR_uA(I) 0 <= I <= 138 uA */
2123 .l3_hyst = ADP8860_L3_COMP_CURR_uA(11), /* use L3_COMP_CURR_uA(I) 0 <= I <= 138 uA */
2124
2125 .leds = adp8860_leds,
2126 .num_leds = ARRAY_SIZE(adp8860_leds),
2127 .led_fade_law = ADP8860_FADE_LAW_SQUARE, /* fade-on/fade-off transfer characteristic */
2128 .led_fade_in = ADP8860_FADE_T_600ms,
2129 .led_fade_out = ADP8860_FADE_T_600ms,
2130 .led_on_time = ADP8860_LED_ONT_200ms,
2131};
2132#endif
2133
Sonic Zhangf32792d2010-02-09 02:47:09 +00002134#if defined(CONFIG_REGULATOR_AD5398) || defined(CONFIG_REGULATOR_AD5398_MODULE)
2135static struct regulator_consumer_supply ad5398_consumer = {
2136 .supply = "current",
2137};
2138
2139static struct regulator_init_data ad5398_regulator_data = {
2140 .constraints = {
2141 .name = "current range",
2142 .max_uA = 120000,
2143 .valid_ops_mask = REGULATOR_CHANGE_CURRENT | REGULATOR_CHANGE_STATUS,
2144 },
2145 .num_consumer_supplies = 1,
2146 .consumer_supplies = &ad5398_consumer,
2147};
2148
2149static struct ad5398_platform_data ad5398_i2c_platform_data = {
2150 .current_bits = 10,
2151 .current_offset = 4,
2152 .regulator_data = &ad5398_regulator_data,
2153};
2154
2155#if defined(CONFIG_REGULATOR_VIRTUAL_CONSUMER) || \
2156 defined(CONFIG_REGULATOR_VIRTUAL_CONSUMER_MODULE)
2157static struct platform_device ad5398_virt_consumer_device = {
2158 .name = "reg-virt-consumer",
2159 .id = 0,
2160 .dev = {
2161 .platform_data = "current", /* Passed to driver */
2162 },
2163};
2164#endif
2165#if defined(CONFIG_REGULATOR_USERSPACE_CONSUMER) || \
2166 defined(CONFIG_REGULATOR_USERSPACE_CONSUMER_MODULE)
2167static struct regulator_bulk_data ad5398_bulk_data = {
2168 .supply = "current",
2169};
2170
2171static struct regulator_userspace_consumer_data ad5398_userspace_comsumer_data = {
2172 .name = "ad5398",
2173 .num_supplies = 1,
2174 .supplies = &ad5398_bulk_data,
2175};
2176
2177static struct platform_device ad5398_userspace_consumer_device = {
2178 .name = "reg-userspace-consumer",
2179 .id = 0,
2180 .dev = {
2181 .platform_data = &ad5398_userspace_comsumer_data,
2182 },
2183};
2184#endif
2185#endif
2186
Michael Hennerich0891bae2010-03-08 11:58:53 +00002187#if defined(CONFIG_ADT7410) || defined(CONFIG_ADT7410_MODULE)
2188/* INT bound temperature alarm event. line 1 */
2189static unsigned long adt7410_platform_data[2] = {
2190 IRQ_PG4, IRQF_TRIGGER_LOW,
2191};
2192#endif
2193
2194#if defined(CONFIG_ADT7316_I2C) || defined(CONFIG_ADT7316_I2C_MODULE)
2195/* INT bound temperature alarm event. line 1 */
2196static unsigned long adt7316_i2c_data[2] = {
2197 IRQF_TRIGGER_LOW, /* interrupt flags */
2198 GPIO_PF4, /* ldac_pin, 0 means DAC/LDAC registers control DAC update */
2199};
2200#endif
2201
Bryan Wu81d9c7f2008-03-26 10:02:13 +08002202static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
Barry Song92b20f72010-03-17 08:12:30 +00002203#if defined(CONFIG_SND_BF5XX_SOC_AD193X) || defined(CONFIG_SND_BF5XX_SOC_AD193X_MODULE)
2204 {
2205 I2C_BOARD_INFO("ad1937", 0x04),
2206 },
2207#endif
2208
Yi Lia65912c2010-04-06 05:53:16 +00002209#if defined(CONFIG_SND_BF5XX_SOC_ADAV80X) || defined(CONFIG_SND_BF5XX_SOC_ADAV80X_MODULE)
2210 {
2211 I2C_BOARD_INFO("adav803", 0x10),
2212 },
2213#endif
2214
Mike Frysinger5b7c5772009-10-12 15:56:58 +00002215#if defined(CONFIG_INPUT_AD714X_I2C) || defined(CONFIG_INPUT_AD714X_I2C_MODULE)
Bryan Wu81d9c7f2008-03-26 10:02:13 +08002216 {
Barry Song427f2772009-07-17 07:04:55 +00002217 I2C_BOARD_INFO("ad7142_captouch", 0x2C),
Barry Song4c94c3e2009-07-07 07:41:50 +00002218 .irq = IRQ_PG5,
Mike Frysinger5b7c5772009-10-12 15:56:58 +00002219 .platform_data = (void *)&ad7142_i2c_platform_data,
Bryan Wu81d9c7f2008-03-26 10:02:13 +08002220 },
2221#endif
Barry Songad6720c2010-02-03 09:15:31 +00002222
2223#if defined(CONFIG_AD7150) || defined(CONFIG_AD7150_MODULE)
2224 {
2225 I2C_BOARD_INFO("ad7150", 0x48),
2226 .irq = IRQ_PG5, /* fixme: use real interrupt number */
2227 },
2228#endif
2229
2230#if defined(CONFIG_AD7152) || defined(CONFIG_AD7152_MODULE)
2231 {
2232 I2C_BOARD_INFO("ad7152", 0x48),
2233 },
2234#endif
2235
2236#if defined(CONFIG_AD774X) || defined(CONFIG_AD774X_MODULE)
2237 {
2238 I2C_BOARD_INFO("ad774x", 0x48),
2239 },
2240#endif
2241
Sonic Zhang5f022592010-02-24 07:32:50 +00002242#if defined(CONFIG_AD7414) || defined(CONFIG_AD7414_MODULE)
2243 {
2244 I2C_BOARD_INFO("ad7414", 0x9),
2245 .irq = IRQ_PG5,
Michael Hennerich0891bae2010-03-08 11:58:53 +00002246 .irq_flags = IRQF_TRIGGER_LOW,
Sonic Zhang5f022592010-02-24 07:32:50 +00002247 },
2248#endif
2249
Sonic Zhangef8873e2010-02-25 10:27:48 +00002250#if defined(CONFIG_AD7416) || defined(CONFIG_AD7416_MODULE)
2251 {
2252 I2C_BOARD_INFO("ad7417", 0xb),
2253 .irq = IRQ_PG5,
Michael Hennerich0891bae2010-03-08 11:58:53 +00002254 .irq_flags = IRQF_TRIGGER_LOW,
2255 .platform_data = (void *)GPIO_PF4,
2256 },
2257#endif
2258
2259#if defined(CONFIG_ADE7854_I2C) || defined(CONFIG_ADE7854_I2C_MODULE)
2260 {
2261 I2C_BOARD_INFO("ade7854", 0x38),
2262 },
2263#endif
2264
2265#if defined(CONFIG_ADT75) || defined(CONFIG_ADT75_MODULE)
2266 {
2267 I2C_BOARD_INFO("adt75", 0x9),
2268 .irq = IRQ_PG5,
2269 .irq_flags = IRQF_TRIGGER_LOW,
2270 },
2271#endif
2272
2273#if defined(CONFIG_ADT7408) || defined(CONFIG_ADT7408_MODULE)
2274 {
2275 I2C_BOARD_INFO("adt7408", 0x18),
2276 .irq = IRQ_PG5,
2277 .irq_flags = IRQF_TRIGGER_LOW,
2278 },
2279#endif
2280
2281#if defined(CONFIG_ADT7410) || defined(CONFIG_ADT7410_MODULE)
2282 {
2283 I2C_BOARD_INFO("adt7410", 0x48),
2284 /* CT critical temperature event. line 0 */
2285 .irq = IRQ_PG5,
2286 .irq_flags = IRQF_TRIGGER_LOW,
2287 .platform_data = (void *)&adt7410_platform_data,
2288 },
2289#endif
2290
2291#if defined(CONFIG_AD7291) || defined(CONFIG_AD7291_MODULE)
2292 {
2293 I2C_BOARD_INFO("ad7291", 0x20),
2294 .irq = IRQ_PG5,
2295 .irq_flags = IRQF_TRIGGER_LOW,
2296 },
2297#endif
2298
2299#if defined(CONFIG_ADT7316_I2C) || defined(CONFIG_ADT7316_I2C_MODULE)
2300 {
2301 I2C_BOARD_INFO("adt7316", 0x48),
2302 .irq = IRQ_PG6,
2303 .platform_data = (void *)&adt7316_i2c_data,
Sonic Zhangef8873e2010-02-25 10:27:48 +00002304 },
2305#endif
2306
Michael Hennerichebd58332009-07-02 11:00:38 +00002307#if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)
Bryan Wu81d9c7f2008-03-26 10:02:13 +08002308 {
2309 I2C_BOARD_INFO("pcf8574_lcd", 0x22),
Bryan Wu81d9c7f2008-03-26 10:02:13 +08002310 },
2311#endif
Michael Hennerich204844e2009-06-30 14:57:22 +00002312#if defined(CONFIG_INPUT_PCF8574) || defined(CONFIG_INPUT_PCF8574_MODULE)
Bryan Wu81d9c7f2008-03-26 10:02:13 +08002313 {
2314 I2C_BOARD_INFO("pcf8574_keypad", 0x27),
Michael Hennerichf5150152008-10-16 23:23:18 +08002315 .irq = IRQ_PG6,
2316 },
2317#endif
2318#if defined(CONFIG_TOUCHSCREEN_AD7879_I2C) || defined(CONFIG_TOUCHSCREEN_AD7879_I2C_MODULE)
2319 {
2320 I2C_BOARD_INFO("ad7879", 0x2F),
2321 .irq = IRQ_PG5,
2322 .platform_data = (void *)&bfin_ad7879_ts_info,
Bryan Wu81d9c7f2008-03-26 10:02:13 +08002323 },
2324#endif
Michael Hennerich51ed9ad2009-01-07 23:14:38 +08002325#if defined(CONFIG_KEYBOARD_ADP5588) || defined(CONFIG_KEYBOARD_ADP5588_MODULE)
2326 {
2327 I2C_BOARD_INFO("adp5588-keys", 0x34),
2328 .irq = IRQ_PG0,
2329 .platform_data = (void *)&adp5588_kpad_data,
2330 },
2331#endif
Michael Hennerich3ea57212009-03-28 22:15:07 +08002332#if defined(CONFIG_PMIC_ADP5520) || defined(CONFIG_PMIC_ADP5520_MODULE)
2333 {
2334 I2C_BOARD_INFO("pmic-adp5520", 0x32),
Mike Frysinger4f84b6e2009-06-10 20:45:48 -04002335 .irq = IRQ_PG0,
Michael Hennerich3ea57212009-03-28 22:15:07 +08002336 .platform_data = (void *)&adp5520_pdev_data,
2337 },
2338#endif
Michael Hennerichffc4d8b2009-05-29 15:41:18 +00002339#if defined(CONFIG_INPUT_ADXL34X_I2C) || defined(CONFIG_INPUT_ADXL34X_I2C_MODULE)
2340 {
2341 I2C_BOARD_INFO("adxl34x", 0x53),
2342 .irq = IRQ_PG3,
2343 .platform_data = (void *)&adxl34x_info,
2344 },
2345#endif
Michael Hennerichba877d42009-08-27 04:09:32 +00002346#if defined(CONFIG_GPIO_ADP5588) || defined(CONFIG_GPIO_ADP5588_MODULE)
2347 {
2348 I2C_BOARD_INFO("adp5588-gpio", 0x34),
2349 .platform_data = (void *)&adp5588_gpio_data,
2350 },
2351#endif
Michael Hennerich50c4c082009-09-22 13:10:09 +00002352#if defined(CONFIG_FB_BFIN_7393) || defined(CONFIG_FB_BFIN_7393_MODULE)
2353 {
2354 I2C_BOARD_INFO("bfin-adv7393", 0x2B),
2355 },
2356#endif
Michael Hennerichddcd7cb2009-09-22 15:36:55 +00002357#if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
2358 {
2359 I2C_BOARD_INFO("bf537-lq035-ad5280", 0x2C),
2360 },
2361#endif
Michael Hennerich78756c62009-10-13 15:28:33 +00002362#if defined(CONFIG_BACKLIGHT_ADP8870) || defined(CONFIG_BACKLIGHT_ADP8870_MODULE)
2363 {
2364 I2C_BOARD_INFO("adp8870", 0x2B),
2365 .platform_data = (void *)&adp8870_pdata,
2366 },
2367#endif
Cliff Caid53127f2009-10-15 02:33:04 +00002368#if defined(CONFIG_SND_SOC_ADAU1371) || defined(CONFIG_SND_SOC_ADAU1371_MODULE)
2369 {
2370 I2C_BOARD_INFO("adau1371", 0x1A),
2371 },
2372#endif
Cliff Cai04267632009-10-28 06:50:36 +00002373#if defined(CONFIG_SND_SOC_ADAU1761) || defined(CONFIG_SND_SOC_ADAU1761_MODULE)
2374 {
2375 I2C_BOARD_INFO("adau1761", 0x38),
2376 },
2377#endif
Cliff Caic48d7672010-02-11 09:27:18 +00002378#if defined(CONFIG_SND_SOC_ADAU1361) || defined(CONFIG_SND_SOC_ADAU1361_MODULE)
2379 {
2380 I2C_BOARD_INFO("adau1361", 0x38),
2381 },
2382#endif
Michael Hennerich1f13f2f2009-11-17 10:18:27 +00002383#if defined(CONFIG_AD525X_DPOT) || defined(CONFIG_AD525X_DPOT_MODULE)
2384 {
2385 I2C_BOARD_INFO("ad5258", 0x18),
2386 },
2387#endif
Cliff Cai29bb3bc2010-01-14 08:28:38 +00002388#if defined(CONFIG_SND_SOC_SSM2602) || defined(CONFIG_SND_SOC_SSM2602_MODULE)
2389 {
2390 I2C_BOARD_INFO("ssm2602", 0x1b),
2391 },
2392#endif
Sonic Zhangf32792d2010-02-09 02:47:09 +00002393#if defined(CONFIG_REGULATOR_AD5398) || defined(CONFIG_REGULATOR_AD5398_MODULE)
2394 {
2395 I2C_BOARD_INFO("ad5398", 0xC),
2396 .platform_data = (void *)&ad5398_i2c_platform_data,
2397 },
2398#endif
Michael Hennerich72fa2e92010-02-24 21:05:35 +00002399#if defined(CONFIG_BACKLIGHT_ADP8860) || defined(CONFIG_BACKLIGHT_ADP8860_MODULE)
2400 {
2401 I2C_BOARD_INFO("adp8860", 0x2A),
2402 .platform_data = (void *)&adp8860_pdata,
2403 },
2404#endif
Cliff Cai3cbcb1612010-04-22 05:55:56 +00002405#if defined(CONFIG_SND_SOC_ADAU1373) || defined(CONFIG_SND_SOC_ADAU1373_MODULE)
2406 {
2407 I2C_BOARD_INFO("adau1373", 0x1A),
2408 },
2409#endif
Bryan Wu81d9c7f2008-03-26 10:02:13 +08002410};
Bryan Wu81d9c7f2008-03-26 10:02:13 +08002411
Bryan Wu1394f032007-05-06 14:50:22 -07002412#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
Sonic Zhangdf5de262009-09-23 05:01:56 +00002413#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
2414static struct resource bfin_sport0_uart_resources[] = {
2415 {
2416 .start = SPORT0_TCR1,
2417 .end = SPORT0_MRCS3+4,
2418 .flags = IORESOURCE_MEM,
2419 },
2420 {
2421 .start = IRQ_SPORT0_RX,
2422 .end = IRQ_SPORT0_RX+1,
2423 .flags = IORESOURCE_IRQ,
2424 },
2425 {
2426 .start = IRQ_SPORT0_ERROR,
2427 .end = IRQ_SPORT0_ERROR,
2428 .flags = IORESOURCE_IRQ,
2429 },
2430};
2431
2432unsigned short bfin_sport0_peripherals[] = {
2433 P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
2434 P_SPORT0_DRPRI, P_SPORT0_RSCLK, P_SPORT0_DRSEC, P_SPORT0_DTSEC, 0
2435};
2436
Bryan Wu1394f032007-05-06 14:50:22 -07002437static struct platform_device bfin_sport0_uart_device = {
2438 .name = "bfin-sport-uart",
2439 .id = 0,
Sonic Zhangdf5de262009-09-23 05:01:56 +00002440 .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
2441 .resource = bfin_sport0_uart_resources,
2442 .dev = {
2443 .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
2444 },
2445};
2446#endif
2447#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
2448static struct resource bfin_sport1_uart_resources[] = {
2449 {
2450 .start = SPORT1_TCR1,
2451 .end = SPORT1_MRCS3+4,
2452 .flags = IORESOURCE_MEM,
2453 },
2454 {
2455 .start = IRQ_SPORT1_RX,
2456 .end = IRQ_SPORT1_RX+1,
2457 .flags = IORESOURCE_IRQ,
2458 },
2459 {
2460 .start = IRQ_SPORT1_ERROR,
2461 .end = IRQ_SPORT1_ERROR,
2462 .flags = IORESOURCE_IRQ,
2463 },
2464};
2465
2466unsigned short bfin_sport1_peripherals[] = {
2467 P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
2468 P_SPORT1_DRPRI, P_SPORT1_RSCLK, P_SPORT1_DRSEC, P_SPORT1_DTSEC, 0
Bryan Wu1394f032007-05-06 14:50:22 -07002469};
2470
2471static struct platform_device bfin_sport1_uart_device = {
2472 .name = "bfin-sport-uart",
2473 .id = 1,
Sonic Zhangdf5de262009-09-23 05:01:56 +00002474 .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
2475 .resource = bfin_sport1_uart_resources,
2476 .dev = {
2477 .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
2478 },
Bryan Wu1394f032007-05-06 14:50:22 -07002479};
2480#endif
Sonic Zhangdf5de262009-09-23 05:01:56 +00002481#endif
Bryan Wu1394f032007-05-06 14:50:22 -07002482
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08002483#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
Michael Hennerich2c8beb22009-03-28 22:13:43 +08002484#define CF_IDE_NAND_CARD_USE_HDD_INTERFACE
2485/* #define CF_IDE_NAND_CARD_USE_CF_IN_COMMON_MEMORY_MODE */
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08002486
Michael Hennerich2c8beb22009-03-28 22:13:43 +08002487#ifdef CF_IDE_NAND_CARD_USE_HDD_INTERFACE
2488#define PATA_INT IRQ_PF5
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08002489static struct pata_platform_info bfin_pata_platform_data = {
2490 .ioport_shift = 1,
Mike Frysinger64e5c512007-10-30 11:56:13 +08002491 .irq_flags = IRQF_TRIGGER_HIGH | IRQF_DISABLED,
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08002492};
2493
2494static struct resource bfin_pata_resources[] = {
2495 {
2496 .start = 0x20314020,
2497 .end = 0x2031403F,
2498 .flags = IORESOURCE_MEM,
2499 },
2500 {
2501 .start = 0x2031401C,
2502 .end = 0x2031401F,
2503 .flags = IORESOURCE_MEM,
2504 },
2505 {
2506 .start = PATA_INT,
2507 .end = PATA_INT,
2508 .flags = IORESOURCE_IRQ,
2509 },
2510};
Michael Hennerich2c8beb22009-03-28 22:13:43 +08002511#elif defined(CF_IDE_NAND_CARD_USE_CF_IN_COMMON_MEMORY_MODE)
2512static struct pata_platform_info bfin_pata_platform_data = {
2513 .ioport_shift = 0,
2514};
Michael Hennerich648882d2009-04-21 12:05:50 +00002515/* CompactFlash Storage Card Memory Mapped Adressing
2516 * /REG = A11 = 1
2517 */
Michael Hennerich2c8beb22009-03-28 22:13:43 +08002518static struct resource bfin_pata_resources[] = {
2519 {
Michael Hennerich648882d2009-04-21 12:05:50 +00002520 .start = 0x20211800,
2521 .end = 0x20211807,
Michael Hennerich2c8beb22009-03-28 22:13:43 +08002522 .flags = IORESOURCE_MEM,
2523 },
2524 {
Michael Hennerich648882d2009-04-21 12:05:50 +00002525 .start = 0x2021180E, /* Device Ctl */
2526 .end = 0x2021180E,
Michael Hennerich2c8beb22009-03-28 22:13:43 +08002527 .flags = IORESOURCE_MEM,
2528 },
2529};
2530#endif
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08002531
2532static struct platform_device bfin_pata_device = {
2533 .name = "pata_platform",
2534 .id = -1,
2535 .num_resources = ARRAY_SIZE(bfin_pata_resources),
2536 .resource = bfin_pata_resources,
2537 .dev = {
2538 .platform_data = &bfin_pata_platform_data,
2539 }
2540};
2541#endif
2542
Michael Hennerich14b03202008-05-07 11:41:26 +08002543static const unsigned int cclk_vlev_datasheet[] =
2544{
2545 VRPAIR(VLEV_085, 250000000),
2546 VRPAIR(VLEV_090, 376000000),
2547 VRPAIR(VLEV_095, 426000000),
2548 VRPAIR(VLEV_100, 426000000),
2549 VRPAIR(VLEV_105, 476000000),
2550 VRPAIR(VLEV_110, 476000000),
2551 VRPAIR(VLEV_115, 476000000),
2552 VRPAIR(VLEV_120, 500000000),
2553 VRPAIR(VLEV_125, 533000000),
2554 VRPAIR(VLEV_130, 600000000),
2555};
2556
2557static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
2558 .tuple_tab = cclk_vlev_datasheet,
2559 .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
2560 .vr_settling_time = 25 /* us */,
2561};
2562
2563static struct platform_device bfin_dpmc = {
2564 .name = "bfin dpmc",
2565 .dev = {
2566 .platform_data = &bfin_dmpc_vreg_data,
2567 },
2568};
2569
Barry Song336746e2009-10-13 09:19:18 +00002570#if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
2571static struct platform_device bfin_i2s = {
2572 .name = "bfin-i2s",
2573 .id = CONFIG_SND_BF5XX_SPORT_NUM,
2574 /* TODO: add platform data here */
2575};
2576#endif
2577
Barry Song83124402009-08-06 21:03:02 +00002578#if defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE)
2579static struct platform_device bfin_tdm = {
2580 .name = "bfin-tdm",
Barry Song336746e2009-10-13 09:19:18 +00002581 .id = CONFIG_SND_BF5XX_SPORT_NUM,
2582 /* TODO: add platform data here */
2583};
2584#endif
2585
2586#if defined(CONFIG_SND_BF5XX_AC97) || defined(CONFIG_SND_BF5XX_AC97_MODULE)
2587static struct platform_device bfin_ac97 = {
2588 .name = "bfin-ac97",
2589 .id = CONFIG_SND_BF5XX_SPORT_NUM,
Barry Song83124402009-08-06 21:03:02 +00002590 /* TODO: add platform data here */
2591};
2592#endif
2593
Sonic Zhang1b04cbe2010-06-02 05:00:21 +00002594#if defined(CONFIG_REGULATOR_FIXED_VOLTAGE) || defined(CONFIG_REGULATOR_FIXED_VOLTAGE_MODULE)
2595#define REGULATOR_ADP122 "adp122"
2596#define REGULATOR_ADP122_UV 2500000
Sonic Zhangf8e6dbf2010-02-10 09:09:05 +00002597
2598static struct regulator_consumer_supply adp122_consumers = {
2599 .supply = REGULATOR_ADP122,
2600};
2601
Sonic Zhang1b04cbe2010-06-02 05:00:21 +00002602static struct regulator_init_data adp_switch_regulator_data = {
2603 .constraints = {
2604 .name = REGULATOR_ADP122,
2605 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
2606 .min_uV = REGULATOR_ADP122_UV,
2607 .max_uV = REGULATOR_ADP122_UV,
2608 .min_uA = 0,
2609 .max_uA = 300000,
2610 },
2611 .num_consumer_supplies = 1, /* only 1 */
2612 .consumer_supplies = &adp122_consumers,
Sonic Zhangf8e6dbf2010-02-10 09:09:05 +00002613};
2614
Sonic Zhang1b04cbe2010-06-02 05:00:21 +00002615static struct fixed_voltage_config adp_switch_pdata = {
2616 .supply_name = REGULATOR_ADP122,
2617 .microvolts = REGULATOR_ADP122_UV,
2618 .gpio = GPIO_PF2,
2619 .enable_high = 1,
2620 .enabled_at_boot = 0,
2621 .init_data = &adp_switch_regulator_data,
Sonic Zhangf8e6dbf2010-02-10 09:09:05 +00002622};
2623
2624static struct platform_device adp_switch_device = {
Sonic Zhang1b04cbe2010-06-02 05:00:21 +00002625 .name = "reg-fixed-voltage",
Sonic Zhangf8e6dbf2010-02-10 09:09:05 +00002626 .id = 0,
2627 .dev = {
2628 .platform_data = &adp_switch_pdata,
2629 },
2630};
2631
2632#if defined(CONFIG_REGULATOR_USERSPACE_CONSUMER) || \
2633 defined(CONFIG_REGULATOR_USERSPACE_CONSUMER_MODULE)
2634static struct regulator_bulk_data adp122_bulk_data = {
2635 .supply = REGULATOR_ADP122,
2636};
2637
2638static struct regulator_userspace_consumer_data adp122_userspace_comsumer_data = {
2639 .name = REGULATOR_ADP122,
2640 .num_supplies = 1,
2641 .supplies = &adp122_bulk_data,
2642};
2643
2644static struct platform_device adp122_userspace_consumer_device = {
2645 .name = "reg-userspace-consumer",
2646 .id = 0,
2647 .dev = {
2648 .platform_data = &adp122_userspace_comsumer_data,
2649 },
2650};
Sonic Zhangf8e6dbf2010-02-10 09:09:05 +00002651#endif
2652#endif
2653
Michael Hennerich0891bae2010-03-08 11:58:53 +00002654#if defined(CONFIG_IIO_GPIO_TRIGGER) || \
2655 defined(CONFIG_IIO_GPIO_TRIGGER_MODULE)
2656
2657static struct resource iio_gpio_trigger_resources[] = {
2658 [0] = {
2659 .start = IRQ_PF5,
2660 .end = IRQ_PF5,
2661 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE,
2662 },
2663};
2664
2665static struct platform_device iio_gpio_trigger = {
2666 .name = "iio_gpio_trigger",
2667 .num_resources = ARRAY_SIZE(iio_gpio_trigger_resources),
2668 .resource = iio_gpio_trigger_resources,
2669};
2670#endif
Sonic Zhangf8e6dbf2010-02-10 09:09:05 +00002671
Bryan Wu1394f032007-05-06 14:50:22 -07002672static struct platform_device *stamp_devices[] __initdata = {
Michael Hennerich14b03202008-05-07 11:41:26 +08002673
2674 &bfin_dpmc,
2675
Bryan Wu1394f032007-05-06 14:50:22 -07002676#if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
2677 &bfin_pcmcia_cf_device,
2678#endif
2679
2680#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
2681 &rtc_device,
2682#endif
2683
2684#if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE)
2685 &sl811_hcd_device,
2686#endif
2687
2688#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
2689 &isp1362_hcd_device,
2690#endif
2691
Michael Hennerich3f375692008-11-18 17:48:22 +08002692#if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
2693 &bfin_isp1760_device,
2694#endif
2695
Bryan Wu1394f032007-05-06 14:50:22 -07002696#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
2697 &smc91x_device,
2698#endif
2699
Alex Landauf40d24d2007-07-12 12:11:48 +08002700#if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
2701 &dm9000_device,
2702#endif
2703
Barry Song706a01b2009-11-02 07:29:07 +00002704#if defined(CONFIG_CAN_BFIN) || defined(CONFIG_CAN_BFIN_MODULE)
2705 &bfin_can_device,
2706#endif
2707
Bryan Wu1394f032007-05-06 14:50:22 -07002708#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
Graf Yang65319622009-02-04 16:49:45 +08002709 &bfin_mii_bus,
Bryan Wu1394f032007-05-06 14:50:22 -07002710 &bfin_mac_device,
2711#endif
2712
2713#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
2714 &net2272_bfin_device,
2715#endif
2716
2717#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08002718 &bfin_spi0_device,
Bryan Wu1394f032007-05-06 14:50:22 -07002719#endif
2720
Cliff Cai1e9aa952009-03-28 23:28:51 +08002721#if defined(CONFIG_SPI_BFIN_SPORT) || defined(CONFIG_SPI_BFIN_SPORT_MODULE)
2722 &bfin_sport_spi0_device,
2723 &bfin_sport_spi1_device,
2724#endif
2725
Bryan Wu1394f032007-05-06 14:50:22 -07002726#if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
2727 &bfin_fb_device,
2728#endif
2729
Michael Hennerich2043f3f2008-10-13 14:46:30 +08002730#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
2731 &bfin_lq035q1_device,
2732#endif
2733
Bryan Wu1394f032007-05-06 14:50:22 -07002734#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
Sonic Zhang6bd1fbe2009-09-09 10:46:19 +00002735#ifdef CONFIG_SERIAL_BFIN_UART0
2736 &bfin_uart0_device,
2737#endif
2738#ifdef CONFIG_SERIAL_BFIN_UART1
2739 &bfin_uart1_device,
2740#endif
Bryan Wu1394f032007-05-06 14:50:22 -07002741#endif
2742
Graf Yang5be36d22008-04-25 03:09:15 +08002743#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
Graf Yang42bd8bc2009-01-07 23:14:39 +08002744#ifdef CONFIG_BFIN_SIR0
2745 &bfin_sir0_device,
2746#endif
2747#ifdef CONFIG_BFIN_SIR1
2748 &bfin_sir1_device,
2749#endif
Graf Yang5be36d22008-04-25 03:09:15 +08002750#endif
2751
Bryan Wu1394f032007-05-06 14:50:22 -07002752#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
2753 &i2c_bfin_twi_device,
2754#endif
2755
2756#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
Sonic Zhangdf5de262009-09-23 05:01:56 +00002757#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
Bryan Wu1394f032007-05-06 14:50:22 -07002758 &bfin_sport0_uart_device,
Sonic Zhangdf5de262009-09-23 05:01:56 +00002759#endif
2760#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
Bryan Wu1394f032007-05-06 14:50:22 -07002761 &bfin_sport1_uart_device,
2762#endif
Sonic Zhangdf5de262009-09-23 05:01:56 +00002763#endif
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08002764
2765#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
2766 &bfin_pata_device,
2767#endif
Michael Hennerich2463ef22008-01-27 16:49:48 +08002768
2769#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
2770 &bfin_device_gpiokeys,
2771#endif
Mike Frysingercad2ab62008-02-22 17:01:31 +08002772
Mike Frysingerfc689112008-06-25 11:41:42 +08002773#if defined(CONFIG_MTD_NAND_PLATFORM) || defined(CONFIG_MTD_NAND_PLATFORM_MODULE)
2774 &bfin_async_nand_device,
2775#endif
2776
Mike Frysinger793dc272008-03-26 08:09:12 +08002777#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
Mike Frysingerde8c43f2008-01-24 17:14:04 +08002778 &stamp_flash_device,
Mike Frysinger793dc272008-03-26 08:09:12 +08002779#endif
Barry Song83124402009-08-06 21:03:02 +00002780
Barry Song336746e2009-10-13 09:19:18 +00002781#if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
2782 &bfin_i2s,
2783#endif
2784
Barry Song83124402009-08-06 21:03:02 +00002785#if defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE)
2786 &bfin_tdm,
2787#endif
Barry Song336746e2009-10-13 09:19:18 +00002788
2789#if defined(CONFIG_SND_BF5XX_AC97) || defined(CONFIG_SND_BF5XX_AC97_MODULE)
2790 &bfin_ac97,
2791#endif
Sonic Zhangf32792d2010-02-09 02:47:09 +00002792#if defined(CONFIG_REGULATOR_AD5398) || defined(CONFIG_REGULATOR_AD5398_MODULE)
2793#if defined(CONFIG_REGULATOR_VIRTUAL_CONSUMER) || \
2794 defined(CONFIG_REGULATOR_VIRTUAL_CONSUMER_MODULE)
2795 &ad5398_virt_consumer_device,
2796#endif
2797#if defined(CONFIG_REGULATOR_USERSPACE_CONSUMER) || \
2798 defined(CONFIG_REGULATOR_USERSPACE_CONSUMER_MODULE)
2799 &ad5398_userspace_consumer_device,
2800#endif
2801#endif
Sonic Zhangf8e6dbf2010-02-10 09:09:05 +00002802
Sonic Zhang1b04cbe2010-06-02 05:00:21 +00002803#if defined(CONFIG_REGULATOR_FIXED_VOLTAGE) || defined(CONFIG_REGULATOR_FIXED_VOLTAGE_MODULE)
Sonic Zhangf8e6dbf2010-02-10 09:09:05 +00002804 &adp_switch_device,
2805#if defined(CONFIG_REGULATOR_USERSPACE_CONSUMER) || \
2806 defined(CONFIG_REGULATOR_USERSPACE_CONSUMER_MODULE)
2807 &adp122_userspace_consumer_device,
Sonic Zhangf8e6dbf2010-02-10 09:09:05 +00002808#endif
2809#endif
Michael Hennerich0891bae2010-03-08 11:58:53 +00002810
2811#if defined(CONFIG_IIO_GPIO_TRIGGER) || \
2812 defined(CONFIG_IIO_GPIO_TRIGGER_MODULE)
2813 &iio_gpio_trigger,
2814#endif
Bryan Wu1394f032007-05-06 14:50:22 -07002815};
2816
2817static int __init stamp_init(void)
2818{
Harvey Harrisonb85d8582008-04-23 09:39:01 +08002819 printk(KERN_INFO "%s(): registering device resources\n", __func__);
Mike Frysingerfc689112008-06-25 11:41:42 +08002820 bfin_plat_nand_init();
Mike Frysinger0531c462010-01-19 07:04:29 +00002821 adf702x_mac_init();
Bryan Wu1394f032007-05-06 14:50:22 -07002822 platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
Sonic Zhangdf5de262009-09-23 05:01:56 +00002823 i2c_register_board_info(0, bfin_i2c_board_info,
2824 ARRAY_SIZE(bfin_i2c_board_info));
Mike Frysinger5bda2722008-06-07 15:03:01 +08002825 spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08002826
Bryan Wu1394f032007-05-06 14:50:22 -07002827 return 0;
2828}
2829
2830arch_initcall(stamp_init);
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08002831
Sonic Zhangc13ce9f2009-09-23 09:37:46 +00002832
2833static struct platform_device *stamp_early_devices[] __initdata = {
2834#if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
2835#ifdef CONFIG_SERIAL_BFIN_UART0
2836 &bfin_uart0_device,
2837#endif
2838#ifdef CONFIG_SERIAL_BFIN_UART1
2839 &bfin_uart1_device,
2840#endif
2841#endif
2842
2843#if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
2844#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
2845 &bfin_sport0_uart_device,
2846#endif
2847#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
2848 &bfin_sport1_uart_device,
2849#endif
2850#endif
2851};
2852
2853void __init native_machine_early_platform_add_devices(void)
2854{
2855 printk(KERN_INFO "register early platform devices\n");
2856 early_platform_add_devices(stamp_early_devices,
2857 ARRAY_SIZE(stamp_early_devices));
2858}
2859
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08002860void native_machine_restart(char *cmd)
2861{
2862 /* workaround reboot hang when booting from SPI */
2863 if ((bfin_read_SYSCR() & 0x7) == 0x3)
Sonic Zhangb52dae32009-02-04 16:49:45 +08002864 bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08002865}
Mike Frysinger137b1522007-11-22 16:07:03 +08002866
2867/*
2868 * Currently the MAC address is saved in Flash by U-Boot
2869 */
2870#define FLASH_MAC 0x203f0000
Mike Frysinger9862cc52007-11-15 21:21:20 +08002871void bfin_get_ether_addr(char *addr)
Mike Frysinger137b1522007-11-22 16:07:03 +08002872{
2873 *(u32 *)(&(addr[0])) = bfin_read32(FLASH_MAC);
2874 *(u16 *)(&(addr[4])) = bfin_read16(FLASH_MAC + 4);
2875}
Mike Frysinger9862cc52007-11-15 21:21:20 +08002876EXPORT_SYMBOL(bfin_get_ether_addr);