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gerrit-public.fairphone.software / kernel / msm-5.4 / 1c165c972b040f9ce199b8d8d3cc4f619872cba5 / . / drivers / net / wireless / ath / ath9k / wmi.h
blob: 2fa91a941a7244cad5da225070277b1d663ed92b [file] [log] [blame]
Sujithfb9987d2010-03-17 14:25:25 +0530[diff] [blame]1/*
2 * Copyright (c) 2010 Atheros Communications Inc.
3 *
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
7 *
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15 */
16
17#ifndef WMI_H
18#define WMI_H
19
20
21struct wmi_event_txrate {
Sujith7f1f5a02010-04-16 11:54:03 +0530[diff] [blame]22 __be32 txrate;
Sujithfb9987d2010-03-17 14:25:25 +0530[diff] [blame]23 struct {
24 u8 rssi_thresh;
25 u8 per;
26 } rc_stats;
27} __packed;
28
29struct wmi_cmd_hdr {
Sujith7f1f5a02010-04-16 11:54:03 +0530[diff] [blame]30 __be16 command_id;
31 __be16 seq_no;
Sujithfb9987d2010-03-17 14:25:25 +0530[diff] [blame]32} __packed;
33
Sujith Manoharan29bbfb22011-04-13 11:22:51 +0530[diff] [blame]34struct wmi_fw_version {
35 __be16 major;
36 __be16 minor;
37
38} __packed;
Sujith Manoharan1c165c92011-04-13 11:22:59 +0530[diff] [blame^]39
40struct wmi_event_swba {
41 __be64 tsf;
42 u8 beacon_pending;
43};
Sujithfb9987d2010-03-17 14:25:25 +0530[diff] [blame]44enum wmi_cmd_id {
45 WMI_ECHO_CMDID = 0x0001,
46 WMI_ACCESS_MEMORY_CMDID,
47
48 /* Commands to Target */
Sujith Manoharan29bbfb22011-04-13 11:22:51 +0530[diff] [blame]49 WMI_GET_FW_VERSION,
Sujithfb9987d2010-03-17 14:25:25 +0530[diff] [blame]50 WMI_DISABLE_INTR_CMDID,
51 WMI_ENABLE_INTR_CMDID,
52 WMI_RX_LINK_CMDID,
53 WMI_ATH_INIT_CMDID,
54 WMI_ABORT_TXQ_CMDID,
55 WMI_STOP_TX_DMA_CMDID,
56 WMI_STOP_DMA_RECV_CMDID,
57 WMI_ABORT_TX_DMA_CMDID,
58 WMI_DRAIN_TXQ_CMDID,
59 WMI_DRAIN_TXQ_ALL_CMDID,
60 WMI_START_RECV_CMDID,
61 WMI_STOP_RECV_CMDID,
62 WMI_FLUSH_RECV_CMDID,
63 WMI_SET_MODE_CMDID,
64 WMI_RESET_CMDID,
65 WMI_NODE_CREATE_CMDID,
66 WMI_NODE_REMOVE_CMDID,
67 WMI_VAP_REMOVE_CMDID,
68 WMI_VAP_CREATE_CMDID,
69 WMI_BEACON_UPDATE_CMDID,
70 WMI_REG_READ_CMDID,
71 WMI_REG_WRITE_CMDID,
72 WMI_RC_STATE_CHANGE_CMDID,
73 WMI_RC_RATE_UPDATE_CMDID,
74 WMI_DEBUG_INFO_CMDID,
75 WMI_HOST_ATTACH,
76 WMI_TARGET_IC_UPDATE_CMDID,
77 WMI_TGT_STATS_CMDID,
78 WMI_TX_AGGR_ENABLE_CMDID,
79 WMI_TGT_DETACH_CMDID,
80 WMI_TGT_TXQ_ENABLE_CMDID,
Vivek Natarajan21cb9872010-08-18 19:57:49 +0530[diff] [blame]81 WMI_AGGR_LIMIT_CMD = 0x0026,
Sujithfb9987d2010-03-17 14:25:25 +0530[diff] [blame]82};
83
84enum wmi_event_id {
85 WMI_TGT_RDY_EVENTID = 0x1001,
86 WMI_SWBA_EVENTID,
87 WMI_FATAL_EVENTID,
88 WMI_TXTO_EVENTID,
89 WMI_BMISS_EVENTID,
90 WMI_WLAN_TXCOMP_EVENTID,
91 WMI_DELBA_EVENTID,
92 WMI_TXRATE_EVENTID,
93};
94
Sujith4a22fe12010-04-16 11:53:53 +0530[diff] [blame]95#define MAX_CMD_NUMBER 62
96
97struct register_write {
Sujith7f1f5a02010-04-16 11:54:03 +0530[diff] [blame]98 __be32 reg;
99 __be32 val;
Sujith4a22fe12010-04-16 11:53:53 +0530[diff] [blame]100};
101
Sujithfb9987d2010-03-17 14:25:25 +0530[diff] [blame]102struct wmi {
103 struct ath9k_htc_priv *drv_priv;
104 struct htc_target *htc;
105 enum htc_endpoint_id ctrl_epid;
106 struct mutex op_mutex;
107 struct completion cmd_wait;
Sujith6ce34ec2010-04-16 11:54:01 +0530[diff] [blame]108 enum wmi_cmd_id last_cmd_id;
Sujithfb9987d2010-03-17 14:25:25 +0530[diff] [blame]109 u16 tx_seq_id;
110 u8 *cmd_rsp_buf;
111 u32 cmd_rsp_len;
112 bool stopped;
113
Sujith Manoharan1c165c92011-04-13 11:22:59 +0530[diff] [blame^]114 u64 tsf;
Rajkumar Manoharancc0de652010-09-14 13:07:28 +0530[diff] [blame]115 u8 beacon_pending;
Sujithfb9987d2010-03-17 14:25:25 +0530[diff] [blame]116 spinlock_t wmi_lock;
Sujith4a22fe12010-04-16 11:53:53 +0530[diff] [blame]117
118 atomic_t mwrite_cnt;
119 struct register_write multi_write[MAX_CMD_NUMBER];
120 u32 multi_write_idx;
121 struct mutex multi_write_mutex;
Sujithfb9987d2010-03-17 14:25:25 +0530[diff] [blame]122};
123
124struct wmi *ath9k_init_wmi(struct ath9k_htc_priv *priv);
125void ath9k_deinit_wmi(struct ath9k_htc_priv *priv);
126int ath9k_wmi_connect(struct htc_target *htc, struct wmi *wmi,
127 enum htc_endpoint_id *wmi_ctrl_epid);
128int ath9k_wmi_cmd(struct wmi *wmi, enum wmi_cmd_id cmd_id,
129 u8 *cmd_buf, u32 cmd_len,
130 u8 *rsp_buf, u32 rsp_len,
131 u32 timeout);
Sujith Manoharan73908672010-12-28 14:28:27 +0530[diff] [blame]132void ath9k_swba_tasklet(unsigned long data);
133void ath9k_fatal_work(struct work_struct *work);
Sujithfb9987d2010-03-17 14:25:25 +0530[diff] [blame]134
135#define WMI_CMD(_wmi_cmd) \
136 do { \
137 ret = ath9k_wmi_cmd(priv->wmi, _wmi_cmd, NULL, 0, \
138 (u8 *) &cmd_rsp, \
Sujithba443702010-04-23 10:28:18 +0530[diff] [blame]139 sizeof(cmd_rsp), HZ*2); \
Sujithfb9987d2010-03-17 14:25:25 +0530[diff] [blame]140 } while (0)
141
142#define WMI_CMD_BUF(_wmi_cmd, _buf) \
143 do { \
144 ret = ath9k_wmi_cmd(priv->wmi, _wmi_cmd, \
145 (u8 *) _buf, sizeof(*_buf), \
Sujithba443702010-04-23 10:28:18 +0530[diff] [blame]146 &cmd_rsp, sizeof(cmd_rsp), HZ*2); \
Sujithfb9987d2010-03-17 14:25:25 +0530[diff] [blame]147 } while (0)
148
149#endif /* WMI_H */