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Linus Torvalds1da177e2005-04-16 15:20:36 -07001 The MSI Driver Guide HOWTO
2 Tom L Nguyen tom.l.nguyen@intel.com
3 10/03/2003
4 Revised Feb 12, 2004 by Martine Silbermann
5 email: Martine.Silbermann@hp.com
6 Revised Jun 25, 2004 by Tom L Nguyen
Matthew Wilcoxc41ade22009-03-17 08:54:05 -04007 Revised Jul 9, 2008 by Matthew Wilcox <willy@linux.intel.com>
8 Copyright 2003, 2008 Intel Corporation
Linus Torvalds1da177e2005-04-16 15:20:36 -07009
101. About this guide
11
Matthew Wilcoxc41ade22009-03-17 08:54:05 -040012This guide describes the basics of Message Signaled Interrupts (MSIs),
13the advantages of using MSI over traditional interrupt mechanisms, how
14to change your driver to use MSI or MSI-X and some basic diagnostics to
15try if a device doesn't support MSIs.
Randy Dunlap2500e7a2005-11-07 01:01:03 -080016
Randy Dunlap2500e7a2005-11-07 01:01:03 -080017
Matthew Wilcoxc41ade22009-03-17 08:54:05 -0400182. What are MSIs?
Linus Torvalds1da177e2005-04-16 15:20:36 -070019
Matthew Wilcoxc41ade22009-03-17 08:54:05 -040020A Message Signaled Interrupt is a write from the device to a special
21address which causes an interrupt to be received by the CPU.
Linus Torvalds1da177e2005-04-16 15:20:36 -070022
Matthew Wilcoxc41ade22009-03-17 08:54:05 -040023The MSI capability was first specified in PCI 2.2 and was later enhanced
24in PCI 3.0 to allow each interrupt to be masked individually. The MSI-X
25capability was also introduced with PCI 3.0. It supports more interrupts
26per device than MSI and allows interrupts to be independently configured.
Linus Torvalds1da177e2005-04-16 15:20:36 -070027
Matthew Wilcoxc41ade22009-03-17 08:54:05 -040028Devices may support both MSI and MSI-X, but only one can be enabled at
29a time.
Linus Torvalds1da177e2005-04-16 15:20:36 -070030
Linus Torvalds1da177e2005-04-16 15:20:36 -070031
Matthew Wilcoxc41ade22009-03-17 08:54:05 -0400323. Why use MSIs?
Linus Torvalds1da177e2005-04-16 15:20:36 -070033
Matthew Wilcoxc41ade22009-03-17 08:54:05 -040034There are three reasons why using MSIs can give an advantage over
35traditional pin-based interrupts.
Linus Torvalds1da177e2005-04-16 15:20:36 -070036
Matthew Wilcoxc41ade22009-03-17 08:54:05 -040037Pin-based PCI interrupts are often shared amongst several devices.
38To support this, the kernel must call each interrupt handler associated
39with an interrupt, which leads to reduced performance for the system as
40a whole. MSIs are never shared, so this problem cannot arise.
Linus Torvalds1da177e2005-04-16 15:20:36 -070041
Matthew Wilcoxc41ade22009-03-17 08:54:05 -040042When a device writes data to memory, then raises a pin-based interrupt,
43it is possible that the interrupt may arrive before all the data has
44arrived in memory (this becomes more likely with devices behind PCI-PCI
45bridges). In order to ensure that all the data has arrived in memory,
46the interrupt handler must read a register on the device which raised
47the interrupt. PCI transaction ordering rules require that all the data
48arrives in memory before the value can be returned from the register.
49Using MSIs avoids this problem as the interrupt-generating write cannot
50pass the data writes, so by the time the interrupt is raised, the driver
51knows that all the data has arrived in memory.
Linus Torvalds1da177e2005-04-16 15:20:36 -070052
Matthew Wilcoxc41ade22009-03-17 08:54:05 -040053PCI devices can only support a single pin-based interrupt per function.
54Often drivers have to query the device to find out what event has
55occurred, slowing down interrupt handling for the common case. With
56MSIs, a device can support more interrupts, allowing each interrupt
57to be specialised to a different purpose. One possible design gives
58infrequent conditions (such as errors) their own interrupt which allows
59the driver to handle the normal interrupt handling path more efficiently.
60Other possible designs include giving one interrupt to each packet queue
61in a network card or each port in a storage controller.
Linus Torvalds1da177e2005-04-16 15:20:36 -070062
Linus Torvalds1da177e2005-04-16 15:20:36 -070063
Matthew Wilcoxc41ade22009-03-17 08:54:05 -0400644. How to use MSIs
Linus Torvalds1da177e2005-04-16 15:20:36 -070065
Matthew Wilcoxc41ade22009-03-17 08:54:05 -040066PCI devices are initialised to use pin-based interrupts. The device
67driver has to set up the device to use MSI or MSI-X. Not all machines
68support MSIs correctly, and for those machines, the APIs described below
69will simply fail and the device will continue to use pin-based interrupts.
Linus Torvalds1da177e2005-04-16 15:20:36 -070070
Matthew Wilcoxc41ade22009-03-17 08:54:05 -0400714.1 Include kernel support for MSIs
Linus Torvalds1da177e2005-04-16 15:20:36 -070072
Matthew Wilcoxc41ade22009-03-17 08:54:05 -040073To support MSI or MSI-X, the kernel must be built with the CONFIG_PCI_MSI
74option enabled. This option is only available on some architectures,
75and it may depend on some other options also being set. For example,
76on x86, you must also enable X86_UP_APIC or SMP in order to see the
77CONFIG_PCI_MSI option.
Linus Torvalds1da177e2005-04-16 15:20:36 -070078
Matthew Wilcoxc41ade22009-03-17 08:54:05 -0400794.2 Using MSI
Linus Torvalds1da177e2005-04-16 15:20:36 -070080
Matthew Wilcoxc41ade22009-03-17 08:54:05 -040081Most of the hard work is done for the driver in the PCI layer. It simply
82has to request that the PCI layer set up the MSI capability for this
83device.
Linus Torvalds1da177e2005-04-16 15:20:36 -070084
Matthew Wilcoxc41ade22009-03-17 08:54:05 -0400854.2.1 pci_enable_msi
Linus Torvalds1da177e2005-04-16 15:20:36 -070086
87int pci_enable_msi(struct pci_dev *dev)
88
Matthew Wilcoxc41ade22009-03-17 08:54:05 -040089A successful call will allocate ONE interrupt to the device, regardless
90of how many MSIs the device supports. The device will be switched from
91pin-based interrupt mode to MSI mode. The dev->irq number is changed
92to a new number which represents the message signaled interrupt.
93This function should be called before the driver calls request_irq()
94since enabling MSIs disables the pin-based IRQ and the driver will not
95receive interrupts on the old interrupt.
Linus Torvalds1da177e2005-04-16 15:20:36 -070096
Matthew Wilcox1c8d7b02009-03-17 08:54:10 -0400974.2.2 pci_enable_msi_block
98
99int pci_enable_msi_block(struct pci_dev *dev, int count)
100
101This variation on the above call allows a device driver to request multiple
102MSIs. The MSI specification only allows interrupts to be allocated in
103powers of two, up to a maximum of 2^5 (32).
104
105If this function returns 0, it has succeeded in allocating at least as many
106interrupts as the driver requested (it may have allocated more in order
107to satisfy the power-of-two requirement). In this case, the function
108enables MSI on this device and updates dev->irq to be the lowest of
109the new interrupts assigned to it. The other interrupts assigned to
110the device are in the range dev->irq to dev->irq + count - 1.
111
112If this function returns a negative number, it indicates an error and
113the driver should not attempt to request any more MSI interrupts for
114this device. If this function returns a positive number, it will be
115less than 'count' and indicate the number of interrupts that could have
116been allocated. In neither case will the irq value have been
117updated, nor will the device have been switched into MSI mode.
118
119The device driver must decide what action to take if
120pci_enable_msi_block() returns a value less than the number asked for.
121Some devices can make use of fewer interrupts than the maximum they
122request; in this case the driver should call pci_enable_msi_block()
123again. Note that it is not guaranteed to succeed, even when the
124'count' has been reduced to the value returned from a previous call to
125pci_enable_msi_block(). This is because there are multiple constraints
126on the number of vectors that can be allocated; pci_enable_msi_block()
127will return as soon as it finds any constraint that doesn't allow the
128call to succeed.
129
1304.2.3 pci_disable_msi
Linus Torvalds1da177e2005-04-16 15:20:36 -0700131
132void pci_disable_msi(struct pci_dev *dev)
133
Matthew Wilcox1c8d7b02009-03-17 08:54:10 -0400134This function should be used to undo the effect of pci_enable_msi() or
135pci_enable_msi_block(). Calling it restores dev->irq to the pin-based
136interrupt number and frees the previously allocated message signaled
137interrupt(s). The interrupt may subsequently be assigned to another
138device, so drivers should not cache the value of dev->irq.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700139
Matthew Wilcoxc41ade22009-03-17 08:54:05 -0400140A device driver must always call free_irq() on the interrupt(s)
141for which it has called request_irq() before calling this function.
142Failure to do so will result in a BUG_ON(), the device will be left with
143MSI enabled and will leak its vector.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700144
Matthew Wilcoxc41ade22009-03-17 08:54:05 -04001454.3 Using MSI-X
Linus Torvalds1da177e2005-04-16 15:20:36 -0700146
Matthew Wilcoxc41ade22009-03-17 08:54:05 -0400147The MSI-X capability is much more flexible than the MSI capability.
148It supports up to 2048 interrupts, each of which can be controlled
149independently. To support this flexibility, drivers must use an array of
150`struct msix_entry':
Linus Torvalds1da177e2005-04-16 15:20:36 -0700151
152struct msix_entry {
153 u16 vector; /* kernel uses to write alloc vector */
154 u16 entry; /* driver uses to specify entry */
155};
156
Matthew Wilcoxc41ade22009-03-17 08:54:05 -0400157This allows for the device to use these interrupts in a sparse fashion;
158for example it could use interrupts 3 and 1027 and allocate only a
159two-element array. The driver is expected to fill in the 'entry' value
160in each element of the array to indicate which entries it wants the kernel
161to assign interrupts for. It is invalid to fill in two entries with the
162same number.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700163
Matthew Wilcoxc41ade22009-03-17 08:54:05 -04001644.3.1 pci_enable_msix
Linus Torvalds1da177e2005-04-16 15:20:36 -0700165
Matthew Wilcoxc41ade22009-03-17 08:54:05 -0400166int pci_enable_msix(struct pci_dev *dev, struct msix_entry *entries, int nvec)
167
168Calling this function asks the PCI subsystem to allocate 'nvec' MSIs.
169The 'entries' argument is a pointer to an array of msix_entry structs
170which should be at least 'nvec' entries in size. On success, the
171function will return 0 and the device will have been switched into
172MSI-X interrupt mode. The 'vector' elements in each entry will have
173been filled in with the interrupt number. The driver should then call
174request_irq() for each 'vector' that it decides to use.
175
176If this function returns a negative number, it indicates an error and
177the driver should not attempt to allocate any more MSI-X interrupts for
178this device. If it returns a positive number, it indicates the maximum
179number of interrupt vectors that could have been allocated.
180
181This function, in contrast with pci_enable_msi(), does not adjust
182dev->irq. The device will not generate interrupts for this interrupt
183number once MSI-X is enabled. The device driver is responsible for
184keeping track of the interrupts assigned to the MSI-X vectors so it can
185free them again later.
186
187Device drivers should normally call this function once per device
188during the initialization phase.
189
1904.3.2 pci_disable_msix
Linus Torvalds1da177e2005-04-16 15:20:36 -0700191
192void pci_disable_msix(struct pci_dev *dev)
193
Matthew Wilcoxc41ade22009-03-17 08:54:05 -0400194This API should be used to undo the effect of pci_enable_msix(). It frees
195the previously allocated message signaled interrupts. The interrupts may
196subsequently be assigned to another device, so drivers should not cache
197the value of the 'vector' elements over a call to pci_disable_msix().
Linus Torvalds1da177e2005-04-16 15:20:36 -0700198
Matthew Wilcoxc41ade22009-03-17 08:54:05 -0400199A device driver must always call free_irq() on the interrupt(s)
200for which it has called request_irq() before calling this function.
201Failure to do so will result in a BUG_ON(), the device will be left with
202MSI enabled and will leak its vector.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700203
Matthew Wilcoxc41ade22009-03-17 08:54:05 -04002044.3.3 The MSI-X Table
Linus Torvalds1da177e2005-04-16 15:20:36 -0700205
Matthew Wilcoxc41ade22009-03-17 08:54:05 -0400206The MSI-X capability specifies a BAR and offset within that BAR for the
207MSI-X Table. This address is mapped by the PCI subsystem, and should not
208be accessed directly by the device driver. If the driver wishes to
209mask or unmask an interrupt, it should call disable_irq() / enable_irq().
Linus Torvalds1da177e2005-04-16 15:20:36 -0700210
Matthew Wilcoxc41ade22009-03-17 08:54:05 -04002114.4 Handling devices implementing both MSI and MSI-X capabilities
Linus Torvalds1da177e2005-04-16 15:20:36 -0700212
Matthew Wilcoxc41ade22009-03-17 08:54:05 -0400213If a device implements both MSI and MSI-X capabilities, it can
214run in either MSI mode or MSI-X mode but not both simultaneously.
215This is a requirement of the PCI spec, and it is enforced by the
216PCI layer. Calling pci_enable_msi() when MSI-X is already enabled or
217pci_enable_msix() when MSI is already enabled will result in an error.
218If a device driver wishes to switch between MSI and MSI-X at runtime,
219it must first quiesce the device, then switch it back to pin-interrupt
220mode, before calling pci_enable_msi() or pci_enable_msix() and resuming
221operation. This is not expected to be a common operation but may be
222useful for debugging or testing during development.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700223
Matthew Wilcoxc41ade22009-03-17 08:54:05 -04002244.5 Considerations when using MSIs
Linus Torvalds1da177e2005-04-16 15:20:36 -0700225
Matthew Wilcoxc41ade22009-03-17 08:54:05 -04002264.5.1 Choosing between MSI-X and MSI
Linus Torvalds1da177e2005-04-16 15:20:36 -0700227
Matthew Wilcoxc41ade22009-03-17 08:54:05 -0400228If your device supports both MSI-X and MSI capabilities, you should use
229the MSI-X facilities in preference to the MSI facilities. As mentioned
230above, MSI-X supports any number of interrupts between 1 and 2048.
231In constrast, MSI is restricted to a maximum of 32 interrupts (and
232must be a power of two). In addition, the MSI interrupt vectors must
233be allocated consecutively, so the system may not be able to allocate
234as many vectors for MSI as it could for MSI-X. On some platforms, MSI
235interrupts must all be targetted at the same set of CPUs whereas MSI-X
236interrupts can all be targetted at different CPUs.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700237
Matthew Wilcoxc41ade22009-03-17 08:54:05 -04002384.5.2 Spinlocks
Linus Torvalds1da177e2005-04-16 15:20:36 -0700239
Matthew Wilcoxc41ade22009-03-17 08:54:05 -0400240Most device drivers have a per-device spinlock which is taken in the
241interrupt handler. With pin-based interrupts or a single MSI, it is not
242necessary to disable interrupts (Linux guarantees the same interrupt will
243not be re-entered). If a device uses multiple interrupts, the driver
244must disable interrupts while the lock is held. If the device sends
245a different interrupt, the driver will deadlock trying to recursively
246acquire the spinlock.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700247
Matthew Wilcoxc41ade22009-03-17 08:54:05 -0400248There are two solutions. The first is to take the lock with
249spin_lock_irqsave() or spin_lock_irq() (see
250Documentation/DocBook/kernel-locking). The second is to specify
251IRQF_DISABLED to request_irq() so that the kernel runs the entire
252interrupt routine with interrupts disabled.
Randy Dunlap2500e7a2005-11-07 01:01:03 -0800253
Matthew Wilcoxc41ade22009-03-17 08:54:05 -0400254If your MSI interrupt routine does not hold the lock for the whole time
255it is running, the first solution may be best. The second solution is
256normally preferred as it avoids making two transitions from interrupt
257disabled to enabled and back again.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700258
Matthew Wilcoxc41ade22009-03-17 08:54:05 -04002594.6 How to tell whether MSI/MSI-X is enabled on a device
Randy Dunlap2500e7a2005-11-07 01:01:03 -0800260
Matthew Wilcoxc41ade22009-03-17 08:54:05 -0400261Using 'lspci -v' (as root) may show some devices with "MSI", "Message
262Signalled Interrupts" or "MSI-X" capabilities. Each of these capabilities
263has an 'Enable' flag which will be followed with either "+" (enabled)
264or "-" (disabled).
Linus Torvalds1da177e2005-04-16 15:20:36 -0700265
Linus Torvalds1da177e2005-04-16 15:20:36 -0700266
Matthew Wilcoxc41ade22009-03-17 08:54:05 -04002675. MSI quirks
Linus Torvalds1da177e2005-04-16 15:20:36 -0700268
Matthew Wilcoxc41ade22009-03-17 08:54:05 -0400269Several PCI chipsets or devices are known not to support MSIs.
270The PCI stack provides three ways to disable MSIs:
Randy Dunlap2500e7a2005-11-07 01:01:03 -0800271
Matthew Wilcoxc41ade22009-03-17 08:54:05 -04002721. globally
2732. on all devices behind a specific bridge
2743. on a single device
Linus Torvalds1da177e2005-04-16 15:20:36 -0700275
Matthew Wilcoxc41ade22009-03-17 08:54:05 -04002765.1. Disabling MSIs globally
Linus Torvalds1da177e2005-04-16 15:20:36 -0700277
Matthew Wilcoxc41ade22009-03-17 08:54:05 -0400278Some host chipsets simply don't support MSIs properly. If we're
279lucky, the manufacturer knows this and has indicated it in the ACPI
280FADT table. In this case, Linux will automatically disable MSIs.
281Some boards don't include this information in the table and so we have
282to detect them ourselves. The complete list of these is found near the
283quirk_disable_all_msi() function in drivers/pci/quirks.c.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700284
Matthew Wilcoxc41ade22009-03-17 08:54:05 -0400285If you have a board which has problems with MSIs, you can pass pci=nomsi
286on the kernel command line to disable MSIs on all devices. It would be
287in your best interests to report the problem to linux-pci@vger.kernel.org
288including a full 'lspci -v' so we can add the quirks to the kernel.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700289
Matthew Wilcoxc41ade22009-03-17 08:54:05 -04002905.2. Disabling MSIs below a bridge
Linus Torvalds1da177e2005-04-16 15:20:36 -0700291
Matthew Wilcoxc41ade22009-03-17 08:54:05 -0400292Some PCI bridges are not able to route MSIs between busses properly.
293In this case, MSIs must be disabled on all devices behind the bridge.
Brice Goglin0cc2b372006-10-05 10:24:42 +0200294
Matthew Wilcoxc41ade22009-03-17 08:54:05 -0400295Some bridges allow you to enable MSIs by changing some bits in their
296PCI configuration space (especially the Hypertransport chipsets such
297as the nVidia nForce and Serverworks HT2000). As with host chipsets,
298Linux mostly knows about them and automatically enables MSIs if it can.
299If you have a bridge which Linux doesn't yet know about, you can enable
300MSIs in configuration space using whatever method you know works, then
301enable MSIs on that bridge by doing:
Brice Goglin0cc2b372006-10-05 10:24:42 +0200302
Matthew Wilcoxc41ade22009-03-17 08:54:05 -0400303 echo 1 > /sys/bus/pci/devices/$bridge/msi_bus
Brice Goglin0cc2b372006-10-05 10:24:42 +0200304
Matthew Wilcoxc41ade22009-03-17 08:54:05 -0400305where $bridge is the PCI address of the bridge you've enabled (eg
3060000:00:0e.0).
Brice Goglin0cc2b372006-10-05 10:24:42 +0200307
Matthew Wilcoxc41ade22009-03-17 08:54:05 -0400308To disable MSIs, echo 0 instead of 1. Changing this value should be
309done with caution as it can break interrupt handling for all devices
310below this bridge.
Brice Goglin0cc2b372006-10-05 10:24:42 +0200311
Matthew Wilcoxc41ade22009-03-17 08:54:05 -0400312Again, please notify linux-pci@vger.kernel.org of any bridges that need
313special handling.
Brice Goglin0cc2b372006-10-05 10:24:42 +0200314
Matthew Wilcoxc41ade22009-03-17 08:54:05 -04003155.3. Disabling MSIs on a single device
Brice Goglin0cc2b372006-10-05 10:24:42 +0200316
Matthew Wilcoxc41ade22009-03-17 08:54:05 -0400317Some devices are known to have faulty MSI implementations. Usually this
318is handled in the individual device driver but occasionally it's necessary
319to handle this with a quirk. Some drivers have an option to disable use
320of MSI. While this is a convenient workaround for the driver author,
321it is not good practise, and should not be emulated.
Brice Goglin0cc2b372006-10-05 10:24:42 +0200322
Matthew Wilcoxc41ade22009-03-17 08:54:05 -04003235.4. Finding why MSIs are disabled on a device
Brice Goglin0cc2b372006-10-05 10:24:42 +0200324
Matthew Wilcoxc41ade22009-03-17 08:54:05 -0400325From the above three sections, you can see that there are many reasons
326why MSIs may not be enabled for a given device. Your first step should
327be to examine your dmesg carefully to determine whether MSIs are enabled
328for your machine. You should also check your .config to be sure you
329have enabled CONFIG_PCI_MSI.
Brice Goglin0cc2b372006-10-05 10:24:42 +0200330
Matthew Wilcoxc41ade22009-03-17 08:54:05 -0400331Then, 'lspci -t' gives the list of bridges above a device. Reading
332/sys/bus/pci/devices/*/msi_bus will tell you whether MSI are enabled (1)
333or disabled (0). If 0 is found in any of the msi_bus files belonging
334to bridges between the PCI root and the device, MSIs are disabled.
Brice Goglin0cc2b372006-10-05 10:24:42 +0200335
Matthew Wilcoxc41ade22009-03-17 08:54:05 -0400336It is also worth checking the device driver to see whether it supports MSIs.
337For example, it may contain calls to pci_enable_msi(), pci_enable_msix() or
338pci_enable_msi_block().