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Changhwan Youn2b12b5c2010-07-26 21:08:52 +09001/* linux/arch/arm/mach-s5pv310/cpu.c
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9*/
10
11#include <linux/sched.h>
12#include <linux/sysdev.h>
13
14#include <asm/mach/map.h>
15#include <asm/mach/irq.h>
16
17#include <asm/proc-fns.h>
Kyungmin Park1cf0eb72010-10-21 15:22:36 +090018#include <asm/hardware/cache-l2x0.h>
Changhwan Youn2b12b5c2010-07-26 21:08:52 +090019
20#include <plat/cpu.h>
21#include <plat/clock.h>
22#include <plat/s5pv310.h>
Hyuk Lee1036c3a2010-10-05 19:07:41 +090023#include <plat/sdhci.h>
Changhwan Youn2b12b5c2010-07-26 21:08:52 +090024
25#include <mach/regs-irq.h>
26
27void __iomem *gic_cpu_base_addr;
28
29extern int combiner_init(unsigned int combiner_nr, void __iomem *base,
30 unsigned int irq_start);
31extern void combiner_cascade_irq(unsigned int combiner_nr, unsigned int irq);
32
33/* Initial IO mappings */
34static struct map_desc s5pv310_iodesc[] __initdata = {
35 {
Changhwan Youn766211e2010-08-27 17:57:44 +090036 .virtual = (unsigned long)S5P_VA_SYSRAM,
37 .pfn = __phys_to_pfn(S5PV310_PA_SYSRAM),
38 .length = SZ_4K,
39 .type = MT_DEVICE,
40 }, {
Kukjin Kimc598c472010-08-18 21:45:49 +090041 .virtual = (unsigned long)S5P_VA_CMU,
42 .pfn = __phys_to_pfn(S5PV310_PA_CMU),
43 .length = SZ_128K,
44 .type = MT_DEVICE,
Kukjin Kim19a2c062010-08-31 16:30:51 +090045 }, {
46 .virtual = (unsigned long)S5P_VA_COMBINER_BASE,
47 .pfn = __phys_to_pfn(S5PV310_PA_COMBINER),
48 .length = SZ_4K,
49 .type = MT_DEVICE,
50 }, {
51 .virtual = (unsigned long)S5P_VA_COREPERI_BASE,
52 .pfn = __phys_to_pfn(S5PV310_PA_COREPERI),
53 .length = SZ_8K,
54 .type = MT_DEVICE,
55 }, {
56 .virtual = (unsigned long)S5P_VA_L2CC,
57 .pfn = __phys_to_pfn(S5PV310_PA_L2CC),
58 .length = SZ_4K,
59 .type = MT_DEVICE,
60 }, {
Jongpill Lee37ea63b2010-10-14 15:46:18 +090061 .virtual = (unsigned long)S5P_VA_GPIO1,
Kukjin Kimfe0cdec2010-09-09 21:57:29 +090062 .pfn = __phys_to_pfn(S5PV310_PA_GPIO1),
Kukjin Kim19a2c062010-08-31 16:30:51 +090063 .length = SZ_4K,
64 .type = MT_DEVICE,
65 }, {
Jongpill Lee37ea63b2010-10-14 15:46:18 +090066 .virtual = (unsigned long)S5P_VA_GPIO2,
67 .pfn = __phys_to_pfn(S5PV310_PA_GPIO2),
68 .length = SZ_4K,
69 .type = MT_DEVICE,
70 }, {
71 .virtual = (unsigned long)S5P_VA_GPIO3,
72 .pfn = __phys_to_pfn(S5PV310_PA_GPIO3),
73 .length = SZ_256,
74 .type = MT_DEVICE,
75 }, {
Kukjin Kim19a2c062010-08-31 16:30:51 +090076 .virtual = (unsigned long)S3C_VA_UART,
77 .pfn = __phys_to_pfn(S3C_PA_UART),
78 .length = SZ_512K,
79 .type = MT_DEVICE,
Changhwan Youn766211e2010-08-27 17:57:44 +090080 },
Changhwan Youn2b12b5c2010-07-26 21:08:52 +090081};
82
83static void s5pv310_idle(void)
84{
85 if (!need_resched())
86 cpu_do_idle();
87
88 local_irq_enable();
89}
90
91/* s5pv310_map_io
92 *
93 * register the standard cpu IO areas
94*/
95void __init s5pv310_map_io(void)
96{
97 iotable_init(s5pv310_iodesc, ARRAY_SIZE(s5pv310_iodesc));
Hyuk Lee1036c3a2010-10-05 19:07:41 +090098
99 /* initialize device information early */
100 s5pv310_default_sdhci0();
101 s5pv310_default_sdhci1();
102 s5pv310_default_sdhci2();
103 s5pv310_default_sdhci3();
Changhwan Youn2b12b5c2010-07-26 21:08:52 +0900104}
105
106void __init s5pv310_init_clocks(int xtal)
107{
108 printk(KERN_DEBUG "%s: initializing clocks\n", __func__);
109
110 s3c24xx_register_baseclocks(xtal);
111 s5p_register_clocks(xtal);
112 s5pv310_register_clocks();
113 s5pv310_setup_clocks();
114}
115
116void __init s5pv310_init_irq(void)
117{
118 int irq;
119
120 gic_cpu_base_addr = S5P_VA_GIC_CPU;
121 gic_dist_init(0, S5P_VA_GIC_DIST, IRQ_LOCALTIMER);
122 gic_cpu_init(0, S5P_VA_GIC_CPU);
123
124 for (irq = 0; irq < MAX_COMBINER_NR; irq++) {
125 combiner_init(irq, (void __iomem *)S5P_VA_COMBINER(irq),
126 COMBINER_IRQ(irq, 0));
127 combiner_cascade_irq(irq, IRQ_SPI(irq));
128 }
129
130 /* The parameters of s5p_init_irq() are for VIC init.
131 * Theses parameters should be NULL and 0 because S5PV310
132 * uses GIC instead of VIC.
133 */
134 s5p_init_irq(NULL, 0);
135}
136
137struct sysdev_class s5pv310_sysclass = {
138 .name = "s5pv310-core",
139};
140
141static struct sys_device s5pv310_sysdev = {
142 .cls = &s5pv310_sysclass,
143};
144
145static int __init s5pv310_core_init(void)
146{
147 return sysdev_class_register(&s5pv310_sysclass);
148}
149
150core_initcall(s5pv310_core_init);
151
Kyungmin Park1cf0eb72010-10-21 15:22:36 +0900152#ifdef CONFIG_CACHE_L2X0
153static int __init s5pv310_l2x0_cache_init(void)
154{
155 /* TAG, Data Latency Control: 2cycle */
156 __raw_writel(0x110, S5P_VA_L2CC + L2X0_TAG_LATENCY_CTRL);
157 __raw_writel(0x110, S5P_VA_L2CC + L2X0_DATA_LATENCY_CTRL);
158
159 /* L2X0 Prefetch Control */
160 __raw_writel(0x30000007, S5P_VA_L2CC + L2X0_PREFETCH_CTRL);
161
162 /* L2X0 Power Control */
163 __raw_writel(L2X0_DYNAMIC_CLK_GATING_EN | L2X0_STNDBY_MODE_EN,
164 S5P_VA_L2CC + L2X0_POWER_CTRL);
165
166 l2x0_init(S5P_VA_L2CC, 0x7C070001, 0xC200ffff);
167
168 return 0;
169}
170
171early_initcall(s5pv310_l2x0_cache_init);
172#endif
173
Changhwan Youn2b12b5c2010-07-26 21:08:52 +0900174int __init s5pv310_init(void)
175{
176 printk(KERN_INFO "S5PV310: Initializing architecture\n");
177
178 /* set idle function */
179 pm_idle = s5pv310_idle;
180
181 return sysdev_register(&s5pv310_sysdev);
182}