Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame^] | 1 | /** |
| 2 | * \file ati_pcigart.h |
| 3 | * ATI PCI GART support |
| 4 | * |
| 5 | * \author Gareth Hughes <gareth@valinux.com> |
| 6 | */ |
| 7 | |
| 8 | /* |
| 9 | * Created: Wed Dec 13 21:52:19 2000 by gareth@valinux.com |
| 10 | * |
| 11 | * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California. |
| 12 | * All Rights Reserved. |
| 13 | * |
| 14 | * Permission is hereby granted, free of charge, to any person obtaining a |
| 15 | * copy of this software and associated documentation files (the "Software"), |
| 16 | * to deal in the Software without restriction, including without limitation |
| 17 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
| 18 | * and/or sell copies of the Software, and to permit persons to whom the |
| 19 | * Software is furnished to do so, subject to the following conditions: |
| 20 | * |
| 21 | * The above copyright notice and this permission notice (including the next |
| 22 | * paragraph) shall be included in all copies or substantial portions of the |
| 23 | * Software. |
| 24 | * |
| 25 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 26 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 27 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
| 28 | * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR |
| 29 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, |
| 30 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER |
| 31 | * DEALINGS IN THE SOFTWARE. |
| 32 | */ |
| 33 | |
| 34 | #include "drmP.h" |
| 35 | |
| 36 | #if PAGE_SIZE == 65536 |
| 37 | # define ATI_PCIGART_TABLE_ORDER 0 |
| 38 | # define ATI_PCIGART_TABLE_PAGES (1 << 0) |
| 39 | #elif PAGE_SIZE == 16384 |
| 40 | # define ATI_PCIGART_TABLE_ORDER 1 |
| 41 | # define ATI_PCIGART_TABLE_PAGES (1 << 1) |
| 42 | #elif PAGE_SIZE == 8192 |
| 43 | # define ATI_PCIGART_TABLE_ORDER 2 |
| 44 | # define ATI_PCIGART_TABLE_PAGES (1 << 2) |
| 45 | #elif PAGE_SIZE == 4096 |
| 46 | # define ATI_PCIGART_TABLE_ORDER 3 |
| 47 | # define ATI_PCIGART_TABLE_PAGES (1 << 3) |
| 48 | #else |
| 49 | # error - PAGE_SIZE not 64K, 16K, 8K or 4K |
| 50 | #endif |
| 51 | |
| 52 | # define ATI_MAX_PCIGART_PAGES 8192 /**< 32 MB aperture, 4K pages */ |
| 53 | # define ATI_PCIGART_PAGE_SIZE 4096 /**< PCI GART page size */ |
| 54 | |
| 55 | unsigned long drm_ati_alloc_pcigart_table( void ) |
| 56 | { |
| 57 | unsigned long address; |
| 58 | struct page *page; |
| 59 | int i; |
| 60 | DRM_DEBUG( "%s\n", __FUNCTION__ ); |
| 61 | |
| 62 | address = __get_free_pages( GFP_KERNEL, ATI_PCIGART_TABLE_ORDER ); |
| 63 | if ( address == 0UL ) { |
| 64 | return 0; |
| 65 | } |
| 66 | |
| 67 | page = virt_to_page( address ); |
| 68 | |
| 69 | for ( i = 0 ; i < ATI_PCIGART_TABLE_PAGES ; i++, page++ ) { |
| 70 | get_page(page); |
| 71 | SetPageReserved( page ); |
| 72 | } |
| 73 | |
| 74 | DRM_DEBUG( "%s: returning 0x%08lx\n", __FUNCTION__, address ); |
| 75 | return address; |
| 76 | } |
| 77 | |
| 78 | static void drm_ati_free_pcigart_table( unsigned long address ) |
| 79 | { |
| 80 | struct page *page; |
| 81 | int i; |
| 82 | DRM_DEBUG( "%s\n", __FUNCTION__ ); |
| 83 | |
| 84 | page = virt_to_page( address ); |
| 85 | |
| 86 | for ( i = 0 ; i < ATI_PCIGART_TABLE_PAGES ; i++, page++ ) { |
| 87 | __put_page(page); |
| 88 | ClearPageReserved( page ); |
| 89 | } |
| 90 | |
| 91 | free_pages( address, ATI_PCIGART_TABLE_ORDER ); |
| 92 | } |
| 93 | |
| 94 | int drm_ati_pcigart_cleanup( drm_device_t *dev, |
| 95 | unsigned long addr, |
| 96 | dma_addr_t bus_addr) |
| 97 | { |
| 98 | drm_sg_mem_t *entry = dev->sg; |
| 99 | unsigned long pages; |
| 100 | int i; |
| 101 | |
| 102 | /* we need to support large memory configurations */ |
| 103 | if ( !entry ) { |
| 104 | DRM_ERROR( "no scatter/gather memory!\n" ); |
| 105 | return 0; |
| 106 | } |
| 107 | |
| 108 | if ( bus_addr ) { |
| 109 | pci_unmap_single(dev->pdev, bus_addr, |
| 110 | ATI_PCIGART_TABLE_PAGES * PAGE_SIZE, |
| 111 | PCI_DMA_TODEVICE); |
| 112 | |
| 113 | pages = ( entry->pages <= ATI_MAX_PCIGART_PAGES ) |
| 114 | ? entry->pages : ATI_MAX_PCIGART_PAGES; |
| 115 | |
| 116 | for ( i = 0 ; i < pages ; i++ ) { |
| 117 | if ( !entry->busaddr[i] ) break; |
| 118 | pci_unmap_single(dev->pdev, entry->busaddr[i], |
| 119 | PAGE_SIZE, PCI_DMA_TODEVICE); |
| 120 | } |
| 121 | } |
| 122 | |
| 123 | if ( addr ) { |
| 124 | drm_ati_free_pcigart_table( addr ); |
| 125 | } |
| 126 | |
| 127 | return 1; |
| 128 | } |
| 129 | EXPORT_SYMBOL(drm_ati_pcigart_cleanup); |
| 130 | |
| 131 | int drm_ati_pcigart_init( drm_device_t *dev, |
| 132 | unsigned long *addr, |
| 133 | dma_addr_t *bus_addr) |
| 134 | { |
| 135 | drm_sg_mem_t *entry = dev->sg; |
| 136 | unsigned long address = 0; |
| 137 | unsigned long pages; |
| 138 | u32 *pci_gart, page_base, bus_address = 0; |
| 139 | int i, j, ret = 0; |
| 140 | |
| 141 | if ( !entry ) { |
| 142 | DRM_ERROR( "no scatter/gather memory!\n" ); |
| 143 | goto done; |
| 144 | } |
| 145 | |
| 146 | address = drm_ati_alloc_pcigart_table(); |
| 147 | if ( !address ) { |
| 148 | DRM_ERROR( "cannot allocate PCI GART page!\n" ); |
| 149 | goto done; |
| 150 | } |
| 151 | |
| 152 | if ( !dev->pdev ) { |
| 153 | DRM_ERROR( "PCI device unknown!\n" ); |
| 154 | goto done; |
| 155 | } |
| 156 | |
| 157 | bus_address = pci_map_single(dev->pdev, (void *)address, |
| 158 | ATI_PCIGART_TABLE_PAGES * PAGE_SIZE, |
| 159 | PCI_DMA_TODEVICE); |
| 160 | if (bus_address == 0) { |
| 161 | DRM_ERROR( "unable to map PCIGART pages!\n" ); |
| 162 | drm_ati_free_pcigart_table( address ); |
| 163 | address = 0; |
| 164 | goto done; |
| 165 | } |
| 166 | |
| 167 | pci_gart = (u32 *)address; |
| 168 | |
| 169 | pages = ( entry->pages <= ATI_MAX_PCIGART_PAGES ) |
| 170 | ? entry->pages : ATI_MAX_PCIGART_PAGES; |
| 171 | |
| 172 | memset( pci_gart, 0, ATI_MAX_PCIGART_PAGES * sizeof(u32) ); |
| 173 | |
| 174 | for ( i = 0 ; i < pages ; i++ ) { |
| 175 | /* we need to support large memory configurations */ |
| 176 | entry->busaddr[i] = pci_map_single(dev->pdev, |
| 177 | page_address( entry->pagelist[i] ), |
| 178 | PAGE_SIZE, |
| 179 | PCI_DMA_TODEVICE); |
| 180 | if (entry->busaddr[i] == 0) { |
| 181 | DRM_ERROR( "unable to map PCIGART pages!\n" ); |
| 182 | drm_ati_pcigart_cleanup( dev, address, bus_address ); |
| 183 | address = 0; |
| 184 | bus_address = 0; |
| 185 | goto done; |
| 186 | } |
| 187 | page_base = (u32) entry->busaddr[i]; |
| 188 | |
| 189 | for (j = 0; j < (PAGE_SIZE / ATI_PCIGART_PAGE_SIZE); j++) { |
| 190 | *pci_gart++ = cpu_to_le32( page_base ); |
| 191 | page_base += ATI_PCIGART_PAGE_SIZE; |
| 192 | } |
| 193 | } |
| 194 | |
| 195 | ret = 1; |
| 196 | |
| 197 | #if defined(__i386__) || defined(__x86_64__) |
| 198 | wbinvd(); |
| 199 | #else |
| 200 | mb(); |
| 201 | #endif |
| 202 | |
| 203 | done: |
| 204 | *addr = address; |
| 205 | *bus_addr = bus_address; |
| 206 | return ret; |
| 207 | } |
| 208 | EXPORT_SYMBOL(drm_ati_pcigart_init); |