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Ben Hutchingsafd4aea2009-11-29 15:15:25 +00001/****************************************************************************
Ben Hutchingsf7a6d2c2013-08-29 23:32:48 +01002 * Driver for Solarflare network controllers and boards
3 * Copyright 2008-2013 Solarflare Communications Inc.
Ben Hutchingsafd4aea2009-11-29 15:15:25 +00004 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 as published
7 * by the Free Software Foundation, incorporated herein by reference.
8 */
9
10#include <linux/delay.h>
Ben Hutchings251111d2013-08-27 23:04:29 +010011#include <asm/cmpxchg.h>
Ben Hutchingsafd4aea2009-11-29 15:15:25 +000012#include "net_driver.h"
13#include "nic.h"
14#include "io.h"
Ben Hutchings8b8a95a2012-09-18 01:57:07 +010015#include "farch_regs.h"
Ben Hutchingsafd4aea2009-11-29 15:15:25 +000016#include "mcdi_pcol.h"
17#include "phy.h"
18
19/**************************************************************************
20 *
21 * Management-Controller-to-Driver Interface
22 *
23 **************************************************************************
24 */
25
Ben Hutchingsebf98e72012-12-01 02:21:17 +000026#define MCDI_RPC_TIMEOUT (10 * HZ)
Ben Hutchingsafd4aea2009-11-29 15:15:25 +000027
Ben Hutchings3f713bf2011-12-20 23:39:31 +000028/* A reboot/assertion causes the MCDI status word to be set after the
29 * command word is set or a REBOOT event is sent. If we notice a reboot
Daniel Pieczkob2d32f02013-09-20 16:45:10 +010030 * via these mechanisms then wait 250ms for the status word to be set.
Daniel Pieczkod36a08b2013-06-20 11:40:07 +010031 */
Ben Hutchings3f713bf2011-12-20 23:39:31 +000032#define MCDI_STATUS_DELAY_US 100
Daniel Pieczkob2d32f02013-09-20 16:45:10 +010033#define MCDI_STATUS_DELAY_COUNT 2500
Ben Hutchings3f713bf2011-12-20 23:39:31 +000034#define MCDI_STATUS_SLEEP_MS \
35 (MCDI_STATUS_DELAY_US * MCDI_STATUS_DELAY_COUNT / 1000)
Ben Hutchingsafd4aea2009-11-29 15:15:25 +000036
37#define SEQ_MASK \
38 EFX_MASK32(EFX_WIDTH(MCDI_HEADER_SEQ))
39
Ben Hutchingscade7152013-08-27 23:12:31 +010040struct efx_mcdi_async_param {
41 struct list_head list;
42 unsigned int cmd;
43 size_t inlen;
44 size_t outlen;
Edward Cree1e0b8122013-05-31 18:36:12 +010045 bool quiet;
Ben Hutchingscade7152013-08-27 23:12:31 +010046 efx_mcdi_async_completer *complete;
47 unsigned long cookie;
48 /* followed by request/response buffer */
49};
50
51static void efx_mcdi_timeout_async(unsigned long context);
Ben Hutchings4c75b43a2013-08-29 19:04:03 +010052static int efx_mcdi_drv_attach(struct efx_nic *efx, bool driver_operating,
53 bool *was_attached_out);
Robert Stonehouse5731d7b2013-10-09 11:52:43 +010054static bool efx_mcdi_poll_once(struct efx_nic *efx);
Ben Hutchingscade7152013-08-27 23:12:31 +010055
Ben Hutchingsafd4aea2009-11-29 15:15:25 +000056static inline struct efx_mcdi_iface *efx_mcdi(struct efx_nic *efx)
57{
Ben Hutchingsf3ad5002012-09-18 02:33:56 +010058 EFX_BUG_ON_PARANOID(!efx->mcdi);
59 return &efx->mcdi->iface;
Ben Hutchingsafd4aea2009-11-29 15:15:25 +000060}
61
Ben Hutchingsf073dde2012-09-18 02:33:55 +010062int efx_mcdi_init(struct efx_nic *efx)
Ben Hutchingsafd4aea2009-11-29 15:15:25 +000063{
64 struct efx_mcdi_iface *mcdi;
Ben Hutchings4c75b43a2013-08-29 19:04:03 +010065 bool already_attached;
66 int rc;
Ben Hutchingsafd4aea2009-11-29 15:15:25 +000067
Ben Hutchingsf3ad5002012-09-18 02:33:56 +010068 efx->mcdi = kzalloc(sizeof(*efx->mcdi), GFP_KERNEL);
69 if (!efx->mcdi)
70 return -ENOMEM;
71
Ben Hutchingsafd4aea2009-11-29 15:15:25 +000072 mcdi = efx_mcdi(efx);
Ben Hutchingscade7152013-08-27 23:12:31 +010073 mcdi->efx = efx;
Ben Hutchingsafd4aea2009-11-29 15:15:25 +000074 init_waitqueue_head(&mcdi->wq);
75 spin_lock_init(&mcdi->iface_lock);
Ben Hutchings251111d2013-08-27 23:04:29 +010076 mcdi->state = MCDI_STATE_QUIESCENT;
Ben Hutchingsafd4aea2009-11-29 15:15:25 +000077 mcdi->mode = MCDI_MODE_POLL;
Ben Hutchingscade7152013-08-27 23:12:31 +010078 spin_lock_init(&mcdi->async_lock);
79 INIT_LIST_HEAD(&mcdi->async_list);
80 setup_timer(&mcdi->async_timer, efx_mcdi_timeout_async,
81 (unsigned long)mcdi);
Ben Hutchingsafd4aea2009-11-29 15:15:25 +000082
83 (void) efx_mcdi_poll_reboot(efx);
Daniel Pieczkod36a08b2013-06-20 11:40:07 +010084 mcdi->new_epoch = true;
Ben Hutchingsf073dde2012-09-18 02:33:55 +010085
86 /* Recover from a failed assertion before probing */
Ben Hutchings4c75b43a2013-08-29 19:04:03 +010087 rc = efx_mcdi_handle_assertion(efx);
88 if (rc)
89 return rc;
90
91 /* Let the MC (and BMC, if this is a LOM) know that the driver
92 * is loaded. We should do this before we reset the NIC.
93 */
94 rc = efx_mcdi_drv_attach(efx, true, &already_attached);
95 if (rc) {
96 netif_err(efx, probe, efx->net_dev,
97 "Unable to register driver with MCPU\n");
98 return rc;
99 }
100 if (already_attached)
101 /* Not a fatal error */
102 netif_err(efx, probe, efx->net_dev,
103 "Host already registered with MCPU\n");
104
105 return 0;
Ben Hutchingsafd4aea2009-11-29 15:15:25 +0000106}
107
Ben Hutchingsf3ad5002012-09-18 02:33:56 +0100108void efx_mcdi_fini(struct efx_nic *efx)
109{
Ben Hutchings4c75b43a2013-08-29 19:04:03 +0100110 if (!efx->mcdi)
111 return;
112
113 BUG_ON(efx->mcdi->iface.state != MCDI_STATE_QUIESCENT);
114
115 /* Relinquish the device (back to the BMC, if this is a LOM) */
116 efx_mcdi_drv_attach(efx, false, NULL);
117
Ben Hutchingsf3ad5002012-09-18 02:33:56 +0100118 kfree(efx->mcdi);
119}
120
Ben Hutchings2f4bcdc2013-08-22 22:06:09 +0100121static void efx_mcdi_send_request(struct efx_nic *efx, unsigned cmd,
122 const efx_dword_t *inbuf, size_t inlen)
Ben Hutchingsafd4aea2009-11-29 15:15:25 +0000123{
124 struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
Ben Hutchingsdf2cd8a2012-09-19 00:56:18 +0100125 efx_dword_t hdr[2];
126 size_t hdr_len;
Ben Hutchingsafd4aea2009-11-29 15:15:25 +0000127 u32 xflags, seqno;
128
Ben Hutchings251111d2013-08-27 23:04:29 +0100129 BUG_ON(mcdi->state == MCDI_STATE_QUIESCENT);
Ben Hutchingsafd4aea2009-11-29 15:15:25 +0000130
Ben Hutchings2f4bcdc2013-08-22 22:06:09 +0100131 /* Serialise with efx_mcdi_ev_cpl() and efx_mcdi_ev_death() */
132 spin_lock_bh(&mcdi->iface_lock);
133 ++mcdi->seqno;
134 spin_unlock_bh(&mcdi->iface_lock);
135
Ben Hutchingsafd4aea2009-11-29 15:15:25 +0000136 seqno = mcdi->seqno & SEQ_MASK;
137 xflags = 0;
138 if (mcdi->mode == MCDI_MODE_EVENTS)
139 xflags |= MCDI_HEADER_XFLAGS_EVREQ;
140
Ben Hutchingsdf2cd8a2012-09-19 00:56:18 +0100141 if (efx->type->mcdi_max_ver == 1) {
142 /* MCDI v1 */
Daniel Pieczkod36a08b2013-06-20 11:40:07 +0100143 EFX_POPULATE_DWORD_7(hdr[0],
Ben Hutchingsdf2cd8a2012-09-19 00:56:18 +0100144 MCDI_HEADER_RESPONSE, 0,
145 MCDI_HEADER_RESYNC, 1,
146 MCDI_HEADER_CODE, cmd,
147 MCDI_HEADER_DATALEN, inlen,
148 MCDI_HEADER_SEQ, seqno,
Daniel Pieczkod36a08b2013-06-20 11:40:07 +0100149 MCDI_HEADER_XFLAGS, xflags,
150 MCDI_HEADER_NOT_EPOCH, !mcdi->new_epoch);
Ben Hutchingsdf2cd8a2012-09-19 00:56:18 +0100151 hdr_len = 4;
152 } else {
153 /* MCDI v2 */
154 BUG_ON(inlen > MCDI_CTL_SDU_LEN_MAX_V2);
Daniel Pieczkod36a08b2013-06-20 11:40:07 +0100155 EFX_POPULATE_DWORD_7(hdr[0],
Ben Hutchingsdf2cd8a2012-09-19 00:56:18 +0100156 MCDI_HEADER_RESPONSE, 0,
157 MCDI_HEADER_RESYNC, 1,
158 MCDI_HEADER_CODE, MC_CMD_V2_EXTN,
159 MCDI_HEADER_DATALEN, 0,
160 MCDI_HEADER_SEQ, seqno,
Daniel Pieczkod36a08b2013-06-20 11:40:07 +0100161 MCDI_HEADER_XFLAGS, xflags,
162 MCDI_HEADER_NOT_EPOCH, !mcdi->new_epoch);
Ben Hutchingsdf2cd8a2012-09-19 00:56:18 +0100163 EFX_POPULATE_DWORD_2(hdr[1],
164 MC_CMD_V2_EXTN_IN_EXTENDED_CMD, cmd,
165 MC_CMD_V2_EXTN_IN_ACTUAL_LEN, inlen);
166 hdr_len = 8;
167 }
Ben Hutchingsafd4aea2009-11-29 15:15:25 +0000168
Ben Hutchingsdf2cd8a2012-09-19 00:56:18 +0100169 efx->type->mcdi_request(efx, hdr, hdr_len, inbuf, inlen);
Ben Hutchings2f4bcdc2013-08-22 22:06:09 +0100170
171 mcdi->new_epoch = false;
Ben Hutchingsafd4aea2009-11-29 15:15:25 +0000172}
173
Ben Hutchings5bc283e2012-10-08 21:43:00 +0100174static int efx_mcdi_errno(unsigned int mcdi_err)
175{
176 switch (mcdi_err) {
177 case 0:
178 return 0;
179#define TRANSLATE_ERROR(name) \
180 case MC_CMD_ERR_ ## name: \
181 return -name;
Ben Hutchingsdf2cd8a2012-09-19 00:56:18 +0100182 TRANSLATE_ERROR(EPERM);
Ben Hutchings5bc283e2012-10-08 21:43:00 +0100183 TRANSLATE_ERROR(ENOENT);
184 TRANSLATE_ERROR(EINTR);
Ben Hutchingsdf2cd8a2012-09-19 00:56:18 +0100185 TRANSLATE_ERROR(EAGAIN);
Ben Hutchings5bc283e2012-10-08 21:43:00 +0100186 TRANSLATE_ERROR(EACCES);
187 TRANSLATE_ERROR(EBUSY);
188 TRANSLATE_ERROR(EINVAL);
189 TRANSLATE_ERROR(EDEADLK);
190 TRANSLATE_ERROR(ENOSYS);
191 TRANSLATE_ERROR(ETIME);
Ben Hutchingsdf2cd8a2012-09-19 00:56:18 +0100192 TRANSLATE_ERROR(EALREADY);
193 TRANSLATE_ERROR(ENOSPC);
Ben Hutchings5bc283e2012-10-08 21:43:00 +0100194#undef TRANSLATE_ERROR
Ben Hutchingsdf2cd8a2012-09-19 00:56:18 +0100195 case MC_CMD_ERR_ALLOC_FAIL:
196 return -ENOBUFS;
197 case MC_CMD_ERR_MAC_EXIST:
198 return -EADDRINUSE;
Ben Hutchings5bc283e2012-10-08 21:43:00 +0100199 default:
Ben Hutchingsdf2cd8a2012-09-19 00:56:18 +0100200 return -EPROTO;
201 }
202}
203
204static void efx_mcdi_read_response_header(struct efx_nic *efx)
205{
206 struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
207 unsigned int respseq, respcmd, error;
208 efx_dword_t hdr;
209
210 efx->type->mcdi_read_response(efx, &hdr, 0, 4);
211 respseq = EFX_DWORD_FIELD(hdr, MCDI_HEADER_SEQ);
212 respcmd = EFX_DWORD_FIELD(hdr, MCDI_HEADER_CODE);
213 error = EFX_DWORD_FIELD(hdr, MCDI_HEADER_ERROR);
214
215 if (respcmd != MC_CMD_V2_EXTN) {
216 mcdi->resp_hdr_len = 4;
217 mcdi->resp_data_len = EFX_DWORD_FIELD(hdr, MCDI_HEADER_DATALEN);
218 } else {
219 efx->type->mcdi_read_response(efx, &hdr, 4, 4);
220 mcdi->resp_hdr_len = 8;
221 mcdi->resp_data_len =
222 EFX_DWORD_FIELD(hdr, MC_CMD_V2_EXTN_IN_ACTUAL_LEN);
223 }
224
225 if (error && mcdi->resp_data_len == 0) {
226 netif_err(efx, hw, efx->net_dev, "MC rebooted\n");
227 mcdi->resprc = -EIO;
228 } else if ((respseq ^ mcdi->seqno) & SEQ_MASK) {
229 netif_err(efx, hw, efx->net_dev,
230 "MC response mismatch tx seq 0x%x rx seq 0x%x\n",
231 respseq, mcdi->seqno);
232 mcdi->resprc = -EIO;
233 } else if (error) {
234 efx->type->mcdi_read_response(efx, &hdr, mcdi->resp_hdr_len, 4);
235 mcdi->resprc =
236 efx_mcdi_errno(EFX_DWORD_FIELD(hdr, EFX_DWORD_0));
237 } else {
238 mcdi->resprc = 0;
Ben Hutchings5bc283e2012-10-08 21:43:00 +0100239 }
240}
241
Robert Stonehouse5731d7b2013-10-09 11:52:43 +0100242static bool efx_mcdi_poll_once(struct efx_nic *efx)
243{
244 struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
245
246 rmb();
247 if (!efx->type->mcdi_poll_response(efx))
248 return false;
249
250 spin_lock_bh(&mcdi->iface_lock);
251 efx_mcdi_read_response_header(efx);
252 spin_unlock_bh(&mcdi->iface_lock);
253
254 return true;
255}
256
Ben Hutchingsafd4aea2009-11-29 15:15:25 +0000257static int efx_mcdi_poll(struct efx_nic *efx)
258{
259 struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
Ben Hutchingsebf98e72012-12-01 02:21:17 +0000260 unsigned long time, finish;
Ben Hutchings5bc283e2012-10-08 21:43:00 +0100261 unsigned int spins;
Ben Hutchings5bc283e2012-10-08 21:43:00 +0100262 int rc;
Ben Hutchingsafd4aea2009-11-29 15:15:25 +0000263
264 /* Check for a reboot atomically with respect to efx_mcdi_copyout() */
Ben Hutchings5bc283e2012-10-08 21:43:00 +0100265 rc = efx_mcdi_poll_reboot(efx);
Ben Hutchingsdf2cd8a2012-09-19 00:56:18 +0100266 if (rc) {
Ben Hutchings369327f2012-10-26 17:53:12 +0100267 spin_lock_bh(&mcdi->iface_lock);
Ben Hutchingsdf2cd8a2012-09-19 00:56:18 +0100268 mcdi->resprc = rc;
269 mcdi->resp_hdr_len = 0;
270 mcdi->resp_data_len = 0;
Ben Hutchings369327f2012-10-26 17:53:12 +0100271 spin_unlock_bh(&mcdi->iface_lock);
Ben Hutchingsdf2cd8a2012-09-19 00:56:18 +0100272 return 0;
273 }
Ben Hutchingsafd4aea2009-11-29 15:15:25 +0000274
275 /* Poll for completion. Poll quickly (once a us) for the 1st jiffy,
276 * because generally mcdi responses are fast. After that, back off
277 * and poll once a jiffy (approximately)
278 */
279 spins = TICK_USEC;
Ben Hutchingsebf98e72012-12-01 02:21:17 +0000280 finish = jiffies + MCDI_RPC_TIMEOUT;
Ben Hutchingsafd4aea2009-11-29 15:15:25 +0000281
282 while (1) {
283 if (spins != 0) {
284 --spins;
285 udelay(1);
Ben Hutchings55029c12010-01-13 04:34:25 +0000286 } else {
287 schedule_timeout_uninterruptible(1);
288 }
Ben Hutchingsafd4aea2009-11-29 15:15:25 +0000289
Ben Hutchingsebf98e72012-12-01 02:21:17 +0000290 time = jiffies;
Ben Hutchingsafd4aea2009-11-29 15:15:25 +0000291
Robert Stonehouse5731d7b2013-10-09 11:52:43 +0100292 if (efx_mcdi_poll_once(efx))
Ben Hutchingsafd4aea2009-11-29 15:15:25 +0000293 break;
294
Ben Hutchingsebf98e72012-12-01 02:21:17 +0000295 if (time_after(time, finish))
Ben Hutchingsafd4aea2009-11-29 15:15:25 +0000296 return -ETIMEDOUT;
297 }
298
Ben Hutchingsafd4aea2009-11-29 15:15:25 +0000299 /* Return rc=0 like wait_event_timeout() */
300 return 0;
301}
302
Ben Hutchings876be082012-10-01 20:58:35 +0100303/* Test and clear MC-rebooted flag for this port/function; reset
304 * software state as necessary.
305 */
Ben Hutchingsafd4aea2009-11-29 15:15:25 +0000306int efx_mcdi_poll_reboot(struct efx_nic *efx)
307{
Ben Hutchingsf3ad5002012-09-18 02:33:56 +0100308 if (!efx->mcdi)
309 return 0;
Ben Hutchingsafd4aea2009-11-29 15:15:25 +0000310
Ben Hutchingscd0ecc92012-12-14 21:52:56 +0000311 return efx->type->mcdi_poll_reboot(efx);
Ben Hutchingsafd4aea2009-11-29 15:15:25 +0000312}
313
Ben Hutchingscade7152013-08-27 23:12:31 +0100314static bool efx_mcdi_acquire_async(struct efx_mcdi_iface *mcdi)
315{
316 return cmpxchg(&mcdi->state,
317 MCDI_STATE_QUIESCENT, MCDI_STATE_RUNNING_ASYNC) ==
318 MCDI_STATE_QUIESCENT;
319}
320
321static void efx_mcdi_acquire_sync(struct efx_mcdi_iface *mcdi)
Ben Hutchingsafd4aea2009-11-29 15:15:25 +0000322{
323 /* Wait until the interface becomes QUIESCENT and we win the race
Ben Hutchingscade7152013-08-27 23:12:31 +0100324 * to mark it RUNNING_SYNC.
325 */
Ben Hutchingsafd4aea2009-11-29 15:15:25 +0000326 wait_event(mcdi->wq,
Ben Hutchings251111d2013-08-27 23:04:29 +0100327 cmpxchg(&mcdi->state,
Ben Hutchingscade7152013-08-27 23:12:31 +0100328 MCDI_STATE_QUIESCENT, MCDI_STATE_RUNNING_SYNC) ==
Ben Hutchings251111d2013-08-27 23:04:29 +0100329 MCDI_STATE_QUIESCENT);
Ben Hutchingsafd4aea2009-11-29 15:15:25 +0000330}
331
332static int efx_mcdi_await_completion(struct efx_nic *efx)
333{
334 struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
335
Ben Hutchings251111d2013-08-27 23:04:29 +0100336 if (wait_event_timeout(mcdi->wq, mcdi->state == MCDI_STATE_COMPLETED,
337 MCDI_RPC_TIMEOUT) == 0)
Ben Hutchingsafd4aea2009-11-29 15:15:25 +0000338 return -ETIMEDOUT;
339
340 /* Check if efx_mcdi_set_mode() switched us back to polled completions.
341 * In which case, poll for completions directly. If efx_mcdi_ev_cpl()
342 * completed the request first, then we'll just end up completing the
343 * request again, which is safe.
344 *
345 * We need an smp_rmb() to synchronise with efx_mcdi_mode_poll(), which
346 * wait_event_timeout() implicitly provides.
347 */
348 if (mcdi->mode == MCDI_MODE_POLL)
349 return efx_mcdi_poll(efx);
350
351 return 0;
352}
353
Ben Hutchingscade7152013-08-27 23:12:31 +0100354/* If the interface is RUNNING_SYNC, switch to COMPLETED and wake the
355 * requester. Return whether this was done. Does not take any locks.
356 */
357static bool efx_mcdi_complete_sync(struct efx_mcdi_iface *mcdi)
Ben Hutchingsafd4aea2009-11-29 15:15:25 +0000358{
Ben Hutchingscade7152013-08-27 23:12:31 +0100359 if (cmpxchg(&mcdi->state,
360 MCDI_STATE_RUNNING_SYNC, MCDI_STATE_COMPLETED) ==
361 MCDI_STATE_RUNNING_SYNC) {
Ben Hutchingsafd4aea2009-11-29 15:15:25 +0000362 wake_up(&mcdi->wq);
363 return true;
364 }
365
366 return false;
367}
368
369static void efx_mcdi_release(struct efx_mcdi_iface *mcdi)
370{
Ben Hutchingscade7152013-08-27 23:12:31 +0100371 if (mcdi->mode == MCDI_MODE_EVENTS) {
372 struct efx_mcdi_async_param *async;
373 struct efx_nic *efx = mcdi->efx;
374
375 /* Process the asynchronous request queue */
376 spin_lock_bh(&mcdi->async_lock);
377 async = list_first_entry_or_null(
378 &mcdi->async_list, struct efx_mcdi_async_param, list);
379 if (async) {
380 mcdi->state = MCDI_STATE_RUNNING_ASYNC;
381 efx_mcdi_send_request(efx, async->cmd,
382 (const efx_dword_t *)(async + 1),
383 async->inlen);
384 mod_timer(&mcdi->async_timer,
385 jiffies + MCDI_RPC_TIMEOUT);
386 }
387 spin_unlock_bh(&mcdi->async_lock);
388
389 if (async)
390 return;
391 }
392
Ben Hutchings251111d2013-08-27 23:04:29 +0100393 mcdi->state = MCDI_STATE_QUIESCENT;
Ben Hutchingsafd4aea2009-11-29 15:15:25 +0000394 wake_up(&mcdi->wq);
395}
396
Ben Hutchingscade7152013-08-27 23:12:31 +0100397/* If the interface is RUNNING_ASYNC, switch to COMPLETED, call the
398 * asynchronous completion function, and release the interface.
399 * Return whether this was done. Must be called in bh-disabled
400 * context. Will take iface_lock and async_lock.
401 */
402static bool efx_mcdi_complete_async(struct efx_mcdi_iface *mcdi, bool timeout)
403{
404 struct efx_nic *efx = mcdi->efx;
405 struct efx_mcdi_async_param *async;
Edward Cree1e0b8122013-05-31 18:36:12 +0100406 size_t hdr_len, data_len, err_len;
Ben Hutchingscade7152013-08-27 23:12:31 +0100407 efx_dword_t *outbuf;
Edward Cree1e0b8122013-05-31 18:36:12 +0100408 MCDI_DECLARE_BUF_OUT_OR_ERR(errbuf, 0);
Ben Hutchingscade7152013-08-27 23:12:31 +0100409 int rc;
410
411 if (cmpxchg(&mcdi->state,
412 MCDI_STATE_RUNNING_ASYNC, MCDI_STATE_COMPLETED) !=
413 MCDI_STATE_RUNNING_ASYNC)
414 return false;
415
416 spin_lock(&mcdi->iface_lock);
417 if (timeout) {
418 /* Ensure that if the completion event arrives later,
419 * the seqno check in efx_mcdi_ev_cpl() will fail
420 */
421 ++mcdi->seqno;
422 ++mcdi->credits;
423 rc = -ETIMEDOUT;
424 hdr_len = 0;
425 data_len = 0;
426 } else {
427 rc = mcdi->resprc;
428 hdr_len = mcdi->resp_hdr_len;
429 data_len = mcdi->resp_data_len;
430 }
431 spin_unlock(&mcdi->iface_lock);
432
433 /* Stop the timer. In case the timer function is running, we
434 * must wait for it to return so that there is no possibility
435 * of it aborting the next request.
436 */
437 if (!timeout)
438 del_timer_sync(&mcdi->async_timer);
439
440 spin_lock(&mcdi->async_lock);
441 async = list_first_entry(&mcdi->async_list,
442 struct efx_mcdi_async_param, list);
443 list_del(&async->list);
444 spin_unlock(&mcdi->async_lock);
445
446 outbuf = (efx_dword_t *)(async + 1);
447 efx->type->mcdi_read_response(efx, outbuf, hdr_len,
448 min(async->outlen, data_len));
Edward Cree1e0b8122013-05-31 18:36:12 +0100449 if (!timeout && rc && !async->quiet) {
450 err_len = min(sizeof(errbuf), data_len);
451 efx->type->mcdi_read_response(efx, errbuf, hdr_len,
452 sizeof(errbuf));
453 efx_mcdi_display_error(efx, async->cmd, async->inlen, errbuf,
454 err_len, rc);
455 }
Ben Hutchingscade7152013-08-27 23:12:31 +0100456 async->complete(efx, async->cookie, rc, outbuf, data_len);
457 kfree(async);
458
459 efx_mcdi_release(mcdi);
460
461 return true;
462}
463
Ben Hutchingsafd4aea2009-11-29 15:15:25 +0000464static void efx_mcdi_ev_cpl(struct efx_nic *efx, unsigned int seqno,
Ben Hutchings5bc283e2012-10-08 21:43:00 +0100465 unsigned int datalen, unsigned int mcdi_err)
Ben Hutchingsafd4aea2009-11-29 15:15:25 +0000466{
467 struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
468 bool wake = false;
469
470 spin_lock(&mcdi->iface_lock);
471
472 if ((seqno ^ mcdi->seqno) & SEQ_MASK) {
473 if (mcdi->credits)
474 /* The request has been cancelled */
475 --mcdi->credits;
476 else
Ben Hutchings62776d02010-06-23 11:30:07 +0000477 netif_err(efx, hw, efx->net_dev,
478 "MC response mismatch tx seq 0x%x rx "
479 "seq 0x%x\n", seqno, mcdi->seqno);
Ben Hutchingsafd4aea2009-11-29 15:15:25 +0000480 } else {
Ben Hutchingsdf2cd8a2012-09-19 00:56:18 +0100481 if (efx->type->mcdi_max_ver >= 2) {
482 /* MCDI v2 responses don't fit in an event */
483 efx_mcdi_read_response_header(efx);
484 } else {
485 mcdi->resprc = efx_mcdi_errno(mcdi_err);
486 mcdi->resp_hdr_len = 4;
487 mcdi->resp_data_len = datalen;
488 }
Ben Hutchingsafd4aea2009-11-29 15:15:25 +0000489
490 wake = true;
491 }
492
493 spin_unlock(&mcdi->iface_lock);
494
Ben Hutchingscade7152013-08-27 23:12:31 +0100495 if (wake) {
496 if (!efx_mcdi_complete_async(mcdi, false))
497 (void) efx_mcdi_complete_sync(mcdi);
498
499 /* If the interface isn't RUNNING_ASYNC or
500 * RUNNING_SYNC then we've received a duplicate
501 * completion after we've already transitioned back to
502 * QUIESCENT. [A subsequent invocation would increment
503 * seqno, so would have failed the seqno check].
504 */
505 }
506}
507
508static void efx_mcdi_timeout_async(unsigned long context)
509{
510 struct efx_mcdi_iface *mcdi = (struct efx_mcdi_iface *)context;
511
512 efx_mcdi_complete_async(mcdi, true);
Ben Hutchingsafd4aea2009-11-29 15:15:25 +0000513}
514
Ben Hutchings2f4bcdc2013-08-22 22:06:09 +0100515static int
516efx_mcdi_check_supported(struct efx_nic *efx, unsigned int cmd, size_t inlen)
517{
518 if (efx->type->mcdi_max_ver < 0 ||
519 (efx->type->mcdi_max_ver < 2 &&
520 cmd > MC_CMD_CMD_SPACE_ESCAPE_7))
521 return -EINVAL;
522
523 if (inlen > MCDI_CTL_SDU_LEN_MAX_V2 ||
524 (efx->type->mcdi_max_ver < 2 &&
525 inlen > MCDI_CTL_SDU_LEN_MAX_V1))
526 return -EMSGSIZE;
527
528 return 0;
529}
530
Edward Cree1e0b8122013-05-31 18:36:12 +0100531static int _efx_mcdi_rpc_finish(struct efx_nic *efx, unsigned cmd, size_t inlen,
532 efx_dword_t *outbuf, size_t outlen,
533 size_t *outlen_actual, bool quiet)
Stuart Hodgsonc3cba722012-07-16 17:40:47 +0100534{
Ben Hutchingsafd4aea2009-11-29 15:15:25 +0000535 struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
Edward Cree1e0b8122013-05-31 18:36:12 +0100536 MCDI_DECLARE_BUF_OUT_OR_ERR(errbuf, 0);
Stuart Hodgsonc3cba722012-07-16 17:40:47 +0100537 int rc;
538
Ben Hutchingsafd4aea2009-11-29 15:15:25 +0000539 if (mcdi->mode == MCDI_MODE_POLL)
540 rc = efx_mcdi_poll(efx);
541 else
542 rc = efx_mcdi_await_completion(efx);
543
544 if (rc != 0) {
Robert Stonehouse6b294b82013-10-09 11:52:48 +0100545 netif_err(efx, hw, efx->net_dev,
546 "MC command 0x%x inlen %d mode %d timed out\n",
547 cmd, (int)inlen, mcdi->mode);
548
549 if (mcdi->mode == MCDI_MODE_EVENTS && efx_mcdi_poll_once(efx)) {
550 netif_err(efx, hw, efx->net_dev,
551 "MCDI request was completed without an event\n");
552 rc = 0;
553 }
554
Ben Hutchingsafd4aea2009-11-29 15:15:25 +0000555 /* Close the race with efx_mcdi_ev_cpl() executing just too late
556 * and completing a request we've just cancelled, by ensuring
557 * that the seqno check therein fails.
558 */
559 spin_lock_bh(&mcdi->iface_lock);
560 ++mcdi->seqno;
561 ++mcdi->credits;
562 spin_unlock_bh(&mcdi->iface_lock);
Robert Stonehouse6b294b82013-10-09 11:52:48 +0100563 }
Ben Hutchingsafd4aea2009-11-29 15:15:25 +0000564
Edward Cree1e0b8122013-05-31 18:36:12 +0100565 if (rc != 0) {
566 if (outlen_actual)
567 *outlen_actual = 0;
568 } else {
569 size_t hdr_len, data_len, err_len;
Ben Hutchingsafd4aea2009-11-29 15:15:25 +0000570
571 /* At the very least we need a memory barrier here to ensure
572 * we pick up changes from efx_mcdi_ev_cpl(). Protect against
573 * a spurious efx_mcdi_ev_cpl() running concurrently by
574 * acquiring the iface_lock. */
575 spin_lock_bh(&mcdi->iface_lock);
Ben Hutchings5bc283e2012-10-08 21:43:00 +0100576 rc = mcdi->resprc;
Ben Hutchings369327f2012-10-26 17:53:12 +0100577 hdr_len = mcdi->resp_hdr_len;
578 data_len = mcdi->resp_data_len;
Edward Cree1e0b8122013-05-31 18:36:12 +0100579 err_len = min(sizeof(errbuf), data_len);
Ben Hutchingsafd4aea2009-11-29 15:15:25 +0000580 spin_unlock_bh(&mcdi->iface_lock);
581
Ben Hutchings5bc283e2012-10-08 21:43:00 +0100582 BUG_ON(rc > 0);
583
Edward Cree1e0b8122013-05-31 18:36:12 +0100584 efx->type->mcdi_read_response(efx, outbuf, hdr_len,
585 min(outlen, data_len));
586 if (outlen_actual)
587 *outlen_actual = data_len;
588
589 efx->type->mcdi_read_response(efx, errbuf, hdr_len, err_len);
590
591 if (cmd == MC_CMD_REBOOT && rc == -EIO) {
592 /* Don't reset if MC_CMD_REBOOT returns EIO */
593 } else if (rc == -EIO || rc == -EINTR) {
Ben Hutchings62776d02010-06-23 11:30:07 +0000594 netif_err(efx, hw, efx->net_dev, "MC fatal error %d\n",
595 -rc);
Ben Hutchingsafd4aea2009-11-29 15:15:25 +0000596 efx_schedule_reset(efx, RESET_TYPE_MC_FAILURE);
Edward Cree1e0b8122013-05-31 18:36:12 +0100597 } else if (rc && !quiet) {
598 efx_mcdi_display_error(efx, cmd, inlen, errbuf, err_len,
599 rc);
600 }
Ben Hutchings3f713bf2011-12-20 23:39:31 +0000601
602 if (rc == -EIO || rc == -EINTR) {
603 msleep(MCDI_STATUS_SLEEP_MS);
604 efx_mcdi_poll_reboot(efx);
Daniel Pieczkod36a08b2013-06-20 11:40:07 +0100605 mcdi->new_epoch = true;
Ben Hutchings3f713bf2011-12-20 23:39:31 +0000606 }
Ben Hutchingsafd4aea2009-11-29 15:15:25 +0000607 }
608
609 efx_mcdi_release(mcdi);
610 return rc;
611}
612
Edward Cree1e0b8122013-05-31 18:36:12 +0100613static int _efx_mcdi_rpc(struct efx_nic *efx, unsigned cmd,
614 const efx_dword_t *inbuf, size_t inlen,
615 efx_dword_t *outbuf, size_t outlen,
616 size_t *outlen_actual, bool quiet)
617{
618 int rc;
619
620 rc = efx_mcdi_rpc_start(efx, cmd, inbuf, inlen);
621 if (rc) {
622 if (outlen_actual)
623 *outlen_actual = 0;
624 return rc;
625 }
626 return _efx_mcdi_rpc_finish(efx, cmd, inlen, outbuf, outlen,
627 outlen_actual, quiet);
628}
629
630int efx_mcdi_rpc(struct efx_nic *efx, unsigned cmd,
631 const efx_dword_t *inbuf, size_t inlen,
632 efx_dword_t *outbuf, size_t outlen,
633 size_t *outlen_actual)
634{
635 return _efx_mcdi_rpc(efx, cmd, inbuf, inlen, outbuf, outlen,
636 outlen_actual, false);
637}
638
639/* Normally, on receiving an error code in the MCDI response,
640 * efx_mcdi_rpc will log an error message containing (among other
641 * things) the raw error code, by means of efx_mcdi_display_error.
642 * This _quiet version suppresses that; if the caller wishes to log
643 * the error conditionally on the return code, it should call this
644 * function and is then responsible for calling efx_mcdi_display_error
645 * as needed.
646 */
647int efx_mcdi_rpc_quiet(struct efx_nic *efx, unsigned cmd,
648 const efx_dword_t *inbuf, size_t inlen,
649 efx_dword_t *outbuf, size_t outlen,
650 size_t *outlen_actual)
651{
652 return _efx_mcdi_rpc(efx, cmd, inbuf, inlen, outbuf, outlen,
653 outlen_actual, true);
654}
655
656int efx_mcdi_rpc_start(struct efx_nic *efx, unsigned cmd,
657 const efx_dword_t *inbuf, size_t inlen)
658{
659 struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
660 int rc;
661
662 rc = efx_mcdi_check_supported(efx, cmd, inlen);
663 if (rc)
664 return rc;
665
666 if (efx->mc_bist_for_other_fn)
667 return -ENETDOWN;
668
669 efx_mcdi_acquire_sync(mcdi);
670 efx_mcdi_send_request(efx, cmd, inbuf, inlen);
671 return 0;
672}
673
674static int _efx_mcdi_rpc_async(struct efx_nic *efx, unsigned int cmd,
675 const efx_dword_t *inbuf, size_t inlen,
676 size_t outlen,
677 efx_mcdi_async_completer *complete,
678 unsigned long cookie, bool quiet)
679{
680 struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
681 struct efx_mcdi_async_param *async;
682 int rc;
683
684 rc = efx_mcdi_check_supported(efx, cmd, inlen);
685 if (rc)
686 return rc;
687
688 if (efx->mc_bist_for_other_fn)
689 return -ENETDOWN;
690
691 async = kmalloc(sizeof(*async) + ALIGN(max(inlen, outlen), 4),
692 GFP_ATOMIC);
693 if (!async)
694 return -ENOMEM;
695
696 async->cmd = cmd;
697 async->inlen = inlen;
698 async->outlen = outlen;
699 async->quiet = quiet;
700 async->complete = complete;
701 async->cookie = cookie;
702 memcpy(async + 1, inbuf, inlen);
703
704 spin_lock_bh(&mcdi->async_lock);
705
706 if (mcdi->mode == MCDI_MODE_EVENTS) {
707 list_add_tail(&async->list, &mcdi->async_list);
708
709 /* If this is at the front of the queue, try to start it
710 * immediately
711 */
712 if (mcdi->async_list.next == &async->list &&
713 efx_mcdi_acquire_async(mcdi)) {
714 efx_mcdi_send_request(efx, cmd, inbuf, inlen);
715 mod_timer(&mcdi->async_timer,
716 jiffies + MCDI_RPC_TIMEOUT);
717 }
718 } else {
719 kfree(async);
720 rc = -ENETDOWN;
721 }
722
723 spin_unlock_bh(&mcdi->async_lock);
724
725 return rc;
726}
727
728/**
729 * efx_mcdi_rpc_async - Schedule an MCDI command to run asynchronously
730 * @efx: NIC through which to issue the command
731 * @cmd: Command type number
732 * @inbuf: Command parameters
733 * @inlen: Length of command parameters, in bytes
734 * @outlen: Length to allocate for response buffer, in bytes
735 * @complete: Function to be called on completion or cancellation.
736 * @cookie: Arbitrary value to be passed to @complete.
737 *
738 * This function does not sleep and therefore may be called in atomic
739 * context. It will fail if event queues are disabled or if MCDI
740 * event completions have been disabled due to an error.
741 *
742 * If it succeeds, the @complete function will be called exactly once
743 * in atomic context, when one of the following occurs:
744 * (a) the completion event is received (in NAPI context)
745 * (b) event queues are disabled (in the process that disables them)
746 * (c) the request times-out (in timer context)
747 */
748int
749efx_mcdi_rpc_async(struct efx_nic *efx, unsigned int cmd,
750 const efx_dword_t *inbuf, size_t inlen, size_t outlen,
751 efx_mcdi_async_completer *complete, unsigned long cookie)
752{
753 return _efx_mcdi_rpc_async(efx, cmd, inbuf, inlen, outlen, complete,
754 cookie, false);
755}
756
757int efx_mcdi_rpc_async_quiet(struct efx_nic *efx, unsigned int cmd,
758 const efx_dword_t *inbuf, size_t inlen,
759 size_t outlen, efx_mcdi_async_completer *complete,
760 unsigned long cookie)
761{
762 return _efx_mcdi_rpc_async(efx, cmd, inbuf, inlen, outlen, complete,
763 cookie, true);
764}
765
766int efx_mcdi_rpc_finish(struct efx_nic *efx, unsigned cmd, size_t inlen,
767 efx_dword_t *outbuf, size_t outlen,
768 size_t *outlen_actual)
769{
770 return _efx_mcdi_rpc_finish(efx, cmd, inlen, outbuf, outlen,
771 outlen_actual, false);
772}
773
774int efx_mcdi_rpc_finish_quiet(struct efx_nic *efx, unsigned cmd, size_t inlen,
775 efx_dword_t *outbuf, size_t outlen,
776 size_t *outlen_actual)
777{
778 return _efx_mcdi_rpc_finish(efx, cmd, inlen, outbuf, outlen,
779 outlen_actual, true);
780}
781
782void efx_mcdi_display_error(struct efx_nic *efx, unsigned cmd,
783 size_t inlen, efx_dword_t *outbuf,
784 size_t outlen, int rc)
785{
786 int code = 0, err_arg = 0;
787
788 if (outlen >= MC_CMD_ERR_CODE_OFST + 4)
789 code = MCDI_DWORD(outbuf, ERR_CODE);
790 if (outlen >= MC_CMD_ERR_ARG_OFST + 4)
791 err_arg = MCDI_DWORD(outbuf, ERR_ARG);
792 netif_err(efx, hw, efx->net_dev,
793 "MC command 0x%x inlen %d failed rc=%d (raw=%d) arg=%d\n",
794 cmd, (int)inlen, rc, code, err_arg);
795}
796
Ben Hutchingscade7152013-08-27 23:12:31 +0100797/* Switch to polled MCDI completions. This can be called in various
798 * error conditions with various locks held, so it must be lockless.
799 * Caller is responsible for flushing asynchronous requests later.
800 */
Ben Hutchingsafd4aea2009-11-29 15:15:25 +0000801void efx_mcdi_mode_poll(struct efx_nic *efx)
802{
803 struct efx_mcdi_iface *mcdi;
804
Ben Hutchingsf3ad5002012-09-18 02:33:56 +0100805 if (!efx->mcdi)
Ben Hutchingsafd4aea2009-11-29 15:15:25 +0000806 return;
807
808 mcdi = efx_mcdi(efx);
809 if (mcdi->mode == MCDI_MODE_POLL)
810 return;
811
812 /* We can switch from event completion to polled completion, because
813 * mcdi requests are always completed in shared memory. We do this by
814 * switching the mode to POLL'd then completing the request.
815 * efx_mcdi_await_completion() will then call efx_mcdi_poll().
816 *
817 * We need an smp_wmb() to synchronise with efx_mcdi_await_completion(),
Ben Hutchingscade7152013-08-27 23:12:31 +0100818 * which efx_mcdi_complete_sync() provides for us.
Ben Hutchingsafd4aea2009-11-29 15:15:25 +0000819 */
820 mcdi->mode = MCDI_MODE_POLL;
821
Ben Hutchingscade7152013-08-27 23:12:31 +0100822 efx_mcdi_complete_sync(mcdi);
823}
824
825/* Flush any running or queued asynchronous requests, after event processing
826 * is stopped
827 */
828void efx_mcdi_flush_async(struct efx_nic *efx)
829{
830 struct efx_mcdi_async_param *async, *next;
831 struct efx_mcdi_iface *mcdi;
832
833 if (!efx->mcdi)
834 return;
835
836 mcdi = efx_mcdi(efx);
837
838 /* We must be in polling mode so no more requests can be queued */
839 BUG_ON(mcdi->mode != MCDI_MODE_POLL);
840
841 del_timer_sync(&mcdi->async_timer);
842
843 /* If a request is still running, make sure we give the MC
844 * time to complete it so that the response won't overwrite our
845 * next request.
846 */
847 if (mcdi->state == MCDI_STATE_RUNNING_ASYNC) {
848 efx_mcdi_poll(efx);
849 mcdi->state = MCDI_STATE_QUIESCENT;
850 }
851
852 /* Nothing else will access the async list now, so it is safe
853 * to walk it without holding async_lock. If we hold it while
854 * calling a completer then lockdep may warn that we have
855 * acquired locks in the wrong order.
856 */
857 list_for_each_entry_safe(async, next, &mcdi->async_list, list) {
858 async->complete(efx, async->cookie, -ENETDOWN, NULL, 0);
859 list_del(&async->list);
860 kfree(async);
861 }
Ben Hutchingsafd4aea2009-11-29 15:15:25 +0000862}
863
864void efx_mcdi_mode_event(struct efx_nic *efx)
865{
866 struct efx_mcdi_iface *mcdi;
867
Ben Hutchingsf3ad5002012-09-18 02:33:56 +0100868 if (!efx->mcdi)
Ben Hutchingsafd4aea2009-11-29 15:15:25 +0000869 return;
870
871 mcdi = efx_mcdi(efx);
872
873 if (mcdi->mode == MCDI_MODE_EVENTS)
874 return;
875
876 /* We can't switch from polled to event completion in the middle of a
877 * request, because the completion method is specified in the request.
878 * So acquire the interface to serialise the requestors. We don't need
879 * to acquire the iface_lock to change the mode here, but we do need a
880 * write memory barrier ensure that efx_mcdi_rpc() sees it, which
881 * efx_mcdi_acquire() provides.
882 */
Ben Hutchingscade7152013-08-27 23:12:31 +0100883 efx_mcdi_acquire_sync(mcdi);
Ben Hutchingsafd4aea2009-11-29 15:15:25 +0000884 mcdi->mode = MCDI_MODE_EVENTS;
885 efx_mcdi_release(mcdi);
886}
887
888static void efx_mcdi_ev_death(struct efx_nic *efx, int rc)
889{
890 struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
891
892 /* If there is an outstanding MCDI request, it has been terminated
893 * either by a BADASSERT or REBOOT event. If the mcdi interface is
894 * in polled mode, then do nothing because the MC reboot handler will
895 * set the header correctly. However, if the mcdi interface is waiting
896 * for a CMDDONE event it won't receive it [and since all MCDI events
897 * are sent to the same queue, we can't be racing with
898 * efx_mcdi_ev_cpl()]
899 *
Ben Hutchingscade7152013-08-27 23:12:31 +0100900 * If there is an outstanding asynchronous request, we can't
901 * complete it now (efx_mcdi_complete() would deadlock). The
902 * reset process will take care of this.
903 *
904 * There's a race here with efx_mcdi_send_request(), because
905 * we might receive a REBOOT event *before* the request has
906 * been copied out. In polled mode (during startup) this is
907 * irrelevant, because efx_mcdi_complete_sync() is ignored. In
908 * event mode, this condition is just an edge-case of
909 * receiving a REBOOT event after posting the MCDI
910 * request. Did the mc reboot before or after the copyout? The
911 * best we can do always is just return failure.
Ben Hutchingsafd4aea2009-11-29 15:15:25 +0000912 */
913 spin_lock(&mcdi->iface_lock);
Ben Hutchingscade7152013-08-27 23:12:31 +0100914 if (efx_mcdi_complete_sync(mcdi)) {
Ben Hutchingsafd4aea2009-11-29 15:15:25 +0000915 if (mcdi->mode == MCDI_MODE_EVENTS) {
916 mcdi->resprc = rc;
Ben Hutchingsdf2cd8a2012-09-19 00:56:18 +0100917 mcdi->resp_hdr_len = 0;
918 mcdi->resp_data_len = 0;
Steve Hodgson18e3ee22010-12-02 13:46:55 +0000919 ++mcdi->credits;
Ben Hutchingsafd4aea2009-11-29 15:15:25 +0000920 }
Ben Hutchings3f713bf2011-12-20 23:39:31 +0000921 } else {
922 int count;
923
Ben Hutchings3f713bf2011-12-20 23:39:31 +0000924 /* Consume the status word since efx_mcdi_rpc_finish() won't */
925 for (count = 0; count < MCDI_STATUS_DELAY_COUNT; ++count) {
926 if (efx_mcdi_poll_reboot(efx))
927 break;
928 udelay(MCDI_STATUS_DELAY_US);
929 }
Daniel Pieczkod36a08b2013-06-20 11:40:07 +0100930 mcdi->new_epoch = true;
Daniel Pieczkodfdaa952013-09-18 10:16:24 +0100931
932 /* Nobody was waiting for an MCDI request, so trigger a reset */
933 efx_schedule_reset(efx, RESET_TYPE_MC_FAILURE);
Ben Hutchings3f713bf2011-12-20 23:39:31 +0000934 }
935
Ben Hutchingsafd4aea2009-11-29 15:15:25 +0000936 spin_unlock(&mcdi->iface_lock);
937}
938
Jon Cooper74cd60a2013-09-16 14:18:51 +0100939/* The MC is going down in to BIST mode. set the BIST flag to block
940 * new MCDI, cancel any outstanding MCDI and and schedule a BIST-type reset
941 * (which doesn't actually execute a reset, it waits for the controlling
942 * function to reset it).
943 */
944static void efx_mcdi_ev_bist(struct efx_nic *efx)
945{
946 struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
947
948 spin_lock(&mcdi->iface_lock);
949 efx->mc_bist_for_other_fn = true;
950 if (efx_mcdi_complete_sync(mcdi)) {
951 if (mcdi->mode == MCDI_MODE_EVENTS) {
952 mcdi->resprc = -EIO;
953 mcdi->resp_hdr_len = 0;
954 mcdi->resp_data_len = 0;
955 ++mcdi->credits;
956 }
957 }
958 mcdi->new_epoch = true;
959 efx_schedule_reset(efx, RESET_TYPE_MC_BIST);
960 spin_unlock(&mcdi->iface_lock);
961}
962
Ben Hutchingsafd4aea2009-11-29 15:15:25 +0000963/* Called from falcon_process_eventq for MCDI events */
964void efx_mcdi_process_event(struct efx_channel *channel,
965 efx_qword_t *event)
966{
967 struct efx_nic *efx = channel->efx;
968 int code = EFX_QWORD_FIELD(*event, MCDI_EVENT_CODE);
969 u32 data = EFX_QWORD_FIELD(*event, MCDI_EVENT_DATA);
970
971 switch (code) {
972 case MCDI_EVENT_CODE_BADSSERT:
Ben Hutchings62776d02010-06-23 11:30:07 +0000973 netif_err(efx, hw, efx->net_dev,
974 "MC watchdog or assertion failure at 0x%x\n", data);
Ben Hutchings5bc283e2012-10-08 21:43:00 +0100975 efx_mcdi_ev_death(efx, -EINTR);
Ben Hutchingsafd4aea2009-11-29 15:15:25 +0000976 break;
977
978 case MCDI_EVENT_CODE_PMNOTICE:
Ben Hutchings62776d02010-06-23 11:30:07 +0000979 netif_info(efx, wol, efx->net_dev, "MCDI PM event.\n");
Ben Hutchingsafd4aea2009-11-29 15:15:25 +0000980 break;
981
982 case MCDI_EVENT_CODE_CMDDONE:
983 efx_mcdi_ev_cpl(efx,
984 MCDI_EVENT_FIELD(*event, CMDDONE_SEQ),
985 MCDI_EVENT_FIELD(*event, CMDDONE_DATALEN),
986 MCDI_EVENT_FIELD(*event, CMDDONE_ERRNO));
987 break;
988
989 case MCDI_EVENT_CODE_LINKCHANGE:
990 efx_mcdi_process_link_change(efx, event);
991 break;
992 case MCDI_EVENT_CODE_SENSOREVT:
993 efx_mcdi_sensor_event(efx, event);
994 break;
995 case MCDI_EVENT_CODE_SCHEDERR:
Robert Stonehouse2d9955b2013-10-07 18:44:17 +0100996 netif_dbg(efx, hw, efx->net_dev,
997 "MC Scheduler alert (0x%x)\n", data);
Ben Hutchingsafd4aea2009-11-29 15:15:25 +0000998 break;
999 case MCDI_EVENT_CODE_REBOOT:
Ben Hutchings8127d662013-08-29 19:19:29 +01001000 case MCDI_EVENT_CODE_MC_REBOOT:
Ben Hutchings62776d02010-06-23 11:30:07 +00001001 netif_info(efx, hw, efx->net_dev, "MC Reboot\n");
Ben Hutchings5bc283e2012-10-08 21:43:00 +01001002 efx_mcdi_ev_death(efx, -EIO);
Ben Hutchingsafd4aea2009-11-29 15:15:25 +00001003 break;
Jon Cooper74cd60a2013-09-16 14:18:51 +01001004 case MCDI_EVENT_CODE_MC_BIST:
1005 netif_info(efx, hw, efx->net_dev, "MC entered BIST mode\n");
1006 efx_mcdi_ev_bist(efx);
1007 break;
Ben Hutchingsafd4aea2009-11-29 15:15:25 +00001008 case MCDI_EVENT_CODE_MAC_STATS_DMA:
1009 /* MAC stats are gather lazily. We can ignore this. */
1010 break;
Ben Hutchingscd2d5b52012-02-14 00:48:07 +00001011 case MCDI_EVENT_CODE_FLR:
1012 efx_sriov_flr(efx, MCDI_EVENT_FIELD(*event, FLR_VF));
1013 break;
Stuart Hodgson7c236c42012-09-03 11:09:36 +01001014 case MCDI_EVENT_CODE_PTP_RX:
1015 case MCDI_EVENT_CODE_PTP_FAULT:
1016 case MCDI_EVENT_CODE_PTP_PPS:
1017 efx_ptp_event(efx, event);
1018 break;
Ben Hutchings8127d662013-08-29 19:19:29 +01001019 case MCDI_EVENT_CODE_TX_FLUSH:
1020 case MCDI_EVENT_CODE_RX_FLUSH:
1021 /* Two flush events will be sent: one to the same event
1022 * queue as completions, and one to event queue 0.
1023 * In the latter case the {RX,TX}_FLUSH_TO_DRIVER
1024 * flag will be set, and we should ignore the event
1025 * because we want to wait for all completions.
1026 */
1027 BUILD_BUG_ON(MCDI_EVENT_TX_FLUSH_TO_DRIVER_LBN !=
1028 MCDI_EVENT_RX_FLUSH_TO_DRIVER_LBN);
1029 if (!MCDI_EVENT_FIELD(*event, TX_FLUSH_TO_DRIVER))
1030 efx_ef10_handle_drain_event(efx);
1031 break;
Alexandre Rames3de82b92013-06-13 11:36:15 +01001032 case MCDI_EVENT_CODE_TX_ERR:
1033 case MCDI_EVENT_CODE_RX_ERR:
1034 netif_err(efx, hw, efx->net_dev,
1035 "%s DMA error (event: "EFX_QWORD_FMT")\n",
1036 code == MCDI_EVENT_CODE_TX_ERR ? "TX" : "RX",
1037 EFX_QWORD_VAL(*event));
1038 efx_schedule_reset(efx, RESET_TYPE_DMA_ERROR);
1039 break;
Ben Hutchingsafd4aea2009-11-29 15:15:25 +00001040 default:
Ben Hutchings62776d02010-06-23 11:30:07 +00001041 netif_err(efx, hw, efx->net_dev, "Unknown MCDI event 0x%x\n",
1042 code);
Ben Hutchingsafd4aea2009-11-29 15:15:25 +00001043 }
1044}
1045
1046/**************************************************************************
1047 *
1048 * Specific request functions
1049 *
1050 **************************************************************************
1051 */
1052
Ben Hutchingse5f0fd22011-02-24 23:57:47 +00001053void efx_mcdi_print_fwver(struct efx_nic *efx, char *buf, size_t len)
Ben Hutchingsafd4aea2009-11-29 15:15:25 +00001054{
Ben Hutchings8127d662013-08-29 19:19:29 +01001055 MCDI_DECLARE_BUF(outbuf,
1056 max(MC_CMD_GET_VERSION_OUT_LEN,
1057 MC_CMD_GET_CAPABILITIES_OUT_LEN));
Ben Hutchingsafd4aea2009-11-29 15:15:25 +00001058 size_t outlength;
1059 const __le16 *ver_words;
Ben Hutchings8127d662013-08-29 19:19:29 +01001060 size_t offset;
Ben Hutchingsafd4aea2009-11-29 15:15:25 +00001061 int rc;
1062
1063 BUILD_BUG_ON(MC_CMD_GET_VERSION_IN_LEN != 0);
Ben Hutchingsafd4aea2009-11-29 15:15:25 +00001064 rc = efx_mcdi_rpc(efx, MC_CMD_GET_VERSION, NULL, 0,
1065 outbuf, sizeof(outbuf), &outlength);
1066 if (rc)
1067 goto fail;
Ben Hutchings05a93202011-12-20 00:44:06 +00001068 if (outlength < MC_CMD_GET_VERSION_OUT_LEN) {
Ben Hutchings00bbb4a2010-04-28 09:27:14 +00001069 rc = -EIO;
Ben Hutchingsafd4aea2009-11-29 15:15:25 +00001070 goto fail;
1071 }
1072
1073 ver_words = (__le16 *)MCDI_PTR(outbuf, GET_VERSION_OUT_VERSION);
Ben Hutchings8127d662013-08-29 19:19:29 +01001074 offset = snprintf(buf, len, "%u.%u.%u.%u",
1075 le16_to_cpu(ver_words[0]), le16_to_cpu(ver_words[1]),
1076 le16_to_cpu(ver_words[2]), le16_to_cpu(ver_words[3]));
1077
1078 /* EF10 may have multiple datapath firmware variants within a
1079 * single version. Report which variants are running.
1080 */
1081 if (efx_nic_rev(efx) >= EFX_REV_HUNT_A0) {
1082 BUILD_BUG_ON(MC_CMD_GET_CAPABILITIES_IN_LEN != 0);
1083 rc = efx_mcdi_rpc(efx, MC_CMD_GET_CAPABILITIES, NULL, 0,
1084 outbuf, sizeof(outbuf), &outlength);
1085 if (rc || outlength < MC_CMD_GET_CAPABILITIES_OUT_LEN)
1086 offset += snprintf(
1087 buf + offset, len - offset, " rx? tx?");
1088 else
1089 offset += snprintf(
1090 buf + offset, len - offset, " rx%x tx%x",
1091 MCDI_WORD(outbuf,
1092 GET_CAPABILITIES_OUT_RX_DPCPU_FW_ID),
1093 MCDI_WORD(outbuf,
1094 GET_CAPABILITIES_OUT_TX_DPCPU_FW_ID));
1095
1096 /* It's theoretically possible for the string to exceed 31
1097 * characters, though in practice the first three version
1098 * components are short enough that this doesn't happen.
1099 */
1100 if (WARN_ON(offset >= len))
1101 buf[0] = 0;
1102 }
1103
Ben Hutchingse5f0fd22011-02-24 23:57:47 +00001104 return;
Ben Hutchingsafd4aea2009-11-29 15:15:25 +00001105
1106fail:
Ben Hutchings62776d02010-06-23 11:30:07 +00001107 netif_err(efx, probe, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
Ben Hutchingse5f0fd22011-02-24 23:57:47 +00001108 buf[0] = 0;
Ben Hutchingsafd4aea2009-11-29 15:15:25 +00001109}
1110
Ben Hutchings4c75b43a2013-08-29 19:04:03 +01001111static int efx_mcdi_drv_attach(struct efx_nic *efx, bool driver_operating,
1112 bool *was_attached)
Ben Hutchingsafd4aea2009-11-29 15:15:25 +00001113{
Ben Hutchings59cfc472012-09-14 17:30:10 +01001114 MCDI_DECLARE_BUF(inbuf, MC_CMD_DRV_ATTACH_IN_LEN);
Ben Hutchingsecb1c9c2013-10-07 20:10:11 +01001115 MCDI_DECLARE_BUF(outbuf, MC_CMD_DRV_ATTACH_EXT_OUT_LEN);
Ben Hutchingsafd4aea2009-11-29 15:15:25 +00001116 size_t outlen;
1117 int rc;
1118
1119 MCDI_SET_DWORD(inbuf, DRV_ATTACH_IN_NEW_STATE,
1120 driver_operating ? 1 : 0);
1121 MCDI_SET_DWORD(inbuf, DRV_ATTACH_IN_UPDATE, 1);
Ben Hutchingsf2b0bef2013-08-20 20:35:50 +01001122 MCDI_SET_DWORD(inbuf, DRV_ATTACH_IN_FIRMWARE_ID, MC_CMD_FW_LOW_LATENCY);
Ben Hutchingsafd4aea2009-11-29 15:15:25 +00001123
1124 rc = efx_mcdi_rpc(efx, MC_CMD_DRV_ATTACH, inbuf, sizeof(inbuf),
1125 outbuf, sizeof(outbuf), &outlen);
1126 if (rc)
1127 goto fail;
Ben Hutchings00bbb4a2010-04-28 09:27:14 +00001128 if (outlen < MC_CMD_DRV_ATTACH_OUT_LEN) {
1129 rc = -EIO;
Ben Hutchingsafd4aea2009-11-29 15:15:25 +00001130 goto fail;
Ben Hutchings00bbb4a2010-04-28 09:27:14 +00001131 }
Ben Hutchingsafd4aea2009-11-29 15:15:25 +00001132
Ben Hutchingsecb1c9c2013-10-07 20:10:11 +01001133 /* We currently assume we have control of the external link
1134 * and are completely trusted by firmware. Abort probing
1135 * if that's not true for this function.
1136 */
1137 if (driver_operating &&
1138 outlen >= MC_CMD_DRV_ATTACH_EXT_OUT_LEN &&
1139 (MCDI_DWORD(outbuf, DRV_ATTACH_EXT_OUT_FUNC_FLAGS) &
1140 (1 << MC_CMD_DRV_ATTACH_EXT_OUT_FLAG_LINKCTRL |
1141 1 << MC_CMD_DRV_ATTACH_EXT_OUT_FLAG_TRUSTED)) !=
1142 (1 << MC_CMD_DRV_ATTACH_EXT_OUT_FLAG_LINKCTRL |
1143 1 << MC_CMD_DRV_ATTACH_EXT_OUT_FLAG_TRUSTED)) {
1144 netif_err(efx, probe, efx->net_dev,
1145 "This driver version only supports one function per port\n");
1146 return -ENODEV;
1147 }
1148
Ben Hutchingsafd4aea2009-11-29 15:15:25 +00001149 if (was_attached != NULL)
1150 *was_attached = MCDI_DWORD(outbuf, DRV_ATTACH_OUT_OLD_STATE);
1151 return 0;
1152
1153fail:
Ben Hutchings62776d02010-06-23 11:30:07 +00001154 netif_err(efx, probe, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
Ben Hutchingsafd4aea2009-11-29 15:15:25 +00001155 return rc;
1156}
1157
1158int efx_mcdi_get_board_cfg(struct efx_nic *efx, u8 *mac_address,
Matthew Slattery6aa9c7f2010-07-14 15:36:19 +01001159 u16 *fw_subtype_list, u32 *capabilities)
Ben Hutchingsafd4aea2009-11-29 15:15:25 +00001160{
Ben Hutchings59cfc472012-09-14 17:30:10 +01001161 MCDI_DECLARE_BUF(outbuf, MC_CMD_GET_BOARD_CFG_OUT_LENMAX);
Ben Hutchingsc5bb0e92012-09-14 17:31:33 +01001162 size_t outlen, i;
Ben Hutchingsafd4aea2009-11-29 15:15:25 +00001163 int port_num = efx_port_num(efx);
Ben Hutchingsafd4aea2009-11-29 15:15:25 +00001164 int rc;
1165
1166 BUILD_BUG_ON(MC_CMD_GET_BOARD_CFG_IN_LEN != 0);
1167
1168 rc = efx_mcdi_rpc(efx, MC_CMD_GET_BOARD_CFG, NULL, 0,
1169 outbuf, sizeof(outbuf), &outlen);
1170 if (rc)
1171 goto fail;
1172
Ben Hutchings05a93202011-12-20 00:44:06 +00001173 if (outlen < MC_CMD_GET_BOARD_CFG_OUT_LENMIN) {
Ben Hutchings00bbb4a2010-04-28 09:27:14 +00001174 rc = -EIO;
Ben Hutchingsafd4aea2009-11-29 15:15:25 +00001175 goto fail;
1176 }
1177
Ben Hutchingsafd4aea2009-11-29 15:15:25 +00001178 if (mac_address)
Ben Hutchingsc5bb0e92012-09-14 17:31:33 +01001179 memcpy(mac_address,
1180 port_num ?
1181 MCDI_PTR(outbuf, GET_BOARD_CFG_OUT_MAC_ADDR_BASE_PORT1) :
1182 MCDI_PTR(outbuf, GET_BOARD_CFG_OUT_MAC_ADDR_BASE_PORT0),
1183 ETH_ALEN);
Ben Hutchingsbfeed902012-09-07 00:58:10 +01001184 if (fw_subtype_list) {
Ben Hutchingsbfeed902012-09-07 00:58:10 +01001185 for (i = 0;
Ben Hutchingsc5bb0e92012-09-14 17:31:33 +01001186 i < MCDI_VAR_ARRAY_LEN(outlen,
1187 GET_BOARD_CFG_OUT_FW_SUBTYPE_LIST);
1188 i++)
1189 fw_subtype_list[i] = MCDI_ARRAY_WORD(
1190 outbuf, GET_BOARD_CFG_OUT_FW_SUBTYPE_LIST, i);
1191 for (; i < MC_CMD_GET_BOARD_CFG_OUT_FW_SUBTYPE_LIST_MAXNUM; i++)
1192 fw_subtype_list[i] = 0;
Ben Hutchingsbfeed902012-09-07 00:58:10 +01001193 }
Matthew Slattery6aa9c7f2010-07-14 15:36:19 +01001194 if (capabilities) {
1195 if (port_num)
1196 *capabilities = MCDI_DWORD(outbuf,
1197 GET_BOARD_CFG_OUT_CAPABILITIES_PORT1);
1198 else
1199 *capabilities = MCDI_DWORD(outbuf,
1200 GET_BOARD_CFG_OUT_CAPABILITIES_PORT0);
1201 }
Ben Hutchingsafd4aea2009-11-29 15:15:25 +00001202
1203 return 0;
1204
1205fail:
Ben Hutchings62776d02010-06-23 11:30:07 +00001206 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d len=%d\n",
1207 __func__, rc, (int)outlen);
Ben Hutchingsafd4aea2009-11-29 15:15:25 +00001208
1209 return rc;
1210}
1211
1212int efx_mcdi_log_ctrl(struct efx_nic *efx, bool evq, bool uart, u32 dest_evq)
1213{
Ben Hutchings59cfc472012-09-14 17:30:10 +01001214 MCDI_DECLARE_BUF(inbuf, MC_CMD_LOG_CTRL_IN_LEN);
Ben Hutchingsafd4aea2009-11-29 15:15:25 +00001215 u32 dest = 0;
1216 int rc;
1217
1218 if (uart)
1219 dest |= MC_CMD_LOG_CTRL_IN_LOG_DEST_UART;
1220 if (evq)
1221 dest |= MC_CMD_LOG_CTRL_IN_LOG_DEST_EVQ;
1222
1223 MCDI_SET_DWORD(inbuf, LOG_CTRL_IN_LOG_DEST, dest);
1224 MCDI_SET_DWORD(inbuf, LOG_CTRL_IN_LOG_DEST_EVQ, dest_evq);
1225
1226 BUILD_BUG_ON(MC_CMD_LOG_CTRL_OUT_LEN != 0);
1227
1228 rc = efx_mcdi_rpc(efx, MC_CMD_LOG_CTRL, inbuf, sizeof(inbuf),
1229 NULL, 0, NULL);
Ben Hutchingsafd4aea2009-11-29 15:15:25 +00001230 return rc;
1231}
1232
1233int efx_mcdi_nvram_types(struct efx_nic *efx, u32 *nvram_types_out)
1234{
Ben Hutchings59cfc472012-09-14 17:30:10 +01001235 MCDI_DECLARE_BUF(outbuf, MC_CMD_NVRAM_TYPES_OUT_LEN);
Ben Hutchingsafd4aea2009-11-29 15:15:25 +00001236 size_t outlen;
1237 int rc;
1238
1239 BUILD_BUG_ON(MC_CMD_NVRAM_TYPES_IN_LEN != 0);
1240
1241 rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_TYPES, NULL, 0,
1242 outbuf, sizeof(outbuf), &outlen);
1243 if (rc)
1244 goto fail;
Ben Hutchings00bbb4a2010-04-28 09:27:14 +00001245 if (outlen < MC_CMD_NVRAM_TYPES_OUT_LEN) {
1246 rc = -EIO;
Ben Hutchingsafd4aea2009-11-29 15:15:25 +00001247 goto fail;
Ben Hutchings00bbb4a2010-04-28 09:27:14 +00001248 }
Ben Hutchingsafd4aea2009-11-29 15:15:25 +00001249
1250 *nvram_types_out = MCDI_DWORD(outbuf, NVRAM_TYPES_OUT_TYPES);
1251 return 0;
1252
1253fail:
Ben Hutchings62776d02010-06-23 11:30:07 +00001254 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n",
1255 __func__, rc);
Ben Hutchingsafd4aea2009-11-29 15:15:25 +00001256 return rc;
1257}
1258
1259int efx_mcdi_nvram_info(struct efx_nic *efx, unsigned int type,
1260 size_t *size_out, size_t *erase_size_out,
1261 bool *protected_out)
1262{
Ben Hutchings59cfc472012-09-14 17:30:10 +01001263 MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_INFO_IN_LEN);
1264 MCDI_DECLARE_BUF(outbuf, MC_CMD_NVRAM_INFO_OUT_LEN);
Ben Hutchingsafd4aea2009-11-29 15:15:25 +00001265 size_t outlen;
1266 int rc;
1267
1268 MCDI_SET_DWORD(inbuf, NVRAM_INFO_IN_TYPE, type);
1269
1270 rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_INFO, inbuf, sizeof(inbuf),
1271 outbuf, sizeof(outbuf), &outlen);
1272 if (rc)
1273 goto fail;
Ben Hutchings00bbb4a2010-04-28 09:27:14 +00001274 if (outlen < MC_CMD_NVRAM_INFO_OUT_LEN) {
1275 rc = -EIO;
Ben Hutchingsafd4aea2009-11-29 15:15:25 +00001276 goto fail;
Ben Hutchings00bbb4a2010-04-28 09:27:14 +00001277 }
Ben Hutchingsafd4aea2009-11-29 15:15:25 +00001278
1279 *size_out = MCDI_DWORD(outbuf, NVRAM_INFO_OUT_SIZE);
1280 *erase_size_out = MCDI_DWORD(outbuf, NVRAM_INFO_OUT_ERASESIZE);
1281 *protected_out = !!(MCDI_DWORD(outbuf, NVRAM_INFO_OUT_FLAGS) &
Ben Hutchings05a93202011-12-20 00:44:06 +00001282 (1 << MC_CMD_NVRAM_INFO_OUT_PROTECTED_LBN));
Ben Hutchingsafd4aea2009-11-29 15:15:25 +00001283 return 0;
1284
1285fail:
Ben Hutchings62776d02010-06-23 11:30:07 +00001286 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
Ben Hutchingsafd4aea2009-11-29 15:15:25 +00001287 return rc;
1288}
1289
Ben Hutchings2e803402010-02-03 09:31:01 +00001290static int efx_mcdi_nvram_test(struct efx_nic *efx, unsigned int type)
1291{
Ben Hutchings59cfc472012-09-14 17:30:10 +01001292 MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_TEST_IN_LEN);
1293 MCDI_DECLARE_BUF(outbuf, MC_CMD_NVRAM_TEST_OUT_LEN);
Ben Hutchings2e803402010-02-03 09:31:01 +00001294 int rc;
1295
1296 MCDI_SET_DWORD(inbuf, NVRAM_TEST_IN_TYPE, type);
1297
1298 rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_TEST, inbuf, sizeof(inbuf),
1299 outbuf, sizeof(outbuf), NULL);
1300 if (rc)
1301 return rc;
1302
1303 switch (MCDI_DWORD(outbuf, NVRAM_TEST_OUT_RESULT)) {
1304 case MC_CMD_NVRAM_TEST_PASS:
1305 case MC_CMD_NVRAM_TEST_NOTSUPP:
1306 return 0;
1307 default:
1308 return -EIO;
1309 }
1310}
1311
1312int efx_mcdi_nvram_test_all(struct efx_nic *efx)
1313{
1314 u32 nvram_types;
1315 unsigned int type;
1316 int rc;
1317
1318 rc = efx_mcdi_nvram_types(efx, &nvram_types);
1319 if (rc)
Ben Hutchingsb548a982010-04-28 09:28:36 +00001320 goto fail1;
Ben Hutchings2e803402010-02-03 09:31:01 +00001321
1322 type = 0;
1323 while (nvram_types != 0) {
1324 if (nvram_types & 1) {
1325 rc = efx_mcdi_nvram_test(efx, type);
1326 if (rc)
Ben Hutchingsb548a982010-04-28 09:28:36 +00001327 goto fail2;
Ben Hutchings2e803402010-02-03 09:31:01 +00001328 }
1329 type++;
1330 nvram_types >>= 1;
1331 }
1332
1333 return 0;
Ben Hutchingsb548a982010-04-28 09:28:36 +00001334
1335fail2:
Ben Hutchings62776d02010-06-23 11:30:07 +00001336 netif_err(efx, hw, efx->net_dev, "%s: failed type=%u\n",
1337 __func__, type);
Ben Hutchingsb548a982010-04-28 09:28:36 +00001338fail1:
Ben Hutchings62776d02010-06-23 11:30:07 +00001339 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
Ben Hutchingsb548a982010-04-28 09:28:36 +00001340 return rc;
Ben Hutchings2e803402010-02-03 09:31:01 +00001341}
1342
Steve Hodgson8b2103a2010-02-03 09:30:17 +00001343static int efx_mcdi_read_assertion(struct efx_nic *efx)
Ben Hutchingsafd4aea2009-11-29 15:15:25 +00001344{
Ben Hutchings59cfc472012-09-14 17:30:10 +01001345 MCDI_DECLARE_BUF(inbuf, MC_CMD_GET_ASSERTS_IN_LEN);
Edward Cree1e0b8122013-05-31 18:36:12 +01001346 MCDI_DECLARE_BUF_OUT_OR_ERR(outbuf, MC_CMD_GET_ASSERTS_OUT_LEN);
Ben Hutchingsc5bb0e92012-09-14 17:31:33 +01001347 unsigned int flags, index;
Ben Hutchingsafd4aea2009-11-29 15:15:25 +00001348 const char *reason;
1349 size_t outlen;
1350 int retry;
1351 int rc;
1352
Steve Hodgson8b2103a2010-02-03 09:30:17 +00001353 /* Attempt to read any stored assertion state before we reboot
1354 * the mcfw out of the assertion handler. Retry twice, once
Ben Hutchingsafd4aea2009-11-29 15:15:25 +00001355 * because a boot-time assertion might cause this command to fail
1356 * with EINTR. And once again because GET_ASSERTS can race with
1357 * MC_CMD_REBOOT running on the other port. */
1358 retry = 2;
1359 do {
Steve Hodgson8b2103a2010-02-03 09:30:17 +00001360 MCDI_SET_DWORD(inbuf, GET_ASSERTS_IN_CLEAR, 1);
Edward Cree1e0b8122013-05-31 18:36:12 +01001361 rc = efx_mcdi_rpc_quiet(efx, MC_CMD_GET_ASSERTS,
1362 inbuf, MC_CMD_GET_ASSERTS_IN_LEN,
1363 outbuf, sizeof(outbuf), &outlen);
Ben Hutchingsafd4aea2009-11-29 15:15:25 +00001364 } while ((rc == -EINTR || rc == -EIO) && retry-- > 0);
1365
Edward Cree1e0b8122013-05-31 18:36:12 +01001366 if (rc) {
1367 efx_mcdi_display_error(efx, MC_CMD_GET_ASSERTS,
1368 MC_CMD_GET_ASSERTS_IN_LEN, outbuf,
1369 outlen, rc);
Ben Hutchingsafd4aea2009-11-29 15:15:25 +00001370 return rc;
Edward Cree1e0b8122013-05-31 18:36:12 +01001371 }
Ben Hutchingsafd4aea2009-11-29 15:15:25 +00001372 if (outlen < MC_CMD_GET_ASSERTS_OUT_LEN)
Ben Hutchings00bbb4a2010-04-28 09:27:14 +00001373 return -EIO;
Ben Hutchingsafd4aea2009-11-29 15:15:25 +00001374
Steve Hodgson8b2103a2010-02-03 09:30:17 +00001375 /* Print out any recorded assertion state */
1376 flags = MCDI_DWORD(outbuf, GET_ASSERTS_OUT_GLOBAL_FLAGS);
Ben Hutchingsafd4aea2009-11-29 15:15:25 +00001377 if (flags == MC_CMD_GET_ASSERTS_FLAGS_NO_FAILS)
1378 return 0;
1379
Ben Hutchingsafd4aea2009-11-29 15:15:25 +00001380 reason = (flags == MC_CMD_GET_ASSERTS_FLAGS_SYS_FAIL)
1381 ? "system-level assertion"
1382 : (flags == MC_CMD_GET_ASSERTS_FLAGS_THR_FAIL)
1383 ? "thread-level assertion"
1384 : (flags == MC_CMD_GET_ASSERTS_FLAGS_WDOG_FIRED)
1385 ? "watchdog reset"
1386 : "unknown assertion";
Ben Hutchings62776d02010-06-23 11:30:07 +00001387 netif_err(efx, hw, efx->net_dev,
1388 "MCPU %s at PC = 0x%.8x in thread 0x%.8x\n", reason,
1389 MCDI_DWORD(outbuf, GET_ASSERTS_OUT_SAVED_PC_OFFS),
1390 MCDI_DWORD(outbuf, GET_ASSERTS_OUT_THREAD_OFFS));
Ben Hutchingsafd4aea2009-11-29 15:15:25 +00001391
1392 /* Print out the registers */
Ben Hutchingsc5bb0e92012-09-14 17:31:33 +01001393 for (index = 0;
1394 index < MC_CMD_GET_ASSERTS_OUT_GP_REGS_OFFS_NUM;
1395 index++)
1396 netif_err(efx, hw, efx->net_dev, "R%.2d (?): 0x%.8x\n",
1397 1 + index,
1398 MCDI_ARRAY_DWORD(outbuf, GET_ASSERTS_OUT_GP_REGS_OFFS,
1399 index));
Ben Hutchingsafd4aea2009-11-29 15:15:25 +00001400
1401 return 0;
1402}
1403
Steve Hodgson8b2103a2010-02-03 09:30:17 +00001404static void efx_mcdi_exit_assertion(struct efx_nic *efx)
1405{
Ben Hutchings59cfc472012-09-14 17:30:10 +01001406 MCDI_DECLARE_BUF(inbuf, MC_CMD_REBOOT_IN_LEN);
Steve Hodgson8b2103a2010-02-03 09:30:17 +00001407
Ben Hutchings0f1e54a2012-07-02 23:37:40 +01001408 /* If the MC is running debug firmware, it might now be
1409 * waiting for a debugger to attach, but we just want it to
1410 * reboot. We set a flag that makes the command a no-op if it
1411 * has already done so. We don't know what return code to
1412 * expect (0 or -EIO), so ignore it.
1413 */
Steve Hodgson8b2103a2010-02-03 09:30:17 +00001414 BUILD_BUG_ON(MC_CMD_REBOOT_OUT_LEN != 0);
1415 MCDI_SET_DWORD(inbuf, REBOOT_IN_FLAGS,
1416 MC_CMD_REBOOT_FLAGS_AFTER_ASSERTION);
Ben Hutchings0f1e54a2012-07-02 23:37:40 +01001417 (void) efx_mcdi_rpc(efx, MC_CMD_REBOOT, inbuf, MC_CMD_REBOOT_IN_LEN,
1418 NULL, 0, NULL);
Steve Hodgson8b2103a2010-02-03 09:30:17 +00001419}
1420
1421int efx_mcdi_handle_assertion(struct efx_nic *efx)
1422{
1423 int rc;
1424
1425 rc = efx_mcdi_read_assertion(efx);
1426 if (rc)
1427 return rc;
1428
1429 efx_mcdi_exit_assertion(efx);
1430
1431 return 0;
1432}
1433
Ben Hutchingsafd4aea2009-11-29 15:15:25 +00001434void efx_mcdi_set_id_led(struct efx_nic *efx, enum efx_led_mode mode)
1435{
Ben Hutchings59cfc472012-09-14 17:30:10 +01001436 MCDI_DECLARE_BUF(inbuf, MC_CMD_SET_ID_LED_IN_LEN);
Ben Hutchingsafd4aea2009-11-29 15:15:25 +00001437 int rc;
1438
1439 BUILD_BUG_ON(EFX_LED_OFF != MC_CMD_LED_OFF);
1440 BUILD_BUG_ON(EFX_LED_ON != MC_CMD_LED_ON);
1441 BUILD_BUG_ON(EFX_LED_DEFAULT != MC_CMD_LED_DEFAULT);
1442
1443 BUILD_BUG_ON(MC_CMD_SET_ID_LED_OUT_LEN != 0);
1444
1445 MCDI_SET_DWORD(inbuf, SET_ID_LED_IN_STATE, mode);
1446
1447 rc = efx_mcdi_rpc(efx, MC_CMD_SET_ID_LED, inbuf, sizeof(inbuf),
1448 NULL, 0, NULL);
Ben Hutchingsafd4aea2009-11-29 15:15:25 +00001449}
1450
Ben Hutchings6bff8612012-09-18 02:33:52 +01001451static int efx_mcdi_reset_port(struct efx_nic *efx)
Ben Hutchingsafd4aea2009-11-29 15:15:25 +00001452{
Edward Cree1e0b8122013-05-31 18:36:12 +01001453 return efx_mcdi_rpc(efx, MC_CMD_ENTITY_RESET, NULL, 0, NULL, 0, NULL);
Ben Hutchingsafd4aea2009-11-29 15:15:25 +00001454}
1455
Ben Hutchings6bff8612012-09-18 02:33:52 +01001456static int efx_mcdi_reset_mc(struct efx_nic *efx)
Ben Hutchingsafd4aea2009-11-29 15:15:25 +00001457{
Ben Hutchings59cfc472012-09-14 17:30:10 +01001458 MCDI_DECLARE_BUF(inbuf, MC_CMD_REBOOT_IN_LEN);
Ben Hutchingsafd4aea2009-11-29 15:15:25 +00001459 int rc;
1460
1461 BUILD_BUG_ON(MC_CMD_REBOOT_OUT_LEN != 0);
1462 MCDI_SET_DWORD(inbuf, REBOOT_IN_FLAGS, 0);
1463 rc = efx_mcdi_rpc(efx, MC_CMD_REBOOT, inbuf, sizeof(inbuf),
1464 NULL, 0, NULL);
1465 /* White is black, and up is down */
1466 if (rc == -EIO)
1467 return 0;
1468 if (rc == 0)
1469 rc = -EIO;
Ben Hutchingsafd4aea2009-11-29 15:15:25 +00001470 return rc;
1471}
1472
Ben Hutchings6bff8612012-09-18 02:33:52 +01001473enum reset_type efx_mcdi_map_reset_reason(enum reset_type reason)
1474{
1475 return RESET_TYPE_RECOVER_OR_ALL;
1476}
1477
1478int efx_mcdi_reset(struct efx_nic *efx, enum reset_type method)
1479{
1480 int rc;
1481
1482 /* Recover from a failed assertion pre-reset */
1483 rc = efx_mcdi_handle_assertion(efx);
1484 if (rc)
1485 return rc;
1486
1487 if (method == RESET_TYPE_WORLD)
1488 return efx_mcdi_reset_mc(efx);
1489 else
1490 return efx_mcdi_reset_port(efx);
1491}
1492
stephen hemmingerd2156972010-10-18 05:27:31 +00001493static int efx_mcdi_wol_filter_set(struct efx_nic *efx, u32 type,
1494 const u8 *mac, int *id_out)
Ben Hutchingsafd4aea2009-11-29 15:15:25 +00001495{
Ben Hutchings59cfc472012-09-14 17:30:10 +01001496 MCDI_DECLARE_BUF(inbuf, MC_CMD_WOL_FILTER_SET_IN_LEN);
1497 MCDI_DECLARE_BUF(outbuf, MC_CMD_WOL_FILTER_SET_OUT_LEN);
Ben Hutchingsafd4aea2009-11-29 15:15:25 +00001498 size_t outlen;
1499 int rc;
1500
1501 MCDI_SET_DWORD(inbuf, WOL_FILTER_SET_IN_WOL_TYPE, type);
1502 MCDI_SET_DWORD(inbuf, WOL_FILTER_SET_IN_FILTER_MODE,
1503 MC_CMD_FILTER_MODE_SIMPLE);
1504 memcpy(MCDI_PTR(inbuf, WOL_FILTER_SET_IN_MAGIC_MAC), mac, ETH_ALEN);
1505
1506 rc = efx_mcdi_rpc(efx, MC_CMD_WOL_FILTER_SET, inbuf, sizeof(inbuf),
1507 outbuf, sizeof(outbuf), &outlen);
1508 if (rc)
1509 goto fail;
1510
1511 if (outlen < MC_CMD_WOL_FILTER_SET_OUT_LEN) {
Ben Hutchings00bbb4a2010-04-28 09:27:14 +00001512 rc = -EIO;
Ben Hutchingsafd4aea2009-11-29 15:15:25 +00001513 goto fail;
1514 }
1515
1516 *id_out = (int)MCDI_DWORD(outbuf, WOL_FILTER_SET_OUT_FILTER_ID);
1517
1518 return 0;
1519
1520fail:
1521 *id_out = -1;
Ben Hutchings62776d02010-06-23 11:30:07 +00001522 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
Ben Hutchingsafd4aea2009-11-29 15:15:25 +00001523 return rc;
1524
1525}
1526
1527
1528int
1529efx_mcdi_wol_filter_set_magic(struct efx_nic *efx, const u8 *mac, int *id_out)
1530{
1531 return efx_mcdi_wol_filter_set(efx, MC_CMD_WOL_TYPE_MAGIC, mac, id_out);
1532}
1533
1534
1535int efx_mcdi_wol_filter_get_magic(struct efx_nic *efx, int *id_out)
1536{
Ben Hutchings59cfc472012-09-14 17:30:10 +01001537 MCDI_DECLARE_BUF(outbuf, MC_CMD_WOL_FILTER_GET_OUT_LEN);
Ben Hutchingsafd4aea2009-11-29 15:15:25 +00001538 size_t outlen;
1539 int rc;
1540
1541 rc = efx_mcdi_rpc(efx, MC_CMD_WOL_FILTER_GET, NULL, 0,
1542 outbuf, sizeof(outbuf), &outlen);
1543 if (rc)
1544 goto fail;
1545
1546 if (outlen < MC_CMD_WOL_FILTER_GET_OUT_LEN) {
Ben Hutchings00bbb4a2010-04-28 09:27:14 +00001547 rc = -EIO;
Ben Hutchingsafd4aea2009-11-29 15:15:25 +00001548 goto fail;
1549 }
1550
1551 *id_out = (int)MCDI_DWORD(outbuf, WOL_FILTER_GET_OUT_FILTER_ID);
1552
1553 return 0;
1554
1555fail:
1556 *id_out = -1;
Ben Hutchings62776d02010-06-23 11:30:07 +00001557 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
Ben Hutchingsafd4aea2009-11-29 15:15:25 +00001558 return rc;
1559}
1560
1561
1562int efx_mcdi_wol_filter_remove(struct efx_nic *efx, int id)
1563{
Ben Hutchings59cfc472012-09-14 17:30:10 +01001564 MCDI_DECLARE_BUF(inbuf, MC_CMD_WOL_FILTER_REMOVE_IN_LEN);
Ben Hutchingsafd4aea2009-11-29 15:15:25 +00001565 int rc;
1566
1567 MCDI_SET_DWORD(inbuf, WOL_FILTER_REMOVE_IN_FILTER_ID, (u32)id);
1568
1569 rc = efx_mcdi_rpc(efx, MC_CMD_WOL_FILTER_REMOVE, inbuf, sizeof(inbuf),
1570 NULL, 0, NULL);
Ben Hutchingsafd4aea2009-11-29 15:15:25 +00001571 return rc;
1572}
1573
Ben Hutchingscd2d5b52012-02-14 00:48:07 +00001574int efx_mcdi_flush_rxqs(struct efx_nic *efx)
1575{
1576 struct efx_channel *channel;
1577 struct efx_rx_queue *rx_queue;
Ben Hutchingsc5bb0e92012-09-14 17:31:33 +01001578 MCDI_DECLARE_BUF(inbuf,
1579 MC_CMD_FLUSH_RX_QUEUES_IN_LEN(EFX_MAX_CHANNELS));
Ben Hutchingscd2d5b52012-02-14 00:48:07 +00001580 int rc, count;
1581
Ben Hutchings45078372012-09-19 02:53:34 +01001582 BUILD_BUG_ON(EFX_MAX_CHANNELS >
1583 MC_CMD_FLUSH_RX_QUEUES_IN_QID_OFST_MAXNUM);
1584
Ben Hutchingscd2d5b52012-02-14 00:48:07 +00001585 count = 0;
1586 efx_for_each_channel(channel, efx) {
1587 efx_for_each_channel_rx_queue(rx_queue, channel) {
1588 if (rx_queue->flush_pending) {
1589 rx_queue->flush_pending = false;
1590 atomic_dec(&efx->rxq_flush_pending);
Ben Hutchingsc5bb0e92012-09-14 17:31:33 +01001591 MCDI_SET_ARRAY_DWORD(
1592 inbuf, FLUSH_RX_QUEUES_IN_QID_OFST,
1593 count, efx_rx_queue_index(rx_queue));
1594 count++;
Ben Hutchingscd2d5b52012-02-14 00:48:07 +00001595 }
1596 }
1597 }
1598
Ben Hutchingsc5bb0e92012-09-14 17:31:33 +01001599 rc = efx_mcdi_rpc(efx, MC_CMD_FLUSH_RX_QUEUES, inbuf,
1600 MC_CMD_FLUSH_RX_QUEUES_IN_LEN(count), NULL, 0, NULL);
Ben Hutchingsbbec9692012-09-11 18:25:13 +01001601 WARN_ON(rc < 0);
Ben Hutchingscd2d5b52012-02-14 00:48:07 +00001602
Ben Hutchingscd2d5b52012-02-14 00:48:07 +00001603 return rc;
1604}
Ben Hutchingsafd4aea2009-11-29 15:15:25 +00001605
1606int efx_mcdi_wol_filter_reset(struct efx_nic *efx)
1607{
1608 int rc;
1609
1610 rc = efx_mcdi_rpc(efx, MC_CMD_WOL_FILTER_RESET, NULL, 0, NULL, 0, NULL);
Ben Hutchingsafd4aea2009-11-29 15:15:25 +00001611 return rc;
1612}
1613
Ben Hutchings8127d662013-08-29 19:19:29 +01001614int efx_mcdi_set_workaround(struct efx_nic *efx, u32 type, bool enabled)
1615{
1616 MCDI_DECLARE_BUF(inbuf, MC_CMD_WORKAROUND_IN_LEN);
1617
1618 BUILD_BUG_ON(MC_CMD_WORKAROUND_OUT_LEN != 0);
1619 MCDI_SET_DWORD(inbuf, WORKAROUND_IN_TYPE, type);
1620 MCDI_SET_DWORD(inbuf, WORKAROUND_IN_ENABLED, enabled);
1621 return efx_mcdi_rpc(efx, MC_CMD_WORKAROUND, inbuf, sizeof(inbuf),
1622 NULL, 0, NULL);
1623}
1624
Ben Hutchings45a3fd52012-11-28 04:38:14 +00001625#ifdef CONFIG_SFC_MTD
1626
1627#define EFX_MCDI_NVRAM_LEN_MAX 128
1628
1629static int efx_mcdi_nvram_update_start(struct efx_nic *efx, unsigned int type)
1630{
1631 MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_UPDATE_START_IN_LEN);
1632 int rc;
1633
1634 MCDI_SET_DWORD(inbuf, NVRAM_UPDATE_START_IN_TYPE, type);
1635
1636 BUILD_BUG_ON(MC_CMD_NVRAM_UPDATE_START_OUT_LEN != 0);
1637
1638 rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_UPDATE_START, inbuf, sizeof(inbuf),
1639 NULL, 0, NULL);
Ben Hutchings45a3fd52012-11-28 04:38:14 +00001640 return rc;
1641}
1642
1643static int efx_mcdi_nvram_read(struct efx_nic *efx, unsigned int type,
1644 loff_t offset, u8 *buffer, size_t length)
1645{
1646 MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_READ_IN_LEN);
1647 MCDI_DECLARE_BUF(outbuf,
1648 MC_CMD_NVRAM_READ_OUT_LEN(EFX_MCDI_NVRAM_LEN_MAX));
1649 size_t outlen;
1650 int rc;
1651
1652 MCDI_SET_DWORD(inbuf, NVRAM_READ_IN_TYPE, type);
1653 MCDI_SET_DWORD(inbuf, NVRAM_READ_IN_OFFSET, offset);
1654 MCDI_SET_DWORD(inbuf, NVRAM_READ_IN_LENGTH, length);
1655
1656 rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_READ, inbuf, sizeof(inbuf),
1657 outbuf, sizeof(outbuf), &outlen);
1658 if (rc)
Edward Cree1e0b8122013-05-31 18:36:12 +01001659 return rc;
Ben Hutchings45a3fd52012-11-28 04:38:14 +00001660
1661 memcpy(buffer, MCDI_PTR(outbuf, NVRAM_READ_OUT_READ_BUFFER), length);
1662 return 0;
Ben Hutchings45a3fd52012-11-28 04:38:14 +00001663}
1664
1665static int efx_mcdi_nvram_write(struct efx_nic *efx, unsigned int type,
1666 loff_t offset, const u8 *buffer, size_t length)
1667{
1668 MCDI_DECLARE_BUF(inbuf,
1669 MC_CMD_NVRAM_WRITE_IN_LEN(EFX_MCDI_NVRAM_LEN_MAX));
1670 int rc;
1671
1672 MCDI_SET_DWORD(inbuf, NVRAM_WRITE_IN_TYPE, type);
1673 MCDI_SET_DWORD(inbuf, NVRAM_WRITE_IN_OFFSET, offset);
1674 MCDI_SET_DWORD(inbuf, NVRAM_WRITE_IN_LENGTH, length);
1675 memcpy(MCDI_PTR(inbuf, NVRAM_WRITE_IN_WRITE_BUFFER), buffer, length);
1676
1677 BUILD_BUG_ON(MC_CMD_NVRAM_WRITE_OUT_LEN != 0);
1678
1679 rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_WRITE, inbuf,
1680 ALIGN(MC_CMD_NVRAM_WRITE_IN_LEN(length), 4),
1681 NULL, 0, NULL);
Ben Hutchings45a3fd52012-11-28 04:38:14 +00001682 return rc;
1683}
1684
1685static int efx_mcdi_nvram_erase(struct efx_nic *efx, unsigned int type,
1686 loff_t offset, size_t length)
1687{
1688 MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_ERASE_IN_LEN);
1689 int rc;
1690
1691 MCDI_SET_DWORD(inbuf, NVRAM_ERASE_IN_TYPE, type);
1692 MCDI_SET_DWORD(inbuf, NVRAM_ERASE_IN_OFFSET, offset);
1693 MCDI_SET_DWORD(inbuf, NVRAM_ERASE_IN_LENGTH, length);
1694
1695 BUILD_BUG_ON(MC_CMD_NVRAM_ERASE_OUT_LEN != 0);
1696
1697 rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_ERASE, inbuf, sizeof(inbuf),
1698 NULL, 0, NULL);
Ben Hutchings45a3fd52012-11-28 04:38:14 +00001699 return rc;
1700}
1701
1702static int efx_mcdi_nvram_update_finish(struct efx_nic *efx, unsigned int type)
1703{
1704 MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_UPDATE_FINISH_IN_LEN);
1705 int rc;
1706
1707 MCDI_SET_DWORD(inbuf, NVRAM_UPDATE_FINISH_IN_TYPE, type);
1708
1709 BUILD_BUG_ON(MC_CMD_NVRAM_UPDATE_FINISH_OUT_LEN != 0);
1710
1711 rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_UPDATE_FINISH, inbuf, sizeof(inbuf),
1712 NULL, 0, NULL);
Ben Hutchings45a3fd52012-11-28 04:38:14 +00001713 return rc;
1714}
1715
1716int efx_mcdi_mtd_read(struct mtd_info *mtd, loff_t start,
1717 size_t len, size_t *retlen, u8 *buffer)
1718{
1719 struct efx_mcdi_mtd_partition *part = to_efx_mcdi_mtd_partition(mtd);
1720 struct efx_nic *efx = mtd->priv;
1721 loff_t offset = start;
1722 loff_t end = min_t(loff_t, start + len, mtd->size);
1723 size_t chunk;
1724 int rc = 0;
1725
1726 while (offset < end) {
1727 chunk = min_t(size_t, end - offset, EFX_MCDI_NVRAM_LEN_MAX);
1728 rc = efx_mcdi_nvram_read(efx, part->nvram_type, offset,
1729 buffer, chunk);
1730 if (rc)
1731 goto out;
1732 offset += chunk;
1733 buffer += chunk;
1734 }
1735out:
1736 *retlen = offset - start;
1737 return rc;
1738}
1739
1740int efx_mcdi_mtd_erase(struct mtd_info *mtd, loff_t start, size_t len)
1741{
1742 struct efx_mcdi_mtd_partition *part = to_efx_mcdi_mtd_partition(mtd);
1743 struct efx_nic *efx = mtd->priv;
1744 loff_t offset = start & ~((loff_t)(mtd->erasesize - 1));
1745 loff_t end = min_t(loff_t, start + len, mtd->size);
1746 size_t chunk = part->common.mtd.erasesize;
1747 int rc = 0;
1748
1749 if (!part->updating) {
1750 rc = efx_mcdi_nvram_update_start(efx, part->nvram_type);
1751 if (rc)
1752 goto out;
1753 part->updating = true;
1754 }
1755
1756 /* The MCDI interface can in fact do multiple erase blocks at once;
1757 * but erasing may be slow, so we make multiple calls here to avoid
1758 * tripping the MCDI RPC timeout. */
1759 while (offset < end) {
1760 rc = efx_mcdi_nvram_erase(efx, part->nvram_type, offset,
1761 chunk);
1762 if (rc)
1763 goto out;
1764 offset += chunk;
1765 }
1766out:
1767 return rc;
1768}
1769
1770int efx_mcdi_mtd_write(struct mtd_info *mtd, loff_t start,
1771 size_t len, size_t *retlen, const u8 *buffer)
1772{
1773 struct efx_mcdi_mtd_partition *part = to_efx_mcdi_mtd_partition(mtd);
1774 struct efx_nic *efx = mtd->priv;
1775 loff_t offset = start;
1776 loff_t end = min_t(loff_t, start + len, mtd->size);
1777 size_t chunk;
1778 int rc = 0;
1779
1780 if (!part->updating) {
1781 rc = efx_mcdi_nvram_update_start(efx, part->nvram_type);
1782 if (rc)
1783 goto out;
1784 part->updating = true;
1785 }
1786
1787 while (offset < end) {
1788 chunk = min_t(size_t, end - offset, EFX_MCDI_NVRAM_LEN_MAX);
1789 rc = efx_mcdi_nvram_write(efx, part->nvram_type, offset,
1790 buffer, chunk);
1791 if (rc)
1792 goto out;
1793 offset += chunk;
1794 buffer += chunk;
1795 }
1796out:
1797 *retlen = offset - start;
1798 return rc;
1799}
1800
1801int efx_mcdi_mtd_sync(struct mtd_info *mtd)
1802{
1803 struct efx_mcdi_mtd_partition *part = to_efx_mcdi_mtd_partition(mtd);
1804 struct efx_nic *efx = mtd->priv;
1805 int rc = 0;
1806
1807 if (part->updating) {
1808 part->updating = false;
1809 rc = efx_mcdi_nvram_update_finish(efx, part->nvram_type);
1810 }
1811
1812 return rc;
1813}
1814
1815void efx_mcdi_mtd_rename(struct efx_mtd_partition *part)
1816{
1817 struct efx_mcdi_mtd_partition *mcdi_part =
1818 container_of(part, struct efx_mcdi_mtd_partition, common);
1819 struct efx_nic *efx = part->mtd.priv;
1820
1821 snprintf(part->name, sizeof(part->name), "%s %s:%02x",
1822 efx->name, part->type_name, mcdi_part->fw_subtype);
1823}
1824
1825#endif /* CONFIG_SFC_MTD */