Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 1 | /* |
| 2 | * File: arch/blackfin/mach-bf537/boards/cm_bf537.c |
| 3 | * Based on: arch/blackfin/mach-bf533/boards/ezkit.c |
| 4 | * Author: Aidan Williams <aidan@nicta.com.au> |
| 5 | * |
| 6 | * Created: 2005 |
| 7 | * Description: Board description file |
| 8 | * |
| 9 | * Modified: |
| 10 | * Copyright 2005 National ICT Australia (NICTA) |
| 11 | * Copyright 2004-2006 Analog Devices Inc. |
| 12 | * |
| 13 | * Bugs: Enter bugs at http://blackfin.uclinux.org/ |
| 14 | * |
| 15 | * This program is free software; you can redistribute it and/or modify |
| 16 | * it under the terms of the GNU General Public License as published by |
| 17 | * the Free Software Foundation; either version 2 of the License, or |
| 18 | * (at your option) any later version. |
| 19 | * |
| 20 | * This program is distributed in the hope that it will be useful, |
| 21 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 22 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 23 | * GNU General Public License for more details. |
| 24 | * |
| 25 | * You should have received a copy of the GNU General Public License |
| 26 | * along with this program; if not, see the file COPYING, or write |
| 27 | * to the Free Software Foundation, Inc., |
| 28 | * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA |
| 29 | */ |
| 30 | |
| 31 | #include <linux/device.h> |
| 32 | #include <linux/platform_device.h> |
| 33 | #include <linux/mtd/mtd.h> |
| 34 | #include <linux/mtd/partitions.h> |
| 35 | #include <linux/spi/spi.h> |
| 36 | #include <linux/spi/flash.h> |
| 37 | #include <linux/usb_isp1362.h> |
Mike Frysinger | 1f83b8f | 2007-07-12 22:58:21 +0800 | [diff] [blame^] | 38 | #include <linux/irq.h> |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 39 | #include <asm/bfin5xx_spi.h> |
| 40 | |
| 41 | /* |
| 42 | * Name the Board for the /proc/cpuinfo |
| 43 | */ |
| 44 | char *bfin_board_name = "Bluetechnix CM BF537"; |
| 45 | |
| 46 | #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) |
| 47 | /* all SPI peripherals info goes here */ |
| 48 | |
| 49 | #if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE) |
| 50 | static struct mtd_partition bfin_spi_flash_partitions[] = { |
| 51 | { |
| 52 | .name = "bootloader", |
| 53 | .size = 0x00020000, |
| 54 | .offset = 0, |
| 55 | .mask_flags = MTD_CAP_ROM |
Mike Frysinger | 1f83b8f | 2007-07-12 22:58:21 +0800 | [diff] [blame^] | 56 | }, { |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 57 | .name = "kernel", |
| 58 | .size = 0xe0000, |
| 59 | .offset = 0x20000 |
Mike Frysinger | 1f83b8f | 2007-07-12 22:58:21 +0800 | [diff] [blame^] | 60 | }, { |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 61 | .name = "file system", |
| 62 | .size = 0x700000, |
| 63 | .offset = 0x00100000, |
| 64 | } |
| 65 | }; |
| 66 | |
| 67 | static struct flash_platform_data bfin_spi_flash_data = { |
| 68 | .name = "m25p80", |
| 69 | .parts = bfin_spi_flash_partitions, |
| 70 | .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions), |
| 71 | .type = "m25p64", |
| 72 | }; |
| 73 | |
| 74 | /* SPI flash chip (m25p64) */ |
| 75 | static struct bfin5xx_spi_chip spi_flash_chip_info = { |
| 76 | .enable_dma = 0, /* use dma transfer with this chip*/ |
| 77 | .bits_per_word = 8, |
| 78 | }; |
| 79 | #endif |
| 80 | |
| 81 | #if defined(CONFIG_SPI_ADC_BF533) || defined(CONFIG_SPI_ADC_BF533_MODULE) |
| 82 | /* SPI ADC chip */ |
| 83 | static struct bfin5xx_spi_chip spi_adc_chip_info = { |
| 84 | .enable_dma = 1, /* use dma transfer with this chip*/ |
| 85 | .bits_per_word = 16, |
| 86 | }; |
| 87 | #endif |
| 88 | |
| 89 | #if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE) |
| 90 | static struct bfin5xx_spi_chip ad1836_spi_chip_info = { |
| 91 | .enable_dma = 0, |
| 92 | .bits_per_word = 16, |
| 93 | }; |
| 94 | #endif |
| 95 | |
| 96 | #if defined(CONFIG_AD9960) || defined(CONFIG_AD9960_MODULE) |
| 97 | static struct bfin5xx_spi_chip ad9960_spi_chip_info = { |
| 98 | .enable_dma = 0, |
| 99 | .bits_per_word = 16, |
| 100 | }; |
| 101 | #endif |
| 102 | |
| 103 | #if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE) |
| 104 | static struct bfin5xx_spi_chip spi_mmc_chip_info = { |
| 105 | .enable_dma = 1, |
| 106 | .bits_per_word = 8, |
| 107 | }; |
| 108 | #endif |
| 109 | |
| 110 | static struct spi_board_info bfin_spi_board_info[] __initdata = { |
| 111 | #if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE) |
| 112 | { |
| 113 | /* the modalias must be the same as spi device driver name */ |
| 114 | .modalias = "m25p80", /* Name of spi_driver for this device */ |
| 115 | .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */ |
| 116 | .bus_num = 1, /* Framework bus number */ |
| 117 | .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/ |
| 118 | .platform_data = &bfin_spi_flash_data, |
| 119 | .controller_data = &spi_flash_chip_info, |
| 120 | .mode = SPI_MODE_3, |
| 121 | }, |
| 122 | #endif |
| 123 | |
| 124 | #if defined(CONFIG_SPI_ADC_BF533) || defined(CONFIG_SPI_ADC_BF533_MODULE) |
| 125 | { |
| 126 | .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */ |
| 127 | .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */ |
| 128 | .bus_num = 1, /* Framework bus number */ |
| 129 | .chip_select = 1, /* Framework chip select. */ |
| 130 | .platform_data = NULL, /* No spi_driver specific config */ |
| 131 | .controller_data = &spi_adc_chip_info, |
| 132 | }, |
| 133 | #endif |
| 134 | |
| 135 | #if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE) |
| 136 | { |
| 137 | .modalias = "ad1836-spi", |
| 138 | .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ |
| 139 | .bus_num = 1, |
| 140 | .chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT, |
| 141 | .controller_data = &ad1836_spi_chip_info, |
| 142 | }, |
| 143 | #endif |
| 144 | |
| 145 | #if defined(CONFIG_AD9960) || defined(CONFIG_AD9960_MODULE) |
| 146 | { |
| 147 | .modalias = "ad9960-spi", |
| 148 | .max_speed_hz = 10000000, /* max spi clock (SCK) speed in HZ */ |
| 149 | .bus_num = 1, |
| 150 | .chip_select = 1, |
| 151 | .controller_data = &ad9960_spi_chip_info, |
| 152 | }, |
| 153 | #endif |
| 154 | |
| 155 | #if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE) |
| 156 | { |
| 157 | .modalias = "spi_mmc_dummy", |
| 158 | .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */ |
| 159 | .bus_num = 1, |
| 160 | .chip_select = 7, |
| 161 | .platform_data = NULL, |
| 162 | .controller_data = &spi_mmc_chip_info, |
| 163 | .mode = SPI_MODE_3, |
| 164 | }, |
| 165 | { |
| 166 | .modalias = "spi_mmc", |
| 167 | .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */ |
| 168 | .bus_num = 1, |
| 169 | .chip_select = CONFIG_SPI_MMC_CS_CHAN, |
| 170 | .platform_data = NULL, |
| 171 | .controller_data = &spi_mmc_chip_info, |
| 172 | .mode = SPI_MODE_3, |
| 173 | }, |
| 174 | #endif |
| 175 | }; |
| 176 | |
| 177 | /* SPI controller data */ |
| 178 | static struct bfin5xx_spi_master spi_bfin_master_info = { |
| 179 | .num_chipselect = 8, |
| 180 | .enable_dma = 1, /* master has the ability to do dma transfer */ |
| 181 | }; |
| 182 | |
| 183 | static struct platform_device spi_bfin_master_device = { |
| 184 | .name = "bfin-spi-master", |
| 185 | .id = 1, /* Bus number */ |
| 186 | .dev = { |
| 187 | .platform_data = &spi_bfin_master_info, /* Passed to driver */ |
| 188 | }, |
| 189 | }; |
| 190 | #endif /* spi master and devices */ |
| 191 | |
| 192 | #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE) |
| 193 | static struct platform_device rtc_device = { |
| 194 | .name = "rtc-bfin", |
| 195 | .id = -1, |
| 196 | }; |
| 197 | #endif |
| 198 | |
| 199 | #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE) |
| 200 | static struct resource smc91x_resources[] = { |
| 201 | { |
| 202 | .start = 0x20200300, |
| 203 | .end = 0x20200300 + 16, |
| 204 | .flags = IORESOURCE_MEM, |
Mike Frysinger | 1f83b8f | 2007-07-12 22:58:21 +0800 | [diff] [blame^] | 205 | }, { |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 206 | .start = IRQ_PF14, |
| 207 | .end = IRQ_PF14, |
| 208 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, |
| 209 | }, |
| 210 | }; |
| 211 | |
| 212 | static struct platform_device smc91x_device = { |
| 213 | .name = "smc91x", |
| 214 | .id = 0, |
| 215 | .num_resources = ARRAY_SIZE(smc91x_resources), |
| 216 | .resource = smc91x_resources, |
| 217 | }; |
| 218 | #endif |
| 219 | |
| 220 | #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE) |
| 221 | static struct resource isp1362_hcd_resources[] = { |
| 222 | { |
| 223 | .start = 0x20308000, |
| 224 | .end = 0x20308000, |
| 225 | .flags = IORESOURCE_MEM, |
Mike Frysinger | 1f83b8f | 2007-07-12 22:58:21 +0800 | [diff] [blame^] | 226 | }, { |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 227 | .start = 0x20308004, |
| 228 | .end = 0x20308004, |
| 229 | .flags = IORESOURCE_MEM, |
Mike Frysinger | 1f83b8f | 2007-07-12 22:58:21 +0800 | [diff] [blame^] | 230 | }, { |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 231 | .start = IRQ_PG15, |
| 232 | .end = IRQ_PG15, |
| 233 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, |
| 234 | }, |
| 235 | }; |
| 236 | |
| 237 | static struct isp1362_platform_data isp1362_priv = { |
| 238 | .sel15Kres = 1, |
| 239 | .clknotstop = 0, |
| 240 | .oc_enable = 0, |
| 241 | .int_act_high = 0, |
| 242 | .int_edge_triggered = 0, |
| 243 | .remote_wakeup_connected = 0, |
| 244 | .no_power_switching = 1, |
| 245 | .power_switching_mode = 0, |
| 246 | }; |
| 247 | |
| 248 | static struct platform_device isp1362_hcd_device = { |
| 249 | .name = "isp1362-hcd", |
| 250 | .id = 0, |
| 251 | .dev = { |
| 252 | .platform_data = &isp1362_priv, |
| 253 | }, |
| 254 | .num_resources = ARRAY_SIZE(isp1362_hcd_resources), |
| 255 | .resource = isp1362_hcd_resources, |
| 256 | }; |
| 257 | #endif |
| 258 | |
| 259 | #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE) |
| 260 | static struct resource net2272_bfin_resources[] = { |
| 261 | { |
| 262 | .start = 0x20200000, |
| 263 | .end = 0x20200000 + 0x100, |
| 264 | .flags = IORESOURCE_MEM, |
Mike Frysinger | 1f83b8f | 2007-07-12 22:58:21 +0800 | [diff] [blame^] | 265 | }, { |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 266 | .start = IRQ_PF7, |
| 267 | .end = IRQ_PF7, |
| 268 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, |
| 269 | }, |
| 270 | }; |
| 271 | |
| 272 | static struct platform_device net2272_bfin_device = { |
| 273 | .name = "net2272", |
| 274 | .id = -1, |
| 275 | .num_resources = ARRAY_SIZE(net2272_bfin_resources), |
| 276 | .resource = net2272_bfin_resources, |
| 277 | }; |
| 278 | #endif |
| 279 | |
| 280 | #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE) |
| 281 | static struct resource bfin_uart_resources[] = { |
| 282 | { |
| 283 | .start = 0xFFC00400, |
| 284 | .end = 0xFFC004FF, |
| 285 | .flags = IORESOURCE_MEM, |
Mike Frysinger | 1f83b8f | 2007-07-12 22:58:21 +0800 | [diff] [blame^] | 286 | }, { |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 287 | .start = 0xFFC02000, |
| 288 | .end = 0xFFC020FF, |
| 289 | .flags = IORESOURCE_MEM, |
| 290 | }, |
| 291 | }; |
| 292 | |
| 293 | static struct platform_device bfin_uart_device = { |
| 294 | .name = "bfin-uart", |
| 295 | .id = 1, |
| 296 | .num_resources = ARRAY_SIZE(bfin_uart_resources), |
| 297 | .resource = bfin_uart_resources, |
| 298 | }; |
| 299 | #endif |
| 300 | |
| 301 | #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE) |
| 302 | static struct platform_device bfin_sport0_uart_device = { |
| 303 | .name = "bfin-sport-uart", |
| 304 | .id = 0, |
| 305 | }; |
| 306 | |
| 307 | static struct platform_device bfin_sport1_uart_device = { |
| 308 | .name = "bfin-sport-uart", |
| 309 | .id = 1, |
| 310 | }; |
| 311 | #endif |
| 312 | |
| 313 | #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE) |
| 314 | static struct platform_device bfin_mac_device = { |
| 315 | .name = "bfin_mac", |
| 316 | }; |
| 317 | #endif |
| 318 | |
| 319 | static struct platform_device *cm_bf537_devices[] __initdata = { |
| 320 | #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE) |
| 321 | &rtc_device, |
| 322 | #endif |
| 323 | |
| 324 | #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE) |
| 325 | &bfin_uart_device, |
| 326 | #endif |
| 327 | |
| 328 | #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE) |
| 329 | &bfin_sport0_uart_device, |
| 330 | &bfin_sport1_uart_device, |
| 331 | #endif |
| 332 | |
| 333 | #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE) |
| 334 | &isp1362_hcd_device, |
| 335 | #endif |
| 336 | |
| 337 | #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE) |
| 338 | &smc91x_device, |
| 339 | #endif |
| 340 | |
| 341 | #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE) |
| 342 | &bfin_mac_device, |
| 343 | #endif |
| 344 | |
| 345 | #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE) |
| 346 | &net2272_bfin_device, |
| 347 | #endif |
| 348 | |
| 349 | #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) |
| 350 | &spi_bfin_master_device, |
| 351 | #endif |
| 352 | }; |
| 353 | |
| 354 | static int __init cm_bf537_init(void) |
| 355 | { |
| 356 | printk(KERN_INFO "%s(): registering device resources\n", __FUNCTION__); |
| 357 | platform_add_devices(cm_bf537_devices, ARRAY_SIZE(cm_bf537_devices)); |
| 358 | #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) |
| 359 | spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info)); |
| 360 | #endif |
| 361 | return 0; |
| 362 | } |
| 363 | |
| 364 | arch_initcall(cm_bf537_init); |