Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 1 | /****************************************************************************** |
| 2 | * |
| 3 | * This file is provided under a dual BSD/GPLv2 license. When using or |
| 4 | * redistributing this file, you may do so under either license. |
| 5 | * |
| 6 | * GPL LICENSE SUMMARY |
| 7 | * |
| 8 | * Copyright(c) 2005 - 2007 Intel Corporation. All rights reserved. |
| 9 | * |
| 10 | * This program is free software; you can redistribute it and/or modify |
| 11 | * it under the terms of version 2 of the GNU Geeral Public License as |
| 12 | * published by the Free Software Foundation. |
| 13 | * |
| 14 | * This program is distributed in the hope that it will be useful, but |
| 15 | * WITHOUT ANY WARRANTY; without even the implied warranty of |
| 16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
| 17 | * General Public License for more details. |
| 18 | * |
| 19 | * You should have received a copy of the GNU General Public License |
| 20 | * along with this program; if not, write to the Free Software |
| 21 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110, |
| 22 | * USA |
| 23 | * |
| 24 | * The full GNU General Public License is included in this distribution |
| 25 | * in the file called LICENSE.GPL. |
| 26 | * |
| 27 | * Contact Information: |
| 28 | * James P. Ketrenos <ipw2100-admin@linux.intel.com> |
| 29 | * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 |
| 30 | * |
| 31 | * BSD LICENSE |
| 32 | * |
| 33 | * Copyright(c) 2005 - 2007 Intel Corporation. All rights reserved. |
| 34 | * All rights reserved. |
| 35 | * |
| 36 | * Redistribution and use in source and binary forms, with or without |
| 37 | * modification, are permitted provided that the following conditions |
| 38 | * are met: |
| 39 | * |
| 40 | * * Redistributions of source code must retain the above copyright |
| 41 | * notice, this list of conditions and the following disclaimer. |
| 42 | * * Redistributions in binary form must reproduce the above copyright |
| 43 | * notice, this list of conditions and the following disclaimer in |
| 44 | * the documentation and/or other materials provided with the |
| 45 | * distribution. |
| 46 | * * Neither the name Intel Corporation nor the names of its |
| 47 | * contributors may be used to endorse or promote products derived |
| 48 | * from this software without specific prior written permission. |
| 49 | * |
| 50 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
| 51 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
| 52 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR |
| 53 | * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT |
| 54 | * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, |
| 55 | * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT |
| 56 | * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
| 57 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
| 58 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| 59 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
| 60 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| 61 | * |
| 62 | *****************************************************************************/ |
| 63 | |
| 64 | #ifndef __iwl_eeprom_h__ |
| 65 | #define __iwl_eeprom_h__ |
| 66 | |
| 67 | /* |
| 68 | * This file defines EEPROM related constants, enums, and inline functions. |
| 69 | * |
| 70 | */ |
| 71 | |
| 72 | #define IWL_EEPROM_ACCESS_TIMEOUT 5000 /* uSec */ |
| 73 | #define IWL_EEPROM_ACCESS_DELAY 10 /* uSec */ |
| 74 | /* EEPROM field values */ |
| 75 | #define ANTENNA_SWITCH_NORMAL 0 |
| 76 | #define ANTENNA_SWITCH_INVERSE 1 |
| 77 | |
| 78 | enum { |
| 79 | EEPROM_CHANNEL_VALID = (1 << 0), /* usable for this SKU/geo */ |
| 80 | EEPROM_CHANNEL_IBSS = (1 << 1), /* usable as an IBSS channel */ |
| 81 | /* Bit 2 Reserved */ |
| 82 | EEPROM_CHANNEL_ACTIVE = (1 << 3), /* active scanning allowed */ |
| 83 | EEPROM_CHANNEL_RADAR = (1 << 4), /* radar detection required */ |
| 84 | EEPROM_CHANNEL_WIDE = (1 << 5), |
| 85 | EEPROM_CHANNEL_NARROW = (1 << 6), |
| 86 | EEPROM_CHANNEL_DFS = (1 << 7), /* dynamic freq selection candidate */ |
| 87 | }; |
| 88 | |
| 89 | /* EEPROM field lengths */ |
| 90 | #define EEPROM_BOARD_PBA_NUMBER_LENGTH 11 |
| 91 | |
| 92 | /* EEPROM field lengths */ |
| 93 | #define EEPROM_BOARD_PBA_NUMBER_LENGTH 11 |
| 94 | #define EEPROM_REGULATORY_SKU_ID_LENGTH 4 |
| 95 | #define EEPROM_REGULATORY_BAND1_CHANNELS_LENGTH 14 |
| 96 | #define EEPROM_REGULATORY_BAND2_CHANNELS_LENGTH 13 |
| 97 | #define EEPROM_REGULATORY_BAND3_CHANNELS_LENGTH 12 |
| 98 | #define EEPROM_REGULATORY_BAND4_CHANNELS_LENGTH 11 |
| 99 | #define EEPROM_REGULATORY_BAND5_CHANNELS_LENGTH 6 |
| 100 | |
| 101 | #if IWL == 3945 |
| 102 | #define EEPROM_REGULATORY_CHANNELS_LENGTH ( \ |
| 103 | EEPROM_REGULATORY_BAND1_CHANNELS_LENGTH + \ |
| 104 | EEPROM_REGULATORY_BAND2_CHANNELS_LENGTH + \ |
| 105 | EEPROM_REGULATORY_BAND3_CHANNELS_LENGTH + \ |
| 106 | EEPROM_REGULATORY_BAND4_CHANNELS_LENGTH + \ |
| 107 | EEPROM_REGULATORY_BAND5_CHANNELS_LENGTH) |
| 108 | #elif IWL == 4965 |
| 109 | #define EEPROM_REGULATORY_BAND_24_FAT_CHANNELS_LENGTH 7 |
| 110 | #define EEPROM_REGULATORY_BAND_52_FAT_CHANNELS_LENGTH 11 |
| 111 | #define EEPROM_REGULATORY_CHANNELS_LENGTH ( \ |
| 112 | EEPROM_REGULATORY_BAND1_CHANNELS_LENGTH + \ |
| 113 | EEPROM_REGULATORY_BAND2_CHANNELS_LENGTH + \ |
| 114 | EEPROM_REGULATORY_BAND3_CHANNELS_LENGTH + \ |
| 115 | EEPROM_REGULATORY_BAND4_CHANNELS_LENGTH + \ |
| 116 | EEPROM_REGULATORY_BAND5_CHANNELS_LENGTH + \ |
| 117 | EEPROM_REGULATORY_BAND_24_FAT_CHANNELS_LENGTH + \ |
| 118 | EEPROM_REGULATORY_BAND_52_FAT_CHANNELS_LENGTH) |
| 119 | #endif |
| 120 | |
| 121 | #define EEPROM_REGULATORY_NUMBER_OF_BANDS 5 |
| 122 | |
| 123 | /* SKU Capabilities */ |
| 124 | #define EEPROM_SKU_CAP_SW_RF_KILL_ENABLE (1 << 0) |
| 125 | #define EEPROM_SKU_CAP_HW_RF_KILL_ENABLE (1 << 1) |
| 126 | #define EEPROM_SKU_CAP_OP_MODE_MRC (1 << 7) |
| 127 | |
| 128 | /* *regulatory* channel data from eeprom, one for each channel */ |
| 129 | struct iwl_eeprom_channel { |
| 130 | u8 flags; /* flags copied from EEPROM */ |
| 131 | s8 max_power_avg; /* max power (dBm) on this chnl, limit 31 */ |
| 132 | } __attribute__ ((packed)); |
| 133 | |
| 134 | /* |
| 135 | * Mapping of a Tx power level, at factory calibration temperature, |
| 136 | * to a radio/DSP gain table index. |
| 137 | * One for each of 5 "sample" power levels in each band. |
| 138 | * v_det is measured at the factory, using the 3945's built-in power amplifier |
| 139 | * (PA) output voltage detector. This same detector is used during Tx of |
| 140 | * long packets in normal operation to provide feedback as to proper output |
| 141 | * level. |
| 142 | * Data copied from EEPROM. |
| 143 | */ |
| 144 | struct iwl_eeprom_txpower_sample { |
| 145 | u8 gain_index; /* index into power (gain) setup table ... */ |
| 146 | s8 power; /* ... for this pwr level for this chnl group */ |
| 147 | u16 v_det; /* PA output voltage */ |
| 148 | } __attribute__ ((packed)); |
| 149 | |
| 150 | /* |
| 151 | * Mappings of Tx power levels -> nominal radio/DSP gain table indexes. |
| 152 | * One for each channel group (a.k.a. "band") (1 for BG, 4 for A). |
| 153 | * Tx power setup code interpolates between the 5 "sample" power levels |
| 154 | * to determine the nominal setup for a requested power level. |
| 155 | * Data copied from EEPROM. |
| 156 | * DO NOT ALTER THIS STRUCTURE!!! |
| 157 | */ |
| 158 | struct iwl_eeprom_txpower_group { |
| 159 | struct iwl_eeprom_txpower_sample samples[5]; /* 5 power levels */ |
| 160 | s32 a, b, c, d, e; /* coefficients for voltage->power |
| 161 | * formula (signed) */ |
| 162 | s32 Fa, Fb, Fc, Fd, Fe; /* these modify coeffs based on |
| 163 | * frequency (signed) */ |
| 164 | s8 saturation_power; /* highest power possible by h/w in this |
| 165 | * band */ |
| 166 | u8 group_channel; /* "representative" channel # in this band */ |
| 167 | s16 temperature; /* h/w temperature at factory calib this band |
| 168 | * (signed) */ |
| 169 | } __attribute__ ((packed)); |
| 170 | |
| 171 | /* |
| 172 | * Temperature-based Tx-power compensation data, not band-specific. |
| 173 | * These coefficients are use to modify a/b/c/d/e coeffs based on |
| 174 | * difference between current temperature and factory calib temperature. |
| 175 | * Data copied from EEPROM. |
| 176 | */ |
| 177 | struct iwl_eeprom_temperature_corr { |
| 178 | u32 Ta; |
| 179 | u32 Tb; |
| 180 | u32 Tc; |
| 181 | u32 Td; |
| 182 | u32 Te; |
| 183 | } __attribute__ ((packed)); |
| 184 | |
| 185 | #if IWL == 4965 |
| 186 | #define EEPROM_TX_POWER_TX_CHAINS (2) |
| 187 | #define EEPROM_TX_POWER_BANDS (8) |
| 188 | #define EEPROM_TX_POWER_MEASUREMENTS (3) |
| 189 | #define EEPROM_TX_POWER_VERSION (2) |
| 190 | #define EEPROM_TX_POWER_VERSION_NEW (5) |
| 191 | |
| 192 | struct iwl_eeprom_calib_measure { |
| 193 | u8 temperature; |
| 194 | u8 gain_idx; |
| 195 | u8 actual_pow; |
| 196 | s8 pa_det; |
| 197 | } __attribute__ ((packed)); |
| 198 | |
| 199 | struct iwl_eeprom_calib_ch_info { |
| 200 | u8 ch_num; |
| 201 | struct iwl_eeprom_calib_measure measurements[EEPROM_TX_POWER_TX_CHAINS] |
| 202 | [EEPROM_TX_POWER_MEASUREMENTS]; |
| 203 | } __attribute__ ((packed)); |
| 204 | |
| 205 | struct iwl_eeprom_calib_subband_info { |
| 206 | u8 ch_from; |
| 207 | u8 ch_to; |
| 208 | struct iwl_eeprom_calib_ch_info ch1; |
| 209 | struct iwl_eeprom_calib_ch_info ch2; |
| 210 | } __attribute__ ((packed)); |
| 211 | |
| 212 | struct iwl_eeprom_calib_info { |
| 213 | u8 saturation_power24; |
| 214 | u8 saturation_power52; |
| 215 | s16 voltage; /* signed */ |
| 216 | struct iwl_eeprom_calib_subband_info band_info[EEPROM_TX_POWER_BANDS]; |
| 217 | } __attribute__ ((packed)); |
| 218 | |
| 219 | #endif |
| 220 | |
| 221 | struct iwl_eeprom { |
| 222 | u8 reserved0[16]; |
| 223 | #define EEPROM_DEVICE_ID (2*0x08) /* 2 bytes */ |
| 224 | u16 device_id; /* abs.ofs: 16 */ |
| 225 | u8 reserved1[2]; |
| 226 | #define EEPROM_PMC (2*0x0A) /* 2 bytes */ |
| 227 | u16 pmc; /* abs.ofs: 20 */ |
| 228 | u8 reserved2[20]; |
| 229 | #define EEPROM_MAC_ADDRESS (2*0x15) /* 6 bytes */ |
| 230 | u8 mac_address[6]; /* abs.ofs: 42 */ |
| 231 | u8 reserved3[58]; |
| 232 | #define EEPROM_BOARD_REVISION (2*0x35) /* 2 bytes */ |
| 233 | u16 board_revision; /* abs.ofs: 106 */ |
| 234 | u8 reserved4[11]; |
| 235 | #define EEPROM_BOARD_PBA_NUMBER (2*0x3B+1) /* 9 bytes */ |
| 236 | u8 board_pba_number[9]; /* abs.ofs: 119 */ |
| 237 | u8 reserved5[8]; |
| 238 | #define EEPROM_VERSION (2*0x44) /* 2 bytes */ |
| 239 | u16 version; /* abs.ofs: 136 */ |
| 240 | #define EEPROM_SKU_CAP (2*0x45) /* 1 bytes */ |
| 241 | u8 sku_cap; /* abs.ofs: 138 */ |
| 242 | #define EEPROM_LEDS_MODE (2*0x45+1) /* 1 bytes */ |
| 243 | u8 leds_mode; /* abs.ofs: 139 */ |
| 244 | #define EEPROM_OEM_MODE (2*0x46) /* 2 bytes */ |
| 245 | u16 oem_mode; |
| 246 | #define EEPROM_WOWLAN_MODE (2*0x47) /* 2 bytes */ |
| 247 | u16 wowlan_mode; /* abs.ofs: 142 */ |
| 248 | #define EEPROM_LEDS_TIME_INTERVAL (2*0x48) /* 2 bytes */ |
| 249 | u16 leds_time_interval; /* abs.ofs: 144 */ |
| 250 | #define EEPROM_LEDS_OFF_TIME (2*0x49) /* 1 bytes */ |
| 251 | u8 leds_off_time; /* abs.ofs: 146 */ |
| 252 | #define EEPROM_LEDS_ON_TIME (2*0x49+1) /* 1 bytes */ |
| 253 | u8 leds_on_time; /* abs.ofs: 147 */ |
| 254 | #define EEPROM_ALMGOR_M_VERSION (2*0x4A) /* 1 bytes */ |
| 255 | u8 almgor_m_version; /* abs.ofs: 148 */ |
| 256 | #define EEPROM_ANTENNA_SWITCH_TYPE (2*0x4A+1) /* 1 bytes */ |
| 257 | u8 antenna_switch_type; /* abs.ofs: 149 */ |
| 258 | #if IWL == 3945 |
| 259 | u8 reserved6[42]; |
| 260 | #else |
| 261 | u8 reserved6[8]; |
| 262 | #define EEPROM_4965_BOARD_REVISION (2*0x4F) /* 2 bytes */ |
| 263 | u16 board_revision_4965; /* abs.ofs: 158 */ |
| 264 | u8 reserved7[13]; |
| 265 | #define EEPROM_4965_BOARD_PBA (2*0x56+1) /* 9 bytes */ |
| 266 | u8 board_pba_number_4965[9]; /* abs.ofs: 173 */ |
| 267 | u8 reserved8[10]; |
| 268 | #endif |
| 269 | #define EEPROM_REGULATORY_SKU_ID (2*0x60) /* 4 bytes */ |
| 270 | u8 sku_id[4]; /* abs.ofs: 192 */ |
| 271 | #define EEPROM_REGULATORY_BAND_1 (2*0x62) /* 2 bytes */ |
| 272 | u16 band_1_count; /* abs.ofs: 196 */ |
| 273 | #define EEPROM_REGULATORY_BAND_1_CHANNELS (2*0x63) /* 28 bytes */ |
| 274 | struct iwl_eeprom_channel band_1_channels[14]; /* abs.ofs: 196 */ |
| 275 | #define EEPROM_REGULATORY_BAND_2 (2*0x71) /* 2 bytes */ |
| 276 | u16 band_2_count; /* abs.ofs: 226 */ |
| 277 | #define EEPROM_REGULATORY_BAND_2_CHANNELS (2*0x72) /* 26 bytes */ |
| 278 | struct iwl_eeprom_channel band_2_channels[13]; /* abs.ofs: 228 */ |
| 279 | #define EEPROM_REGULATORY_BAND_3 (2*0x7F) /* 2 bytes */ |
| 280 | u16 band_3_count; /* abs.ofs: 254 */ |
| 281 | #define EEPROM_REGULATORY_BAND_3_CHANNELS (2*0x80) /* 24 bytes */ |
| 282 | struct iwl_eeprom_channel band_3_channels[12]; /* abs.ofs: 256 */ |
| 283 | #define EEPROM_REGULATORY_BAND_4 (2*0x8C) /* 2 bytes */ |
| 284 | u16 band_4_count; /* abs.ofs: 280 */ |
| 285 | #define EEPROM_REGULATORY_BAND_4_CHANNELS (2*0x8D) /* 22 bytes */ |
| 286 | struct iwl_eeprom_channel band_4_channels[11]; /* abs.ofs: 282 */ |
| 287 | #define EEPROM_REGULATORY_BAND_5 (2*0x98) /* 2 bytes */ |
| 288 | u16 band_5_count; /* abs.ofs: 304 */ |
| 289 | #define EEPROM_REGULATORY_BAND_5_CHANNELS (2*0x99) /* 12 bytes */ |
| 290 | struct iwl_eeprom_channel band_5_channels[6]; /* abs.ofs: 306 */ |
| 291 | |
| 292 | /* From here on out the EEPROM diverges between the 4965 and the 3945 */ |
| 293 | #if IWL == 3945 |
| 294 | |
| 295 | u8 reserved9[194]; |
| 296 | |
| 297 | #define EEPROM_TXPOWER_CALIB_GROUP0 0x200 |
| 298 | #define EEPROM_TXPOWER_CALIB_GROUP1 0x240 |
| 299 | #define EEPROM_TXPOWER_CALIB_GROUP2 0x280 |
| 300 | #define EEPROM_TXPOWER_CALIB_GROUP3 0x2c0 |
| 301 | #define EEPROM_TXPOWER_CALIB_GROUP4 0x300 |
| 302 | #define IWL_NUM_TX_CALIB_GROUPS 5 |
| 303 | struct iwl_eeprom_txpower_group groups[IWL_NUM_TX_CALIB_GROUPS]; |
| 304 | /* abs.ofs: 512 */ |
| 305 | #define EEPROM_CALIB_TEMPERATURE_CORRECT 0x340 |
| 306 | struct iwl_eeprom_temperature_corr corrections; /* abs.ofs: 832 */ |
| 307 | u8 reserved16[172]; /* fill out to full 1024 byte block */ |
| 308 | |
| 309 | /* 4965AGN adds fat channel support */ |
| 310 | #elif IWL == 4965 |
| 311 | |
| 312 | u8 reserved10[2]; |
| 313 | #define EEPROM_REGULATORY_BAND_24_FAT_CHANNELS (2*0xA0) /* 14 bytes */ |
| 314 | struct iwl_eeprom_channel band_24_channels[7]; /* abs.ofs: 320 */ |
| 315 | u8 reserved11[2]; |
| 316 | #define EEPROM_REGULATORY_BAND_52_FAT_CHANNELS (2*0xA8) /* 22 bytes */ |
| 317 | struct iwl_eeprom_channel band_52_channels[11]; /* abs.ofs: 336 */ |
| 318 | u8 reserved12[6]; |
| 319 | #define EEPROM_CALIB_VERSION_OFFSET (2*0xB6) /* 2 bytes */ |
| 320 | u16 calib_version; /* abs.ofs: 364 */ |
| 321 | u8 reserved13[2]; |
| 322 | #define EEPROM_SATURATION_POWER_OFFSET (2*0xB8) /* 2 bytes */ |
| 323 | u16 satruation_power; /* abs.ofs: 368 */ |
| 324 | u8 reserved14[94]; |
| 325 | #define EEPROM_IWL_CALIB_TXPOWER_OFFSET (2*0xE8) /* 48 bytes */ |
| 326 | struct iwl_eeprom_calib_info calib_info; /* abs.ofs: 464 */ |
| 327 | |
| 328 | u8 reserved16[140]; /* fill out to full 1024 byte block */ |
| 329 | |
| 330 | #endif |
| 331 | |
| 332 | } __attribute__ ((packed)); |
| 333 | |
| 334 | #define IWL_EEPROM_IMAGE_SIZE 1024 |
| 335 | |
| 336 | #endif |