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gerrit-public.fairphone.software / kernel / msm-5.4 / 23fa648fd32658ca295de3ef2b7c883c7b8a6120 / . / arch / arm / boot / dts / at91sam9g20.dtsi
blob: 04c56c41001f1e4e910f5e34813e236f9ca88137 [file] [log] [blame]
Jean-Christophe PLAGNIOL-VILLARDfea31582011-10-14 09:40:52 +0800[diff] [blame]1/*
2 * at91sam9g20.dtsi - Device Tree Include file for AT91SAM9G20 family SoC
3 *
4 * Copyright (C) 2011 Atmel,
5 * 2011 Nicolas Ferre <nicolas.ferre@atmel.com>,
6 * 2011 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
7 *
8 * Licensed under GPLv2 or later.
9 */
10
11/include/ "skeleton.dtsi"
12
13/ {
14 model = "Atmel AT91SAM9G20 family SoC";
15 compatible = "atmel,at91sam9g20";
16 interrupt-parent = <&aic>;
17
18 aliases {
19 serial0 = &dbgu;
20 serial1 = &usart0;
21 serial2 = &usart1;
22 serial3 = &usart2;
23 serial4 = &usart3;
24 serial5 = &usart4;
25 serial6 = &usart5;
Nicolas Ferre21f81872012-02-11 15:41:40 +0100[diff] [blame]26 gpio0 = &pioA;
27 gpio1 = &pioB;
28 gpio2 = &pioC;
Jean-Christophe PLAGNIOL-VILLARDfea31582011-10-14 09:40:52 +0800[diff] [blame]29 };
30 cpus {
31 cpu@0 {
32 compatible = "arm,arm926ejs";
33 };
34 };
35
36 memory@20000000 {
37 reg = <0x20000000 0x08000000>;
38 };
39
40 ahb {
41 compatible = "simple-bus";
42 #address-cells = <1>;
43 #size-cells = <1>;
44 ranges;
45
46 apb {
47 compatible = "simple-bus";
48 #address-cells = <1>;
49 #size-cells = <1>;
50 ranges;
51
52 aic: interrupt-controller@fffff000 {
Nicolas Ferree2615012011-11-22 22:26:09 +0100[diff] [blame]53 #interrupt-cells = <2>;
Jean-Christophe PLAGNIOL-VILLARDfea31582011-10-14 09:40:52 +0800[diff] [blame]54 compatible = "atmel,at91rm9200-aic";
55 interrupt-controller;
56 interrupt-parent;
57 reg = <0xfffff000 0x200>;
58 };
59
Jean-Christophe PLAGNIOL-VILLARD23fa6482012-02-27 11:19:34 +0100[diff] [blame^]60 pit: timer@fffffd30 {
61 compatible = "atmel,at91sam9260-pit";
62 reg = <0xfffffd30 0xf>;
63 interrupts = <1 4>;
64 };
65
Nicolas Ferre21f81872012-02-11 15:41:40 +0100[diff] [blame]66 pioA: gpio@fffff400 {
67 compatible = "atmel,at91rm9200-gpio";
68 reg = <0xfffff400 0x100>;
69 interrupts = <2 4>;
70 #gpio-cells = <2>;
71 gpio-controller;
72 interrupt-controller;
73 };
74
75 pioB: gpio@fffff600 {
76 compatible = "atmel,at91rm9200-gpio";
77 reg = <0xfffff600 0x100>;
78 interrupts = <3 4>;
79 #gpio-cells = <2>;
80 gpio-controller;
81 interrupt-controller;
82 };
83
84 pioC: gpio@fffff800 {
85 compatible = "atmel,at91rm9200-gpio";
86 reg = <0xfffff800 0x100>;
87 interrupts = <4 4>;
88 #gpio-cells = <2>;
89 gpio-controller;
90 interrupt-controller;
91 };
92
Jean-Christophe PLAGNIOL-VILLARDfea31582011-10-14 09:40:52 +0800[diff] [blame]93 dbgu: serial@fffff200 {
94 compatible = "atmel,at91sam9260-usart";
95 reg = <0xfffff200 0x200>;
Nicolas Ferree2615012011-11-22 22:26:09 +0100[diff] [blame]96 interrupts = <1 4>;
Jean-Christophe PLAGNIOL-VILLARDfea31582011-10-14 09:40:52 +0800[diff] [blame]97 status = "disabled";
98 };
99
100 usart0: serial@fffb0000 {
101 compatible = "atmel,at91sam9260-usart";
102 reg = <0xfffb0000 0x200>;
Nicolas Ferree2615012011-11-22 22:26:09 +0100[diff] [blame]103 interrupts = <6 4>;
Jean-Christophe PLAGNIOL-VILLARDfea31582011-10-14 09:40:52 +0800[diff] [blame]104 atmel,use-dma-rx;
105 atmel,use-dma-tx;
106 status = "disabled";
107 };
108
109 usart1: serial@fffb4000 {
110 compatible = "atmel,at91sam9260-usart";
111 reg = <0xfffb4000 0x200>;
Nicolas Ferree2615012011-11-22 22:26:09 +0100[diff] [blame]112 interrupts = <7 4>;
Jean-Christophe PLAGNIOL-VILLARDfea31582011-10-14 09:40:52 +0800[diff] [blame]113 atmel,use-dma-rx;
114 atmel,use-dma-tx;
115 status = "disabled";
116 };
117
118 usart2: serial@fffb8000 {
119 compatible = "atmel,at91sam9260-usart";
120 reg = <0xfffb8000 0x200>;
Nicolas Ferree2615012011-11-22 22:26:09 +0100[diff] [blame]121 interrupts = <8 4>;
Jean-Christophe PLAGNIOL-VILLARDfea31582011-10-14 09:40:52 +0800[diff] [blame]122 atmel,use-dma-rx;
123 atmel,use-dma-tx;
124 status = "disabled";
125 };
126
127 usart3: serial@fffd0000 {
128 compatible = "atmel,at91sam9260-usart";
129 reg = <0xfffd0000 0x200>;
Nicolas Ferree2615012011-11-22 22:26:09 +0100[diff] [blame]130 interrupts = <23 4>;
Jean-Christophe PLAGNIOL-VILLARDfea31582011-10-14 09:40:52 +0800[diff] [blame]131 atmel,use-dma-rx;
132 atmel,use-dma-tx;
133 status = "disabled";
134 };
135
136 usart4: serial@fffd4000 {
137 compatible = "atmel,at91sam9260-usart";
138 reg = <0xfffd4000 0x200>;
Nicolas Ferree2615012011-11-22 22:26:09 +0100[diff] [blame]139 interrupts = <24 4>;
Jean-Christophe PLAGNIOL-VILLARDfea31582011-10-14 09:40:52 +0800[diff] [blame]140 atmel,use-dma-rx;
141 atmel,use-dma-tx;
142 status = "disabled";
143 };
144
145 usart5: serial@fffd8000 {
146 compatible = "atmel,at91sam9260-usart";
147 reg = <0xfffd8000 0x200>;
Nicolas Ferree2615012011-11-22 22:26:09 +0100[diff] [blame]148 interrupts = <25 4>;
Jean-Christophe PLAGNIOL-VILLARDfea31582011-10-14 09:40:52 +0800[diff] [blame]149 atmel,use-dma-rx;
150 atmel,use-dma-tx;
151 status = "disabled";
152 };
Nicolas Ferre0d4f99d2011-12-05 18:03:05 +0100[diff] [blame]153
154 macb0: ethernet@fffc4000 {
155 compatible = "cdns,at32ap7000-macb", "cdns,macb";
156 reg = <0xfffc4000 0x100>;
Nicolas Ferree2615012011-11-22 22:26:09 +0100[diff] [blame]157 interrupts = <21 4>;
Nicolas Ferre0d4f99d2011-12-05 18:03:05 +0100[diff] [blame]158 status = "disabled";
159 };
Jean-Christophe PLAGNIOL-VILLARDfea31582011-10-14 09:40:52 +0800[diff] [blame]160 };
161 };
162};