blob: 58469d9d651564abb8a9637ca71f2d7eff5b55f5 [file] [log] [blame]
Sudip Mukherjeed0aeaa82017-01-30 22:28:21 +00001/*
2 * Probe module for 8250/16550-type Exar chips PCI serial ports.
3 *
4 * Based on drivers/tty/serial/8250/8250_pci.c,
5 *
6 * Copyright (C) 2017 Sudip Mukherjee, All Rights Reserved.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License.
11 */
12#include <linux/io.h>
13#include <linux/kernel.h>
14#include <linux/module.h>
15#include <linux/pci.h>
16#include <linux/serial_core.h>
17#include <linux/serial_reg.h>
18#include <linux/slab.h>
19#include <linux/string.h>
20#include <linux/tty.h>
21#include <linux/8250_pci.h>
22
23#include <asm/byteorder.h>
24
25#include "8250.h"
26
27#define PCI_DEVICE_ID_COMMTECH_4224PCIE 0x0020
28#define PCI_DEVICE_ID_COMMTECH_4228PCIE 0x0021
29#define PCI_DEVICE_ID_COMMTECH_4222PCIE 0x0022
30#define PCI_DEVICE_ID_EXAR_XR17V4358 0x4358
31#define PCI_DEVICE_ID_EXAR_XR17V8358 0x8358
32
33#define UART_EXAR_MPIOINT_7_0 0x8f /* MPIOINT[7:0] */
34#define UART_EXAR_MPIOLVL_7_0 0x90 /* MPIOLVL[7:0] */
35#define UART_EXAR_MPIO3T_7_0 0x91 /* MPIO3T[7:0] */
36#define UART_EXAR_MPIOINV_7_0 0x92 /* MPIOINV[7:0] */
37#define UART_EXAR_MPIOSEL_7_0 0x93 /* MPIOSEL[7:0] */
38#define UART_EXAR_MPIOOD_7_0 0x94 /* MPIOOD[7:0] */
39#define UART_EXAR_MPIOINT_15_8 0x95 /* MPIOINT[15:8] */
40#define UART_EXAR_MPIOLVL_15_8 0x96 /* MPIOLVL[15:8] */
41#define UART_EXAR_MPIO3T_15_8 0x97 /* MPIO3T[15:8] */
42#define UART_EXAR_MPIOINV_15_8 0x98 /* MPIOINV[15:8] */
43#define UART_EXAR_MPIOSEL_15_8 0x99 /* MPIOSEL[15:8] */
44#define UART_EXAR_MPIOOD_15_8 0x9a /* MPIOOD[15:8] */
45
46struct exar8250;
47
48/**
49 * struct exar8250_board - board information
50 * @num_ports: number of serial ports
51 * @reg_shift: describes UART register mapping in PCI memory
52 */
53struct exar8250_board {
54 unsigned int num_ports;
55 unsigned int reg_shift;
56 bool has_slave;
57 int (*setup)(struct exar8250 *, struct pci_dev *,
58 struct uart_8250_port *, int);
59 void (*exit)(struct pci_dev *pcidev);
60};
61
62struct exar8250 {
63 unsigned int nr;
64 struct exar8250_board *board;
65 int line[0];
66};
67
68static int default_setup(struct exar8250 *priv, struct pci_dev *pcidev,
69 int idx, unsigned int offset,
70 struct uart_8250_port *port)
71{
72 const struct exar8250_board *board = priv->board;
73 unsigned int bar = 0;
74
Jan Kiszka24572af2017-02-08 17:09:03 +010075 if (!pcim_iomap_table(pcidev)[bar] && !pcim_iomap(pcidev, bar, 0))
76 return -ENOMEM;
77
Sudip Mukherjeed0aeaa82017-01-30 22:28:21 +000078 port->port.iotype = UPIO_MEM;
79 port->port.mapbase = pci_resource_start(pcidev, bar) + offset;
80 port->port.membase = pcim_iomap_table(pcidev)[bar] + offset;
81 port->port.regshift = board->reg_shift;
82
83 return 0;
84}
85
86static int
87pci_connect_tech_setup(struct exar8250 *priv, struct pci_dev *pcidev,
88 struct uart_8250_port *port, int idx)
89{
90 unsigned int offset = idx * 0x200;
91 unsigned int baud = 1843200;
92
93 port->port.uartclk = baud * 16;
94 return default_setup(priv, pcidev, idx, offset, port);
95}
96
97static int
98pci_xr17c154_setup(struct exar8250 *priv, struct pci_dev *pcidev,
99 struct uart_8250_port *port, int idx)
100{
101 unsigned int offset = idx * 0x200;
102 unsigned int baud = 921600;
103
104 port->port.uartclk = baud * 16;
105 return default_setup(priv, pcidev, idx, offset, port);
106}
107
108static void setup_gpio(u8 __iomem *p)
109{
110 writeb(0x00, p + UART_EXAR_MPIOINT_7_0);
111 writeb(0x00, p + UART_EXAR_MPIOLVL_7_0);
112 writeb(0x00, p + UART_EXAR_MPIO3T_7_0);
113 writeb(0x00, p + UART_EXAR_MPIOINV_7_0);
114 writeb(0x00, p + UART_EXAR_MPIOSEL_7_0);
115 writeb(0x00, p + UART_EXAR_MPIOOD_7_0);
116 writeb(0x00, p + UART_EXAR_MPIOINT_15_8);
117 writeb(0x00, p + UART_EXAR_MPIOLVL_15_8);
118 writeb(0x00, p + UART_EXAR_MPIO3T_15_8);
119 writeb(0x00, p + UART_EXAR_MPIOINV_15_8);
120 writeb(0x00, p + UART_EXAR_MPIOSEL_15_8);
121 writeb(0x00, p + UART_EXAR_MPIOOD_15_8);
122}
123
124static void *
125xr17v35x_register_gpio(struct pci_dev *pcidev)
126{
127 struct platform_device *pdev;
128
129 pdev = platform_device_alloc("gpio_exar", PLATFORM_DEVID_AUTO);
130 if (!pdev)
131 return NULL;
132
133 platform_set_drvdata(pdev, pcidev);
134 if (platform_device_add(pdev) < 0) {
135 platform_device_put(pdev);
136 return NULL;
137 }
138
139 return pdev;
140}
141
142static int
143pci_xr17v35x_setup(struct exar8250 *priv, struct pci_dev *pcidev,
144 struct uart_8250_port *port, int idx)
145{
146 const struct exar8250_board *board = priv->board;
147 unsigned int offset = idx * 0x400;
148 unsigned int baud = 7812500;
149 u8 __iomem *p;
150 int ret;
151
152 port->port.uartclk = baud * 16;
153 /*
154 * Setup the uart clock for the devices on expansion slot to
155 * half the clock speed of the main chip (which is 125MHz)
156 */
157 if (board->has_slave && idx >= 8)
158 port->port.uartclk /= 2;
159
160 p = pci_ioremap_bar(pcidev, 0);
161 if (!p)
162 return -ENOMEM;
163
164 /* Setup Multipurpose Input/Output pins. */
165 if (idx == 0)
166 setup_gpio(p);
167
168 writeb(0x00, p + UART_EXAR_8XMODE);
169 writeb(UART_FCTR_EXAR_TRGD, p + UART_EXAR_FCTR);
170 writeb(128, p + UART_EXAR_TXTRG);
171 writeb(128, p + UART_EXAR_RXTRG);
172 iounmap(p);
173
174 ret = default_setup(priv, pcidev, idx, offset, port);
175 if (ret)
176 return ret;
177
178 if (idx == 0)
179 port->port.private_data =
180 xr17v35x_register_gpio(pcidev);
181
182 return 0;
183}
184
185static void pci_xr17v35x_exit(struct pci_dev *pcidev)
186{
187 struct exar8250 *priv = pci_get_drvdata(pcidev);
188 struct uart_8250_port *port = serial8250_get_port(priv->line[0]);
189 struct platform_device *pdev = port->port.private_data;
190
191 platform_device_unregister(pdev);
192 port->port.private_data = NULL;
193}
194
195static int
196exar_pci_probe(struct pci_dev *pcidev, const struct pci_device_id *ent)
197{
198 unsigned int nr_ports, i, bar = 0, maxnr;
199 struct exar8250_board *board;
200 struct uart_8250_port uart;
201 struct exar8250 *priv;
202 int rc;
203
204 board = (struct exar8250_board *)ent->driver_data;
205 if (!board)
206 return -EINVAL;
207
208 rc = pcim_enable_device(pcidev);
209 if (rc)
210 return rc;
211
212 maxnr = pci_resource_len(pcidev, bar) >> (board->reg_shift + 3);
213
214 nr_ports = board->num_ports ? board->num_ports : pcidev->device & 0x0f;
215
216 priv = devm_kzalloc(&pcidev->dev, sizeof(*priv) +
217 sizeof(unsigned int) * nr_ports,
218 GFP_KERNEL);
219 if (!priv)
220 return -ENOMEM;
221
222 priv->board = board;
223
224 memset(&uart, 0, sizeof(uart));
225 uart.port.flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF | UPF_SHARE_IRQ
226 | UPF_EXAR_EFR;
227 uart.port.irq = pcidev->irq;
228 uart.port.dev = &pcidev->dev;
229
230 for (i = 0; i < nr_ports && i < maxnr; i++) {
231 rc = board->setup(priv, pcidev, &uart, i);
232 if (rc) {
233 dev_err(&pcidev->dev, "Failed to setup port %u\n", i);
234 break;
235 }
236
237 dev_dbg(&pcidev->dev, "Setup PCI port: port %lx, irq %d, type %d\n",
238 uart.port.iobase, uart.port.irq, uart.port.iotype);
239
240 priv->line[i] = serial8250_register_8250_port(&uart);
241 if (priv->line[i] < 0) {
242 dev_err(&pcidev->dev,
243 "Couldn't register serial port %lx, irq %d, type %d, error %d\n",
244 uart.port.iobase, uart.port.irq,
245 uart.port.iotype, priv->line[i]);
246 break;
247 }
248 }
249 priv->nr = i;
250 pci_set_drvdata(pcidev, priv);
251 return 0;
252}
253
254static void exar_pci_remove(struct pci_dev *pcidev)
255{
256 struct exar8250 *priv = pci_get_drvdata(pcidev);
257 unsigned int i;
258
259 for (i = 0; i < priv->nr; i++)
260 serial8250_unregister_port(priv->line[i]);
261
262 if (priv->board->exit)
263 priv->board->exit(pcidev);
264}
265
266static int __maybe_unused exar_suspend(struct device *dev)
267{
268 struct pci_dev *pcidev = to_pci_dev(dev);
269 struct exar8250 *priv = pci_get_drvdata(pcidev);
270 unsigned int i;
271
272 for (i = 0; i < priv->nr; i++)
273 if (priv->line[i] >= 0)
274 serial8250_suspend_port(priv->line[i]);
275
276 /* Ensure that every init quirk is properly torn down */
277 if (priv->board->exit)
278 priv->board->exit(pcidev);
279
280 return 0;
281}
282
283static int __maybe_unused exar_resume(struct device *dev)
284{
285 struct pci_dev *pcidev = to_pci_dev(dev);
286 struct exar8250 *priv = pci_get_drvdata(pcidev);
287 unsigned int i;
288
289 for (i = 0; i < priv->nr; i++)
290 if (priv->line[i] >= 0)
291 serial8250_resume_port(priv->line[i]);
292
293 return 0;
294}
295
296static SIMPLE_DEV_PM_OPS(exar_pci_pm, exar_suspend, exar_resume);
297
298static const struct exar8250_board pbn_connect = {
299 .setup = pci_connect_tech_setup,
300};
301
302static const struct exar8250_board pbn_exar_ibm_saturn = {
303 .num_ports = 1,
304 .setup = pci_xr17c154_setup,
305};
306
307static const struct exar8250_board pbn_exar_XR17C15x = {
308 .setup = pci_xr17c154_setup,
309};
310
311static const struct exar8250_board pbn_exar_XR17V35x = {
312 .setup = pci_xr17v35x_setup,
313 .exit = pci_xr17v35x_exit,
314};
315
316static const struct exar8250_board pbn_exar_XR17V4358 = {
317 .num_ports = 12,
318 .has_slave = true,
319 .setup = pci_xr17v35x_setup,
320 .exit = pci_xr17v35x_exit,
321};
322
323static const struct exar8250_board pbn_exar_XR17V8358 = {
324 .num_ports = 16,
325 .has_slave = true,
326 .setup = pci_xr17v35x_setup,
327 .exit = pci_xr17v35x_exit,
328};
329
330#define CONNECT_DEVICE(devid, sdevid, bd) { \
331 PCI_DEVICE_SUB( \
332 PCI_VENDOR_ID_EXAR, \
333 PCI_DEVICE_ID_EXAR_##devid, \
334 PCI_SUBVENDOR_ID_CONNECT_TECH, \
335 PCI_SUBDEVICE_ID_CONNECT_TECH_PCI_##sdevid), 0, 0, \
336 (kernel_ulong_t)&bd \
337 }
338
339#define EXAR_DEVICE(vend, devid, bd) { \
340 PCI_VDEVICE(vend, PCI_DEVICE_ID_##devid), (kernel_ulong_t)&bd \
341 }
342
343#define IBM_DEVICE(devid, sdevid, bd) { \
344 PCI_DEVICE_SUB( \
345 PCI_VENDOR_ID_EXAR, \
346 PCI_DEVICE_ID_EXAR_##devid, \
347 PCI_VENDOR_ID_IBM, \
348 PCI_SUBDEVICE_ID_IBM_##sdevid), 0, 0, \
349 (kernel_ulong_t)&bd \
350 }
351
352static struct pci_device_id exar_pci_tbl[] = {
353 CONNECT_DEVICE(XR17C152, UART_2_232, pbn_connect),
354 CONNECT_DEVICE(XR17C154, UART_4_232, pbn_connect),
355 CONNECT_DEVICE(XR17C158, UART_8_232, pbn_connect),
356 CONNECT_DEVICE(XR17C152, UART_1_1, pbn_connect),
357 CONNECT_DEVICE(XR17C154, UART_2_2, pbn_connect),
358 CONNECT_DEVICE(XR17C158, UART_4_4, pbn_connect),
359 CONNECT_DEVICE(XR17C152, UART_2, pbn_connect),
360 CONNECT_DEVICE(XR17C154, UART_4, pbn_connect),
361 CONNECT_DEVICE(XR17C158, UART_8, pbn_connect),
362 CONNECT_DEVICE(XR17C152, UART_2_485, pbn_connect),
363 CONNECT_DEVICE(XR17C154, UART_4_485, pbn_connect),
364 CONNECT_DEVICE(XR17C158, UART_8_485, pbn_connect),
365
366 IBM_DEVICE(XR17C152, SATURN_SERIAL_ONE_PORT, pbn_exar_ibm_saturn),
367
368 /* Exar Corp. XR17C15[248] Dual/Quad/Octal UART */
369 EXAR_DEVICE(EXAR, EXAR_XR17C152, pbn_exar_XR17C15x),
370 EXAR_DEVICE(EXAR, EXAR_XR17C154, pbn_exar_XR17C15x),
371 EXAR_DEVICE(EXAR, EXAR_XR17C158, pbn_exar_XR17C15x),
372
373 /* Exar Corp. XR17V[48]35[248] Dual/Quad/Octal/Hexa PCIe UARTs */
374 EXAR_DEVICE(EXAR, EXAR_XR17V352, pbn_exar_XR17V35x),
375 EXAR_DEVICE(EXAR, EXAR_XR17V354, pbn_exar_XR17V35x),
376 EXAR_DEVICE(EXAR, EXAR_XR17V358, pbn_exar_XR17V35x),
377 EXAR_DEVICE(EXAR, EXAR_XR17V4358, pbn_exar_XR17V4358),
378 EXAR_DEVICE(EXAR, EXAR_XR17V8358, pbn_exar_XR17V8358),
379 EXAR_DEVICE(COMMTECH, COMMTECH_4222PCIE, pbn_exar_XR17V35x),
380 EXAR_DEVICE(COMMTECH, COMMTECH_4224PCIE, pbn_exar_XR17V35x),
381 EXAR_DEVICE(COMMTECH, COMMTECH_4228PCIE, pbn_exar_XR17V35x),
382 { 0, }
383};
384MODULE_DEVICE_TABLE(pci, exar_pci_tbl);
385
386static struct pci_driver exar_pci_driver = {
387 .name = "exar_serial",
388 .probe = exar_pci_probe,
389 .remove = exar_pci_remove,
390 .driver = {
391 .pm = &exar_pci_pm,
392 },
393 .id_table = exar_pci_tbl,
394};
395module_pci_driver(exar_pci_driver);
396
397MODULE_LICENSE("GPL");
398MODULE_DESCRIPTION("Exar Serial Dricer");
399MODULE_AUTHOR("Sudip Mukherjee <sudip.mukherjee@codethink.co.uk>");