blob: 1ebd0fe9c13e30446813c92a92dee982bc468cd0 [file] [log] [blame]
Michel Dänzerecc0b322009-07-21 11:23:57 +02001/*
2 * Copyright 2009 VMware, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Authors: Michel Dänzer
23 */
24#include <drm/drmP.h>
25#include <drm/radeon_drm.h>
26#include "radeon_reg.h"
27#include "radeon.h"
28
29
30/* Test BO GTT->VRAM and VRAM->GTT GPU copies across the whole GTT aperture */
31void radeon_test_moves(struct radeon_device *rdev)
32{
Jerome Glisse4c788672009-11-20 14:29:23 +010033 struct radeon_bo *vram_obj = NULL;
34 struct radeon_bo **gtt_obj = NULL;
Michel Dänzerecc0b322009-07-21 11:23:57 +020035 struct radeon_fence *fence = NULL;
36 uint64_t gtt_addr, vram_addr;
37 unsigned i, n, size;
38 int r;
39
40 size = 1024 * 1024;
41
42 /* Number of tests =
Michel Dänzer24cae9e2011-08-19 15:24:16 +000043 * (Total GTT - IB pool - writeback page - ring buffers) / test size
Michel Dänzerecc0b322009-07-21 11:23:57 +020044 */
Michel Dänzer24cae9e2011-08-19 15:24:16 +000045 n = rdev->mc.gtt_size - RADEON_IB_POOL_SIZE*64*1024 - rdev->cp.ring_size;
46 if (rdev->wb.wb_obj)
47 n -= RADEON_GPU_PAGE_SIZE;
48 if (rdev->ih.ring_obj)
49 n -= rdev->ih.ring_size;
50 n /= size;
Michel Dänzerecc0b322009-07-21 11:23:57 +020051
52 gtt_obj = kzalloc(n * sizeof(*gtt_obj), GFP_KERNEL);
53 if (!gtt_obj) {
54 DRM_ERROR("Failed to allocate %d pointers\n", n);
55 r = 1;
56 goto out_cleanup;
57 }
58
Daniel Vetter441921d2011-02-18 17:59:16 +010059 r = radeon_bo_create(rdev, size, PAGE_SIZE, true, RADEON_GEM_DOMAIN_VRAM,
Jerome Glisse4c788672009-11-20 14:29:23 +010060 &vram_obj);
Michel Dänzerecc0b322009-07-21 11:23:57 +020061 if (r) {
62 DRM_ERROR("Failed to create VRAM object\n");
63 goto out_cleanup;
64 }
Jerome Glisse4c788672009-11-20 14:29:23 +010065 r = radeon_bo_reserve(vram_obj, false);
66 if (unlikely(r != 0))
67 goto out_cleanup;
68 r = radeon_bo_pin(vram_obj, RADEON_GEM_DOMAIN_VRAM, &vram_addr);
Michel Dänzerecc0b322009-07-21 11:23:57 +020069 if (r) {
70 DRM_ERROR("Failed to pin VRAM object\n");
71 goto out_cleanup;
72 }
Michel Dänzerecc0b322009-07-21 11:23:57 +020073 for (i = 0; i < n; i++) {
74 void *gtt_map, *vram_map;
75 void **gtt_start, **gtt_end;
76 void **vram_start, **vram_end;
77
Daniel Vetter441921d2011-02-18 17:59:16 +010078 r = radeon_bo_create(rdev, size, PAGE_SIZE, true,
Jerome Glisse4c788672009-11-20 14:29:23 +010079 RADEON_GEM_DOMAIN_GTT, gtt_obj + i);
Michel Dänzerecc0b322009-07-21 11:23:57 +020080 if (r) {
81 DRM_ERROR("Failed to create GTT object %d\n", i);
82 goto out_cleanup;
83 }
84
Jerome Glisse4c788672009-11-20 14:29:23 +010085 r = radeon_bo_reserve(gtt_obj[i], false);
86 if (unlikely(r != 0))
87 goto out_cleanup;
88 r = radeon_bo_pin(gtt_obj[i], RADEON_GEM_DOMAIN_GTT, &gtt_addr);
Michel Dänzerecc0b322009-07-21 11:23:57 +020089 if (r) {
90 DRM_ERROR("Failed to pin GTT object %d\n", i);
91 goto out_cleanup;
92 }
93
Jerome Glisse4c788672009-11-20 14:29:23 +010094 r = radeon_bo_kmap(gtt_obj[i], &gtt_map);
Michel Dänzerecc0b322009-07-21 11:23:57 +020095 if (r) {
96 DRM_ERROR("Failed to map GTT object %d\n", i);
97 goto out_cleanup;
98 }
99
100 for (gtt_start = gtt_map, gtt_end = gtt_map + size;
101 gtt_start < gtt_end;
102 gtt_start++)
103 *gtt_start = gtt_start;
104
Jerome Glisse4c788672009-11-20 14:29:23 +0100105 radeon_bo_kunmap(gtt_obj[i]);
Michel Dänzerecc0b322009-07-21 11:23:57 +0200106
107 r = radeon_fence_create(rdev, &fence);
108 if (r) {
109 DRM_ERROR("Failed to create GTT->VRAM fence %d\n", i);
110 goto out_cleanup;
111 }
112
Matt Turnera77f1712009-10-14 00:34:41 -0400113 r = radeon_copy(rdev, gtt_addr, vram_addr, size / RADEON_GPU_PAGE_SIZE, fence);
Michel Dänzerecc0b322009-07-21 11:23:57 +0200114 if (r) {
115 DRM_ERROR("Failed GTT->VRAM copy %d\n", i);
116 goto out_cleanup;
117 }
118
119 r = radeon_fence_wait(fence, false);
120 if (r) {
121 DRM_ERROR("Failed to wait for GTT->VRAM fence %d\n", i);
122 goto out_cleanup;
123 }
124
125 radeon_fence_unref(&fence);
126
Jerome Glisse4c788672009-11-20 14:29:23 +0100127 r = radeon_bo_kmap(vram_obj, &vram_map);
Michel Dänzerecc0b322009-07-21 11:23:57 +0200128 if (r) {
129 DRM_ERROR("Failed to map VRAM object after copy %d\n", i);
130 goto out_cleanup;
131 }
132
133 for (gtt_start = gtt_map, gtt_end = gtt_map + size,
134 vram_start = vram_map, vram_end = vram_map + size;
135 vram_start < vram_end;
136 gtt_start++, vram_start++) {
137 if (*vram_start != gtt_start) {
138 DRM_ERROR("Incorrect GTT->VRAM copy %d: Got 0x%p, "
139 "expected 0x%p (GTT map 0x%p-0x%p)\n",
140 i, *vram_start, gtt_start, gtt_map,
141 gtt_end);
Jerome Glisse4c788672009-11-20 14:29:23 +0100142 radeon_bo_kunmap(vram_obj);
Michel Dänzerecc0b322009-07-21 11:23:57 +0200143 goto out_cleanup;
144 }
145 *vram_start = vram_start;
146 }
147
Jerome Glisse4c788672009-11-20 14:29:23 +0100148 radeon_bo_kunmap(vram_obj);
Michel Dänzerecc0b322009-07-21 11:23:57 +0200149
150 r = radeon_fence_create(rdev, &fence);
151 if (r) {
152 DRM_ERROR("Failed to create VRAM->GTT fence %d\n", i);
153 goto out_cleanup;
154 }
155
Matt Turnera77f1712009-10-14 00:34:41 -0400156 r = radeon_copy(rdev, vram_addr, gtt_addr, size / RADEON_GPU_PAGE_SIZE, fence);
Michel Dänzerecc0b322009-07-21 11:23:57 +0200157 if (r) {
158 DRM_ERROR("Failed VRAM->GTT copy %d\n", i);
159 goto out_cleanup;
160 }
161
162 r = radeon_fence_wait(fence, false);
163 if (r) {
164 DRM_ERROR("Failed to wait for VRAM->GTT fence %d\n", i);
165 goto out_cleanup;
166 }
167
168 radeon_fence_unref(&fence);
169
Jerome Glisse4c788672009-11-20 14:29:23 +0100170 r = radeon_bo_kmap(gtt_obj[i], &gtt_map);
Michel Dänzerecc0b322009-07-21 11:23:57 +0200171 if (r) {
172 DRM_ERROR("Failed to map GTT object after copy %d\n", i);
173 goto out_cleanup;
174 }
175
176 for (gtt_start = gtt_map, gtt_end = gtt_map + size,
177 vram_start = vram_map, vram_end = vram_map + size;
178 gtt_start < gtt_end;
179 gtt_start++, vram_start++) {
180 if (*gtt_start != vram_start) {
181 DRM_ERROR("Incorrect VRAM->GTT copy %d: Got 0x%p, "
182 "expected 0x%p (VRAM map 0x%p-0x%p)\n",
183 i, *gtt_start, vram_start, vram_map,
184 vram_end);
Jerome Glisse4c788672009-11-20 14:29:23 +0100185 radeon_bo_kunmap(gtt_obj[i]);
Michel Dänzerecc0b322009-07-21 11:23:57 +0200186 goto out_cleanup;
187 }
188 }
189
Jerome Glisse4c788672009-11-20 14:29:23 +0100190 radeon_bo_kunmap(gtt_obj[i]);
Michel Dänzerecc0b322009-07-21 11:23:57 +0200191
192 DRM_INFO("Tested GTT->VRAM and VRAM->GTT copy for GTT offset 0x%llx\n",
Jerome Glissed594e462010-02-17 21:54:29 +0000193 gtt_addr - rdev->mc.gtt_start);
Michel Dänzerecc0b322009-07-21 11:23:57 +0200194 }
195
196out_cleanup:
197 if (vram_obj) {
Jerome Glisse4c788672009-11-20 14:29:23 +0100198 if (radeon_bo_is_reserved(vram_obj)) {
199 radeon_bo_unpin(vram_obj);
200 radeon_bo_unreserve(vram_obj);
201 }
202 radeon_bo_unref(&vram_obj);
Michel Dänzerecc0b322009-07-21 11:23:57 +0200203 }
204 if (gtt_obj) {
205 for (i = 0; i < n; i++) {
206 if (gtt_obj[i]) {
Jerome Glisse4c788672009-11-20 14:29:23 +0100207 if (radeon_bo_is_reserved(gtt_obj[i])) {
208 radeon_bo_unpin(gtt_obj[i]);
209 radeon_bo_unreserve(gtt_obj[i]);
210 }
211 radeon_bo_unref(&gtt_obj[i]);
Michel Dänzerecc0b322009-07-21 11:23:57 +0200212 }
213 }
214 kfree(gtt_obj);
215 }
216 if (fence) {
217 radeon_fence_unref(&fence);
218 }
219 if (r) {
220 printk(KERN_WARNING "Error while testing BO move.\n");
221 }
222}