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Greg Kroah-Hartmanb2441312017-11-01 15:07:57 +01001// SPDX-License-Identifier: GPL-2.0
Rod Whitby7e36e2f2008-04-01 10:53:23 +01002/*
3 * arch/arm/mach-ixp4xx/fsg-setup.c
4 *
5 * FSG board-setup
6 *
7 * Copyright (C) 2008 Rod Whitby <rod@whitby.id.au>
8 *
9 * based on ixdp425-setup.c:
10 * Copyright (C) 2003-2004 MontaVista Software, Inc.
11 * based on nslu2-power.c
12 * Copyright (C) 2005 Tower Technologies
13 *
14 * Author: Rod Whitby <rod@whitby.id.au>
15 * Maintainers: http://www.nslu2-linux.org/
16 *
17 */
Russell King2f8163b2011-07-26 10:53:52 +010018#include <linux/gpio.h>
Rod Whitby7e36e2f2008-04-01 10:53:23 +010019#include <linux/if_ether.h>
20#include <linux/irq.h>
21#include <linux/serial.h>
22#include <linux/serial_8250.h>
23#include <linux/leds.h>
24#include <linux/reboot.h>
25#include <linux/i2c.h>
Linus Walleijb2e63552017-09-10 01:30:46 +020026#include <linux/gpio/machine.h>
Russell Kingfced80c2008-09-06 12:10:45 +010027#include <linux/io.h>
Rod Whitby7e36e2f2008-04-01 10:53:23 +010028#include <asm/mach-types.h>
29#include <asm/mach/arch.h>
30#include <asm/mach/flash.h>
Rod Whitby7e36e2f2008-04-01 10:53:23 +010031
Krzysztof HaƂasa914e7bc2009-11-16 22:53:53 +010032#define FSG_SDA_PIN 12
33#define FSG_SCL_PIN 13
34
35#define FSG_SB_GPIO 4 /* sync button */
36#define FSG_RB_GPIO 9 /* reset button */
37#define FSG_UB_GPIO 10 /* usb button */
38
Rod Whitby7e36e2f2008-04-01 10:53:23 +010039static struct flash_platform_data fsg_flash_data = {
40 .map_name = "cfi_probe",
41 .width = 2,
42};
43
44static struct resource fsg_flash_resource = {
45 .flags = IORESOURCE_MEM,
46};
47
48static struct platform_device fsg_flash = {
49 .name = "IXP4XX-Flash",
50 .id = 0,
51 .dev = {
52 .platform_data = &fsg_flash_data,
53 },
54 .num_resources = 1,
55 .resource = &fsg_flash_resource,
56};
57
Linus Walleijb2e63552017-09-10 01:30:46 +020058static struct gpiod_lookup_table fsg_i2c_gpiod_table = {
59 .dev_id = "i2c-gpio",
60 .table = {
61 GPIO_LOOKUP_IDX("IXP4XX_GPIO_CHIP", FSG_SDA_PIN,
Linus Walleij4d0ce622017-09-10 23:03:32 +020062 NULL, 0, GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN),
Linus Walleijb2e63552017-09-10 01:30:46 +020063 GPIO_LOOKUP_IDX("IXP4XX_GPIO_CHIP", FSG_SCL_PIN,
Linus Walleij4d0ce622017-09-10 23:03:32 +020064 NULL, 1, GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN),
Linus Walleijb2e63552017-09-10 01:30:46 +020065 },
Rod Whitby7e36e2f2008-04-01 10:53:23 +010066};
67
68static struct platform_device fsg_i2c_gpio = {
69 .name = "i2c-gpio",
70 .id = 0,
71 .dev = {
Linus Walleijb2e63552017-09-10 01:30:46 +020072 .platform_data = NULL,
Rod Whitby7e36e2f2008-04-01 10:53:23 +010073 },
74};
75
76static struct i2c_board_info __initdata fsg_i2c_board_info [] = {
77 {
Tomasz Chmielewskid90c1ad2008-08-19 09:54:20 +010078 I2C_BOARD_INFO("isl1208", 0x6f),
Rod Whitby7e36e2f2008-04-01 10:53:23 +010079 },
80};
81
82static struct resource fsg_uart_resources[] = {
83 {
84 .start = IXP4XX_UART1_BASE_PHYS,
85 .end = IXP4XX_UART1_BASE_PHYS + 0x0fff,
86 .flags = IORESOURCE_MEM,
87 },
88 {
89 .start = IXP4XX_UART2_BASE_PHYS,
90 .end = IXP4XX_UART2_BASE_PHYS + 0x0fff,
91 .flags = IORESOURCE_MEM,
92 }
93};
94
95static struct plat_serial8250_port fsg_uart_data[] = {
96 {
97 .mapbase = IXP4XX_UART1_BASE_PHYS,
98 .membase = (char *)IXP4XX_UART1_BASE_VIRT + REG_OFFSET,
99 .irq = IRQ_IXP4XX_UART1,
100 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
101 .iotype = UPIO_MEM,
102 .regshift = 2,
103 .uartclk = IXP4XX_UART_XTAL,
104 },
105 {
106 .mapbase = IXP4XX_UART2_BASE_PHYS,
107 .membase = (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET,
108 .irq = IRQ_IXP4XX_UART2,
109 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
110 .iotype = UPIO_MEM,
111 .regshift = 2,
112 .uartclk = IXP4XX_UART_XTAL,
113 },
114 { }
115};
116
117static struct platform_device fsg_uart = {
118 .name = "serial8250",
119 .id = PLAT8250_DEV_PLATFORM,
120 .dev = {
121 .platform_data = fsg_uart_data,
122 },
123 .num_resources = ARRAY_SIZE(fsg_uart_resources),
124 .resource = fsg_uart_resources,
125};
126
127static struct platform_device fsg_leds = {
128 .name = "fsg-led",
129 .id = -1,
130};
131
132/* Built-in 10/100 Ethernet MAC interfaces */
133static struct eth_plat_info fsg_plat_eth[] = {
134 {
135 .phy = 5,
136 .rxq = 3,
137 .txreadyq = 20,
138 }, {
139 .phy = 4,
140 .rxq = 4,
141 .txreadyq = 21,
142 }
143};
144
145static struct platform_device fsg_eth[] = {
146 {
147 .name = "ixp4xx_eth",
148 .id = IXP4XX_ETH_NPEB,
149 .dev = {
150 .platform_data = fsg_plat_eth,
151 },
152 }, {
153 .name = "ixp4xx_eth",
154 .id = IXP4XX_ETH_NPEC,
155 .dev = {
156 .platform_data = fsg_plat_eth + 1,
157 },
158 }
159};
160
161static struct platform_device *fsg_devices[] __initdata = {
162 &fsg_i2c_gpio,
163 &fsg_flash,
164 &fsg_leds,
165 &fsg_eth[0],
166 &fsg_eth[1],
167};
168
169static irqreturn_t fsg_power_handler(int irq, void *dev_id)
170{
171 /* Signal init to do the ctrlaltdel action, this will bypass init if
172 * it hasn't started and do a kernel_restart.
173 */
174 ctrl_alt_del();
175
176 return IRQ_HANDLED;
177}
178
179static irqreturn_t fsg_reset_handler(int irq, void *dev_id)
180{
181 /* This is the paper-clip reset which does an emergency reboot. */
182 printk(KERN_INFO "Restarting system.\n");
183 machine_restart(NULL);
184
185 /* This should never be reached. */
186 return IRQ_HANDLED;
187}
188
189static void __init fsg_init(void)
190{
Rod Whitby7e36e2f2008-04-01 10:53:23 +0100191 uint8_t __iomem *f;
Rod Whitby7e36e2f2008-04-01 10:53:23 +0100192
193 ixp4xx_sys_init();
194
195 fsg_flash_resource.start = IXP4XX_EXP_BUS_BASE(0);
196 fsg_flash_resource.end =
197 IXP4XX_EXP_BUS_BASE(0) + ixp4xx_exp_bus_size - 1;
198
199 *IXP4XX_EXP_CS0 |= IXP4XX_FLASH_WRITABLE;
200 *IXP4XX_EXP_CS1 = *IXP4XX_EXP_CS0;
201
202 /* Configure CS2 for operation, 8bit and writable */
203 *IXP4XX_EXP_CS2 = 0xbfff0002;
204
Linus Walleijb2e63552017-09-10 01:30:46 +0200205 gpiod_add_lookup_table(&fsg_i2c_gpiod_table);
Rod Whitby7e36e2f2008-04-01 10:53:23 +0100206 i2c_register_board_info(0, fsg_i2c_board_info,
207 ARRAY_SIZE(fsg_i2c_board_info));
208
209 /* This is only useful on a modified machine, but it is valuable
210 * to have it first in order to see debug messages, and so that
211 * it does *not* get removed if platform_add_devices fails!
212 */
213 (void)platform_device_register(&fsg_uart);
214
215 platform_add_devices(fsg_devices, ARRAY_SIZE(fsg_devices));
216
217 if (request_irq(gpio_to_irq(FSG_RB_GPIO), &fsg_reset_handler,
Michael Opdenacker1ee65642014-03-04 21:59:03 +0100218 IRQF_TRIGGER_LOW, "FSG reset button", NULL) < 0) {
Rod Whitby7e36e2f2008-04-01 10:53:23 +0100219
220 printk(KERN_DEBUG "Reset Button IRQ %d not available\n",
221 gpio_to_irq(FSG_RB_GPIO));
222 }
223
224 if (request_irq(gpio_to_irq(FSG_SB_GPIO), &fsg_power_handler,
Michael Opdenacker1ee65642014-03-04 21:59:03 +0100225 IRQF_TRIGGER_LOW, "FSG power button", NULL) < 0) {
Rod Whitby7e36e2f2008-04-01 10:53:23 +0100226
227 printk(KERN_DEBUG "Power Button IRQ %d not available\n",
228 gpio_to_irq(FSG_SB_GPIO));
229 }
230
231 /*
232 * Map in a portion of the flash and read the MAC addresses.
233 * Since it is stored in BE in the flash itself, we need to
234 * byteswap it if we're in LE mode.
235 */
236 f = ioremap(IXP4XX_EXP_BUS_BASE(0), 0x400000);
237 if (f) {
238#ifdef __ARMEB__
Tomasz Chmielewskid90c1ad2008-08-19 09:54:20 +0100239 int i;
Rod Whitby7e36e2f2008-04-01 10:53:23 +0100240 for (i = 0; i < 6; i++) {
241 fsg_plat_eth[0].hwaddr[i] = readb(f + 0x3C0422 + i);
242 fsg_plat_eth[1].hwaddr[i] = readb(f + 0x3C043B + i);
243 }
244#else
245
246 /*
247 Endian-swapped reads from unaligned addresses are
248 required to extract the two MACs from the big-endian
249 Redboot config area in flash.
250 */
251
252 fsg_plat_eth[0].hwaddr[0] = readb(f + 0x3C0421);
253 fsg_plat_eth[0].hwaddr[1] = readb(f + 0x3C0420);
254 fsg_plat_eth[0].hwaddr[2] = readb(f + 0x3C0427);
255 fsg_plat_eth[0].hwaddr[3] = readb(f + 0x3C0426);
256 fsg_plat_eth[0].hwaddr[4] = readb(f + 0x3C0425);
257 fsg_plat_eth[0].hwaddr[5] = readb(f + 0x3C0424);
258
259 fsg_plat_eth[1].hwaddr[0] = readb(f + 0x3C0439);
260 fsg_plat_eth[1].hwaddr[1] = readb(f + 0x3C043F);
261 fsg_plat_eth[1].hwaddr[2] = readb(f + 0x3C043E);
262 fsg_plat_eth[1].hwaddr[3] = readb(f + 0x3C043D);
263 fsg_plat_eth[1].hwaddr[4] = readb(f + 0x3C043C);
264 fsg_plat_eth[1].hwaddr[5] = readb(f + 0x3C0443);
265#endif
266 iounmap(f);
267 }
Johannes Berge1749612008-10-27 15:59:26 -0700268 printk(KERN_INFO "FSG: Using MAC address %pM for port 0\n",
269 fsg_plat_eth[0].hwaddr);
270 printk(KERN_INFO "FSG: Using MAC address %pM for port 1\n",
271 fsg_plat_eth[1].hwaddr);
Rod Whitby7e36e2f2008-04-01 10:53:23 +0100272
273}
274
275MACHINE_START(FSG, "Freecom FSG-3")
276 /* Maintainer: www.nslu2-linux.org */
Rod Whitby7e36e2f2008-04-01 10:53:23 +0100277 .map_io = ixp4xx_map_io,
Rob Herringf4495882012-03-06 15:01:53 -0600278 .init_early = ixp4xx_init_early,
Rod Whitby7e36e2f2008-04-01 10:53:23 +0100279 .init_irq = ixp4xx_init_irq,
Stephen Warren6bb27d72012-11-08 12:40:59 -0700280 .init_time = ixp4xx_timer_init,
Nicolas Pitree022c722011-07-05 22:38:13 -0400281 .atag_offset = 0x100,
Rod Whitby7e36e2f2008-04-01 10:53:23 +0100282 .init_machine = fsg_init,
Nicolas Pitre7553ee72011-07-05 22:28:09 -0400283#if defined(CONFIG_PCI)
284 .dma_zone_size = SZ_64M,
285#endif
Russell Kingd1b860f2011-11-05 12:10:55 +0000286 .restart = ixp4xx_restart,
Rod Whitby7e36e2f2008-04-01 10:53:23 +0100287MACHINE_END
288