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Eli Cohend29b7962014-10-02 12:19:43 +03001/*
Saeed Mahameede2816822015-05-28 22:28:40 +03002 * Copyright (c) 2013-2015, Mellanox Technologies, Ltd. All rights reserved.
Eli Cohend29b7962014-10-02 12:19:43 +03003 *
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
9 *
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
12 * conditions are met:
13 *
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
16 * disclaimer.
17 *
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
Saeed Mahameede2816822015-05-28 22:28:40 +030031*/
Eli Cohend29b7962014-10-02 12:19:43 +030032#ifndef MLX5_IFC_H
33#define MLX5_IFC_H
34
Ilan Tayarie29341f2017-03-13 20:05:45 +020035#include "mlx5_ifc_fpga.h"
36
Eli Cohend29b7962014-10-02 12:19:43 +030037enum {
Saeed Mahameede2816822015-05-28 22:28:40 +030038 MLX5_EVENT_TYPE_CODING_COMPLETION_EVENTS = 0x0,
39 MLX5_EVENT_TYPE_CODING_PATH_MIGRATED_SUCCEEDED = 0x1,
40 MLX5_EVENT_TYPE_CODING_COMMUNICATION_ESTABLISHED = 0x2,
41 MLX5_EVENT_TYPE_CODING_SEND_QUEUE_DRAINED = 0x3,
42 MLX5_EVENT_TYPE_CODING_LAST_WQE_REACHED = 0x13,
43 MLX5_EVENT_TYPE_CODING_SRQ_LIMIT = 0x14,
44 MLX5_EVENT_TYPE_CODING_DCT_ALL_CONNECTIONS_CLOSED = 0x1c,
45 MLX5_EVENT_TYPE_CODING_DCT_ACCESS_KEY_VIOLATION = 0x1d,
46 MLX5_EVENT_TYPE_CODING_CQ_ERROR = 0x4,
47 MLX5_EVENT_TYPE_CODING_LOCAL_WQ_CATASTROPHIC_ERROR = 0x5,
48 MLX5_EVENT_TYPE_CODING_PATH_MIGRATION_FAILED = 0x7,
49 MLX5_EVENT_TYPE_CODING_PAGE_FAULT_EVENT = 0xc,
50 MLX5_EVENT_TYPE_CODING_INVALID_REQUEST_LOCAL_WQ_ERROR = 0x10,
51 MLX5_EVENT_TYPE_CODING_LOCAL_ACCESS_VIOLATION_WQ_ERROR = 0x11,
52 MLX5_EVENT_TYPE_CODING_LOCAL_SRQ_CATASTROPHIC_ERROR = 0x12,
53 MLX5_EVENT_TYPE_CODING_INTERNAL_ERROR = 0x8,
54 MLX5_EVENT_TYPE_CODING_PORT_STATE_CHANGE = 0x9,
55 MLX5_EVENT_TYPE_CODING_GPIO_EVENT = 0x15,
56 MLX5_EVENT_TYPE_CODING_REMOTE_CONFIGURATION_PROTOCOL_EVENT = 0x19,
57 MLX5_EVENT_TYPE_CODING_DOORBELL_BLUEFLAME_CONGESTION_EVENT = 0x1a,
58 MLX5_EVENT_TYPE_CODING_STALL_VL_EVENT = 0x1b,
59 MLX5_EVENT_TYPE_CODING_DROPPED_PACKET_LOGGED_EVENT = 0x1f,
60 MLX5_EVENT_TYPE_CODING_COMMAND_INTERFACE_COMPLETION = 0xa,
Ilan Tayarie29341f2017-03-13 20:05:45 +020061 MLX5_EVENT_TYPE_CODING_PAGE_REQUEST = 0xb,
62 MLX5_EVENT_TYPE_CODING_FPGA_ERROR = 0x20,
Saeed Mahameede2816822015-05-28 22:28:40 +030063};
64
65enum {
66 MLX5_MODIFY_TIR_BITMASK_LRO = 0x0,
67 MLX5_MODIFY_TIR_BITMASK_INDIRECT_TABLE = 0x1,
68 MLX5_MODIFY_TIR_BITMASK_HASH = 0x2,
69 MLX5_MODIFY_TIR_BITMASK_TUNNELED_OFFLOAD_EN = 0x3
70};
71
72enum {
Eran Ben Elishaf91e6d82015-12-14 16:34:09 +020073 MLX5_SET_HCA_CAP_OP_MOD_GENERAL_DEVICE = 0x0,
74 MLX5_SET_HCA_CAP_OP_MOD_ATOMIC = 0x3,
75};
76
77enum {
Eli Cohend29b7962014-10-02 12:19:43 +030078 MLX5_CMD_OP_QUERY_HCA_CAP = 0x100,
79 MLX5_CMD_OP_QUERY_ADAPTER = 0x101,
80 MLX5_CMD_OP_INIT_HCA = 0x102,
81 MLX5_CMD_OP_TEARDOWN_HCA = 0x103,
82 MLX5_CMD_OP_ENABLE_HCA = 0x104,
83 MLX5_CMD_OP_DISABLE_HCA = 0x105,
84 MLX5_CMD_OP_QUERY_PAGES = 0x107,
85 MLX5_CMD_OP_MANAGE_PAGES = 0x108,
86 MLX5_CMD_OP_SET_HCA_CAP = 0x109,
Saeed Mahameede2816822015-05-28 22:28:40 +030087 MLX5_CMD_OP_QUERY_ISSI = 0x10a,
88 MLX5_CMD_OP_SET_ISSI = 0x10b,
Saeed Mahameed0dbc6fe2016-11-17 13:45:59 +020089 MLX5_CMD_OP_SET_DRIVER_VERSION = 0x10d,
Eli Cohend29b7962014-10-02 12:19:43 +030090 MLX5_CMD_OP_CREATE_MKEY = 0x200,
91 MLX5_CMD_OP_QUERY_MKEY = 0x201,
92 MLX5_CMD_OP_DESTROY_MKEY = 0x202,
93 MLX5_CMD_OP_QUERY_SPECIAL_CONTEXTS = 0x203,
94 MLX5_CMD_OP_PAGE_FAULT_RESUME = 0x204,
95 MLX5_CMD_OP_CREATE_EQ = 0x301,
96 MLX5_CMD_OP_DESTROY_EQ = 0x302,
97 MLX5_CMD_OP_QUERY_EQ = 0x303,
98 MLX5_CMD_OP_GEN_EQE = 0x304,
99 MLX5_CMD_OP_CREATE_CQ = 0x400,
100 MLX5_CMD_OP_DESTROY_CQ = 0x401,
101 MLX5_CMD_OP_QUERY_CQ = 0x402,
102 MLX5_CMD_OP_MODIFY_CQ = 0x403,
103 MLX5_CMD_OP_CREATE_QP = 0x500,
104 MLX5_CMD_OP_DESTROY_QP = 0x501,
105 MLX5_CMD_OP_RST2INIT_QP = 0x502,
106 MLX5_CMD_OP_INIT2RTR_QP = 0x503,
107 MLX5_CMD_OP_RTR2RTS_QP = 0x504,
108 MLX5_CMD_OP_RTS2RTS_QP = 0x505,
109 MLX5_CMD_OP_SQERR2RTS_QP = 0x506,
110 MLX5_CMD_OP_2ERR_QP = 0x507,
111 MLX5_CMD_OP_2RST_QP = 0x50a,
112 MLX5_CMD_OP_QUERY_QP = 0x50b,
Saeed Mahameede2816822015-05-28 22:28:40 +0300113 MLX5_CMD_OP_SQD_RTS_QP = 0x50c,
Eli Cohend29b7962014-10-02 12:19:43 +0300114 MLX5_CMD_OP_INIT2INIT_QP = 0x50e,
115 MLX5_CMD_OP_CREATE_PSV = 0x600,
116 MLX5_CMD_OP_DESTROY_PSV = 0x601,
117 MLX5_CMD_OP_CREATE_SRQ = 0x700,
118 MLX5_CMD_OP_DESTROY_SRQ = 0x701,
119 MLX5_CMD_OP_QUERY_SRQ = 0x702,
120 MLX5_CMD_OP_ARM_RQ = 0x703,
Saeed Mahameede2816822015-05-28 22:28:40 +0300121 MLX5_CMD_OP_CREATE_XRC_SRQ = 0x705,
122 MLX5_CMD_OP_DESTROY_XRC_SRQ = 0x706,
123 MLX5_CMD_OP_QUERY_XRC_SRQ = 0x707,
124 MLX5_CMD_OP_ARM_XRC_SRQ = 0x708,
Eli Cohend29b7962014-10-02 12:19:43 +0300125 MLX5_CMD_OP_CREATE_DCT = 0x710,
126 MLX5_CMD_OP_DESTROY_DCT = 0x711,
127 MLX5_CMD_OP_DRAIN_DCT = 0x712,
128 MLX5_CMD_OP_QUERY_DCT = 0x713,
129 MLX5_CMD_OP_ARM_DCT_FOR_KEY_VIOLATION = 0x714,
Saeed Mahameed74862162016-06-09 15:11:34 +0300130 MLX5_CMD_OP_CREATE_XRQ = 0x717,
131 MLX5_CMD_OP_DESTROY_XRQ = 0x718,
132 MLX5_CMD_OP_QUERY_XRQ = 0x719,
133 MLX5_CMD_OP_ARM_XRQ = 0x71a,
Eli Cohend29b7962014-10-02 12:19:43 +0300134 MLX5_CMD_OP_QUERY_VPORT_STATE = 0x750,
135 MLX5_CMD_OP_MODIFY_VPORT_STATE = 0x751,
136 MLX5_CMD_OP_QUERY_ESW_VPORT_CONTEXT = 0x752,
137 MLX5_CMD_OP_MODIFY_ESW_VPORT_CONTEXT = 0x753,
138 MLX5_CMD_OP_QUERY_NIC_VPORT_CONTEXT = 0x754,
139 MLX5_CMD_OP_MODIFY_NIC_VPORT_CONTEXT = 0x755,
Saeed Mahameede2816822015-05-28 22:28:40 +0300140 MLX5_CMD_OP_QUERY_ROCE_ADDRESS = 0x760,
Eli Cohend29b7962014-10-02 12:19:43 +0300141 MLX5_CMD_OP_SET_ROCE_ADDRESS = 0x761,
Saeed Mahameede2816822015-05-28 22:28:40 +0300142 MLX5_CMD_OP_QUERY_HCA_VPORT_CONTEXT = 0x762,
143 MLX5_CMD_OP_MODIFY_HCA_VPORT_CONTEXT = 0x763,
144 MLX5_CMD_OP_QUERY_HCA_VPORT_GID = 0x764,
145 MLX5_CMD_OP_QUERY_HCA_VPORT_PKEY = 0x765,
Eli Cohend29b7962014-10-02 12:19:43 +0300146 MLX5_CMD_OP_QUERY_VPORT_COUNTER = 0x770,
147 MLX5_CMD_OP_ALLOC_Q_COUNTER = 0x771,
148 MLX5_CMD_OP_DEALLOC_Q_COUNTER = 0x772,
149 MLX5_CMD_OP_QUERY_Q_COUNTER = 0x773,
Saeed Mahameed74862162016-06-09 15:11:34 +0300150 MLX5_CMD_OP_SET_RATE_LIMIT = 0x780,
151 MLX5_CMD_OP_QUERY_RATE_LIMIT = 0x781,
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300152 MLX5_CMD_OP_CREATE_SCHEDULING_ELEMENT = 0x782,
153 MLX5_CMD_OP_DESTROY_SCHEDULING_ELEMENT = 0x783,
154 MLX5_CMD_OP_QUERY_SCHEDULING_ELEMENT = 0x784,
155 MLX5_CMD_OP_MODIFY_SCHEDULING_ELEMENT = 0x785,
156 MLX5_CMD_OP_CREATE_QOS_PARA_VPORT = 0x786,
157 MLX5_CMD_OP_DESTROY_QOS_PARA_VPORT = 0x787,
Eli Cohend29b7962014-10-02 12:19:43 +0300158 MLX5_CMD_OP_ALLOC_PD = 0x800,
159 MLX5_CMD_OP_DEALLOC_PD = 0x801,
160 MLX5_CMD_OP_ALLOC_UAR = 0x802,
161 MLX5_CMD_OP_DEALLOC_UAR = 0x803,
162 MLX5_CMD_OP_CONFIG_INT_MODERATION = 0x804,
163 MLX5_CMD_OP_ACCESS_REG = 0x805,
164 MLX5_CMD_OP_ATTACH_TO_MCG = 0x806,
Saeed Mahameed20bb5662016-07-17 02:01:45 +0300165 MLX5_CMD_OP_DETACH_FROM_MCG = 0x807,
Eli Cohend29b7962014-10-02 12:19:43 +0300166 MLX5_CMD_OP_GET_DROPPED_PACKET_LOG = 0x80a,
167 MLX5_CMD_OP_MAD_IFC = 0x50d,
168 MLX5_CMD_OP_QUERY_MAD_DEMUX = 0x80b,
169 MLX5_CMD_OP_SET_MAD_DEMUX = 0x80c,
170 MLX5_CMD_OP_NOP = 0x80d,
171 MLX5_CMD_OP_ALLOC_XRCD = 0x80e,
172 MLX5_CMD_OP_DEALLOC_XRCD = 0x80f,
Saeed Mahameede2816822015-05-28 22:28:40 +0300173 MLX5_CMD_OP_ALLOC_TRANSPORT_DOMAIN = 0x816,
174 MLX5_CMD_OP_DEALLOC_TRANSPORT_DOMAIN = 0x817,
175 MLX5_CMD_OP_QUERY_CONG_STATUS = 0x822,
176 MLX5_CMD_OP_MODIFY_CONG_STATUS = 0x823,
177 MLX5_CMD_OP_QUERY_CONG_PARAMS = 0x824,
178 MLX5_CMD_OP_MODIFY_CONG_PARAMS = 0x825,
179 MLX5_CMD_OP_QUERY_CONG_STATISTICS = 0x826,
180 MLX5_CMD_OP_ADD_VXLAN_UDP_DPORT = 0x827,
181 MLX5_CMD_OP_DELETE_VXLAN_UDP_DPORT = 0x828,
182 MLX5_CMD_OP_SET_L2_TABLE_ENTRY = 0x829,
183 MLX5_CMD_OP_QUERY_L2_TABLE_ENTRY = 0x82a,
184 MLX5_CMD_OP_DELETE_L2_TABLE_ENTRY = 0x82b,
Tariq Toukan928cfe82016-02-22 18:17:29 +0200185 MLX5_CMD_OP_SET_WOL_ROL = 0x830,
186 MLX5_CMD_OP_QUERY_WOL_ROL = 0x831,
Aviv Heller84df61e2016-05-10 13:47:50 +0300187 MLX5_CMD_OP_CREATE_LAG = 0x840,
188 MLX5_CMD_OP_MODIFY_LAG = 0x841,
189 MLX5_CMD_OP_QUERY_LAG = 0x842,
190 MLX5_CMD_OP_DESTROY_LAG = 0x843,
191 MLX5_CMD_OP_CREATE_VPORT_LAG = 0x844,
192 MLX5_CMD_OP_DESTROY_VPORT_LAG = 0x845,
Eli Cohend29b7962014-10-02 12:19:43 +0300193 MLX5_CMD_OP_CREATE_TIR = 0x900,
194 MLX5_CMD_OP_MODIFY_TIR = 0x901,
195 MLX5_CMD_OP_DESTROY_TIR = 0x902,
196 MLX5_CMD_OP_QUERY_TIR = 0x903,
Eli Cohend29b7962014-10-02 12:19:43 +0300197 MLX5_CMD_OP_CREATE_SQ = 0x904,
198 MLX5_CMD_OP_MODIFY_SQ = 0x905,
199 MLX5_CMD_OP_DESTROY_SQ = 0x906,
200 MLX5_CMD_OP_QUERY_SQ = 0x907,
201 MLX5_CMD_OP_CREATE_RQ = 0x908,
202 MLX5_CMD_OP_MODIFY_RQ = 0x909,
203 MLX5_CMD_OP_DESTROY_RQ = 0x90a,
204 MLX5_CMD_OP_QUERY_RQ = 0x90b,
205 MLX5_CMD_OP_CREATE_RMP = 0x90c,
206 MLX5_CMD_OP_MODIFY_RMP = 0x90d,
207 MLX5_CMD_OP_DESTROY_RMP = 0x90e,
208 MLX5_CMD_OP_QUERY_RMP = 0x90f,
Saeed Mahameede2816822015-05-28 22:28:40 +0300209 MLX5_CMD_OP_CREATE_TIS = 0x912,
210 MLX5_CMD_OP_MODIFY_TIS = 0x913,
211 MLX5_CMD_OP_DESTROY_TIS = 0x914,
212 MLX5_CMD_OP_QUERY_TIS = 0x915,
213 MLX5_CMD_OP_CREATE_RQT = 0x916,
214 MLX5_CMD_OP_MODIFY_RQT = 0x917,
215 MLX5_CMD_OP_DESTROY_RQT = 0x918,
216 MLX5_CMD_OP_QUERY_RQT = 0x919,
Maor Gottlieb2cc43b42016-01-11 10:25:59 +0200217 MLX5_CMD_OP_SET_FLOW_TABLE_ROOT = 0x92f,
Saeed Mahameede2816822015-05-28 22:28:40 +0300218 MLX5_CMD_OP_CREATE_FLOW_TABLE = 0x930,
219 MLX5_CMD_OP_DESTROY_FLOW_TABLE = 0x931,
220 MLX5_CMD_OP_QUERY_FLOW_TABLE = 0x932,
221 MLX5_CMD_OP_CREATE_FLOW_GROUP = 0x933,
222 MLX5_CMD_OP_DESTROY_FLOW_GROUP = 0x934,
223 MLX5_CMD_OP_QUERY_FLOW_GROUP = 0x935,
224 MLX5_CMD_OP_SET_FLOW_TABLE_ENTRY = 0x936,
225 MLX5_CMD_OP_QUERY_FLOW_TABLE_ENTRY = 0x937,
Maor Gottlieb34a40e62016-01-11 10:26:00 +0200226 MLX5_CMD_OP_DELETE_FLOW_TABLE_ENTRY = 0x938,
Amir Vadai9dc0b282016-05-13 12:55:39 +0000227 MLX5_CMD_OP_ALLOC_FLOW_COUNTER = 0x939,
228 MLX5_CMD_OP_DEALLOC_FLOW_COUNTER = 0x93a,
229 MLX5_CMD_OP_QUERY_FLOW_COUNTER = 0x93b,
Shahar Klein86d56a12016-06-10 00:07:30 +0300230 MLX5_CMD_OP_MODIFY_FLOW_TABLE = 0x93c,
Hadar Hen Zion7adbde22016-08-03 15:08:33 +0300231 MLX5_CMD_OP_ALLOC_ENCAP_HEADER = 0x93d,
232 MLX5_CMD_OP_DEALLOC_ENCAP_HEADER = 0x93e,
Or Gerlitz2a69cb92017-01-19 19:31:25 +0200233 MLX5_CMD_OP_ALLOC_MODIFY_HEADER_CONTEXT = 0x940,
234 MLX5_CMD_OP_DEALLOC_MODIFY_HEADER_CONTEXT = 0x941,
Ilan Tayari60621182017-03-27 14:52:09 +0300235 MLX5_CMD_OP_FPGA_CREATE_QP = 0x960,
236 MLX5_CMD_OP_FPGA_MODIFY_QP = 0x961,
237 MLX5_CMD_OP_FPGA_QUERY_QP = 0x962,
238 MLX5_CMD_OP_FPGA_DESTROY_QP = 0x963,
239 MLX5_CMD_OP_FPGA_QUERY_QP_COUNTERS = 0x964,
Shahar Klein86d56a12016-06-10 00:07:30 +0300240 MLX5_CMD_OP_MAX
Saeed Mahameede2816822015-05-28 22:28:40 +0300241};
242
243struct mlx5_ifc_flow_table_fields_supported_bits {
244 u8 outer_dmac[0x1];
245 u8 outer_smac[0x1];
246 u8 outer_ether_type[0x1];
Ariel Levkovich19cc7522017-04-03 13:11:03 +0300247 u8 outer_ip_version[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300248 u8 outer_first_prio[0x1];
249 u8 outer_first_cfi[0x1];
250 u8 outer_first_vid[0x1];
Or Gerlitza8ade552017-06-07 17:49:56 +0300251 u8 outer_ipv4_ttl[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300252 u8 outer_second_prio[0x1];
253 u8 outer_second_cfi[0x1];
254 u8 outer_second_vid[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200255 u8 reserved_at_b[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300256 u8 outer_sip[0x1];
257 u8 outer_dip[0x1];
258 u8 outer_frag[0x1];
259 u8 outer_ip_protocol[0x1];
260 u8 outer_ip_ecn[0x1];
261 u8 outer_ip_dscp[0x1];
262 u8 outer_udp_sport[0x1];
263 u8 outer_udp_dport[0x1];
264 u8 outer_tcp_sport[0x1];
265 u8 outer_tcp_dport[0x1];
266 u8 outer_tcp_flags[0x1];
267 u8 outer_gre_protocol[0x1];
268 u8 outer_gre_key[0x1];
269 u8 outer_vxlan_vni[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200270 u8 reserved_at_1a[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +0300271 u8 source_eswitch_port[0x1];
272
273 u8 inner_dmac[0x1];
274 u8 inner_smac[0x1];
275 u8 inner_ether_type[0x1];
Ariel Levkovich19cc7522017-04-03 13:11:03 +0300276 u8 inner_ip_version[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300277 u8 inner_first_prio[0x1];
278 u8 inner_first_cfi[0x1];
279 u8 inner_first_vid[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200280 u8 reserved_at_27[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300281 u8 inner_second_prio[0x1];
282 u8 inner_second_cfi[0x1];
283 u8 inner_second_vid[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200284 u8 reserved_at_2b[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300285 u8 inner_sip[0x1];
286 u8 inner_dip[0x1];
287 u8 inner_frag[0x1];
288 u8 inner_ip_protocol[0x1];
289 u8 inner_ip_ecn[0x1];
290 u8 inner_ip_dscp[0x1];
291 u8 inner_udp_sport[0x1];
292 u8 inner_udp_dport[0x1];
293 u8 inner_tcp_sport[0x1];
294 u8 inner_tcp_dport[0x1];
295 u8 inner_tcp_flags[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200296 u8 reserved_at_37[0x9];
Saeed Mahameede2816822015-05-28 22:28:40 +0300297
Matan Barakb4ff3a32016-02-09 14:57:42 +0200298 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +0300299};
300
301struct mlx5_ifc_flow_table_prop_layout_bits {
302 u8 ft_support[0x1];
Amir Vadai9dc0b282016-05-13 12:55:39 +0000303 u8 reserved_at_1[0x1];
304 u8 flow_counter[0x1];
Maor Gottlieb26a81452015-12-10 17:12:39 +0200305 u8 flow_modify_en[0x1];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +0200306 u8 modify_root[0x1];
Maor Gottlieb34a40e62016-01-11 10:26:00 +0200307 u8 identified_miss_table_mode[0x1];
308 u8 flow_table_modify[0x1];
Hadar Hen Zion7adbde22016-08-03 15:08:33 +0300309 u8 encap[0x1];
310 u8 decap[0x1];
311 u8 reserved_at_9[0x17];
Saeed Mahameede2816822015-05-28 22:28:40 +0300312
Matan Barakb4ff3a32016-02-09 14:57:42 +0200313 u8 reserved_at_20[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +0300314 u8 log_max_ft_size[0x6];
Or Gerlitz2a69cb92017-01-19 19:31:25 +0200315 u8 log_max_modify_header_context[0x8];
316 u8 max_modify_header_actions[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300317 u8 max_ft_level[0x8];
318
Matan Barakb4ff3a32016-02-09 14:57:42 +0200319 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +0300320
Matan Barakb4ff3a32016-02-09 14:57:42 +0200321 u8 reserved_at_60[0x18];
Maor Gottlieb26a81452015-12-10 17:12:39 +0200322 u8 log_max_ft_num[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300323
Matan Barakb4ff3a32016-02-09 14:57:42 +0200324 u8 reserved_at_80[0x18];
Maor Gottlieb26a81452015-12-10 17:12:39 +0200325 u8 log_max_destination[0x8];
326
Matan Barakb4ff3a32016-02-09 14:57:42 +0200327 u8 reserved_at_a0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +0300328 u8 log_max_flow[0x8];
329
Matan Barakb4ff3a32016-02-09 14:57:42 +0200330 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +0300331
332 struct mlx5_ifc_flow_table_fields_supported_bits ft_field_support;
333
334 struct mlx5_ifc_flow_table_fields_supported_bits ft_field_bitmask_support;
335};
336
337struct mlx5_ifc_odp_per_transport_service_cap_bits {
338 u8 send[0x1];
339 u8 receive[0x1];
340 u8 write[0x1];
341 u8 read[0x1];
Artemy Kovalyov17d2f882017-01-02 11:37:47 +0200342 u8 atomic[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300343 u8 srq_receive[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200344 u8 reserved_at_6[0x1a];
Saeed Mahameede2816822015-05-28 22:28:40 +0300345};
346
Maor Gottliebb4d1f032016-01-11 10:26:05 +0200347struct mlx5_ifc_ipv4_layout_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +0200348 u8 reserved_at_0[0x60];
Maor Gottliebb4d1f032016-01-11 10:26:05 +0200349
350 u8 ipv4[0x20];
351};
352
353struct mlx5_ifc_ipv6_layout_bits {
354 u8 ipv6[16][0x8];
355};
356
357union mlx5_ifc_ipv6_layout_ipv4_layout_auto_bits {
358 struct mlx5_ifc_ipv6_layout_bits ipv6_layout;
359 struct mlx5_ifc_ipv4_layout_bits ipv4_layout;
Matan Barakb4ff3a32016-02-09 14:57:42 +0200360 u8 reserved_at_0[0x80];
Maor Gottliebb4d1f032016-01-11 10:26:05 +0200361};
362
Saeed Mahameede2816822015-05-28 22:28:40 +0300363struct mlx5_ifc_fte_match_set_lyr_2_4_bits {
364 u8 smac_47_16[0x20];
365
366 u8 smac_15_0[0x10];
367 u8 ethertype[0x10];
368
369 u8 dmac_47_16[0x20];
370
371 u8 dmac_15_0[0x10];
372 u8 first_prio[0x3];
373 u8 first_cfi[0x1];
374 u8 first_vid[0xc];
375
376 u8 ip_protocol[0x8];
377 u8 ip_dscp[0x6];
378 u8 ip_ecn[0x2];
Mohamad Haj Yahia10543362016-10-09 16:25:43 +0300379 u8 cvlan_tag[0x1];
380 u8 svlan_tag[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300381 u8 frag[0x1];
Ariel Levkovich19cc7522017-04-03 13:11:03 +0300382 u8 ip_version[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +0300383 u8 tcp_flags[0x9];
384
385 u8 tcp_sport[0x10];
386 u8 tcp_dport[0x10];
387
Or Gerlitza8ade552017-06-07 17:49:56 +0300388 u8 reserved_at_c0[0x18];
389 u8 ttl_hoplimit[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300390
391 u8 udp_sport[0x10];
392 u8 udp_dport[0x10];
393
Maor Gottliebb4d1f032016-01-11 10:26:05 +0200394 union mlx5_ifc_ipv6_layout_ipv4_layout_auto_bits src_ipv4_src_ipv6;
Saeed Mahameede2816822015-05-28 22:28:40 +0300395
Maor Gottliebb4d1f032016-01-11 10:26:05 +0200396 union mlx5_ifc_ipv6_layout_ipv4_layout_auto_bits dst_ipv4_dst_ipv6;
Saeed Mahameede2816822015-05-28 22:28:40 +0300397};
398
399struct mlx5_ifc_fte_match_set_misc_bits {
Saeed Mahameed74862162016-06-09 15:11:34 +0300400 u8 reserved_at_0[0x8];
401 u8 source_sqn[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +0300402
Matan Barakb4ff3a32016-02-09 14:57:42 +0200403 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300404 u8 source_port[0x10];
405
406 u8 outer_second_prio[0x3];
407 u8 outer_second_cfi[0x1];
408 u8 outer_second_vid[0xc];
409 u8 inner_second_prio[0x3];
410 u8 inner_second_cfi[0x1];
411 u8 inner_second_vid[0xc];
412
Mohamad Haj Yahia10543362016-10-09 16:25:43 +0300413 u8 outer_second_cvlan_tag[0x1];
414 u8 inner_second_cvlan_tag[0x1];
415 u8 outer_second_svlan_tag[0x1];
416 u8 inner_second_svlan_tag[0x1];
417 u8 reserved_at_64[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300418 u8 gre_protocol[0x10];
419
420 u8 gre_key_h[0x18];
421 u8 gre_key_l[0x8];
422
423 u8 vxlan_vni[0x18];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200424 u8 reserved_at_b8[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300425
Matan Barakb4ff3a32016-02-09 14:57:42 +0200426 u8 reserved_at_c0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +0300427
Matan Barakb4ff3a32016-02-09 14:57:42 +0200428 u8 reserved_at_e0[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300429 u8 outer_ipv6_flow_label[0x14];
430
Matan Barakb4ff3a32016-02-09 14:57:42 +0200431 u8 reserved_at_100[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300432 u8 inner_ipv6_flow_label[0x14];
433
Matan Barakb4ff3a32016-02-09 14:57:42 +0200434 u8 reserved_at_120[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +0300435};
436
437struct mlx5_ifc_cmd_pas_bits {
438 u8 pa_h[0x20];
439
440 u8 pa_l[0x14];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200441 u8 reserved_at_34[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300442};
443
444struct mlx5_ifc_uint64_bits {
445 u8 hi[0x20];
446
447 u8 lo[0x20];
448};
449
450enum {
451 MLX5_ADS_STAT_RATE_NO_LIMIT = 0x0,
452 MLX5_ADS_STAT_RATE_2_5GBPS = 0x7,
453 MLX5_ADS_STAT_RATE_10GBPS = 0x8,
454 MLX5_ADS_STAT_RATE_30GBPS = 0x9,
455 MLX5_ADS_STAT_RATE_5GBPS = 0xa,
456 MLX5_ADS_STAT_RATE_20GBPS = 0xb,
457 MLX5_ADS_STAT_RATE_40GBPS = 0xc,
458 MLX5_ADS_STAT_RATE_60GBPS = 0xd,
459 MLX5_ADS_STAT_RATE_80GBPS = 0xe,
460 MLX5_ADS_STAT_RATE_120GBPS = 0xf,
461};
462
463struct mlx5_ifc_ads_bits {
464 u8 fl[0x1];
465 u8 free_ar[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200466 u8 reserved_at_2[0xe];
Saeed Mahameede2816822015-05-28 22:28:40 +0300467 u8 pkey_index[0x10];
468
Matan Barakb4ff3a32016-02-09 14:57:42 +0200469 u8 reserved_at_20[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300470 u8 grh[0x1];
471 u8 mlid[0x7];
472 u8 rlid[0x10];
473
474 u8 ack_timeout[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200475 u8 reserved_at_45[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +0300476 u8 src_addr_index[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200477 u8 reserved_at_50[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +0300478 u8 stat_rate[0x4];
479 u8 hop_limit[0x8];
480
Matan Barakb4ff3a32016-02-09 14:57:42 +0200481 u8 reserved_at_60[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +0300482 u8 tclass[0x8];
483 u8 flow_label[0x14];
484
485 u8 rgid_rip[16][0x8];
486
Matan Barakb4ff3a32016-02-09 14:57:42 +0200487 u8 reserved_at_100[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +0300488 u8 f_dscp[0x1];
489 u8 f_ecn[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200490 u8 reserved_at_106[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300491 u8 f_eth_prio[0x1];
492 u8 ecn[0x2];
493 u8 dscp[0x6];
494 u8 udp_sport[0x10];
495
496 u8 dei_cfi[0x1];
497 u8 eth_prio[0x3];
498 u8 sl[0x4];
499 u8 port[0x8];
500 u8 rmac_47_32[0x10];
501
502 u8 rmac_31_0[0x20];
503};
504
505struct mlx5_ifc_flow_table_nic_cap_bits {
Maor Gottliebb3638e12016-03-07 18:51:46 +0200506 u8 nic_rx_multi_path_tirs[0x1];
Maor Gottliebcea824d2016-05-31 14:09:09 +0300507 u8 nic_rx_multi_path_tirs_fts[0x1];
508 u8 allow_sniffer_and_nic_rx_shared_tir[0x1];
509 u8 reserved_at_3[0x1fd];
Saeed Mahameede2816822015-05-28 22:28:40 +0300510
511 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_receive;
512
Matan Barakb4ff3a32016-02-09 14:57:42 +0200513 u8 reserved_at_400[0x200];
Saeed Mahameede2816822015-05-28 22:28:40 +0300514
515 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_receive_sniffer;
516
517 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_transmit;
518
Matan Barakb4ff3a32016-02-09 14:57:42 +0200519 u8 reserved_at_a00[0x200];
Saeed Mahameede2816822015-05-28 22:28:40 +0300520
521 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_transmit_sniffer;
522
Matan Barakb4ff3a32016-02-09 14:57:42 +0200523 u8 reserved_at_e00[0x7200];
Saeed Mahameede2816822015-05-28 22:28:40 +0300524};
525
Saeed Mahameed495716b2015-12-01 18:03:19 +0200526struct mlx5_ifc_flow_table_eswitch_cap_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +0200527 u8 reserved_at_0[0x200];
Saeed Mahameed495716b2015-12-01 18:03:19 +0200528
529 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_esw_fdb;
530
531 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_esw_acl_ingress;
532
533 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_esw_acl_egress;
534
Matan Barakb4ff3a32016-02-09 14:57:42 +0200535 u8 reserved_at_800[0x7800];
Saeed Mahameed495716b2015-12-01 18:03:19 +0200536};
537
Saeed Mahameedd6666752015-12-01 18:03:22 +0200538struct mlx5_ifc_e_switch_cap_bits {
539 u8 vport_svlan_strip[0x1];
540 u8 vport_cvlan_strip[0x1];
541 u8 vport_svlan_insert[0x1];
542 u8 vport_cvlan_insert_if_not_exist[0x1];
543 u8 vport_cvlan_insert_overwrite[0x1];
Noa Osherovich23898c72016-06-10 00:07:37 +0300544 u8 reserved_at_5[0x19];
545 u8 nic_vport_node_guid_modify[0x1];
546 u8 nic_vport_port_guid_modify[0x1];
Saeed Mahameedd6666752015-12-01 18:03:22 +0200547
Hadar Hen Zion7adbde22016-08-03 15:08:33 +0300548 u8 vxlan_encap_decap[0x1];
549 u8 nvgre_encap_decap[0x1];
550 u8 reserved_at_22[0x9];
551 u8 log_max_encap_headers[0x5];
552 u8 reserved_2b[0x6];
553 u8 max_encap_header_size[0xa];
554
555 u8 reserved_40[0x7c0];
556
Saeed Mahameedd6666752015-12-01 18:03:22 +0200557};
558
Saeed Mahameed74862162016-06-09 15:11:34 +0300559struct mlx5_ifc_qos_cap_bits {
560 u8 packet_pacing[0x1];
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300561 u8 esw_scheduling[0x1];
Mohamad Haj Yahiac9497c92016-12-15 14:02:53 +0200562 u8 esw_bw_share[0x1];
563 u8 esw_rate_limit[0x1];
564 u8 reserved_at_4[0x1c];
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300565
566 u8 reserved_at_20[0x20];
567
Saeed Mahameed74862162016-06-09 15:11:34 +0300568 u8 packet_pacing_max_rate[0x20];
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300569
Saeed Mahameed74862162016-06-09 15:11:34 +0300570 u8 packet_pacing_min_rate[0x20];
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300571
572 u8 reserved_at_80[0x10];
Saeed Mahameed74862162016-06-09 15:11:34 +0300573 u8 packet_pacing_rate_table_size[0x10];
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300574
575 u8 esw_element_type[0x10];
576 u8 esw_tsar_type[0x10];
577
578 u8 reserved_at_c0[0x10];
579 u8 max_qos_para_vport[0x10];
580
581 u8 max_tsar_bw_share[0x20];
582
583 u8 reserved_at_100[0x700];
Saeed Mahameed74862162016-06-09 15:11:34 +0300584};
585
Saeed Mahameede2816822015-05-28 22:28:40 +0300586struct mlx5_ifc_per_protocol_networking_offload_caps_bits {
587 u8 csum_cap[0x1];
588 u8 vlan_cap[0x1];
589 u8 lro_cap[0x1];
590 u8 lro_psh_flag[0x1];
591 u8 lro_time_stamp[0x1];
Saeed Mahameed2b31f7a2016-11-28 18:04:50 +0200592 u8 reserved_at_5[0x2];
593 u8 wqe_vlan_insert[0x1];
Tariq Toukan66189962015-11-12 19:35:26 +0200594 u8 self_lb_en_modifiable[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200595 u8 reserved_at_9[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +0300596 u8 max_lso_cap[0x5];
Leon Romanovskyc226dc22016-10-31 12:15:20 +0200597 u8 multi_pkt_send_wqe[0x2];
Hadar Hen Zioncff92d72016-07-24 16:12:40 +0300598 u8 wqe_inline_mode[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +0300599 u8 rss_ind_tbl_cap[0x4];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300600 u8 reg_umr_sq[0x1];
601 u8 scatter_fcs[0x1];
602 u8 reserved_at_1a[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300603 u8 tunnel_lso_const_out_ip_id[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200604 u8 reserved_at_1c[0x2];
Gal Pressman27299842017-08-13 13:34:42 +0300605 u8 tunnel_stateless_gre[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300606 u8 tunnel_stateless_vxlan[0x1];
607
Ilan Tayari547eede2017-04-18 16:04:28 +0300608 u8 swp[0x1];
609 u8 swp_csum[0x1];
610 u8 swp_lso[0x1];
611 u8 reserved_at_23[0x1d];
Saeed Mahameede2816822015-05-28 22:28:40 +0300612
Matan Barakb4ff3a32016-02-09 14:57:42 +0200613 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300614 u8 lro_min_mss_size[0x10];
615
Matan Barakb4ff3a32016-02-09 14:57:42 +0200616 u8 reserved_at_60[0x120];
Saeed Mahameede2816822015-05-28 22:28:40 +0300617
618 u8 lro_timer_supported_periods[4][0x20];
619
Matan Barakb4ff3a32016-02-09 14:57:42 +0200620 u8 reserved_at_200[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +0300621};
622
623struct mlx5_ifc_roce_cap_bits {
624 u8 roce_apm[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200625 u8 reserved_at_1[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +0300626
Matan Barakb4ff3a32016-02-09 14:57:42 +0200627 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +0300628
Matan Barakb4ff3a32016-02-09 14:57:42 +0200629 u8 reserved_at_80[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300630 u8 l3_type[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200631 u8 reserved_at_90[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300632 u8 roce_version[0x8];
633
Matan Barakb4ff3a32016-02-09 14:57:42 +0200634 u8 reserved_at_a0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300635 u8 r_roce_dest_udp_port[0x10];
636
637 u8 r_roce_max_src_udp_port[0x10];
638 u8 r_roce_min_src_udp_port[0x10];
639
Matan Barakb4ff3a32016-02-09 14:57:42 +0200640 u8 reserved_at_e0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300641 u8 roce_address_table_size[0x10];
642
Matan Barakb4ff3a32016-02-09 14:57:42 +0200643 u8 reserved_at_100[0x700];
Saeed Mahameede2816822015-05-28 22:28:40 +0300644};
645
646enum {
647 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_1_BYTE = 0x0,
648 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_2_BYTES = 0x2,
649 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_4_BYTES = 0x4,
650 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_8_BYTES = 0x8,
651 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_16_BYTES = 0x10,
652 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_32_BYTES = 0x20,
653 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_64_BYTES = 0x40,
654 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_128_BYTES = 0x80,
655 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_256_BYTES = 0x100,
656};
657
658enum {
659 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_1_BYTE = 0x1,
660 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_2_BYTES = 0x2,
661 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_4_BYTES = 0x4,
662 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_8_BYTES = 0x8,
663 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_16_BYTES = 0x10,
664 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_32_BYTES = 0x20,
665 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_64_BYTES = 0x40,
666 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_128_BYTES = 0x80,
667 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_256_BYTES = 0x100,
668};
669
670struct mlx5_ifc_atomic_caps_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +0200671 u8 reserved_at_0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +0300672
Or Gerlitzbd108382017-05-28 15:24:17 +0300673 u8 atomic_req_8B_endianness_mode[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200674 u8 reserved_at_42[0x4];
Or Gerlitzbd108382017-05-28 15:24:17 +0300675 u8 supported_atomic_req_8B_endianness_mode_1[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300676
Matan Barakb4ff3a32016-02-09 14:57:42 +0200677 u8 reserved_at_47[0x19];
Saeed Mahameede2816822015-05-28 22:28:40 +0300678
Matan Barakb4ff3a32016-02-09 14:57:42 +0200679 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +0300680
Matan Barakb4ff3a32016-02-09 14:57:42 +0200681 u8 reserved_at_80[0x10];
Eran Ben Elishaf91e6d82015-12-14 16:34:09 +0200682 u8 atomic_operations[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300683
Matan Barakb4ff3a32016-02-09 14:57:42 +0200684 u8 reserved_at_a0[0x10];
Eran Ben Elishaf91e6d82015-12-14 16:34:09 +0200685 u8 atomic_size_qp[0x10];
686
Matan Barakb4ff3a32016-02-09 14:57:42 +0200687 u8 reserved_at_c0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300688 u8 atomic_size_dc[0x10];
689
Matan Barakb4ff3a32016-02-09 14:57:42 +0200690 u8 reserved_at_e0[0x720];
Saeed Mahameede2816822015-05-28 22:28:40 +0300691};
692
693struct mlx5_ifc_odp_cap_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +0200694 u8 reserved_at_0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +0300695
696 u8 sig[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200697 u8 reserved_at_41[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +0300698
Matan Barakb4ff3a32016-02-09 14:57:42 +0200699 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +0300700
701 struct mlx5_ifc_odp_per_transport_service_cap_bits rc_odp_caps;
702
703 struct mlx5_ifc_odp_per_transport_service_cap_bits uc_odp_caps;
704
705 struct mlx5_ifc_odp_per_transport_service_cap_bits ud_odp_caps;
706
Matan Barakb4ff3a32016-02-09 14:57:42 +0200707 u8 reserved_at_e0[0x720];
Saeed Mahameede2816822015-05-28 22:28:40 +0300708};
709
Sagi Grimberg3f0393a2016-02-23 10:25:23 +0200710struct mlx5_ifc_calc_op {
711 u8 reserved_at_0[0x10];
712 u8 reserved_at_10[0x9];
713 u8 op_swap_endianness[0x1];
714 u8 op_min[0x1];
715 u8 op_xor[0x1];
716 u8 op_or[0x1];
717 u8 op_and[0x1];
718 u8 op_max[0x1];
719 u8 op_add[0x1];
720};
721
722struct mlx5_ifc_vector_calc_cap_bits {
723 u8 calc_matrix[0x1];
724 u8 reserved_at_1[0x1f];
725 u8 reserved_at_20[0x8];
726 u8 max_vec_count[0x8];
727 u8 reserved_at_30[0xd];
728 u8 max_chunk_size[0x3];
729 struct mlx5_ifc_calc_op calc0;
730 struct mlx5_ifc_calc_op calc1;
731 struct mlx5_ifc_calc_op calc2;
732 struct mlx5_ifc_calc_op calc3;
733
734 u8 reserved_at_e0[0x720];
735};
736
Saeed Mahameede2816822015-05-28 22:28:40 +0300737enum {
738 MLX5_WQ_TYPE_LINKED_LIST = 0x0,
739 MLX5_WQ_TYPE_CYCLIC = 0x1,
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300740 MLX5_WQ_TYPE_LINKED_LIST_STRIDING_RQ = 0x2,
Saeed Mahameede2816822015-05-28 22:28:40 +0300741};
742
743enum {
744 MLX5_WQ_END_PAD_MODE_NONE = 0x0,
745 MLX5_WQ_END_PAD_MODE_ALIGN = 0x1,
746};
747
748enum {
749 MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_8_GID_ENTRIES = 0x0,
750 MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_16_GID_ENTRIES = 0x1,
751 MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_32_GID_ENTRIES = 0x2,
752 MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_64_GID_ENTRIES = 0x3,
753 MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_128_GID_ENTRIES = 0x4,
754};
755
756enum {
757 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_128_ENTRIES = 0x0,
758 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_256_ENTRIES = 0x1,
759 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_512_ENTRIES = 0x2,
760 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_1K_ENTRIES = 0x3,
761 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_2K_ENTRIES = 0x4,
762 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_4K_ENTRIES = 0x5,
763};
764
765enum {
766 MLX5_CMD_HCA_CAP_PORT_TYPE_IB = 0x0,
767 MLX5_CMD_HCA_CAP_PORT_TYPE_ETHERNET = 0x1,
768};
769
770enum {
771 MLX5_CMD_HCA_CAP_CMDIF_CHECKSUM_DISABLED = 0x0,
772 MLX5_CMD_HCA_CAP_CMDIF_CHECKSUM_INITIAL_STATE = 0x1,
773 MLX5_CMD_HCA_CAP_CMDIF_CHECKSUM_ENABLED = 0x3,
774};
775
776enum {
777 MLX5_CAP_PORT_TYPE_IB = 0x0,
778 MLX5_CAP_PORT_TYPE_ETH = 0x1,
Eli Cohend29b7962014-10-02 12:19:43 +0300779};
780
Max Gurtovoy1410a902017-05-28 10:53:10 +0300781enum {
782 MLX5_CAP_UMR_FENCE_STRONG = 0x0,
783 MLX5_CAP_UMR_FENCE_SMALL = 0x1,
784 MLX5_CAP_UMR_FENCE_NONE = 0x2,
785};
786
Eli Cohenb7755162014-10-02 12:19:44 +0300787struct mlx5_ifc_cmd_hca_cap_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +0200788 u8 reserved_at_0[0x80];
Eli Cohenb7755162014-10-02 12:19:44 +0300789
790 u8 log_max_srq_sz[0x8];
791 u8 log_max_qp_sz[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200792 u8 reserved_at_90[0xb];
Eli Cohenb7755162014-10-02 12:19:44 +0300793 u8 log_max_qp[0x5];
794
Matan Barakb4ff3a32016-02-09 14:57:42 +0200795 u8 reserved_at_a0[0xb];
Saeed Mahameede2816822015-05-28 22:28:40 +0300796 u8 log_max_srq[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200797 u8 reserved_at_b0[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +0300798
Matan Barakb4ff3a32016-02-09 14:57:42 +0200799 u8 reserved_at_c0[0x8];
Eli Cohenb7755162014-10-02 12:19:44 +0300800 u8 log_max_cq_sz[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200801 u8 reserved_at_d0[0xb];
Eli Cohenb7755162014-10-02 12:19:44 +0300802 u8 log_max_cq[0x5];
803
804 u8 log_max_eq_sz[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200805 u8 reserved_at_e8[0x2];
Eli Cohenb7755162014-10-02 12:19:44 +0300806 u8 log_max_mkey[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200807 u8 reserved_at_f0[0xc];
Eli Cohenb7755162014-10-02 12:19:44 +0300808 u8 log_max_eq[0x4];
809
810 u8 max_indirection[0x8];
Artemy Kovalyovbcda1ac2017-01-02 11:37:41 +0200811 u8 fixed_buffer_size[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300812 u8 log_max_mrw_sz[0x7];
Majd Dibbiny8812c242017-02-09 14:20:12 +0200813 u8 force_teardown[0x1];
814 u8 reserved_at_111[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300815 u8 log_max_bsf_list_size[0x6];
Artemy Kovalyovbcda1ac2017-01-02 11:37:41 +0200816 u8 umr_extended_translation_offset[0x1];
817 u8 null_mkey[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300818 u8 log_max_klm_list_size[0x6];
819
Matan Barakb4ff3a32016-02-09 14:57:42 +0200820 u8 reserved_at_120[0xa];
Eli Cohenb7755162014-10-02 12:19:44 +0300821 u8 log_max_ra_req_dc[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200822 u8 reserved_at_130[0xa];
Eli Cohenb7755162014-10-02 12:19:44 +0300823 u8 log_max_ra_res_dc[0x6];
824
Matan Barakb4ff3a32016-02-09 14:57:42 +0200825 u8 reserved_at_140[0xa];
Eli Cohenb7755162014-10-02 12:19:44 +0300826 u8 log_max_ra_req_qp[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200827 u8 reserved_at_150[0xa];
Eli Cohenb7755162014-10-02 12:19:44 +0300828 u8 log_max_ra_res_qp[0x6];
829
Daniel Jurgensf32f5bd2015-11-19 17:12:26 +0200830 u8 end_pad[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300831 u8 cc_query_allowed[0x1];
832 u8 cc_modify_allowed[0x1];
Daniel Jurgensf32f5bd2015-11-19 17:12:26 +0200833 u8 start_pad[0x1];
834 u8 cache_line_128byte[0x1];
Or Gerlitz137ffd12017-06-13 18:12:13 +0300835 u8 reserved_at_165[0xb];
Saeed Mahameede2816822015-05-28 22:28:40 +0300836 u8 gid_table_size[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +0300837
Saeed Mahameede2816822015-05-28 22:28:40 +0300838 u8 out_of_seq_cnt[0x1];
839 u8 vport_counters[0x1];
Saeed Mahameed74862162016-06-09 15:11:34 +0300840 u8 retransmission_q_counters[0x1];
Alex Vesker83b502a2016-08-04 17:32:02 +0300841 u8 reserved_at_183[0x1];
842 u8 modify_rq_counter_set_id[0x1];
843 u8 reserved_at_185[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300844 u8 max_qp_cnt[0xa];
845 u8 pkey_table_size[0x10];
846
Saeed Mahameede2816822015-05-28 22:28:40 +0300847 u8 vport_group_manager[0x1];
848 u8 vhca_group_manager[0x1];
849 u8 ib_virt[0x1];
850 u8 eth_virt[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200851 u8 reserved_at_1a4[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300852 u8 ets[0x1];
853 u8 nic_flow_table[0x1];
Saeed Mahameed54f0a412015-12-01 18:03:10 +0200854 u8 eswitch_flow_table[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300855 u8 early_vf_enable[0x1];
Gal Pressmancfdcbcea2016-12-08 15:52:00 +0200856 u8 mcam_reg[0x1];
857 u8 pcam_reg[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300858 u8 local_ca_ack_delay[0x5];
Huy Nguyen4ce3bf22016-11-17 13:45:56 +0200859 u8 port_module_event[0x1];
Max Gurtovoy7b135582017-01-02 11:37:38 +0200860 u8 reserved_at_1b1[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300861 u8 ports_check[0x1];
Max Gurtovoy7b135582017-01-02 11:37:38 +0200862 u8 reserved_at_1b3[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300863 u8 disable_link_up[0x1];
864 u8 beacon_led[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300865 u8 port_type[0x2];
Eli Cohenb7755162014-10-02 12:19:44 +0300866 u8 num_ports[0x8];
867
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +0300868 u8 reserved_at_1c0[0x1];
869 u8 pps[0x1];
870 u8 pps_modify[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300871 u8 log_max_msg[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300872 u8 reserved_at_1c8[0x4];
Saeed Mahameed4f3961e2016-02-22 18:17:25 +0200873 u8 max_tc[0x4];
Saeed Mahameed74862162016-06-09 15:11:34 +0300874 u8 reserved_at_1d0[0x1];
875 u8 dcbx[0x1];
Ilan Tayarie29341f2017-03-13 20:05:45 +0200876 u8 reserved_at_1d2[0x3];
877 u8 fpga[0x1];
Tariq Toukan928cfe82016-02-22 18:17:29 +0200878 u8 rol_s[0x1];
879 u8 rol_g[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300880 u8 reserved_at_1d8[0x1];
Tariq Toukan928cfe82016-02-22 18:17:29 +0200881 u8 wol_s[0x1];
882 u8 wol_g[0x1];
883 u8 wol_a[0x1];
884 u8 wol_b[0x1];
885 u8 wol_m[0x1];
886 u8 wol_u[0x1];
887 u8 wol_p[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300888
889 u8 stat_rate_support[0x10];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300890 u8 reserved_at_1f0[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300891 u8 cqe_version[0x4];
Eli Cohenb7755162014-10-02 12:19:44 +0300892
Saeed Mahameede2816822015-05-28 22:28:40 +0300893 u8 compact_address_vector[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300894 u8 striding_rq[0x1];
Erez Shitrit500a3d02017-04-13 06:36:51 +0300895 u8 reserved_at_202[0x1];
896 u8 ipoib_enhanced_offloads[0x1];
Erez Shitrit1015c2e2016-02-21 16:27:16 +0200897 u8 ipoib_basic_offloads[0x1];
Max Gurtovoy1410a902017-05-28 10:53:10 +0300898 u8 reserved_at_205[0x5];
899 u8 umr_fence[0x2];
900 u8 reserved_at_20c[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +0300901 u8 drain_sigerr[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300902 u8 cmdif_checksum[0x2];
903 u8 sigerr_cqe[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300904 u8 reserved_at_213[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300905 u8 wq_signature[0x1];
906 u8 sctr_data_cqe[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300907 u8 reserved_at_216[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300908 u8 sho[0x1];
909 u8 tph[0x1];
910 u8 rf[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300911 u8 dct[0x1];
Saeed Mahameed74862162016-06-09 15:11:34 +0300912 u8 qos[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300913 u8 eth_net_offloads[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300914 u8 roce[0x1];
915 u8 atomic[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300916 u8 reserved_at_21f[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300917
918 u8 cq_oi[0x1];
919 u8 cq_resize[0x1];
920 u8 cq_moderation[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300921 u8 reserved_at_223[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +0300922 u8 cq_eq_remap[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300923 u8 pg[0x1];
924 u8 block_lb_mc[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300925 u8 reserved_at_229[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300926 u8 scqe_break_moderation[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300927 u8 cq_period_start_from_cqe[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300928 u8 cd[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300929 u8 reserved_at_22d[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300930 u8 apm[0x1];
Sagi Grimberg3f0393a2016-02-23 10:25:23 +0200931 u8 vector_calc[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300932 u8 umr_ptr_rlky[0x1];
Matan Barakd2370e02016-02-29 18:05:30 +0200933 u8 imaicl[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300934 u8 reserved_at_232[0x4];
Eli Cohenb7755162014-10-02 12:19:44 +0300935 u8 qkv[0x1];
936 u8 pkv[0x1];
Haggai Eranb11a4f92016-02-29 15:45:03 +0200937 u8 set_deth_sqpn[0x1];
938 u8 reserved_at_239[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +0300939 u8 xrc[0x1];
940 u8 ud[0x1];
941 u8 uc[0x1];
942 u8 rc[0x1];
943
Eli Cohena6d51b62017-01-03 23:55:23 +0200944 u8 uar_4k[0x1];
945 u8 reserved_at_241[0x9];
Eli Cohenb7755162014-10-02 12:19:44 +0300946 u8 uar_sz[0x6];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300947 u8 reserved_at_250[0x8];
Eli Cohenb7755162014-10-02 12:19:44 +0300948 u8 log_pg_sz[0x8];
949
950 u8 bf[0x1];
Saeed Mahameed0dbc6fe2016-11-17 13:45:59 +0200951 u8 driver_version[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300952 u8 pad_tx_eth_packet[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300953 u8 reserved_at_263[0x8];
Eli Cohenb7755162014-10-02 12:19:44 +0300954 u8 log_bf_reg_size[0x5];
Aviv Heller84df61e2016-05-10 13:47:50 +0300955
956 u8 reserved_at_270[0xb];
957 u8 lag_master[0x1];
958 u8 num_lag_ports[0x4];
Eli Cohenb7755162014-10-02 12:19:44 +0300959
Tariq Toukane1c9c622016-04-11 23:10:21 +0300960 u8 reserved_at_280[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +0300961 u8 max_wqe_sz_sq[0x10];
962
Tariq Toukane1c9c622016-04-11 23:10:21 +0300963 u8 reserved_at_2a0[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +0300964 u8 max_wqe_sz_rq[0x10];
965
Rabie Louloua8ffcc72017-07-09 13:39:30 +0300966 u8 max_flow_counter_31_16[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +0300967 u8 max_wqe_sz_sq_dc[0x10];
968
Tariq Toukane1c9c622016-04-11 23:10:21 +0300969 u8 reserved_at_2e0[0x7];
Eli Cohenb7755162014-10-02 12:19:44 +0300970 u8 max_qp_mcg[0x19];
971
Tariq Toukane1c9c622016-04-11 23:10:21 +0300972 u8 reserved_at_300[0x18];
Eli Cohenb7755162014-10-02 12:19:44 +0300973 u8 log_max_mcg[0x8];
974
Tariq Toukane1c9c622016-04-11 23:10:21 +0300975 u8 reserved_at_320[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +0300976 u8 log_max_transport_domain[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300977 u8 reserved_at_328[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +0300978 u8 log_max_pd[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300979 u8 reserved_at_330[0xb];
Eli Cohenb7755162014-10-02 12:19:44 +0300980 u8 log_max_xrcd[0x5];
981
Amir Vadaia351a1b02016-07-14 10:32:38 +0300982 u8 reserved_at_340[0x8];
983 u8 log_max_flow_counter_bulk[0x8];
Rabie Louloua8ffcc72017-07-09 13:39:30 +0300984 u8 max_flow_counter_15_0[0x10];
Amir Vadaia351a1b02016-07-14 10:32:38 +0300985
Eli Cohenb7755162014-10-02 12:19:44 +0300986
Tariq Toukane1c9c622016-04-11 23:10:21 +0300987 u8 reserved_at_360[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +0300988 u8 log_max_rq[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300989 u8 reserved_at_368[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +0300990 u8 log_max_sq[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300991 u8 reserved_at_370[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +0300992 u8 log_max_tir[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300993 u8 reserved_at_378[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +0300994 u8 log_max_tis[0x5];
995
Saeed Mahameede2816822015-05-28 22:28:40 +0300996 u8 basic_cyclic_rcv_wqe[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300997 u8 reserved_at_381[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +0300998 u8 log_max_rmp[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300999 u8 reserved_at_388[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001000 u8 log_max_rqt[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001001 u8 reserved_at_390[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001002 u8 log_max_rqt_size[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001003 u8 reserved_at_398[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +03001004 u8 log_max_tis_per_sq[0x5];
1005
Tariq Toukane1c9c622016-04-11 23:10:21 +03001006 u8 reserved_at_3a0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001007 u8 log_max_stride_sz_rq[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001008 u8 reserved_at_3a8[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001009 u8 log_min_stride_sz_rq[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001010 u8 reserved_at_3b0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001011 u8 log_max_stride_sz_sq[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001012 u8 reserved_at_3b8[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001013 u8 log_min_stride_sz_sq[0x5];
Eli Cohenb7755162014-10-02 12:19:44 +03001014
Tariq Toukane1c9c622016-04-11 23:10:21 +03001015 u8 reserved_at_3c0[0x1b];
Saeed Mahameede2816822015-05-28 22:28:40 +03001016 u8 log_max_wq_sz[0x5];
1017
Saeed Mahameed54f0a412015-12-01 18:03:10 +02001018 u8 nic_vport_change_event[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001019 u8 reserved_at_3e1[0xa];
Saeed Mahameed54f0a412015-12-01 18:03:10 +02001020 u8 log_max_vlan_list[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001021 u8 reserved_at_3f0[0x3];
Saeed Mahameed54f0a412015-12-01 18:03:10 +02001022 u8 log_max_current_mc_list[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001023 u8 reserved_at_3f8[0x3];
Saeed Mahameed54f0a412015-12-01 18:03:10 +02001024 u8 log_max_current_uc_list[0x5];
1025
Tariq Toukane1c9c622016-04-11 23:10:21 +03001026 u8 reserved_at_400[0x80];
Saeed Mahameed54f0a412015-12-01 18:03:10 +02001027
Tariq Toukane1c9c622016-04-11 23:10:21 +03001028 u8 reserved_at_480[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001029 u8 log_max_l2_table[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001030 u8 reserved_at_488[0x8];
Eli Cohenb7755162014-10-02 12:19:44 +03001031 u8 log_uar_page_sz[0x10];
1032
Tariq Toukane1c9c622016-04-11 23:10:21 +03001033 u8 reserved_at_4a0[0x20];
Linus Torvalds048ccca2016-01-23 18:45:06 -08001034 u8 device_frequency_mhz[0x20];
Eran Ben Elishab0844442015-12-29 14:58:30 +02001035 u8 device_frequency_khz[0x20];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001036
Eli Cohena6d51b62017-01-03 23:55:23 +02001037 u8 reserved_at_500[0x20];
1038 u8 num_of_uars_per_page[0x20];
1039 u8 reserved_at_540[0x40];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001040
1041 u8 reserved_at_580[0x3f];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03001042 u8 cqe_compression[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +03001043
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03001044 u8 cqe_compression_timeout[0x10];
1045 u8 cqe_compression_max_num[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03001046
Saeed Mahameed74862162016-06-09 15:11:34 +03001047 u8 reserved_at_5e0[0x10];
1048 u8 tag_matching[0x1];
1049 u8 rndv_offload_rc[0x1];
1050 u8 rndv_offload_dc[0x1];
1051 u8 log_tag_matching_list_sz[0x5];
Max Gurtovoy7b135582017-01-02 11:37:38 +02001052 u8 reserved_at_5f8[0x3];
Saeed Mahameed74862162016-06-09 15:11:34 +03001053 u8 log_max_xrq[0x5];
1054
Max Gurtovoy7b135582017-01-02 11:37:38 +02001055 u8 reserved_at_600[0x200];
Saeed Mahameede2816822015-05-28 22:28:40 +03001056};
1057
Saeed Mahameed81848732015-12-01 18:03:20 +02001058enum mlx5_flow_destination_type {
1059 MLX5_FLOW_DESTINATION_TYPE_VPORT = 0x0,
1060 MLX5_FLOW_DESTINATION_TYPE_FLOW_TABLE = 0x1,
1061 MLX5_FLOW_DESTINATION_TYPE_TIR = 0x2,
Amir Vadaibd5251db2016-05-13 12:55:40 +00001062
1063 MLX5_FLOW_DESTINATION_TYPE_COUNTER = 0x100,
Saeed Mahameede2816822015-05-28 22:28:40 +03001064};
1065
1066struct mlx5_ifc_dest_format_struct_bits {
1067 u8 destination_type[0x8];
1068 u8 destination_id[0x18];
1069
Matan Barakb4ff3a32016-02-09 14:57:42 +02001070 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03001071};
1072
Amir Vadai9dc0b282016-05-13 12:55:39 +00001073struct mlx5_ifc_flow_counter_list_bits {
Rabie Louloua8ffcc72017-07-09 13:39:30 +03001074 u8 flow_counter_id[0x20];
Amir Vadai9dc0b282016-05-13 12:55:39 +00001075
1076 u8 reserved_at_20[0x20];
1077};
1078
1079union mlx5_ifc_dest_format_struct_flow_counter_list_auto_bits {
1080 struct mlx5_ifc_dest_format_struct_bits dest_format_struct;
1081 struct mlx5_ifc_flow_counter_list_bits flow_counter_list;
1082 u8 reserved_at_0[0x40];
1083};
1084
Saeed Mahameede2816822015-05-28 22:28:40 +03001085struct mlx5_ifc_fte_match_param_bits {
1086 struct mlx5_ifc_fte_match_set_lyr_2_4_bits outer_headers;
1087
1088 struct mlx5_ifc_fte_match_set_misc_bits misc_parameters;
1089
1090 struct mlx5_ifc_fte_match_set_lyr_2_4_bits inner_headers;
1091
Matan Barakb4ff3a32016-02-09 14:57:42 +02001092 u8 reserved_at_600[0xa00];
Saeed Mahameede2816822015-05-28 22:28:40 +03001093};
1094
1095enum {
1096 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_SRC_IP = 0x0,
1097 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_DST_IP = 0x1,
1098 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_L4_SPORT = 0x2,
1099 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_L4_DPORT = 0x3,
1100 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_IPSEC_SPI = 0x4,
1101};
1102
1103struct mlx5_ifc_rx_hash_field_select_bits {
1104 u8 l3_prot_type[0x1];
1105 u8 l4_prot_type[0x1];
1106 u8 selected_fields[0x1e];
1107};
1108
1109enum {
1110 MLX5_WQ_WQ_TYPE_WQ_LINKED_LIST = 0x0,
1111 MLX5_WQ_WQ_TYPE_WQ_CYCLIC = 0x1,
1112};
1113
1114enum {
1115 MLX5_WQ_END_PADDING_MODE_END_PAD_NONE = 0x0,
1116 MLX5_WQ_END_PADDING_MODE_END_PAD_ALIGN = 0x1,
1117};
1118
1119struct mlx5_ifc_wq_bits {
1120 u8 wq_type[0x4];
1121 u8 wq_signature[0x1];
1122 u8 end_padding_mode[0x2];
1123 u8 cd_slave[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001124 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03001125
1126 u8 hds_skip_first_sge[0x1];
1127 u8 log2_hds_buf_size[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001128 u8 reserved_at_24[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03001129 u8 page_offset[0x5];
1130 u8 lwm[0x10];
1131
Matan Barakb4ff3a32016-02-09 14:57:42 +02001132 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001133 u8 pd[0x18];
1134
Matan Barakb4ff3a32016-02-09 14:57:42 +02001135 u8 reserved_at_60[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001136 u8 uar_page[0x18];
1137
1138 u8 dbr_addr[0x40];
1139
1140 u8 hw_counter[0x20];
1141
1142 u8 sw_counter[0x20];
1143
Matan Barakb4ff3a32016-02-09 14:57:42 +02001144 u8 reserved_at_100[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03001145 u8 log_wq_stride[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001146 u8 reserved_at_110[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001147 u8 log_wq_pg_sz[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001148 u8 reserved_at_118[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001149 u8 log_wq_sz[0x5];
1150
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03001151 u8 reserved_at_120[0x15];
1152 u8 log_wqe_num_of_strides[0x3];
1153 u8 two_byte_shift_en[0x1];
1154 u8 reserved_at_139[0x4];
1155 u8 log_wqe_stride_size[0x3];
1156
1157 u8 reserved_at_140[0x4c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001158
1159 struct mlx5_ifc_cmd_pas_bits pas[0];
1160};
1161
1162struct mlx5_ifc_rq_num_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001163 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001164 u8 rq_num[0x18];
1165};
1166
1167struct mlx5_ifc_mac_address_layout_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001168 u8 reserved_at_0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03001169 u8 mac_addr_47_32[0x10];
1170
1171 u8 mac_addr_31_0[0x20];
1172};
1173
Saeed Mahameedc0046cf2015-12-01 18:03:15 +02001174struct mlx5_ifc_vlan_layout_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001175 u8 reserved_at_0[0x14];
Saeed Mahameedc0046cf2015-12-01 18:03:15 +02001176 u8 vlan[0x0c];
1177
Matan Barakb4ff3a32016-02-09 14:57:42 +02001178 u8 reserved_at_20[0x20];
Saeed Mahameedc0046cf2015-12-01 18:03:15 +02001179};
1180
Saeed Mahameede2816822015-05-28 22:28:40 +03001181struct mlx5_ifc_cong_control_r_roce_ecn_np_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001182 u8 reserved_at_0[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001183
1184 u8 min_time_between_cnps[0x20];
1185
Matan Barakb4ff3a32016-02-09 14:57:42 +02001186 u8 reserved_at_c0[0x12];
Saeed Mahameede2816822015-05-28 22:28:40 +03001187 u8 cnp_dscp[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001188 u8 reserved_at_d8[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03001189 u8 cnp_802p_prio[0x3];
1190
Matan Barakb4ff3a32016-02-09 14:57:42 +02001191 u8 reserved_at_e0[0x720];
Saeed Mahameede2816822015-05-28 22:28:40 +03001192};
1193
1194struct mlx5_ifc_cong_control_r_roce_ecn_rp_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001195 u8 reserved_at_0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03001196
Matan Barakb4ff3a32016-02-09 14:57:42 +02001197 u8 reserved_at_60[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03001198 u8 clamp_tgt_rate[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001199 u8 reserved_at_65[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001200 u8 clamp_tgt_rate_after_time_inc[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001201 u8 reserved_at_69[0x17];
Saeed Mahameede2816822015-05-28 22:28:40 +03001202
Matan Barakb4ff3a32016-02-09 14:57:42 +02001203 u8 reserved_at_80[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03001204
1205 u8 rpg_time_reset[0x20];
1206
1207 u8 rpg_byte_reset[0x20];
1208
1209 u8 rpg_threshold[0x20];
1210
1211 u8 rpg_max_rate[0x20];
1212
1213 u8 rpg_ai_rate[0x20];
1214
1215 u8 rpg_hai_rate[0x20];
1216
1217 u8 rpg_gd[0x20];
1218
1219 u8 rpg_min_dec_fac[0x20];
1220
1221 u8 rpg_min_rate[0x20];
1222
Matan Barakb4ff3a32016-02-09 14:57:42 +02001223 u8 reserved_at_1c0[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001224
1225 u8 rate_to_set_on_first_cnp[0x20];
1226
1227 u8 dce_tcp_g[0x20];
1228
1229 u8 dce_tcp_rtt[0x20];
1230
1231 u8 rate_reduce_monitor_period[0x20];
1232
Matan Barakb4ff3a32016-02-09 14:57:42 +02001233 u8 reserved_at_320[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03001234
1235 u8 initial_alpha_value[0x20];
1236
Matan Barakb4ff3a32016-02-09 14:57:42 +02001237 u8 reserved_at_360[0x4a0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001238};
1239
1240struct mlx5_ifc_cong_control_802_1qau_rp_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001241 u8 reserved_at_0[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03001242
1243 u8 rppp_max_rps[0x20];
1244
1245 u8 rpg_time_reset[0x20];
1246
1247 u8 rpg_byte_reset[0x20];
1248
1249 u8 rpg_threshold[0x20];
1250
1251 u8 rpg_max_rate[0x20];
1252
1253 u8 rpg_ai_rate[0x20];
1254
1255 u8 rpg_hai_rate[0x20];
1256
1257 u8 rpg_gd[0x20];
1258
1259 u8 rpg_min_dec_fac[0x20];
1260
1261 u8 rpg_min_rate[0x20];
1262
Matan Barakb4ff3a32016-02-09 14:57:42 +02001263 u8 reserved_at_1c0[0x640];
Saeed Mahameede2816822015-05-28 22:28:40 +03001264};
1265
1266enum {
1267 MLX5_RESIZE_FIELD_SELECT_RESIZE_FIELD_SELECT_LOG_CQ_SIZE = 0x1,
1268 MLX5_RESIZE_FIELD_SELECT_RESIZE_FIELD_SELECT_PAGE_OFFSET = 0x2,
1269 MLX5_RESIZE_FIELD_SELECT_RESIZE_FIELD_SELECT_LOG_PAGE_SIZE = 0x4,
1270};
1271
1272struct mlx5_ifc_resize_field_select_bits {
1273 u8 resize_field_select[0x20];
1274};
1275
1276enum {
1277 MLX5_MODIFY_FIELD_SELECT_MODIFY_FIELD_SELECT_CQ_PERIOD = 0x1,
1278 MLX5_MODIFY_FIELD_SELECT_MODIFY_FIELD_SELECT_CQ_MAX_COUNT = 0x2,
1279 MLX5_MODIFY_FIELD_SELECT_MODIFY_FIELD_SELECT_OI = 0x4,
1280 MLX5_MODIFY_FIELD_SELECT_MODIFY_FIELD_SELECT_C_EQN = 0x8,
1281};
1282
1283struct mlx5_ifc_modify_field_select_bits {
1284 u8 modify_field_select[0x20];
1285};
1286
1287struct mlx5_ifc_field_select_r_roce_np_bits {
1288 u8 field_select_r_roce_np[0x20];
1289};
1290
1291struct mlx5_ifc_field_select_r_roce_rp_bits {
1292 u8 field_select_r_roce_rp[0x20];
1293};
1294
1295enum {
1296 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPPP_MAX_RPS = 0x4,
1297 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_TIME_RESET = 0x8,
1298 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_BYTE_RESET = 0x10,
1299 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_THRESHOLD = 0x20,
1300 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_MAX_RATE = 0x40,
1301 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_AI_RATE = 0x80,
1302 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_HAI_RATE = 0x100,
1303 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_GD = 0x200,
1304 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_MIN_DEC_FAC = 0x400,
1305 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_MIN_RATE = 0x800,
1306};
1307
1308struct mlx5_ifc_field_select_802_1qau_rp_bits {
1309 u8 field_select_8021qaurp[0x20];
1310};
1311
1312struct mlx5_ifc_phys_layer_cntrs_bits {
1313 u8 time_since_last_clear_high[0x20];
1314
1315 u8 time_since_last_clear_low[0x20];
1316
1317 u8 symbol_errors_high[0x20];
1318
1319 u8 symbol_errors_low[0x20];
1320
1321 u8 sync_headers_errors_high[0x20];
1322
1323 u8 sync_headers_errors_low[0x20];
1324
1325 u8 edpl_bip_errors_lane0_high[0x20];
1326
1327 u8 edpl_bip_errors_lane0_low[0x20];
1328
1329 u8 edpl_bip_errors_lane1_high[0x20];
1330
1331 u8 edpl_bip_errors_lane1_low[0x20];
1332
1333 u8 edpl_bip_errors_lane2_high[0x20];
1334
1335 u8 edpl_bip_errors_lane2_low[0x20];
1336
1337 u8 edpl_bip_errors_lane3_high[0x20];
1338
1339 u8 edpl_bip_errors_lane3_low[0x20];
1340
1341 u8 fc_fec_corrected_blocks_lane0_high[0x20];
1342
1343 u8 fc_fec_corrected_blocks_lane0_low[0x20];
1344
1345 u8 fc_fec_corrected_blocks_lane1_high[0x20];
1346
1347 u8 fc_fec_corrected_blocks_lane1_low[0x20];
1348
1349 u8 fc_fec_corrected_blocks_lane2_high[0x20];
1350
1351 u8 fc_fec_corrected_blocks_lane2_low[0x20];
1352
1353 u8 fc_fec_corrected_blocks_lane3_high[0x20];
1354
1355 u8 fc_fec_corrected_blocks_lane3_low[0x20];
1356
1357 u8 fc_fec_uncorrectable_blocks_lane0_high[0x20];
1358
1359 u8 fc_fec_uncorrectable_blocks_lane0_low[0x20];
1360
1361 u8 fc_fec_uncorrectable_blocks_lane1_high[0x20];
1362
1363 u8 fc_fec_uncorrectable_blocks_lane1_low[0x20];
1364
1365 u8 fc_fec_uncorrectable_blocks_lane2_high[0x20];
1366
1367 u8 fc_fec_uncorrectable_blocks_lane2_low[0x20];
1368
1369 u8 fc_fec_uncorrectable_blocks_lane3_high[0x20];
1370
1371 u8 fc_fec_uncorrectable_blocks_lane3_low[0x20];
1372
1373 u8 rs_fec_corrected_blocks_high[0x20];
1374
1375 u8 rs_fec_corrected_blocks_low[0x20];
1376
1377 u8 rs_fec_uncorrectable_blocks_high[0x20];
1378
1379 u8 rs_fec_uncorrectable_blocks_low[0x20];
1380
1381 u8 rs_fec_no_errors_blocks_high[0x20];
1382
1383 u8 rs_fec_no_errors_blocks_low[0x20];
1384
1385 u8 rs_fec_single_error_blocks_high[0x20];
1386
1387 u8 rs_fec_single_error_blocks_low[0x20];
1388
1389 u8 rs_fec_corrected_symbols_total_high[0x20];
1390
1391 u8 rs_fec_corrected_symbols_total_low[0x20];
1392
1393 u8 rs_fec_corrected_symbols_lane0_high[0x20];
1394
1395 u8 rs_fec_corrected_symbols_lane0_low[0x20];
1396
1397 u8 rs_fec_corrected_symbols_lane1_high[0x20];
1398
1399 u8 rs_fec_corrected_symbols_lane1_low[0x20];
1400
1401 u8 rs_fec_corrected_symbols_lane2_high[0x20];
1402
1403 u8 rs_fec_corrected_symbols_lane2_low[0x20];
1404
1405 u8 rs_fec_corrected_symbols_lane3_high[0x20];
1406
1407 u8 rs_fec_corrected_symbols_lane3_low[0x20];
1408
1409 u8 link_down_events[0x20];
1410
1411 u8 successful_recovery_events[0x20];
1412
Matan Barakb4ff3a32016-02-09 14:57:42 +02001413 u8 reserved_at_640[0x180];
Saeed Mahameede2816822015-05-28 22:28:40 +03001414};
1415
Gal Pressmand8dc0502016-09-27 17:04:51 +03001416struct mlx5_ifc_phys_layer_statistical_cntrs_bits {
1417 u8 time_since_last_clear_high[0x20];
1418
1419 u8 time_since_last_clear_low[0x20];
1420
1421 u8 phy_received_bits_high[0x20];
1422
1423 u8 phy_received_bits_low[0x20];
1424
1425 u8 phy_symbol_errors_high[0x20];
1426
1427 u8 phy_symbol_errors_low[0x20];
1428
1429 u8 phy_corrected_bits_high[0x20];
1430
1431 u8 phy_corrected_bits_low[0x20];
1432
1433 u8 phy_corrected_bits_lane0_high[0x20];
1434
1435 u8 phy_corrected_bits_lane0_low[0x20];
1436
1437 u8 phy_corrected_bits_lane1_high[0x20];
1438
1439 u8 phy_corrected_bits_lane1_low[0x20];
1440
1441 u8 phy_corrected_bits_lane2_high[0x20];
1442
1443 u8 phy_corrected_bits_lane2_low[0x20];
1444
1445 u8 phy_corrected_bits_lane3_high[0x20];
1446
1447 u8 phy_corrected_bits_lane3_low[0x20];
1448
1449 u8 reserved_at_200[0x5c0];
1450};
1451
Meny Yossefi1c64bf62016-02-18 18:15:00 +02001452struct mlx5_ifc_ib_port_cntrs_grp_data_layout_bits {
1453 u8 symbol_error_counter[0x10];
1454
1455 u8 link_error_recovery_counter[0x8];
1456
1457 u8 link_downed_counter[0x8];
1458
1459 u8 port_rcv_errors[0x10];
1460
1461 u8 port_rcv_remote_physical_errors[0x10];
1462
1463 u8 port_rcv_switch_relay_errors[0x10];
1464
1465 u8 port_xmit_discards[0x10];
1466
1467 u8 port_xmit_constraint_errors[0x8];
1468
1469 u8 port_rcv_constraint_errors[0x8];
1470
1471 u8 reserved_at_70[0x8];
1472
1473 u8 link_overrun_errors[0x8];
1474
1475 u8 reserved_at_80[0x10];
1476
1477 u8 vl_15_dropped[0x10];
1478
Tim Wright133bea02017-05-01 17:30:08 +01001479 u8 reserved_at_a0[0x80];
1480
1481 u8 port_xmit_wait[0x20];
Meny Yossefi1c64bf62016-02-18 18:15:00 +02001482};
1483
Saeed Mahameede2816822015-05-28 22:28:40 +03001484struct mlx5_ifc_eth_per_traffic_grp_data_layout_bits {
1485 u8 transmit_queue_high[0x20];
1486
1487 u8 transmit_queue_low[0x20];
1488
Matan Barakb4ff3a32016-02-09 14:57:42 +02001489 u8 reserved_at_40[0x780];
Saeed Mahameede2816822015-05-28 22:28:40 +03001490};
1491
1492struct mlx5_ifc_eth_per_prio_grp_data_layout_bits {
1493 u8 rx_octets_high[0x20];
1494
1495 u8 rx_octets_low[0x20];
1496
Matan Barakb4ff3a32016-02-09 14:57:42 +02001497 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001498
1499 u8 rx_frames_high[0x20];
1500
1501 u8 rx_frames_low[0x20];
1502
1503 u8 tx_octets_high[0x20];
1504
1505 u8 tx_octets_low[0x20];
1506
Matan Barakb4ff3a32016-02-09 14:57:42 +02001507 u8 reserved_at_180[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001508
1509 u8 tx_frames_high[0x20];
1510
1511 u8 tx_frames_low[0x20];
1512
1513 u8 rx_pause_high[0x20];
1514
1515 u8 rx_pause_low[0x20];
1516
1517 u8 rx_pause_duration_high[0x20];
1518
1519 u8 rx_pause_duration_low[0x20];
1520
1521 u8 tx_pause_high[0x20];
1522
1523 u8 tx_pause_low[0x20];
1524
1525 u8 tx_pause_duration_high[0x20];
1526
1527 u8 tx_pause_duration_low[0x20];
1528
1529 u8 rx_pause_transition_high[0x20];
1530
1531 u8 rx_pause_transition_low[0x20];
1532
Matan Barakb4ff3a32016-02-09 14:57:42 +02001533 u8 reserved_at_3c0[0x400];
Saeed Mahameede2816822015-05-28 22:28:40 +03001534};
1535
1536struct mlx5_ifc_eth_extended_cntrs_grp_data_layout_bits {
1537 u8 port_transmit_wait_high[0x20];
1538
1539 u8 port_transmit_wait_low[0x20];
1540
Gal Pressman2dba0792017-06-18 14:56:45 +03001541 u8 reserved_at_40[0x100];
1542
1543 u8 rx_buffer_almost_full_high[0x20];
1544
1545 u8 rx_buffer_almost_full_low[0x20];
1546
1547 u8 rx_buffer_full_high[0x20];
1548
1549 u8 rx_buffer_full_low[0x20];
1550
1551 u8 reserved_at_1c0[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03001552};
1553
1554struct mlx5_ifc_eth_3635_cntrs_grp_data_layout_bits {
1555 u8 dot3stats_alignment_errors_high[0x20];
1556
1557 u8 dot3stats_alignment_errors_low[0x20];
1558
1559 u8 dot3stats_fcs_errors_high[0x20];
1560
1561 u8 dot3stats_fcs_errors_low[0x20];
1562
1563 u8 dot3stats_single_collision_frames_high[0x20];
1564
1565 u8 dot3stats_single_collision_frames_low[0x20];
1566
1567 u8 dot3stats_multiple_collision_frames_high[0x20];
1568
1569 u8 dot3stats_multiple_collision_frames_low[0x20];
1570
1571 u8 dot3stats_sqe_test_errors_high[0x20];
1572
1573 u8 dot3stats_sqe_test_errors_low[0x20];
1574
1575 u8 dot3stats_deferred_transmissions_high[0x20];
1576
1577 u8 dot3stats_deferred_transmissions_low[0x20];
1578
1579 u8 dot3stats_late_collisions_high[0x20];
1580
1581 u8 dot3stats_late_collisions_low[0x20];
1582
1583 u8 dot3stats_excessive_collisions_high[0x20];
1584
1585 u8 dot3stats_excessive_collisions_low[0x20];
1586
1587 u8 dot3stats_internal_mac_transmit_errors_high[0x20];
1588
1589 u8 dot3stats_internal_mac_transmit_errors_low[0x20];
1590
1591 u8 dot3stats_carrier_sense_errors_high[0x20];
1592
1593 u8 dot3stats_carrier_sense_errors_low[0x20];
1594
1595 u8 dot3stats_frame_too_longs_high[0x20];
1596
1597 u8 dot3stats_frame_too_longs_low[0x20];
1598
1599 u8 dot3stats_internal_mac_receive_errors_high[0x20];
1600
1601 u8 dot3stats_internal_mac_receive_errors_low[0x20];
1602
1603 u8 dot3stats_symbol_errors_high[0x20];
1604
1605 u8 dot3stats_symbol_errors_low[0x20];
1606
1607 u8 dot3control_in_unknown_opcodes_high[0x20];
1608
1609 u8 dot3control_in_unknown_opcodes_low[0x20];
1610
1611 u8 dot3in_pause_frames_high[0x20];
1612
1613 u8 dot3in_pause_frames_low[0x20];
1614
1615 u8 dot3out_pause_frames_high[0x20];
1616
1617 u8 dot3out_pause_frames_low[0x20];
1618
Matan Barakb4ff3a32016-02-09 14:57:42 +02001619 u8 reserved_at_400[0x3c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001620};
1621
1622struct mlx5_ifc_eth_2819_cntrs_grp_data_layout_bits {
1623 u8 ether_stats_drop_events_high[0x20];
1624
1625 u8 ether_stats_drop_events_low[0x20];
1626
1627 u8 ether_stats_octets_high[0x20];
1628
1629 u8 ether_stats_octets_low[0x20];
1630
1631 u8 ether_stats_pkts_high[0x20];
1632
1633 u8 ether_stats_pkts_low[0x20];
1634
1635 u8 ether_stats_broadcast_pkts_high[0x20];
1636
1637 u8 ether_stats_broadcast_pkts_low[0x20];
1638
1639 u8 ether_stats_multicast_pkts_high[0x20];
1640
1641 u8 ether_stats_multicast_pkts_low[0x20];
1642
1643 u8 ether_stats_crc_align_errors_high[0x20];
1644
1645 u8 ether_stats_crc_align_errors_low[0x20];
1646
1647 u8 ether_stats_undersize_pkts_high[0x20];
1648
1649 u8 ether_stats_undersize_pkts_low[0x20];
1650
1651 u8 ether_stats_oversize_pkts_high[0x20];
1652
1653 u8 ether_stats_oversize_pkts_low[0x20];
1654
1655 u8 ether_stats_fragments_high[0x20];
1656
1657 u8 ether_stats_fragments_low[0x20];
1658
1659 u8 ether_stats_jabbers_high[0x20];
1660
1661 u8 ether_stats_jabbers_low[0x20];
1662
1663 u8 ether_stats_collisions_high[0x20];
1664
1665 u8 ether_stats_collisions_low[0x20];
1666
1667 u8 ether_stats_pkts64octets_high[0x20];
1668
1669 u8 ether_stats_pkts64octets_low[0x20];
1670
1671 u8 ether_stats_pkts65to127octets_high[0x20];
1672
1673 u8 ether_stats_pkts65to127octets_low[0x20];
1674
1675 u8 ether_stats_pkts128to255octets_high[0x20];
1676
1677 u8 ether_stats_pkts128to255octets_low[0x20];
1678
1679 u8 ether_stats_pkts256to511octets_high[0x20];
1680
1681 u8 ether_stats_pkts256to511octets_low[0x20];
1682
1683 u8 ether_stats_pkts512to1023octets_high[0x20];
1684
1685 u8 ether_stats_pkts512to1023octets_low[0x20];
1686
1687 u8 ether_stats_pkts1024to1518octets_high[0x20];
1688
1689 u8 ether_stats_pkts1024to1518octets_low[0x20];
1690
1691 u8 ether_stats_pkts1519to2047octets_high[0x20];
1692
1693 u8 ether_stats_pkts1519to2047octets_low[0x20];
1694
1695 u8 ether_stats_pkts2048to4095octets_high[0x20];
1696
1697 u8 ether_stats_pkts2048to4095octets_low[0x20];
1698
1699 u8 ether_stats_pkts4096to8191octets_high[0x20];
1700
1701 u8 ether_stats_pkts4096to8191octets_low[0x20];
1702
1703 u8 ether_stats_pkts8192to10239octets_high[0x20];
1704
1705 u8 ether_stats_pkts8192to10239octets_low[0x20];
1706
Matan Barakb4ff3a32016-02-09 14:57:42 +02001707 u8 reserved_at_540[0x280];
Saeed Mahameede2816822015-05-28 22:28:40 +03001708};
1709
1710struct mlx5_ifc_eth_2863_cntrs_grp_data_layout_bits {
1711 u8 if_in_octets_high[0x20];
1712
1713 u8 if_in_octets_low[0x20];
1714
1715 u8 if_in_ucast_pkts_high[0x20];
1716
1717 u8 if_in_ucast_pkts_low[0x20];
1718
1719 u8 if_in_discards_high[0x20];
1720
1721 u8 if_in_discards_low[0x20];
1722
1723 u8 if_in_errors_high[0x20];
1724
1725 u8 if_in_errors_low[0x20];
1726
1727 u8 if_in_unknown_protos_high[0x20];
1728
1729 u8 if_in_unknown_protos_low[0x20];
1730
1731 u8 if_out_octets_high[0x20];
1732
1733 u8 if_out_octets_low[0x20];
1734
1735 u8 if_out_ucast_pkts_high[0x20];
1736
1737 u8 if_out_ucast_pkts_low[0x20];
1738
1739 u8 if_out_discards_high[0x20];
1740
1741 u8 if_out_discards_low[0x20];
1742
1743 u8 if_out_errors_high[0x20];
1744
1745 u8 if_out_errors_low[0x20];
1746
1747 u8 if_in_multicast_pkts_high[0x20];
1748
1749 u8 if_in_multicast_pkts_low[0x20];
1750
1751 u8 if_in_broadcast_pkts_high[0x20];
1752
1753 u8 if_in_broadcast_pkts_low[0x20];
1754
1755 u8 if_out_multicast_pkts_high[0x20];
1756
1757 u8 if_out_multicast_pkts_low[0x20];
1758
1759 u8 if_out_broadcast_pkts_high[0x20];
1760
1761 u8 if_out_broadcast_pkts_low[0x20];
1762
Matan Barakb4ff3a32016-02-09 14:57:42 +02001763 u8 reserved_at_340[0x480];
Saeed Mahameede2816822015-05-28 22:28:40 +03001764};
1765
1766struct mlx5_ifc_eth_802_3_cntrs_grp_data_layout_bits {
1767 u8 a_frames_transmitted_ok_high[0x20];
1768
1769 u8 a_frames_transmitted_ok_low[0x20];
1770
1771 u8 a_frames_received_ok_high[0x20];
1772
1773 u8 a_frames_received_ok_low[0x20];
1774
1775 u8 a_frame_check_sequence_errors_high[0x20];
1776
1777 u8 a_frame_check_sequence_errors_low[0x20];
1778
1779 u8 a_alignment_errors_high[0x20];
1780
1781 u8 a_alignment_errors_low[0x20];
1782
1783 u8 a_octets_transmitted_ok_high[0x20];
1784
1785 u8 a_octets_transmitted_ok_low[0x20];
1786
1787 u8 a_octets_received_ok_high[0x20];
1788
1789 u8 a_octets_received_ok_low[0x20];
1790
1791 u8 a_multicast_frames_xmitted_ok_high[0x20];
1792
1793 u8 a_multicast_frames_xmitted_ok_low[0x20];
1794
1795 u8 a_broadcast_frames_xmitted_ok_high[0x20];
1796
1797 u8 a_broadcast_frames_xmitted_ok_low[0x20];
1798
1799 u8 a_multicast_frames_received_ok_high[0x20];
1800
1801 u8 a_multicast_frames_received_ok_low[0x20];
1802
1803 u8 a_broadcast_frames_received_ok_high[0x20];
1804
1805 u8 a_broadcast_frames_received_ok_low[0x20];
1806
1807 u8 a_in_range_length_errors_high[0x20];
1808
1809 u8 a_in_range_length_errors_low[0x20];
1810
1811 u8 a_out_of_range_length_field_high[0x20];
1812
1813 u8 a_out_of_range_length_field_low[0x20];
1814
1815 u8 a_frame_too_long_errors_high[0x20];
1816
1817 u8 a_frame_too_long_errors_low[0x20];
1818
1819 u8 a_symbol_error_during_carrier_high[0x20];
1820
1821 u8 a_symbol_error_during_carrier_low[0x20];
1822
1823 u8 a_mac_control_frames_transmitted_high[0x20];
1824
1825 u8 a_mac_control_frames_transmitted_low[0x20];
1826
1827 u8 a_mac_control_frames_received_high[0x20];
1828
1829 u8 a_mac_control_frames_received_low[0x20];
1830
1831 u8 a_unsupported_opcodes_received_high[0x20];
1832
1833 u8 a_unsupported_opcodes_received_low[0x20];
1834
1835 u8 a_pause_mac_ctrl_frames_received_high[0x20];
1836
1837 u8 a_pause_mac_ctrl_frames_received_low[0x20];
1838
1839 u8 a_pause_mac_ctrl_frames_transmitted_high[0x20];
1840
1841 u8 a_pause_mac_ctrl_frames_transmitted_low[0x20];
1842
Matan Barakb4ff3a32016-02-09 14:57:42 +02001843 u8 reserved_at_4c0[0x300];
Saeed Mahameede2816822015-05-28 22:28:40 +03001844};
1845
Gal Pressman8ed1a632016-11-17 13:46:01 +02001846struct mlx5_ifc_pcie_perf_cntrs_grp_data_layout_bits {
1847 u8 life_time_counter_high[0x20];
1848
1849 u8 life_time_counter_low[0x20];
1850
1851 u8 rx_errors[0x20];
1852
1853 u8 tx_errors[0x20];
1854
1855 u8 l0_to_recovery_eieos[0x20];
1856
1857 u8 l0_to_recovery_ts[0x20];
1858
1859 u8 l0_to_recovery_framing[0x20];
1860
1861 u8 l0_to_recovery_retrain[0x20];
1862
1863 u8 crc_error_dllp[0x20];
1864
1865 u8 crc_error_tlp[0x20];
1866
Eran Ben Elishaefae7f72017-05-12 02:47:02 +03001867 u8 tx_overflow_buffer_pkt_high[0x20];
1868
1869 u8 tx_overflow_buffer_pkt_low[0x20];
Gal Pressman5405fa22017-06-15 18:29:23 +03001870
1871 u8 outbound_stalled_reads[0x20];
1872
1873 u8 outbound_stalled_writes[0x20];
1874
1875 u8 outbound_stalled_reads_events[0x20];
1876
1877 u8 outbound_stalled_writes_events[0x20];
1878
1879 u8 reserved_at_200[0x5c0];
Gal Pressman8ed1a632016-11-17 13:46:01 +02001880};
1881
Saeed Mahameede2816822015-05-28 22:28:40 +03001882struct mlx5_ifc_cmd_inter_comp_event_bits {
1883 u8 command_completion_vector[0x20];
1884
Matan Barakb4ff3a32016-02-09 14:57:42 +02001885 u8 reserved_at_20[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001886};
1887
1888struct mlx5_ifc_stall_vl_event_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001889 u8 reserved_at_0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03001890 u8 port_num[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001891 u8 reserved_at_19[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001892 u8 vl[0x4];
1893
Matan Barakb4ff3a32016-02-09 14:57:42 +02001894 u8 reserved_at_20[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001895};
1896
1897struct mlx5_ifc_db_bf_congestion_event_bits {
1898 u8 event_subtype[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001899 u8 reserved_at_8[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001900 u8 congestion_level[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001901 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001902
Matan Barakb4ff3a32016-02-09 14:57:42 +02001903 u8 reserved_at_20[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001904};
1905
1906struct mlx5_ifc_gpio_event_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001907 u8 reserved_at_0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03001908
1909 u8 gpio_event_hi[0x20];
1910
1911 u8 gpio_event_lo[0x20];
1912
Matan Barakb4ff3a32016-02-09 14:57:42 +02001913 u8 reserved_at_a0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03001914};
1915
1916struct mlx5_ifc_port_state_change_event_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001917 u8 reserved_at_0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03001918
1919 u8 port_num[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001920 u8 reserved_at_44[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03001921
Matan Barakb4ff3a32016-02-09 14:57:42 +02001922 u8 reserved_at_60[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03001923};
1924
1925struct mlx5_ifc_dropped_packet_logged_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001926 u8 reserved_at_0[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001927};
1928
1929enum {
1930 MLX5_CQ_ERROR_SYNDROME_CQ_OVERRUN = 0x1,
1931 MLX5_CQ_ERROR_SYNDROME_CQ_ACCESS_VIOLATION_ERROR = 0x2,
1932};
1933
1934struct mlx5_ifc_cq_error_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001935 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001936 u8 cqn[0x18];
1937
Matan Barakb4ff3a32016-02-09 14:57:42 +02001938 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03001939
Matan Barakb4ff3a32016-02-09 14:57:42 +02001940 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03001941 u8 syndrome[0x8];
1942
Matan Barakb4ff3a32016-02-09 14:57:42 +02001943 u8 reserved_at_60[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03001944};
1945
1946struct mlx5_ifc_rdma_page_fault_event_bits {
1947 u8 bytes_committed[0x20];
1948
1949 u8 r_key[0x20];
1950
Matan Barakb4ff3a32016-02-09 14:57:42 +02001951 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03001952 u8 packet_len[0x10];
1953
1954 u8 rdma_op_len[0x20];
1955
1956 u8 rdma_va[0x40];
1957
Matan Barakb4ff3a32016-02-09 14:57:42 +02001958 u8 reserved_at_c0[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03001959 u8 rdma[0x1];
1960 u8 write[0x1];
1961 u8 requestor[0x1];
1962 u8 qp_number[0x18];
1963};
1964
1965struct mlx5_ifc_wqe_associated_page_fault_event_bits {
1966 u8 bytes_committed[0x20];
1967
Matan Barakb4ff3a32016-02-09 14:57:42 +02001968 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03001969 u8 wqe_index[0x10];
1970
Matan Barakb4ff3a32016-02-09 14:57:42 +02001971 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03001972 u8 len[0x10];
1973
Matan Barakb4ff3a32016-02-09 14:57:42 +02001974 u8 reserved_at_60[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03001975
Matan Barakb4ff3a32016-02-09 14:57:42 +02001976 u8 reserved_at_c0[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03001977 u8 rdma[0x1];
1978 u8 write_read[0x1];
1979 u8 requestor[0x1];
1980 u8 qpn[0x18];
1981};
1982
1983struct mlx5_ifc_qp_events_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001984 u8 reserved_at_0[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001985
1986 u8 type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001987 u8 reserved_at_a8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03001988
Matan Barakb4ff3a32016-02-09 14:57:42 +02001989 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001990 u8 qpn_rqn_sqn[0x18];
1991};
1992
1993struct mlx5_ifc_dct_events_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001994 u8 reserved_at_0[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001995
Matan Barakb4ff3a32016-02-09 14:57:42 +02001996 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001997 u8 dct_number[0x18];
1998};
1999
2000struct mlx5_ifc_comp_event_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002001 u8 reserved_at_0[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002002
Matan Barakb4ff3a32016-02-09 14:57:42 +02002003 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002004 u8 cq_number[0x18];
2005};
2006
2007enum {
2008 MLX5_QPC_STATE_RST = 0x0,
2009 MLX5_QPC_STATE_INIT = 0x1,
2010 MLX5_QPC_STATE_RTR = 0x2,
2011 MLX5_QPC_STATE_RTS = 0x3,
2012 MLX5_QPC_STATE_SQER = 0x4,
2013 MLX5_QPC_STATE_ERR = 0x6,
2014 MLX5_QPC_STATE_SQD = 0x7,
2015 MLX5_QPC_STATE_SUSPENDED = 0x9,
2016};
2017
2018enum {
2019 MLX5_QPC_ST_RC = 0x0,
2020 MLX5_QPC_ST_UC = 0x1,
2021 MLX5_QPC_ST_UD = 0x2,
2022 MLX5_QPC_ST_XRC = 0x3,
2023 MLX5_QPC_ST_DCI = 0x5,
2024 MLX5_QPC_ST_QP0 = 0x7,
2025 MLX5_QPC_ST_QP1 = 0x8,
2026 MLX5_QPC_ST_RAW_DATAGRAM = 0x9,
2027 MLX5_QPC_ST_REG_UMR = 0xc,
2028};
2029
2030enum {
2031 MLX5_QPC_PM_STATE_ARMED = 0x0,
2032 MLX5_QPC_PM_STATE_REARM = 0x1,
2033 MLX5_QPC_PM_STATE_RESERVED = 0x2,
2034 MLX5_QPC_PM_STATE_MIGRATED = 0x3,
2035};
2036
2037enum {
2038 MLX5_QPC_END_PADDING_MODE_SCATTER_AS_IS = 0x0,
2039 MLX5_QPC_END_PADDING_MODE_PAD_TO_CACHE_LINE_ALIGNMENT = 0x1,
2040};
2041
2042enum {
2043 MLX5_QPC_MTU_256_BYTES = 0x1,
2044 MLX5_QPC_MTU_512_BYTES = 0x2,
2045 MLX5_QPC_MTU_1K_BYTES = 0x3,
2046 MLX5_QPC_MTU_2K_BYTES = 0x4,
2047 MLX5_QPC_MTU_4K_BYTES = 0x5,
2048 MLX5_QPC_MTU_RAW_ETHERNET_QP = 0x7,
2049};
2050
2051enum {
2052 MLX5_QPC_ATOMIC_MODE_IB_SPEC = 0x1,
2053 MLX5_QPC_ATOMIC_MODE_ONLY_8B = 0x2,
2054 MLX5_QPC_ATOMIC_MODE_UP_TO_8B = 0x3,
2055 MLX5_QPC_ATOMIC_MODE_UP_TO_16B = 0x4,
2056 MLX5_QPC_ATOMIC_MODE_UP_TO_32B = 0x5,
2057 MLX5_QPC_ATOMIC_MODE_UP_TO_64B = 0x6,
2058 MLX5_QPC_ATOMIC_MODE_UP_TO_128B = 0x7,
2059 MLX5_QPC_ATOMIC_MODE_UP_TO_256B = 0x8,
2060};
2061
2062enum {
2063 MLX5_QPC_CS_REQ_DISABLE = 0x0,
2064 MLX5_QPC_CS_REQ_UP_TO_32B = 0x11,
2065 MLX5_QPC_CS_REQ_UP_TO_64B = 0x22,
2066};
2067
2068enum {
2069 MLX5_QPC_CS_RES_DISABLE = 0x0,
2070 MLX5_QPC_CS_RES_UP_TO_32B = 0x1,
2071 MLX5_QPC_CS_RES_UP_TO_64B = 0x2,
2072};
2073
2074struct mlx5_ifc_qpc_bits {
2075 u8 state[0x4];
Aviv Heller84df61e2016-05-10 13:47:50 +03002076 u8 lag_tx_port_affinity[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002077 u8 st[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002078 u8 reserved_at_10[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002079 u8 pm_state[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002080 u8 reserved_at_15[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03002081 u8 end_padding_mode[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002082 u8 reserved_at_1e[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002083
2084 u8 wq_signature[0x1];
2085 u8 block_lb_mc[0x1];
2086 u8 atomic_like_write_en[0x1];
2087 u8 latency_sensitive[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002088 u8 reserved_at_24[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002089 u8 drain_sigerr[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002090 u8 reserved_at_26[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002091 u8 pd[0x18];
2092
2093 u8 mtu[0x3];
2094 u8 log_msg_max[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002095 u8 reserved_at_48[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002096 u8 log_rq_size[0x4];
2097 u8 log_rq_stride[0x3];
2098 u8 no_sq[0x1];
2099 u8 log_sq_size[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002100 u8 reserved_at_55[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03002101 u8 rlky[0x1];
Erez Shitrit1015c2e2016-02-21 16:27:16 +02002102 u8 ulp_stateless_offload_mode[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002103
2104 u8 counter_set_id[0x8];
2105 u8 uar_page[0x18];
2106
Matan Barakb4ff3a32016-02-09 14:57:42 +02002107 u8 reserved_at_80[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002108 u8 user_index[0x18];
2109
Matan Barakb4ff3a32016-02-09 14:57:42 +02002110 u8 reserved_at_a0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002111 u8 log_page_size[0x5];
2112 u8 remote_qpn[0x18];
2113
2114 struct mlx5_ifc_ads_bits primary_address_path;
2115
2116 struct mlx5_ifc_ads_bits secondary_address_path;
2117
2118 u8 log_ack_req_freq[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002119 u8 reserved_at_384[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002120 u8 log_sra_max[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002121 u8 reserved_at_38b[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002122 u8 retry_count[0x3];
2123 u8 rnr_retry[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002124 u8 reserved_at_393[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002125 u8 fre[0x1];
2126 u8 cur_rnr_retry[0x3];
2127 u8 cur_retry_count[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002128 u8 reserved_at_39b[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002129
Matan Barakb4ff3a32016-02-09 14:57:42 +02002130 u8 reserved_at_3a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002131
Matan Barakb4ff3a32016-02-09 14:57:42 +02002132 u8 reserved_at_3c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002133 u8 next_send_psn[0x18];
2134
Matan Barakb4ff3a32016-02-09 14:57:42 +02002135 u8 reserved_at_3e0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002136 u8 cqn_snd[0x18];
2137
Saeed Mahameed09a7d9e2016-07-19 01:17:59 +03002138 u8 reserved_at_400[0x8];
2139 u8 deth_sqpn[0x18];
2140
2141 u8 reserved_at_420[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002142
Matan Barakb4ff3a32016-02-09 14:57:42 +02002143 u8 reserved_at_440[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002144 u8 last_acked_psn[0x18];
2145
Matan Barakb4ff3a32016-02-09 14:57:42 +02002146 u8 reserved_at_460[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002147 u8 ssn[0x18];
2148
Matan Barakb4ff3a32016-02-09 14:57:42 +02002149 u8 reserved_at_480[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002150 u8 log_rra_max[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002151 u8 reserved_at_48b[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002152 u8 atomic_mode[0x4];
2153 u8 rre[0x1];
2154 u8 rwe[0x1];
2155 u8 rae[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002156 u8 reserved_at_493[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002157 u8 page_offset[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002158 u8 reserved_at_49a[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002159 u8 cd_slave_receive[0x1];
2160 u8 cd_slave_send[0x1];
2161 u8 cd_master[0x1];
2162
Matan Barakb4ff3a32016-02-09 14:57:42 +02002163 u8 reserved_at_4a0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002164 u8 min_rnr_nak[0x5];
2165 u8 next_rcv_psn[0x18];
2166
Matan Barakb4ff3a32016-02-09 14:57:42 +02002167 u8 reserved_at_4c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002168 u8 xrcd[0x18];
2169
Matan Barakb4ff3a32016-02-09 14:57:42 +02002170 u8 reserved_at_4e0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002171 u8 cqn_rcv[0x18];
2172
2173 u8 dbr_addr[0x40];
2174
2175 u8 q_key[0x20];
2176
Matan Barakb4ff3a32016-02-09 14:57:42 +02002177 u8 reserved_at_560[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002178 u8 rq_type[0x3];
Saeed Mahameed74862162016-06-09 15:11:34 +03002179 u8 srqn_rmpn_xrqn[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002180
Matan Barakb4ff3a32016-02-09 14:57:42 +02002181 u8 reserved_at_580[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002182 u8 rmsn[0x18];
2183
2184 u8 hw_sq_wqebb_counter[0x10];
2185 u8 sw_sq_wqebb_counter[0x10];
2186
2187 u8 hw_rq_counter[0x20];
2188
2189 u8 sw_rq_counter[0x20];
2190
Matan Barakb4ff3a32016-02-09 14:57:42 +02002191 u8 reserved_at_600[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002192
Matan Barakb4ff3a32016-02-09 14:57:42 +02002193 u8 reserved_at_620[0xf];
Saeed Mahameede2816822015-05-28 22:28:40 +03002194 u8 cgs[0x1];
2195 u8 cs_req[0x8];
2196 u8 cs_res[0x8];
2197
2198 u8 dc_access_key[0x40];
2199
Matan Barakb4ff3a32016-02-09 14:57:42 +02002200 u8 reserved_at_680[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002201};
2202
2203struct mlx5_ifc_roce_addr_layout_bits {
2204 u8 source_l3_address[16][0x8];
2205
Matan Barakb4ff3a32016-02-09 14:57:42 +02002206 u8 reserved_at_80[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002207 u8 vlan_valid[0x1];
2208 u8 vlan_id[0xc];
2209 u8 source_mac_47_32[0x10];
2210
2211 u8 source_mac_31_0[0x20];
2212
Matan Barakb4ff3a32016-02-09 14:57:42 +02002213 u8 reserved_at_c0[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +03002214 u8 roce_l3_type[0x4];
2215 u8 roce_version[0x8];
2216
Matan Barakb4ff3a32016-02-09 14:57:42 +02002217 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002218};
2219
2220union mlx5_ifc_hca_cap_union_bits {
2221 struct mlx5_ifc_cmd_hca_cap_bits cmd_hca_cap;
2222 struct mlx5_ifc_odp_cap_bits odp_cap;
2223 struct mlx5_ifc_atomic_caps_bits atomic_caps;
2224 struct mlx5_ifc_roce_cap_bits roce_cap;
2225 struct mlx5_ifc_per_protocol_networking_offload_caps_bits per_protocol_networking_offload_caps;
2226 struct mlx5_ifc_flow_table_nic_cap_bits flow_table_nic_cap;
Saeed Mahameed495716b2015-12-01 18:03:19 +02002227 struct mlx5_ifc_flow_table_eswitch_cap_bits flow_table_eswitch_cap;
Saeed Mahameedd6666752015-12-01 18:03:22 +02002228 struct mlx5_ifc_e_switch_cap_bits e_switch_cap;
Sagi Grimberg3f0393a2016-02-23 10:25:23 +02002229 struct mlx5_ifc_vector_calc_cap_bits vector_calc_cap;
Saeed Mahameed74862162016-06-09 15:11:34 +03002230 struct mlx5_ifc_qos_cap_bits qos_cap;
Ilan Tayarie29341f2017-03-13 20:05:45 +02002231 struct mlx5_ifc_fpga_cap_bits fpga_cap;
Matan Barakb4ff3a32016-02-09 14:57:42 +02002232 u8 reserved_at_0[0x8000];
Saeed Mahameede2816822015-05-28 22:28:40 +03002233};
2234
2235enum {
2236 MLX5_FLOW_CONTEXT_ACTION_ALLOW = 0x1,
2237 MLX5_FLOW_CONTEXT_ACTION_DROP = 0x2,
2238 MLX5_FLOW_CONTEXT_ACTION_FWD_DEST = 0x4,
Amir Vadai9dc0b282016-05-13 12:55:39 +00002239 MLX5_FLOW_CONTEXT_ACTION_COUNT = 0x8,
Hadar Hen Zion7adbde22016-08-03 15:08:33 +03002240 MLX5_FLOW_CONTEXT_ACTION_ENCAP = 0x10,
2241 MLX5_FLOW_CONTEXT_ACTION_DECAP = 0x20,
Or Gerlitz2a69cb92017-01-19 19:31:25 +02002242 MLX5_FLOW_CONTEXT_ACTION_MOD_HDR = 0x40,
Saeed Mahameede2816822015-05-28 22:28:40 +03002243};
2244
2245struct mlx5_ifc_flow_context_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002246 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002247
2248 u8 group_id[0x20];
2249
Matan Barakb4ff3a32016-02-09 14:57:42 +02002250 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002251 u8 flow_tag[0x18];
2252
Matan Barakb4ff3a32016-02-09 14:57:42 +02002253 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002254 u8 action[0x10];
2255
Matan Barakb4ff3a32016-02-09 14:57:42 +02002256 u8 reserved_at_80[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002257 u8 destination_list_size[0x18];
2258
Amir Vadai9dc0b282016-05-13 12:55:39 +00002259 u8 reserved_at_a0[0x8];
2260 u8 flow_counter_list_size[0x18];
2261
Hadar Hen Zion7adbde22016-08-03 15:08:33 +03002262 u8 encap_id[0x20];
2263
Or Gerlitz2a69cb92017-01-19 19:31:25 +02002264 u8 modify_header_id[0x20];
2265
2266 u8 reserved_at_100[0x100];
Saeed Mahameede2816822015-05-28 22:28:40 +03002267
2268 struct mlx5_ifc_fte_match_param_bits match_value;
2269
Matan Barakb4ff3a32016-02-09 14:57:42 +02002270 u8 reserved_at_1200[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03002271
Amir Vadai9dc0b282016-05-13 12:55:39 +00002272 union mlx5_ifc_dest_format_struct_flow_counter_list_auto_bits destination[0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002273};
2274
2275enum {
2276 MLX5_XRC_SRQC_STATE_GOOD = 0x0,
2277 MLX5_XRC_SRQC_STATE_ERROR = 0x1,
2278};
2279
2280struct mlx5_ifc_xrc_srqc_bits {
2281 u8 state[0x4];
2282 u8 log_xrc_srq_size[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002283 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002284
2285 u8 wq_signature[0x1];
2286 u8 cont_srq[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002287 u8 reserved_at_22[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002288 u8 rlky[0x1];
2289 u8 basic_cyclic_rcv_wqe[0x1];
2290 u8 log_rq_stride[0x3];
2291 u8 xrcd[0x18];
2292
2293 u8 page_offset[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002294 u8 reserved_at_46[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002295 u8 cqn[0x18];
2296
Matan Barakb4ff3a32016-02-09 14:57:42 +02002297 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002298
2299 u8 user_index_equal_xrc_srqn[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002300 u8 reserved_at_81[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002301 u8 log_page_size[0x6];
2302 u8 user_index[0x18];
2303
Matan Barakb4ff3a32016-02-09 14:57:42 +02002304 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002305
Matan Barakb4ff3a32016-02-09 14:57:42 +02002306 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002307 u8 pd[0x18];
2308
2309 u8 lwm[0x10];
2310 u8 wqe_cnt[0x10];
2311
Matan Barakb4ff3a32016-02-09 14:57:42 +02002312 u8 reserved_at_100[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002313
2314 u8 db_record_addr_h[0x20];
2315
2316 u8 db_record_addr_l[0x1e];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002317 u8 reserved_at_17e[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002318
Matan Barakb4ff3a32016-02-09 14:57:42 +02002319 u8 reserved_at_180[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002320};
2321
2322struct mlx5_ifc_traffic_counter_bits {
2323 u8 packets[0x40];
2324
2325 u8 octets[0x40];
2326};
2327
2328struct mlx5_ifc_tisc_bits {
Aviv Heller84df61e2016-05-10 13:47:50 +03002329 u8 strict_lag_tx_port_affinity[0x1];
2330 u8 reserved_at_1[0x3];
2331 u8 lag_tx_port_affinity[0x04];
2332
2333 u8 reserved_at_8[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002334 u8 prio[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002335 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002336
Matan Barakb4ff3a32016-02-09 14:57:42 +02002337 u8 reserved_at_20[0x100];
Saeed Mahameede2816822015-05-28 22:28:40 +03002338
Matan Barakb4ff3a32016-02-09 14:57:42 +02002339 u8 reserved_at_120[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002340 u8 transport_domain[0x18];
2341
Erez Shitrit500a3d02017-04-13 06:36:51 +03002342 u8 reserved_at_140[0x8];
2343 u8 underlay_qpn[0x18];
2344 u8 reserved_at_160[0x3a0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002345};
2346
2347enum {
2348 MLX5_TIRC_DISP_TYPE_DIRECT = 0x0,
2349 MLX5_TIRC_DISP_TYPE_INDIRECT = 0x1,
2350};
2351
2352enum {
2353 MLX5_TIRC_LRO_ENABLE_MASK_IPV4_LRO = 0x1,
2354 MLX5_TIRC_LRO_ENABLE_MASK_IPV6_LRO = 0x2,
2355};
2356
2357enum {
Saeed Mahameed2be69672015-07-23 23:35:56 +03002358 MLX5_RX_HASH_FN_NONE = 0x0,
2359 MLX5_RX_HASH_FN_INVERTED_XOR8 = 0x1,
2360 MLX5_RX_HASH_FN_TOEPLITZ = 0x2,
Saeed Mahameede2816822015-05-28 22:28:40 +03002361};
2362
2363enum {
2364 MLX5_TIRC_SELF_LB_BLOCK_BLOCK_UNICAST_ = 0x1,
2365 MLX5_TIRC_SELF_LB_BLOCK_BLOCK_MULTICAST_ = 0x2,
2366};
2367
2368struct mlx5_ifc_tirc_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002369 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002370
2371 u8 disp_type[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002372 u8 reserved_at_24[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03002373
Matan Barakb4ff3a32016-02-09 14:57:42 +02002374 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002375
Matan Barakb4ff3a32016-02-09 14:57:42 +02002376 u8 reserved_at_80[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002377 u8 lro_timeout_period_usecs[0x10];
2378 u8 lro_enable_mask[0x4];
2379 u8 lro_max_ip_payload_size[0x8];
2380
Matan Barakb4ff3a32016-02-09 14:57:42 +02002381 u8 reserved_at_a0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002382
Matan Barakb4ff3a32016-02-09 14:57:42 +02002383 u8 reserved_at_e0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002384 u8 inline_rqn[0x18];
2385
2386 u8 rx_hash_symmetric[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002387 u8 reserved_at_101[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002388 u8 tunneled_offload_en[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002389 u8 reserved_at_103[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002390 u8 indirect_table[0x18];
2391
2392 u8 rx_hash_fn[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002393 u8 reserved_at_124[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002394 u8 self_lb_block[0x2];
2395 u8 transport_domain[0x18];
2396
2397 u8 rx_hash_toeplitz_key[10][0x20];
2398
2399 struct mlx5_ifc_rx_hash_field_select_bits rx_hash_field_selector_outer;
2400
2401 struct mlx5_ifc_rx_hash_field_select_bits rx_hash_field_selector_inner;
2402
Matan Barakb4ff3a32016-02-09 14:57:42 +02002403 u8 reserved_at_2c0[0x4c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002404};
2405
2406enum {
2407 MLX5_SRQC_STATE_GOOD = 0x0,
2408 MLX5_SRQC_STATE_ERROR = 0x1,
2409};
2410
2411struct mlx5_ifc_srqc_bits {
2412 u8 state[0x4];
2413 u8 log_srq_size[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002414 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002415
2416 u8 wq_signature[0x1];
2417 u8 cont_srq[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002418 u8 reserved_at_22[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002419 u8 rlky[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002420 u8 reserved_at_24[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002421 u8 log_rq_stride[0x3];
2422 u8 xrcd[0x18];
2423
2424 u8 page_offset[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002425 u8 reserved_at_46[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002426 u8 cqn[0x18];
2427
Matan Barakb4ff3a32016-02-09 14:57:42 +02002428 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002429
Matan Barakb4ff3a32016-02-09 14:57:42 +02002430 u8 reserved_at_80[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002431 u8 log_page_size[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002432 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002433
Matan Barakb4ff3a32016-02-09 14:57:42 +02002434 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002435
Matan Barakb4ff3a32016-02-09 14:57:42 +02002436 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002437 u8 pd[0x18];
2438
2439 u8 lwm[0x10];
2440 u8 wqe_cnt[0x10];
2441
Matan Barakb4ff3a32016-02-09 14:57:42 +02002442 u8 reserved_at_100[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002443
Haggai Abramonvsky01949d02015-06-04 19:30:38 +03002444 u8 dbr_addr[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002445
Matan Barakb4ff3a32016-02-09 14:57:42 +02002446 u8 reserved_at_180[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002447};
2448
2449enum {
2450 MLX5_SQC_STATE_RST = 0x0,
2451 MLX5_SQC_STATE_RDY = 0x1,
2452 MLX5_SQC_STATE_ERR = 0x3,
2453};
2454
2455struct mlx5_ifc_sqc_bits {
2456 u8 rlky[0x1];
2457 u8 cd_master[0x1];
2458 u8 fre[0x1];
2459 u8 flush_in_error_en[0x1];
Hadar Hen Zioncff92d72016-07-24 16:12:40 +03002460 u8 reserved_at_4[0x1];
2461 u8 min_wqe_inline_mode[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002462 u8 state[0x4];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03002463 u8 reg_umr[0x1];
Ilan Tayari547eede2017-04-18 16:04:28 +03002464 u8 allow_swp[0x1];
2465 u8 reserved_at_e[0x12];
Saeed Mahameede2816822015-05-28 22:28:40 +03002466
Matan Barakb4ff3a32016-02-09 14:57:42 +02002467 u8 reserved_at_20[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002468 u8 user_index[0x18];
2469
Matan Barakb4ff3a32016-02-09 14:57:42 +02002470 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002471 u8 cqn[0x18];
2472
Saeed Mahameed74862162016-06-09 15:11:34 +03002473 u8 reserved_at_60[0x90];
Saeed Mahameede2816822015-05-28 22:28:40 +03002474
Saeed Mahameed74862162016-06-09 15:11:34 +03002475 u8 packet_pacing_rate_limit_index[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002476 u8 tis_lst_sz[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002477 u8 reserved_at_110[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002478
Matan Barakb4ff3a32016-02-09 14:57:42 +02002479 u8 reserved_at_120[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002480
Matan Barakb4ff3a32016-02-09 14:57:42 +02002481 u8 reserved_at_160[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002482 u8 tis_num_0[0x18];
2483
2484 struct mlx5_ifc_wq_bits wq;
2485};
2486
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03002487enum {
2488 SCHEDULING_CONTEXT_ELEMENT_TYPE_TSAR = 0x0,
2489 SCHEDULING_CONTEXT_ELEMENT_TYPE_VPORT = 0x1,
2490 SCHEDULING_CONTEXT_ELEMENT_TYPE_VPORT_TC = 0x2,
2491 SCHEDULING_CONTEXT_ELEMENT_TYPE_PARA_VPORT_TC = 0x3,
2492};
2493
2494struct mlx5_ifc_scheduling_context_bits {
2495 u8 element_type[0x8];
2496 u8 reserved_at_8[0x18];
2497
2498 u8 element_attributes[0x20];
2499
2500 u8 parent_element_id[0x20];
2501
2502 u8 reserved_at_60[0x40];
2503
2504 u8 bw_share[0x20];
2505
2506 u8 max_average_bw[0x20];
2507
2508 u8 reserved_at_e0[0x120];
2509};
2510
Saeed Mahameede2816822015-05-28 22:28:40 +03002511struct mlx5_ifc_rqtc_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002512 u8 reserved_at_0[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002513
Matan Barakb4ff3a32016-02-09 14:57:42 +02002514 u8 reserved_at_a0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002515 u8 rqt_max_size[0x10];
2516
Matan Barakb4ff3a32016-02-09 14:57:42 +02002517 u8 reserved_at_c0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002518 u8 rqt_actual_size[0x10];
2519
Matan Barakb4ff3a32016-02-09 14:57:42 +02002520 u8 reserved_at_e0[0x6a0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002521
2522 struct mlx5_ifc_rq_num_bits rq_num[0];
2523};
2524
2525enum {
2526 MLX5_RQC_MEM_RQ_TYPE_MEMORY_RQ_INLINE = 0x0,
2527 MLX5_RQC_MEM_RQ_TYPE_MEMORY_RQ_RMP = 0x1,
2528};
2529
2530enum {
2531 MLX5_RQC_STATE_RST = 0x0,
2532 MLX5_RQC_STATE_RDY = 0x1,
2533 MLX5_RQC_STATE_ERR = 0x3,
2534};
2535
2536struct mlx5_ifc_rqc_bits {
2537 u8 rlky[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03002538 u8 reserved_at_1[0x1];
2539 u8 scatter_fcs[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002540 u8 vsd[0x1];
2541 u8 mem_rq_type[0x4];
2542 u8 state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002543 u8 reserved_at_c[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002544 u8 flush_in_error_en[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002545 u8 reserved_at_e[0x12];
Saeed Mahameede2816822015-05-28 22:28:40 +03002546
Matan Barakb4ff3a32016-02-09 14:57:42 +02002547 u8 reserved_at_20[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002548 u8 user_index[0x18];
2549
Matan Barakb4ff3a32016-02-09 14:57:42 +02002550 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002551 u8 cqn[0x18];
2552
2553 u8 counter_set_id[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002554 u8 reserved_at_68[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002555
Matan Barakb4ff3a32016-02-09 14:57:42 +02002556 u8 reserved_at_80[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002557 u8 rmpn[0x18];
2558
Matan Barakb4ff3a32016-02-09 14:57:42 +02002559 u8 reserved_at_a0[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002560
2561 struct mlx5_ifc_wq_bits wq;
2562};
2563
2564enum {
2565 MLX5_RMPC_STATE_RDY = 0x1,
2566 MLX5_RMPC_STATE_ERR = 0x3,
2567};
2568
2569struct mlx5_ifc_rmpc_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002570 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002571 u8 state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002572 u8 reserved_at_c[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +03002573
2574 u8 basic_cyclic_rcv_wqe[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002575 u8 reserved_at_21[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03002576
Matan Barakb4ff3a32016-02-09 14:57:42 +02002577 u8 reserved_at_40[0x140];
Saeed Mahameede2816822015-05-28 22:28:40 +03002578
2579 struct mlx5_ifc_wq_bits wq;
2580};
2581
Saeed Mahameede2816822015-05-28 22:28:40 +03002582struct mlx5_ifc_nic_vport_context_bits {
Hadar Hen Zioncff92d72016-07-24 16:12:40 +03002583 u8 reserved_at_0[0x5];
2584 u8 min_wqe_inline_mode[0x3];
2585 u8 reserved_at_8[0x17];
Saeed Mahameede2816822015-05-28 22:28:40 +03002586 u8 roce_en[0x1];
2587
Saeed Mahameedd82b7312015-12-01 18:03:14 +02002588 u8 arm_change_event[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002589 u8 reserved_at_21[0x1a];
Saeed Mahameedd82b7312015-12-01 18:03:14 +02002590 u8 event_on_mtu[0x1];
2591 u8 event_on_promisc_change[0x1];
2592 u8 event_on_vlan_change[0x1];
2593 u8 event_on_mc_address_change[0x1];
2594 u8 event_on_uc_address_change[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002595
Matan Barakb4ff3a32016-02-09 14:57:42 +02002596 u8 reserved_at_40[0xf0];
Saeed Mahameedd82b7312015-12-01 18:03:14 +02002597
2598 u8 mtu[0x10];
2599
Achiad Shochat9efa7522015-12-23 18:47:20 +02002600 u8 system_image_guid[0x40];
2601 u8 port_guid[0x40];
2602 u8 node_guid[0x40];
2603
Matan Barakb4ff3a32016-02-09 14:57:42 +02002604 u8 reserved_at_200[0x140];
Achiad Shochat9efa7522015-12-23 18:47:20 +02002605 u8 qkey_violation_counter[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002606 u8 reserved_at_350[0x430];
Saeed Mahameedd82b7312015-12-01 18:03:14 +02002607
2608 u8 promisc_uc[0x1];
2609 u8 promisc_mc[0x1];
2610 u8 promisc_all[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002611 u8 reserved_at_783[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002612 u8 allowed_list_type[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002613 u8 reserved_at_788[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03002614 u8 allowed_list_size[0xc];
2615
2616 struct mlx5_ifc_mac_address_layout_bits permanent_address;
2617
Matan Barakb4ff3a32016-02-09 14:57:42 +02002618 u8 reserved_at_7e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002619
2620 u8 current_uc_mac_address[0][0x40];
2621};
2622
2623enum {
2624 MLX5_MKC_ACCESS_MODE_PA = 0x0,
2625 MLX5_MKC_ACCESS_MODE_MTT = 0x1,
2626 MLX5_MKC_ACCESS_MODE_KLMS = 0x2,
Artemy Kovalyovbcda1ac2017-01-02 11:37:41 +02002627 MLX5_MKC_ACCESS_MODE_KSM = 0x3,
Saeed Mahameede2816822015-05-28 22:28:40 +03002628};
2629
2630struct mlx5_ifc_mkc_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002631 u8 reserved_at_0[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002632 u8 free[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002633 u8 reserved_at_2[0xd];
Saeed Mahameede2816822015-05-28 22:28:40 +03002634 u8 small_fence_on_rdma_read_response[0x1];
2635 u8 umr_en[0x1];
2636 u8 a[0x1];
2637 u8 rw[0x1];
2638 u8 rr[0x1];
2639 u8 lw[0x1];
2640 u8 lr[0x1];
2641 u8 access_mode[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002642 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002643
2644 u8 qpn[0x18];
2645 u8 mkey_7_0[0x8];
2646
Matan Barakb4ff3a32016-02-09 14:57:42 +02002647 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002648
2649 u8 length64[0x1];
2650 u8 bsf_en[0x1];
2651 u8 sync_umr[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002652 u8 reserved_at_63[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002653 u8 expected_sigerr_count[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002654 u8 reserved_at_66[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002655 u8 en_rinval[0x1];
2656 u8 pd[0x18];
2657
2658 u8 start_addr[0x40];
2659
2660 u8 len[0x40];
2661
2662 u8 bsf_octword_size[0x20];
2663
Matan Barakb4ff3a32016-02-09 14:57:42 +02002664 u8 reserved_at_120[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002665
2666 u8 translations_octword_size[0x20];
2667
Matan Barakb4ff3a32016-02-09 14:57:42 +02002668 u8 reserved_at_1c0[0x1b];
Saeed Mahameede2816822015-05-28 22:28:40 +03002669 u8 log_page_size[0x5];
2670
Matan Barakb4ff3a32016-02-09 14:57:42 +02002671 u8 reserved_at_1e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002672};
2673
2674struct mlx5_ifc_pkey_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002675 u8 reserved_at_0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002676 u8 pkey[0x10];
2677};
2678
2679struct mlx5_ifc_array128_auto_bits {
2680 u8 array128_auto[16][0x8];
2681};
2682
2683struct mlx5_ifc_hca_vport_context_bits {
2684 u8 field_select[0x20];
2685
Matan Barakb4ff3a32016-02-09 14:57:42 +02002686 u8 reserved_at_20[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002687
2688 u8 sm_virt_aware[0x1];
2689 u8 has_smi[0x1];
2690 u8 has_raw[0x1];
2691 u8 grh_required[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002692 u8 reserved_at_104[0xc];
Majd Dibbiny707c4602015-06-04 19:30:41 +03002693 u8 port_physical_state[0x4];
2694 u8 vport_state_policy[0x4];
2695 u8 port_state[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002696 u8 vport_state[0x4];
2697
Matan Barakb4ff3a32016-02-09 14:57:42 +02002698 u8 reserved_at_120[0x20];
Majd Dibbiny707c4602015-06-04 19:30:41 +03002699
2700 u8 system_image_guid[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002701
2702 u8 port_guid[0x40];
2703
2704 u8 node_guid[0x40];
2705
2706 u8 cap_mask1[0x20];
2707
2708 u8 cap_mask1_field_select[0x20];
2709
2710 u8 cap_mask2[0x20];
2711
2712 u8 cap_mask2_field_select[0x20];
2713
Matan Barakb4ff3a32016-02-09 14:57:42 +02002714 u8 reserved_at_280[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002715
2716 u8 lid[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002717 u8 reserved_at_310[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002718 u8 init_type_reply[0x4];
2719 u8 lmc[0x3];
2720 u8 subnet_timeout[0x5];
2721
2722 u8 sm_lid[0x10];
2723 u8 sm_sl[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002724 u8 reserved_at_334[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03002725
2726 u8 qkey_violation_counter[0x10];
2727 u8 pkey_violation_counter[0x10];
2728
Matan Barakb4ff3a32016-02-09 14:57:42 +02002729 u8 reserved_at_360[0xca0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002730};
2731
Saeed Mahameedd6666752015-12-01 18:03:22 +02002732struct mlx5_ifc_esw_vport_context_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002733 u8 reserved_at_0[0x3];
Saeed Mahameedd6666752015-12-01 18:03:22 +02002734 u8 vport_svlan_strip[0x1];
2735 u8 vport_cvlan_strip[0x1];
2736 u8 vport_svlan_insert[0x1];
2737 u8 vport_cvlan_insert[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002738 u8 reserved_at_8[0x18];
Saeed Mahameedd6666752015-12-01 18:03:22 +02002739
Matan Barakb4ff3a32016-02-09 14:57:42 +02002740 u8 reserved_at_20[0x20];
Saeed Mahameedd6666752015-12-01 18:03:22 +02002741
2742 u8 svlan_cfi[0x1];
2743 u8 svlan_pcp[0x3];
2744 u8 svlan_id[0xc];
2745 u8 cvlan_cfi[0x1];
2746 u8 cvlan_pcp[0x3];
2747 u8 cvlan_id[0xc];
2748
Matan Barakb4ff3a32016-02-09 14:57:42 +02002749 u8 reserved_at_60[0x7a0];
Saeed Mahameedd6666752015-12-01 18:03:22 +02002750};
2751
Saeed Mahameede2816822015-05-28 22:28:40 +03002752enum {
2753 MLX5_EQC_STATUS_OK = 0x0,
2754 MLX5_EQC_STATUS_EQ_WRITE_FAILURE = 0xa,
2755};
2756
2757enum {
2758 MLX5_EQC_ST_ARMED = 0x9,
2759 MLX5_EQC_ST_FIRED = 0xa,
2760};
2761
2762struct mlx5_ifc_eqc_bits {
2763 u8 status[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002764 u8 reserved_at_4[0x9];
Saeed Mahameede2816822015-05-28 22:28:40 +03002765 u8 ec[0x1];
2766 u8 oi[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002767 u8 reserved_at_f[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002768 u8 st[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002769 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002770
Matan Barakb4ff3a32016-02-09 14:57:42 +02002771 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002772
Matan Barakb4ff3a32016-02-09 14:57:42 +02002773 u8 reserved_at_40[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +03002774 u8 page_offset[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002775 u8 reserved_at_5a[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03002776
Matan Barakb4ff3a32016-02-09 14:57:42 +02002777 u8 reserved_at_60[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002778 u8 log_eq_size[0x5];
2779 u8 uar_page[0x18];
2780
Matan Barakb4ff3a32016-02-09 14:57:42 +02002781 u8 reserved_at_80[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002782
Matan Barakb4ff3a32016-02-09 14:57:42 +02002783 u8 reserved_at_a0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002784 u8 intr[0x8];
2785
Matan Barakb4ff3a32016-02-09 14:57:42 +02002786 u8 reserved_at_c0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002787 u8 log_page_size[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002788 u8 reserved_at_c8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002789
Matan Barakb4ff3a32016-02-09 14:57:42 +02002790 u8 reserved_at_e0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03002791
Matan Barakb4ff3a32016-02-09 14:57:42 +02002792 u8 reserved_at_140[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002793 u8 consumer_counter[0x18];
2794
Matan Barakb4ff3a32016-02-09 14:57:42 +02002795 u8 reserved_at_160[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002796 u8 producer_counter[0x18];
2797
Matan Barakb4ff3a32016-02-09 14:57:42 +02002798 u8 reserved_at_180[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002799};
2800
2801enum {
2802 MLX5_DCTC_STATE_ACTIVE = 0x0,
2803 MLX5_DCTC_STATE_DRAINING = 0x1,
2804 MLX5_DCTC_STATE_DRAINED = 0x2,
2805};
2806
2807enum {
2808 MLX5_DCTC_CS_RES_DISABLE = 0x0,
2809 MLX5_DCTC_CS_RES_NA = 0x1,
2810 MLX5_DCTC_CS_RES_UP_TO_64B = 0x2,
2811};
2812
2813enum {
2814 MLX5_DCTC_MTU_256_BYTES = 0x1,
2815 MLX5_DCTC_MTU_512_BYTES = 0x2,
2816 MLX5_DCTC_MTU_1K_BYTES = 0x3,
2817 MLX5_DCTC_MTU_2K_BYTES = 0x4,
2818 MLX5_DCTC_MTU_4K_BYTES = 0x5,
2819};
2820
2821struct mlx5_ifc_dctc_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002822 u8 reserved_at_0[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002823 u8 state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002824 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002825
Matan Barakb4ff3a32016-02-09 14:57:42 +02002826 u8 reserved_at_20[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002827 u8 user_index[0x18];
2828
Matan Barakb4ff3a32016-02-09 14:57:42 +02002829 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002830 u8 cqn[0x18];
2831
2832 u8 counter_set_id[0x8];
2833 u8 atomic_mode[0x4];
2834 u8 rre[0x1];
2835 u8 rwe[0x1];
2836 u8 rae[0x1];
2837 u8 atomic_like_write_en[0x1];
2838 u8 latency_sensitive[0x1];
2839 u8 rlky[0x1];
2840 u8 free_ar[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002841 u8 reserved_at_73[0xd];
Saeed Mahameede2816822015-05-28 22:28:40 +03002842
Matan Barakb4ff3a32016-02-09 14:57:42 +02002843 u8 reserved_at_80[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002844 u8 cs_res[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002845 u8 reserved_at_90[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002846 u8 min_rnr_nak[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002847 u8 reserved_at_98[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002848
Matan Barakb4ff3a32016-02-09 14:57:42 +02002849 u8 reserved_at_a0[0x8];
Saeed Mahameed74862162016-06-09 15:11:34 +03002850 u8 srqn_xrqn[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002851
Matan Barakb4ff3a32016-02-09 14:57:42 +02002852 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002853 u8 pd[0x18];
2854
2855 u8 tclass[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002856 u8 reserved_at_e8[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002857 u8 flow_label[0x14];
2858
2859 u8 dc_access_key[0x40];
2860
Matan Barakb4ff3a32016-02-09 14:57:42 +02002861 u8 reserved_at_140[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002862 u8 mtu[0x3];
2863 u8 port[0x8];
2864 u8 pkey_index[0x10];
2865
Matan Barakb4ff3a32016-02-09 14:57:42 +02002866 u8 reserved_at_160[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002867 u8 my_addr_index[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002868 u8 reserved_at_170[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002869 u8 hop_limit[0x8];
2870
2871 u8 dc_access_key_violation_count[0x20];
2872
Matan Barakb4ff3a32016-02-09 14:57:42 +02002873 u8 reserved_at_1a0[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +03002874 u8 dei_cfi[0x1];
2875 u8 eth_prio[0x3];
2876 u8 ecn[0x2];
2877 u8 dscp[0x6];
2878
Matan Barakb4ff3a32016-02-09 14:57:42 +02002879 u8 reserved_at_1c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002880};
2881
2882enum {
2883 MLX5_CQC_STATUS_OK = 0x0,
2884 MLX5_CQC_STATUS_CQ_OVERFLOW = 0x9,
2885 MLX5_CQC_STATUS_CQ_WRITE_FAIL = 0xa,
2886};
2887
2888enum {
2889 MLX5_CQC_CQE_SZ_64_BYTES = 0x0,
2890 MLX5_CQC_CQE_SZ_128_BYTES = 0x1,
2891};
2892
2893enum {
2894 MLX5_CQC_ST_SOLICITED_NOTIFICATION_REQUEST_ARMED = 0x6,
2895 MLX5_CQC_ST_NOTIFICATION_REQUEST_ARMED = 0x9,
2896 MLX5_CQC_ST_FIRED = 0xa,
2897};
2898
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03002899enum {
2900 MLX5_CQ_PERIOD_MODE_START_FROM_EQE = 0x0,
2901 MLX5_CQ_PERIOD_MODE_START_FROM_CQE = 0x1,
Saeed Mahameed74862162016-06-09 15:11:34 +03002902 MLX5_CQ_PERIOD_NUM_MODES
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03002903};
2904
Saeed Mahameede2816822015-05-28 22:28:40 +03002905struct mlx5_ifc_cqc_bits {
2906 u8 status[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002907 u8 reserved_at_4[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002908 u8 cqe_sz[0x3];
2909 u8 cc[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002910 u8 reserved_at_c[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002911 u8 scqe_break_moderation_en[0x1];
2912 u8 oi[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03002913 u8 cq_period_mode[0x2];
2914 u8 cqe_comp_en[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002915 u8 mini_cqe_res_format[0x2];
2916 u8 st[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002917 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002918
Matan Barakb4ff3a32016-02-09 14:57:42 +02002919 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002920
Matan Barakb4ff3a32016-02-09 14:57:42 +02002921 u8 reserved_at_40[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +03002922 u8 page_offset[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002923 u8 reserved_at_5a[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03002924
Matan Barakb4ff3a32016-02-09 14:57:42 +02002925 u8 reserved_at_60[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002926 u8 log_cq_size[0x5];
2927 u8 uar_page[0x18];
2928
Matan Barakb4ff3a32016-02-09 14:57:42 +02002929 u8 reserved_at_80[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002930 u8 cq_period[0xc];
2931 u8 cq_max_count[0x10];
2932
Matan Barakb4ff3a32016-02-09 14:57:42 +02002933 u8 reserved_at_a0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002934 u8 c_eqn[0x8];
2935
Matan Barakb4ff3a32016-02-09 14:57:42 +02002936 u8 reserved_at_c0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002937 u8 log_page_size[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002938 u8 reserved_at_c8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002939
Matan Barakb4ff3a32016-02-09 14:57:42 +02002940 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002941
Matan Barakb4ff3a32016-02-09 14:57:42 +02002942 u8 reserved_at_100[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002943 u8 last_notified_index[0x18];
2944
Matan Barakb4ff3a32016-02-09 14:57:42 +02002945 u8 reserved_at_120[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002946 u8 last_solicit_index[0x18];
2947
Matan Barakb4ff3a32016-02-09 14:57:42 +02002948 u8 reserved_at_140[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002949 u8 consumer_counter[0x18];
2950
Matan Barakb4ff3a32016-02-09 14:57:42 +02002951 u8 reserved_at_160[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002952 u8 producer_counter[0x18];
2953
Matan Barakb4ff3a32016-02-09 14:57:42 +02002954 u8 reserved_at_180[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002955
2956 u8 dbr_addr[0x40];
2957};
2958
2959union mlx5_ifc_cong_control_roce_ecn_auto_bits {
2960 struct mlx5_ifc_cong_control_802_1qau_rp_bits cong_control_802_1qau_rp;
2961 struct mlx5_ifc_cong_control_r_roce_ecn_rp_bits cong_control_r_roce_ecn_rp;
2962 struct mlx5_ifc_cong_control_r_roce_ecn_np_bits cong_control_r_roce_ecn_np;
Matan Barakb4ff3a32016-02-09 14:57:42 +02002963 u8 reserved_at_0[0x800];
Saeed Mahameede2816822015-05-28 22:28:40 +03002964};
2965
2966struct mlx5_ifc_query_adapter_param_block_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002967 u8 reserved_at_0[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002968
Matan Barakb4ff3a32016-02-09 14:57:42 +02002969 u8 reserved_at_c0[0x8];
Majd Dibbiny211e6c82015-06-04 19:30:42 +03002970 u8 ieee_vendor_id[0x18];
2971
Matan Barakb4ff3a32016-02-09 14:57:42 +02002972 u8 reserved_at_e0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002973 u8 vsd_vendor_id[0x10];
2974
2975 u8 vsd[208][0x8];
2976
2977 u8 vsd_contd_psid[16][0x8];
2978};
2979
Saeed Mahameed74862162016-06-09 15:11:34 +03002980enum {
2981 MLX5_XRQC_STATE_GOOD = 0x0,
2982 MLX5_XRQC_STATE_ERROR = 0x1,
2983};
2984
2985enum {
2986 MLX5_XRQC_TOPOLOGY_NO_SPECIAL_TOPOLOGY = 0x0,
2987 MLX5_XRQC_TOPOLOGY_TAG_MATCHING = 0x1,
2988};
2989
2990enum {
2991 MLX5_XRQC_OFFLOAD_RNDV = 0x1,
2992};
2993
2994struct mlx5_ifc_tag_matching_topology_context_bits {
2995 u8 log_matching_list_sz[0x4];
2996 u8 reserved_at_4[0xc];
2997 u8 append_next_index[0x10];
2998
2999 u8 sw_phase_cnt[0x10];
3000 u8 hw_phase_cnt[0x10];
3001
3002 u8 reserved_at_40[0x40];
3003};
3004
3005struct mlx5_ifc_xrqc_bits {
3006 u8 state[0x4];
3007 u8 rlkey[0x1];
3008 u8 reserved_at_5[0xf];
3009 u8 topology[0x4];
3010 u8 reserved_at_18[0x4];
3011 u8 offload[0x4];
3012
3013 u8 reserved_at_20[0x8];
3014 u8 user_index[0x18];
3015
3016 u8 reserved_at_40[0x8];
3017 u8 cqn[0x18];
3018
3019 u8 reserved_at_60[0xa0];
3020
3021 struct mlx5_ifc_tag_matching_topology_context_bits tag_matching_topology_context;
3022
Artemy Kovalyov5579e152016-08-31 05:17:54 +00003023 u8 reserved_at_180[0x880];
Saeed Mahameed74862162016-06-09 15:11:34 +03003024
3025 struct mlx5_ifc_wq_bits wq;
3026};
3027
Saeed Mahameede2816822015-05-28 22:28:40 +03003028union mlx5_ifc_modify_field_select_resize_field_select_auto_bits {
3029 struct mlx5_ifc_modify_field_select_bits modify_field_select;
3030 struct mlx5_ifc_resize_field_select_bits resize_field_select;
Matan Barakb4ff3a32016-02-09 14:57:42 +02003031 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003032};
3033
3034union mlx5_ifc_field_select_802_1_r_roce_auto_bits {
3035 struct mlx5_ifc_field_select_802_1qau_rp_bits field_select_802_1qau_rp;
3036 struct mlx5_ifc_field_select_r_roce_rp_bits field_select_r_roce_rp;
3037 struct mlx5_ifc_field_select_r_roce_np_bits field_select_r_roce_np;
Matan Barakb4ff3a32016-02-09 14:57:42 +02003038 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003039};
3040
3041union mlx5_ifc_eth_cntrs_grp_data_layout_auto_bits {
3042 struct mlx5_ifc_eth_802_3_cntrs_grp_data_layout_bits eth_802_3_cntrs_grp_data_layout;
3043 struct mlx5_ifc_eth_2863_cntrs_grp_data_layout_bits eth_2863_cntrs_grp_data_layout;
3044 struct mlx5_ifc_eth_2819_cntrs_grp_data_layout_bits eth_2819_cntrs_grp_data_layout;
3045 struct mlx5_ifc_eth_3635_cntrs_grp_data_layout_bits eth_3635_cntrs_grp_data_layout;
3046 struct mlx5_ifc_eth_extended_cntrs_grp_data_layout_bits eth_extended_cntrs_grp_data_layout;
3047 struct mlx5_ifc_eth_per_prio_grp_data_layout_bits eth_per_prio_grp_data_layout;
3048 struct mlx5_ifc_eth_per_traffic_grp_data_layout_bits eth_per_traffic_grp_data_layout;
Meny Yossefi1c64bf62016-02-18 18:15:00 +02003049 struct mlx5_ifc_ib_port_cntrs_grp_data_layout_bits ib_port_cntrs_grp_data_layout;
Saeed Mahameede2816822015-05-28 22:28:40 +03003050 struct mlx5_ifc_phys_layer_cntrs_bits phys_layer_cntrs;
Gal Pressmand8dc0502016-09-27 17:04:51 +03003051 struct mlx5_ifc_phys_layer_statistical_cntrs_bits phys_layer_statistical_cntrs;
Matan Barakb4ff3a32016-02-09 14:57:42 +02003052 u8 reserved_at_0[0x7c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003053};
3054
Gal Pressman8ed1a632016-11-17 13:46:01 +02003055union mlx5_ifc_pcie_cntrs_grp_data_layout_auto_bits {
3056 struct mlx5_ifc_pcie_perf_cntrs_grp_data_layout_bits pcie_perf_cntrs_grp_data_layout;
3057 u8 reserved_at_0[0x7c0];
3058};
3059
Saeed Mahameede2816822015-05-28 22:28:40 +03003060union mlx5_ifc_event_auto_bits {
3061 struct mlx5_ifc_comp_event_bits comp_event;
3062 struct mlx5_ifc_dct_events_bits dct_events;
3063 struct mlx5_ifc_qp_events_bits qp_events;
3064 struct mlx5_ifc_wqe_associated_page_fault_event_bits wqe_associated_page_fault_event;
3065 struct mlx5_ifc_rdma_page_fault_event_bits rdma_page_fault_event;
3066 struct mlx5_ifc_cq_error_bits cq_error;
3067 struct mlx5_ifc_dropped_packet_logged_bits dropped_packet_logged;
3068 struct mlx5_ifc_port_state_change_event_bits port_state_change_event;
3069 struct mlx5_ifc_gpio_event_bits gpio_event;
3070 struct mlx5_ifc_db_bf_congestion_event_bits db_bf_congestion_event;
3071 struct mlx5_ifc_stall_vl_event_bits stall_vl_event;
3072 struct mlx5_ifc_cmd_inter_comp_event_bits cmd_inter_comp_event;
Matan Barakb4ff3a32016-02-09 14:57:42 +02003073 u8 reserved_at_0[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003074};
3075
3076struct mlx5_ifc_health_buffer_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02003077 u8 reserved_at_0[0x100];
Saeed Mahameede2816822015-05-28 22:28:40 +03003078
3079 u8 assert_existptr[0x20];
3080
3081 u8 assert_callra[0x20];
3082
Matan Barakb4ff3a32016-02-09 14:57:42 +02003083 u8 reserved_at_140[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003084
3085 u8 fw_version[0x20];
3086
3087 u8 hw_id[0x20];
3088
Matan Barakb4ff3a32016-02-09 14:57:42 +02003089 u8 reserved_at_1c0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003090
3091 u8 irisc_index[0x8];
3092 u8 synd[0x8];
3093 u8 ext_synd[0x10];
3094};
3095
3096struct mlx5_ifc_register_loopback_control_bits {
3097 u8 no_lb[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003098 u8 reserved_at_1[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03003099 u8 port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003100 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003101
Matan Barakb4ff3a32016-02-09 14:57:42 +02003102 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03003103};
3104
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03003105struct mlx5_ifc_vport_tc_element_bits {
3106 u8 traffic_class[0x4];
3107 u8 reserved_at_4[0xc];
3108 u8 vport_number[0x10];
3109};
3110
3111struct mlx5_ifc_vport_element_bits {
3112 u8 reserved_at_0[0x10];
3113 u8 vport_number[0x10];
3114};
3115
3116enum {
3117 TSAR_ELEMENT_TSAR_TYPE_DWRR = 0x0,
3118 TSAR_ELEMENT_TSAR_TYPE_ROUND_ROBIN = 0x1,
3119 TSAR_ELEMENT_TSAR_TYPE_ETS = 0x2,
3120};
3121
3122struct mlx5_ifc_tsar_element_bits {
3123 u8 reserved_at_0[0x8];
3124 u8 tsar_type[0x8];
3125 u8 reserved_at_10[0x10];
3126};
3127
Majd Dibbiny8812c242017-02-09 14:20:12 +02003128enum {
3129 MLX5_TEARDOWN_HCA_OUT_FORCE_STATE_SUCCESS = 0x0,
3130 MLX5_TEARDOWN_HCA_OUT_FORCE_STATE_FAIL = 0x1,
3131};
3132
Saeed Mahameede2816822015-05-28 22:28:40 +03003133struct mlx5_ifc_teardown_hca_out_bits {
3134 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003135 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003136
3137 u8 syndrome[0x20];
3138
Majd Dibbiny8812c242017-02-09 14:20:12 +02003139 u8 reserved_at_40[0x3f];
3140
3141 u8 force_state[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03003142};
3143
3144enum {
3145 MLX5_TEARDOWN_HCA_IN_PROFILE_GRACEFUL_CLOSE = 0x0,
Majd Dibbiny8812c242017-02-09 14:20:12 +02003146 MLX5_TEARDOWN_HCA_IN_PROFILE_FORCE_CLOSE = 0x1,
Saeed Mahameede2816822015-05-28 22:28:40 +03003147};
3148
3149struct mlx5_ifc_teardown_hca_in_bits {
3150 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003151 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003152
Matan Barakb4ff3a32016-02-09 14:57:42 +02003153 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003154 u8 op_mod[0x10];
3155
Matan Barakb4ff3a32016-02-09 14:57:42 +02003156 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003157 u8 profile[0x10];
3158
Matan Barakb4ff3a32016-02-09 14:57:42 +02003159 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003160};
3161
3162struct mlx5_ifc_sqerr2rts_qp_out_bits {
3163 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003164 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003165
3166 u8 syndrome[0x20];
3167
Matan Barakb4ff3a32016-02-09 14:57:42 +02003168 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003169};
3170
3171struct mlx5_ifc_sqerr2rts_qp_in_bits {
3172 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003173 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003174
Matan Barakb4ff3a32016-02-09 14:57:42 +02003175 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003176 u8 op_mod[0x10];
3177
Matan Barakb4ff3a32016-02-09 14:57:42 +02003178 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003179 u8 qpn[0x18];
3180
Matan Barakb4ff3a32016-02-09 14:57:42 +02003181 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003182
3183 u8 opt_param_mask[0x20];
3184
Matan Barakb4ff3a32016-02-09 14:57:42 +02003185 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003186
3187 struct mlx5_ifc_qpc_bits qpc;
3188
Matan Barakb4ff3a32016-02-09 14:57:42 +02003189 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003190};
3191
3192struct mlx5_ifc_sqd2rts_qp_out_bits {
3193 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003194 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003195
3196 u8 syndrome[0x20];
3197
Matan Barakb4ff3a32016-02-09 14:57:42 +02003198 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003199};
3200
3201struct mlx5_ifc_sqd2rts_qp_in_bits {
3202 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003203 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003204
Matan Barakb4ff3a32016-02-09 14:57:42 +02003205 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003206 u8 op_mod[0x10];
3207
Matan Barakb4ff3a32016-02-09 14:57:42 +02003208 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003209 u8 qpn[0x18];
3210
Matan Barakb4ff3a32016-02-09 14:57:42 +02003211 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003212
3213 u8 opt_param_mask[0x20];
3214
Matan Barakb4ff3a32016-02-09 14:57:42 +02003215 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003216
3217 struct mlx5_ifc_qpc_bits qpc;
3218
Matan Barakb4ff3a32016-02-09 14:57:42 +02003219 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003220};
3221
3222struct mlx5_ifc_set_roce_address_out_bits {
3223 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003224 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003225
3226 u8 syndrome[0x20];
3227
Matan Barakb4ff3a32016-02-09 14:57:42 +02003228 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003229};
3230
3231struct mlx5_ifc_set_roce_address_in_bits {
3232 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003233 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003234
Matan Barakb4ff3a32016-02-09 14:57:42 +02003235 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003236 u8 op_mod[0x10];
3237
3238 u8 roce_address_index[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003239 u8 reserved_at_50[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003240
Matan Barakb4ff3a32016-02-09 14:57:42 +02003241 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003242
3243 struct mlx5_ifc_roce_addr_layout_bits roce_address;
3244};
3245
3246struct mlx5_ifc_set_mad_demux_out_bits {
3247 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003248 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003249
3250 u8 syndrome[0x20];
3251
Matan Barakb4ff3a32016-02-09 14:57:42 +02003252 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003253};
3254
3255enum {
3256 MLX5_SET_MAD_DEMUX_IN_DEMUX_MODE_PASS_ALL = 0x0,
3257 MLX5_SET_MAD_DEMUX_IN_DEMUX_MODE_SELECTIVE = 0x2,
3258};
3259
3260struct mlx5_ifc_set_mad_demux_in_bits {
3261 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003262 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003263
Matan Barakb4ff3a32016-02-09 14:57:42 +02003264 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003265 u8 op_mod[0x10];
3266
Matan Barakb4ff3a32016-02-09 14:57:42 +02003267 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003268
Matan Barakb4ff3a32016-02-09 14:57:42 +02003269 u8 reserved_at_60[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03003270 u8 demux_mode[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003271 u8 reserved_at_68[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003272};
3273
3274struct mlx5_ifc_set_l2_table_entry_out_bits {
3275 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003276 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003277
3278 u8 syndrome[0x20];
3279
Matan Barakb4ff3a32016-02-09 14:57:42 +02003280 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003281};
3282
3283struct mlx5_ifc_set_l2_table_entry_in_bits {
3284 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003285 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003286
Matan Barakb4ff3a32016-02-09 14:57:42 +02003287 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003288 u8 op_mod[0x10];
3289
Matan Barakb4ff3a32016-02-09 14:57:42 +02003290 u8 reserved_at_40[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03003291
Matan Barakb4ff3a32016-02-09 14:57:42 +02003292 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003293 u8 table_index[0x18];
3294
Matan Barakb4ff3a32016-02-09 14:57:42 +02003295 u8 reserved_at_c0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003296
Matan Barakb4ff3a32016-02-09 14:57:42 +02003297 u8 reserved_at_e0[0x13];
Saeed Mahameede2816822015-05-28 22:28:40 +03003298 u8 vlan_valid[0x1];
3299 u8 vlan[0xc];
3300
3301 struct mlx5_ifc_mac_address_layout_bits mac_address;
3302
Matan Barakb4ff3a32016-02-09 14:57:42 +02003303 u8 reserved_at_140[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003304};
3305
3306struct mlx5_ifc_set_issi_out_bits {
3307 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003308 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003309
3310 u8 syndrome[0x20];
3311
Matan Barakb4ff3a32016-02-09 14:57:42 +02003312 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003313};
3314
3315struct mlx5_ifc_set_issi_in_bits {
3316 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003317 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003318
Matan Barakb4ff3a32016-02-09 14:57:42 +02003319 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003320 u8 op_mod[0x10];
3321
Matan Barakb4ff3a32016-02-09 14:57:42 +02003322 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003323 u8 current_issi[0x10];
3324
Matan Barakb4ff3a32016-02-09 14:57:42 +02003325 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003326};
3327
3328struct mlx5_ifc_set_hca_cap_out_bits {
3329 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003330 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003331
3332 u8 syndrome[0x20];
3333
Matan Barakb4ff3a32016-02-09 14:57:42 +02003334 u8 reserved_at_40[0x40];
Eli Cohenb7755162014-10-02 12:19:44 +03003335};
3336
3337struct mlx5_ifc_set_hca_cap_in_bits {
3338 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003339 u8 reserved_at_10[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03003340
Matan Barakb4ff3a32016-02-09 14:57:42 +02003341 u8 reserved_at_20[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03003342 u8 op_mod[0x10];
3343
Matan Barakb4ff3a32016-02-09 14:57:42 +02003344 u8 reserved_at_40[0x40];
Eli Cohenb7755162014-10-02 12:19:44 +03003345
Saeed Mahameede2816822015-05-28 22:28:40 +03003346 union mlx5_ifc_hca_cap_union_bits capability;
3347};
3348
Maor Gottlieb26a81452015-12-10 17:12:39 +02003349enum {
3350 MLX5_SET_FTE_MODIFY_ENABLE_MASK_ACTION = 0x0,
3351 MLX5_SET_FTE_MODIFY_ENABLE_MASK_FLOW_TAG = 0x1,
3352 MLX5_SET_FTE_MODIFY_ENABLE_MASK_DESTINATION_LIST = 0x2,
3353 MLX5_SET_FTE_MODIFY_ENABLE_MASK_FLOW_COUNTERS = 0x3
3354};
3355
Saeed Mahameede2816822015-05-28 22:28:40 +03003356struct mlx5_ifc_set_fte_out_bits {
3357 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003358 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003359
3360 u8 syndrome[0x20];
3361
Matan Barakb4ff3a32016-02-09 14:57:42 +02003362 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003363};
3364
3365struct mlx5_ifc_set_fte_in_bits {
3366 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003367 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003368
Matan Barakb4ff3a32016-02-09 14:57:42 +02003369 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003370 u8 op_mod[0x10];
3371
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03003372 u8 other_vport[0x1];
3373 u8 reserved_at_41[0xf];
3374 u8 vport_number[0x10];
3375
3376 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003377
3378 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003379 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003380
Matan Barakb4ff3a32016-02-09 14:57:42 +02003381 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003382 u8 table_id[0x18];
3383
Matan Barakb4ff3a32016-02-09 14:57:42 +02003384 u8 reserved_at_c0[0x18];
Maor Gottlieb26a81452015-12-10 17:12:39 +02003385 u8 modify_enable_mask[0x8];
3386
Matan Barakb4ff3a32016-02-09 14:57:42 +02003387 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003388
3389 u8 flow_index[0x20];
3390
Matan Barakb4ff3a32016-02-09 14:57:42 +02003391 u8 reserved_at_120[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003392
3393 struct mlx5_ifc_flow_context_bits flow_context;
3394};
3395
3396struct mlx5_ifc_rts2rts_qp_out_bits {
3397 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003398 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003399
3400 u8 syndrome[0x20];
3401
Matan Barakb4ff3a32016-02-09 14:57:42 +02003402 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003403};
3404
3405struct mlx5_ifc_rts2rts_qp_in_bits {
3406 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003407 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003408
Matan Barakb4ff3a32016-02-09 14:57:42 +02003409 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003410 u8 op_mod[0x10];
3411
Matan Barakb4ff3a32016-02-09 14:57:42 +02003412 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003413 u8 qpn[0x18];
3414
Matan Barakb4ff3a32016-02-09 14:57:42 +02003415 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003416
3417 u8 opt_param_mask[0x20];
3418
Matan Barakb4ff3a32016-02-09 14:57:42 +02003419 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003420
3421 struct mlx5_ifc_qpc_bits qpc;
3422
Matan Barakb4ff3a32016-02-09 14:57:42 +02003423 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003424};
3425
3426struct mlx5_ifc_rtr2rts_qp_out_bits {
3427 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003428 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003429
3430 u8 syndrome[0x20];
3431
Matan Barakb4ff3a32016-02-09 14:57:42 +02003432 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003433};
3434
3435struct mlx5_ifc_rtr2rts_qp_in_bits {
3436 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003437 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003438
Matan Barakb4ff3a32016-02-09 14:57:42 +02003439 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003440 u8 op_mod[0x10];
3441
Matan Barakb4ff3a32016-02-09 14:57:42 +02003442 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003443 u8 qpn[0x18];
3444
Matan Barakb4ff3a32016-02-09 14:57:42 +02003445 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003446
3447 u8 opt_param_mask[0x20];
3448
Matan Barakb4ff3a32016-02-09 14:57:42 +02003449 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003450
3451 struct mlx5_ifc_qpc_bits qpc;
3452
Matan Barakb4ff3a32016-02-09 14:57:42 +02003453 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003454};
3455
3456struct mlx5_ifc_rst2init_qp_out_bits {
3457 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003458 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003459
3460 u8 syndrome[0x20];
3461
Matan Barakb4ff3a32016-02-09 14:57:42 +02003462 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003463};
3464
3465struct mlx5_ifc_rst2init_qp_in_bits {
3466 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003467 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003468
Matan Barakb4ff3a32016-02-09 14:57:42 +02003469 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003470 u8 op_mod[0x10];
3471
Matan Barakb4ff3a32016-02-09 14:57:42 +02003472 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003473 u8 qpn[0x18];
3474
Matan Barakb4ff3a32016-02-09 14:57:42 +02003475 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003476
3477 u8 opt_param_mask[0x20];
3478
Matan Barakb4ff3a32016-02-09 14:57:42 +02003479 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003480
3481 struct mlx5_ifc_qpc_bits qpc;
3482
Matan Barakb4ff3a32016-02-09 14:57:42 +02003483 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003484};
3485
Saeed Mahameed74862162016-06-09 15:11:34 +03003486struct mlx5_ifc_query_xrq_out_bits {
3487 u8 status[0x8];
3488 u8 reserved_at_8[0x18];
3489
3490 u8 syndrome[0x20];
3491
3492 u8 reserved_at_40[0x40];
3493
3494 struct mlx5_ifc_xrqc_bits xrq_context;
3495};
3496
3497struct mlx5_ifc_query_xrq_in_bits {
3498 u8 opcode[0x10];
3499 u8 reserved_at_10[0x10];
3500
3501 u8 reserved_at_20[0x10];
3502 u8 op_mod[0x10];
3503
3504 u8 reserved_at_40[0x8];
3505 u8 xrqn[0x18];
3506
3507 u8 reserved_at_60[0x20];
3508};
3509
Saeed Mahameede2816822015-05-28 22:28:40 +03003510struct mlx5_ifc_query_xrc_srq_out_bits {
3511 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003512 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003513
3514 u8 syndrome[0x20];
3515
Matan Barakb4ff3a32016-02-09 14:57:42 +02003516 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003517
3518 struct mlx5_ifc_xrc_srqc_bits xrc_srq_context_entry;
3519
Matan Barakb4ff3a32016-02-09 14:57:42 +02003520 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03003521
3522 u8 pas[0][0x40];
3523};
3524
3525struct mlx5_ifc_query_xrc_srq_in_bits {
3526 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003527 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003528
Matan Barakb4ff3a32016-02-09 14:57:42 +02003529 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003530 u8 op_mod[0x10];
3531
Matan Barakb4ff3a32016-02-09 14:57:42 +02003532 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003533 u8 xrc_srqn[0x18];
3534
Matan Barakb4ff3a32016-02-09 14:57:42 +02003535 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003536};
3537
3538enum {
3539 MLX5_QUERY_VPORT_STATE_OUT_STATE_DOWN = 0x0,
3540 MLX5_QUERY_VPORT_STATE_OUT_STATE_UP = 0x1,
3541};
3542
3543struct mlx5_ifc_query_vport_state_out_bits {
3544 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003545 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003546
3547 u8 syndrome[0x20];
3548
Matan Barakb4ff3a32016-02-09 14:57:42 +02003549 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003550
Matan Barakb4ff3a32016-02-09 14:57:42 +02003551 u8 reserved_at_60[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003552 u8 admin_state[0x4];
3553 u8 state[0x4];
3554};
3555
3556enum {
3557 MLX5_QUERY_VPORT_STATE_IN_OP_MOD_VNIC_VPORT = 0x0,
Saeed Mahameede7546512015-12-01 18:03:13 +02003558 MLX5_QUERY_VPORT_STATE_IN_OP_MOD_ESW_VPORT = 0x1,
Saeed Mahameede2816822015-05-28 22:28:40 +03003559};
3560
3561struct mlx5_ifc_query_vport_state_in_bits {
3562 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003563 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003564
Matan Barakb4ff3a32016-02-09 14:57:42 +02003565 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003566 u8 op_mod[0x10];
3567
3568 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003569 u8 reserved_at_41[0xf];
Saeed Mahameede2816822015-05-28 22:28:40 +03003570 u8 vport_number[0x10];
3571
Matan Barakb4ff3a32016-02-09 14:57:42 +02003572 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003573};
3574
3575struct mlx5_ifc_query_vport_counter_out_bits {
3576 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003577 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003578
3579 u8 syndrome[0x20];
3580
Matan Barakb4ff3a32016-02-09 14:57:42 +02003581 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003582
3583 struct mlx5_ifc_traffic_counter_bits received_errors;
3584
3585 struct mlx5_ifc_traffic_counter_bits transmit_errors;
3586
3587 struct mlx5_ifc_traffic_counter_bits received_ib_unicast;
3588
3589 struct mlx5_ifc_traffic_counter_bits transmitted_ib_unicast;
3590
3591 struct mlx5_ifc_traffic_counter_bits received_ib_multicast;
3592
3593 struct mlx5_ifc_traffic_counter_bits transmitted_ib_multicast;
3594
3595 struct mlx5_ifc_traffic_counter_bits received_eth_broadcast;
3596
3597 struct mlx5_ifc_traffic_counter_bits transmitted_eth_broadcast;
3598
3599 struct mlx5_ifc_traffic_counter_bits received_eth_unicast;
3600
3601 struct mlx5_ifc_traffic_counter_bits transmitted_eth_unicast;
3602
3603 struct mlx5_ifc_traffic_counter_bits received_eth_multicast;
3604
3605 struct mlx5_ifc_traffic_counter_bits transmitted_eth_multicast;
3606
Matan Barakb4ff3a32016-02-09 14:57:42 +02003607 u8 reserved_at_680[0xa00];
Saeed Mahameede2816822015-05-28 22:28:40 +03003608};
3609
3610enum {
3611 MLX5_QUERY_VPORT_COUNTER_IN_OP_MOD_VPORT_COUNTERS = 0x0,
3612};
3613
3614struct mlx5_ifc_query_vport_counter_in_bits {
3615 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003616 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003617
Matan Barakb4ff3a32016-02-09 14:57:42 +02003618 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003619 u8 op_mod[0x10];
3620
3621 u8 other_vport[0x1];
Meny Yossefib54ba272016-02-18 18:14:59 +02003622 u8 reserved_at_41[0xb];
3623 u8 port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03003624 u8 vport_number[0x10];
3625
Matan Barakb4ff3a32016-02-09 14:57:42 +02003626 u8 reserved_at_60[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03003627
3628 u8 clear[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003629 u8 reserved_at_c1[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03003630
Matan Barakb4ff3a32016-02-09 14:57:42 +02003631 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003632};
3633
3634struct mlx5_ifc_query_tis_out_bits {
3635 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003636 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003637
3638 u8 syndrome[0x20];
3639
Matan Barakb4ff3a32016-02-09 14:57:42 +02003640 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003641
3642 struct mlx5_ifc_tisc_bits tis_context;
3643};
3644
3645struct mlx5_ifc_query_tis_in_bits {
3646 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003647 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003648
Matan Barakb4ff3a32016-02-09 14:57:42 +02003649 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003650 u8 op_mod[0x10];
3651
Matan Barakb4ff3a32016-02-09 14:57:42 +02003652 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003653 u8 tisn[0x18];
3654
Matan Barakb4ff3a32016-02-09 14:57:42 +02003655 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003656};
3657
3658struct mlx5_ifc_query_tir_out_bits {
3659 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003660 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003661
3662 u8 syndrome[0x20];
3663
Matan Barakb4ff3a32016-02-09 14:57:42 +02003664 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003665
3666 struct mlx5_ifc_tirc_bits tir_context;
3667};
3668
3669struct mlx5_ifc_query_tir_in_bits {
3670 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003671 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003672
Matan Barakb4ff3a32016-02-09 14:57:42 +02003673 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003674 u8 op_mod[0x10];
3675
Matan Barakb4ff3a32016-02-09 14:57:42 +02003676 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003677 u8 tirn[0x18];
3678
Matan Barakb4ff3a32016-02-09 14:57:42 +02003679 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003680};
3681
3682struct mlx5_ifc_query_srq_out_bits {
3683 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003684 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003685
3686 u8 syndrome[0x20];
3687
Matan Barakb4ff3a32016-02-09 14:57:42 +02003688 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003689
3690 struct mlx5_ifc_srqc_bits srq_context_entry;
3691
Matan Barakb4ff3a32016-02-09 14:57:42 +02003692 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03003693
3694 u8 pas[0][0x40];
3695};
3696
3697struct mlx5_ifc_query_srq_in_bits {
3698 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003699 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003700
Matan Barakb4ff3a32016-02-09 14:57:42 +02003701 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003702 u8 op_mod[0x10];
3703
Matan Barakb4ff3a32016-02-09 14:57:42 +02003704 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003705 u8 srqn[0x18];
3706
Matan Barakb4ff3a32016-02-09 14:57:42 +02003707 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003708};
3709
3710struct mlx5_ifc_query_sq_out_bits {
3711 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003712 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003713
3714 u8 syndrome[0x20];
3715
Matan Barakb4ff3a32016-02-09 14:57:42 +02003716 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003717
3718 struct mlx5_ifc_sqc_bits sq_context;
3719};
3720
3721struct mlx5_ifc_query_sq_in_bits {
3722 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003723 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003724
Matan Barakb4ff3a32016-02-09 14:57:42 +02003725 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003726 u8 op_mod[0x10];
3727
Matan Barakb4ff3a32016-02-09 14:57:42 +02003728 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003729 u8 sqn[0x18];
3730
Matan Barakb4ff3a32016-02-09 14:57:42 +02003731 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003732};
3733
3734struct mlx5_ifc_query_special_contexts_out_bits {
3735 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003736 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003737
3738 u8 syndrome[0x20];
3739
Saeed Mahameedec22eb52016-07-16 06:28:36 +03003740 u8 dump_fill_mkey[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003741
3742 u8 resd_lkey[0x20];
Artemy Kovalyovbcda1ac2017-01-02 11:37:41 +02003743
3744 u8 null_mkey[0x20];
3745
3746 u8 reserved_at_a0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03003747};
3748
3749struct mlx5_ifc_query_special_contexts_in_bits {
3750 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003751 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003752
Matan Barakb4ff3a32016-02-09 14:57:42 +02003753 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003754 u8 op_mod[0x10];
3755
Matan Barakb4ff3a32016-02-09 14:57:42 +02003756 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003757};
3758
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03003759struct mlx5_ifc_query_scheduling_element_out_bits {
3760 u8 opcode[0x10];
3761 u8 reserved_at_10[0x10];
3762
3763 u8 reserved_at_20[0x10];
3764 u8 op_mod[0x10];
3765
3766 u8 reserved_at_40[0xc0];
3767
3768 struct mlx5_ifc_scheduling_context_bits scheduling_context;
3769
3770 u8 reserved_at_300[0x100];
3771};
3772
3773enum {
3774 SCHEDULING_HIERARCHY_E_SWITCH = 0x2,
3775};
3776
3777struct mlx5_ifc_query_scheduling_element_in_bits {
3778 u8 opcode[0x10];
3779 u8 reserved_at_10[0x10];
3780
3781 u8 reserved_at_20[0x10];
3782 u8 op_mod[0x10];
3783
3784 u8 scheduling_hierarchy[0x8];
3785 u8 reserved_at_48[0x18];
3786
3787 u8 scheduling_element_id[0x20];
3788
3789 u8 reserved_at_80[0x180];
3790};
3791
Saeed Mahameede2816822015-05-28 22:28:40 +03003792struct mlx5_ifc_query_rqt_out_bits {
3793 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003794 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003795
3796 u8 syndrome[0x20];
3797
Matan Barakb4ff3a32016-02-09 14:57:42 +02003798 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003799
3800 struct mlx5_ifc_rqtc_bits rqt_context;
3801};
3802
3803struct mlx5_ifc_query_rqt_in_bits {
3804 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003805 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003806
Matan Barakb4ff3a32016-02-09 14:57:42 +02003807 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003808 u8 op_mod[0x10];
3809
Matan Barakb4ff3a32016-02-09 14:57:42 +02003810 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003811 u8 rqtn[0x18];
3812
Matan Barakb4ff3a32016-02-09 14:57:42 +02003813 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003814};
3815
3816struct mlx5_ifc_query_rq_out_bits {
3817 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003818 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003819
3820 u8 syndrome[0x20];
3821
Matan Barakb4ff3a32016-02-09 14:57:42 +02003822 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003823
3824 struct mlx5_ifc_rqc_bits rq_context;
3825};
3826
3827struct mlx5_ifc_query_rq_in_bits {
3828 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003829 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003830
Matan Barakb4ff3a32016-02-09 14:57:42 +02003831 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003832 u8 op_mod[0x10];
3833
Matan Barakb4ff3a32016-02-09 14:57:42 +02003834 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003835 u8 rqn[0x18];
3836
Matan Barakb4ff3a32016-02-09 14:57:42 +02003837 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003838};
3839
3840struct mlx5_ifc_query_roce_address_out_bits {
3841 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003842 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003843
3844 u8 syndrome[0x20];
3845
Matan Barakb4ff3a32016-02-09 14:57:42 +02003846 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003847
3848 struct mlx5_ifc_roce_addr_layout_bits roce_address;
3849};
3850
3851struct mlx5_ifc_query_roce_address_in_bits {
3852 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003853 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003854
Matan Barakb4ff3a32016-02-09 14:57:42 +02003855 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003856 u8 op_mod[0x10];
3857
3858 u8 roce_address_index[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003859 u8 reserved_at_50[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003860
Matan Barakb4ff3a32016-02-09 14:57:42 +02003861 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003862};
3863
3864struct mlx5_ifc_query_rmp_out_bits {
3865 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003866 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003867
3868 u8 syndrome[0x20];
3869
Matan Barakb4ff3a32016-02-09 14:57:42 +02003870 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003871
3872 struct mlx5_ifc_rmpc_bits rmp_context;
3873};
3874
3875struct mlx5_ifc_query_rmp_in_bits {
3876 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003877 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003878
Matan Barakb4ff3a32016-02-09 14:57:42 +02003879 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003880 u8 op_mod[0x10];
3881
Matan Barakb4ff3a32016-02-09 14:57:42 +02003882 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003883 u8 rmpn[0x18];
3884
Matan Barakb4ff3a32016-02-09 14:57:42 +02003885 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003886};
3887
3888struct mlx5_ifc_query_qp_out_bits {
3889 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003890 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003891
3892 u8 syndrome[0x20];
3893
Matan Barakb4ff3a32016-02-09 14:57:42 +02003894 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003895
3896 u8 opt_param_mask[0x20];
3897
Matan Barakb4ff3a32016-02-09 14:57:42 +02003898 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003899
3900 struct mlx5_ifc_qpc_bits qpc;
3901
Matan Barakb4ff3a32016-02-09 14:57:42 +02003902 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003903
3904 u8 pas[0][0x40];
3905};
3906
3907struct mlx5_ifc_query_qp_in_bits {
3908 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003909 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003910
Matan Barakb4ff3a32016-02-09 14:57:42 +02003911 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003912 u8 op_mod[0x10];
3913
Matan Barakb4ff3a32016-02-09 14:57:42 +02003914 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003915 u8 qpn[0x18];
3916
Matan Barakb4ff3a32016-02-09 14:57:42 +02003917 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003918};
3919
3920struct mlx5_ifc_query_q_counter_out_bits {
3921 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003922 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003923
3924 u8 syndrome[0x20];
3925
Matan Barakb4ff3a32016-02-09 14:57:42 +02003926 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003927
3928 u8 rx_write_requests[0x20];
3929
Matan Barakb4ff3a32016-02-09 14:57:42 +02003930 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003931
3932 u8 rx_read_requests[0x20];
3933
Matan Barakb4ff3a32016-02-09 14:57:42 +02003934 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003935
3936 u8 rx_atomic_requests[0x20];
3937
Matan Barakb4ff3a32016-02-09 14:57:42 +02003938 u8 reserved_at_120[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003939
3940 u8 rx_dct_connect[0x20];
3941
Matan Barakb4ff3a32016-02-09 14:57:42 +02003942 u8 reserved_at_160[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003943
3944 u8 out_of_buffer[0x20];
3945
Matan Barakb4ff3a32016-02-09 14:57:42 +02003946 u8 reserved_at_1a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003947
3948 u8 out_of_sequence[0x20];
3949
Saeed Mahameed74862162016-06-09 15:11:34 +03003950 u8 reserved_at_1e0[0x20];
3951
3952 u8 duplicate_request[0x20];
3953
3954 u8 reserved_at_220[0x20];
3955
3956 u8 rnr_nak_retry_err[0x20];
3957
3958 u8 reserved_at_260[0x20];
3959
3960 u8 packet_seq_err[0x20];
3961
3962 u8 reserved_at_2a0[0x20];
3963
3964 u8 implied_nak_seq_err[0x20];
3965
3966 u8 reserved_at_2e0[0x20];
3967
3968 u8 local_ack_timeout_err[0x20];
3969
3970 u8 reserved_at_320[0x4e0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003971};
3972
3973struct mlx5_ifc_query_q_counter_in_bits {
3974 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003975 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003976
Matan Barakb4ff3a32016-02-09 14:57:42 +02003977 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003978 u8 op_mod[0x10];
3979
Matan Barakb4ff3a32016-02-09 14:57:42 +02003980 u8 reserved_at_40[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003981
3982 u8 clear[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003983 u8 reserved_at_c1[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03003984
Matan Barakb4ff3a32016-02-09 14:57:42 +02003985 u8 reserved_at_e0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003986 u8 counter_set_id[0x8];
3987};
3988
3989struct mlx5_ifc_query_pages_out_bits {
3990 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003991 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003992
3993 u8 syndrome[0x20];
3994
Matan Barakb4ff3a32016-02-09 14:57:42 +02003995 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003996 u8 function_id[0x10];
3997
3998 u8 num_pages[0x20];
3999};
4000
4001enum {
4002 MLX5_QUERY_PAGES_IN_OP_MOD_BOOT_PAGES = 0x1,
4003 MLX5_QUERY_PAGES_IN_OP_MOD_INIT_PAGES = 0x2,
4004 MLX5_QUERY_PAGES_IN_OP_MOD_REGULAR_PAGES = 0x3,
4005};
4006
4007struct mlx5_ifc_query_pages_in_bits {
4008 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004009 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004010
Matan Barakb4ff3a32016-02-09 14:57:42 +02004011 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004012 u8 op_mod[0x10];
4013
Matan Barakb4ff3a32016-02-09 14:57:42 +02004014 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004015 u8 function_id[0x10];
4016
Matan Barakb4ff3a32016-02-09 14:57:42 +02004017 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004018};
4019
4020struct mlx5_ifc_query_nic_vport_context_out_bits {
4021 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004022 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004023
4024 u8 syndrome[0x20];
4025
Matan Barakb4ff3a32016-02-09 14:57:42 +02004026 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004027
4028 struct mlx5_ifc_nic_vport_context_bits nic_vport_context;
4029};
4030
4031struct mlx5_ifc_query_nic_vport_context_in_bits {
4032 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004033 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004034
Matan Barakb4ff3a32016-02-09 14:57:42 +02004035 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004036 u8 op_mod[0x10];
4037
4038 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004039 u8 reserved_at_41[0xf];
Saeed Mahameede2816822015-05-28 22:28:40 +03004040 u8 vport_number[0x10];
4041
Matan Barakb4ff3a32016-02-09 14:57:42 +02004042 u8 reserved_at_60[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03004043 u8 allowed_list_type[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004044 u8 reserved_at_68[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004045};
4046
4047struct mlx5_ifc_query_mkey_out_bits {
4048 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004049 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004050
4051 u8 syndrome[0x20];
4052
Matan Barakb4ff3a32016-02-09 14:57:42 +02004053 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004054
4055 struct mlx5_ifc_mkc_bits memory_key_mkey_entry;
4056
Matan Barakb4ff3a32016-02-09 14:57:42 +02004057 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03004058
4059 u8 bsf0_klm0_pas_mtt0_1[16][0x8];
4060
4061 u8 bsf1_klm1_pas_mtt2_3[16][0x8];
4062};
4063
4064struct mlx5_ifc_query_mkey_in_bits {
4065 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004066 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004067
Matan Barakb4ff3a32016-02-09 14:57:42 +02004068 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004069 u8 op_mod[0x10];
4070
Matan Barakb4ff3a32016-02-09 14:57:42 +02004071 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004072 u8 mkey_index[0x18];
4073
4074 u8 pg_access[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004075 u8 reserved_at_61[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03004076};
4077
4078struct mlx5_ifc_query_mad_demux_out_bits {
4079 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004080 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004081
4082 u8 syndrome[0x20];
4083
Matan Barakb4ff3a32016-02-09 14:57:42 +02004084 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004085
4086 u8 mad_dumux_parameters_block[0x20];
4087};
4088
4089struct mlx5_ifc_query_mad_demux_in_bits {
4090 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004091 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004092
Matan Barakb4ff3a32016-02-09 14:57:42 +02004093 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004094 u8 op_mod[0x10];
4095
Matan Barakb4ff3a32016-02-09 14:57:42 +02004096 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004097};
4098
4099struct mlx5_ifc_query_l2_table_entry_out_bits {
4100 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004101 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004102
4103 u8 syndrome[0x20];
4104
Matan Barakb4ff3a32016-02-09 14:57:42 +02004105 u8 reserved_at_40[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004106
Matan Barakb4ff3a32016-02-09 14:57:42 +02004107 u8 reserved_at_e0[0x13];
Saeed Mahameede2816822015-05-28 22:28:40 +03004108 u8 vlan_valid[0x1];
4109 u8 vlan[0xc];
4110
4111 struct mlx5_ifc_mac_address_layout_bits mac_address;
4112
Matan Barakb4ff3a32016-02-09 14:57:42 +02004113 u8 reserved_at_140[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004114};
4115
4116struct mlx5_ifc_query_l2_table_entry_in_bits {
4117 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004118 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004119
Matan Barakb4ff3a32016-02-09 14:57:42 +02004120 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004121 u8 op_mod[0x10];
4122
Matan Barakb4ff3a32016-02-09 14:57:42 +02004123 u8 reserved_at_40[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03004124
Matan Barakb4ff3a32016-02-09 14:57:42 +02004125 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004126 u8 table_index[0x18];
4127
Matan Barakb4ff3a32016-02-09 14:57:42 +02004128 u8 reserved_at_c0[0x140];
Saeed Mahameede2816822015-05-28 22:28:40 +03004129};
4130
4131struct mlx5_ifc_query_issi_out_bits {
4132 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004133 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004134
4135 u8 syndrome[0x20];
4136
Matan Barakb4ff3a32016-02-09 14:57:42 +02004137 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004138 u8 current_issi[0x10];
4139
Matan Barakb4ff3a32016-02-09 14:57:42 +02004140 u8 reserved_at_60[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004141
Matan Barakb4ff3a32016-02-09 14:57:42 +02004142 u8 reserved_at_100[76][0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004143 u8 supported_issi_dw0[0x20];
4144};
4145
4146struct mlx5_ifc_query_issi_in_bits {
4147 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004148 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004149
Matan Barakb4ff3a32016-02-09 14:57:42 +02004150 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004151 u8 op_mod[0x10];
4152
Matan Barakb4ff3a32016-02-09 14:57:42 +02004153 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004154};
4155
Saeed Mahameed0dbc6fe2016-11-17 13:45:59 +02004156struct mlx5_ifc_set_driver_version_out_bits {
4157 u8 status[0x8];
4158 u8 reserved_0[0x18];
4159
4160 u8 syndrome[0x20];
4161 u8 reserved_1[0x40];
4162};
4163
4164struct mlx5_ifc_set_driver_version_in_bits {
4165 u8 opcode[0x10];
4166 u8 reserved_0[0x10];
4167
4168 u8 reserved_1[0x10];
4169 u8 op_mod[0x10];
4170
4171 u8 reserved_2[0x40];
4172 u8 driver_version[64][0x8];
4173};
4174
Saeed Mahameede2816822015-05-28 22:28:40 +03004175struct mlx5_ifc_query_hca_vport_pkey_out_bits {
4176 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004177 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004178
4179 u8 syndrome[0x20];
4180
Matan Barakb4ff3a32016-02-09 14:57:42 +02004181 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004182
4183 struct mlx5_ifc_pkey_bits pkey[0];
4184};
4185
4186struct mlx5_ifc_query_hca_vport_pkey_in_bits {
4187 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004188 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004189
Matan Barakb4ff3a32016-02-09 14:57:42 +02004190 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004191 u8 op_mod[0x10];
4192
4193 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004194 u8 reserved_at_41[0xb];
Majd Dibbiny707c4602015-06-04 19:30:41 +03004195 u8 port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03004196 u8 vport_number[0x10];
4197
Matan Barakb4ff3a32016-02-09 14:57:42 +02004198 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004199 u8 pkey_index[0x10];
4200};
4201
Eli Coheneff901d2016-03-11 22:58:42 +02004202enum {
4203 MLX5_HCA_VPORT_SEL_PORT_GUID = 1 << 0,
4204 MLX5_HCA_VPORT_SEL_NODE_GUID = 1 << 1,
4205 MLX5_HCA_VPORT_SEL_STATE_POLICY = 1 << 2,
4206};
4207
Saeed Mahameede2816822015-05-28 22:28:40 +03004208struct mlx5_ifc_query_hca_vport_gid_out_bits {
4209 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004210 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004211
4212 u8 syndrome[0x20];
4213
Matan Barakb4ff3a32016-02-09 14:57:42 +02004214 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004215
4216 u8 gids_num[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004217 u8 reserved_at_70[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004218
4219 struct mlx5_ifc_array128_auto_bits gid[0];
4220};
4221
4222struct mlx5_ifc_query_hca_vport_gid_in_bits {
4223 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004224 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004225
Matan Barakb4ff3a32016-02-09 14:57:42 +02004226 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004227 u8 op_mod[0x10];
4228
4229 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004230 u8 reserved_at_41[0xb];
Majd Dibbiny707c4602015-06-04 19:30:41 +03004231 u8 port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03004232 u8 vport_number[0x10];
4233
Matan Barakb4ff3a32016-02-09 14:57:42 +02004234 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004235 u8 gid_index[0x10];
4236};
4237
4238struct mlx5_ifc_query_hca_vport_context_out_bits {
4239 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004240 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004241
4242 u8 syndrome[0x20];
4243
Matan Barakb4ff3a32016-02-09 14:57:42 +02004244 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004245
4246 struct mlx5_ifc_hca_vport_context_bits hca_vport_context;
4247};
4248
4249struct mlx5_ifc_query_hca_vport_context_in_bits {
4250 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004251 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004252
Matan Barakb4ff3a32016-02-09 14:57:42 +02004253 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004254 u8 op_mod[0x10];
4255
4256 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004257 u8 reserved_at_41[0xb];
Majd Dibbiny707c4602015-06-04 19:30:41 +03004258 u8 port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03004259 u8 vport_number[0x10];
4260
Matan Barakb4ff3a32016-02-09 14:57:42 +02004261 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004262};
4263
4264struct mlx5_ifc_query_hca_cap_out_bits {
4265 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004266 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004267
4268 u8 syndrome[0x20];
4269
Matan Barakb4ff3a32016-02-09 14:57:42 +02004270 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004271
4272 union mlx5_ifc_hca_cap_union_bits capability;
Eli Cohenb7755162014-10-02 12:19:44 +03004273};
4274
4275struct mlx5_ifc_query_hca_cap_in_bits {
4276 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004277 u8 reserved_at_10[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03004278
Matan Barakb4ff3a32016-02-09 14:57:42 +02004279 u8 reserved_at_20[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03004280 u8 op_mod[0x10];
4281
Matan Barakb4ff3a32016-02-09 14:57:42 +02004282 u8 reserved_at_40[0x40];
Eli Cohenb7755162014-10-02 12:19:44 +03004283};
4284
Saeed Mahameede2816822015-05-28 22:28:40 +03004285struct mlx5_ifc_query_flow_table_out_bits {
Eli Cohenb7755162014-10-02 12:19:44 +03004286 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004287 u8 reserved_at_8[0x18];
Eli Cohenb7755162014-10-02 12:19:44 +03004288
4289 u8 syndrome[0x20];
4290
Matan Barakb4ff3a32016-02-09 14:57:42 +02004291 u8 reserved_at_40[0x80];
Eli Cohenb7755162014-10-02 12:19:44 +03004292
Matan Barakb4ff3a32016-02-09 14:57:42 +02004293 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004294 u8 level[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004295 u8 reserved_at_d0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004296 u8 log_size[0x8];
4297
Matan Barakb4ff3a32016-02-09 14:57:42 +02004298 u8 reserved_at_e0[0x120];
Eli Cohenb7755162014-10-02 12:19:44 +03004299};
4300
Saeed Mahameede2816822015-05-28 22:28:40 +03004301struct mlx5_ifc_query_flow_table_in_bits {
4302 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004303 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004304
Matan Barakb4ff3a32016-02-09 14:57:42 +02004305 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004306 u8 op_mod[0x10];
4307
Matan Barakb4ff3a32016-02-09 14:57:42 +02004308 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004309
4310 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004311 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004312
Matan Barakb4ff3a32016-02-09 14:57:42 +02004313 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004314 u8 table_id[0x18];
4315
Matan Barakb4ff3a32016-02-09 14:57:42 +02004316 u8 reserved_at_c0[0x140];
Saeed Mahameede2816822015-05-28 22:28:40 +03004317};
4318
4319struct mlx5_ifc_query_fte_out_bits {
4320 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004321 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004322
4323 u8 syndrome[0x20];
4324
Matan Barakb4ff3a32016-02-09 14:57:42 +02004325 u8 reserved_at_40[0x1c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004326
4327 struct mlx5_ifc_flow_context_bits flow_context;
4328};
4329
4330struct mlx5_ifc_query_fte_in_bits {
4331 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004332 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004333
Matan Barakb4ff3a32016-02-09 14:57:42 +02004334 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004335 u8 op_mod[0x10];
4336
Matan Barakb4ff3a32016-02-09 14:57:42 +02004337 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004338
4339 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004340 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004341
Matan Barakb4ff3a32016-02-09 14:57:42 +02004342 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004343 u8 table_id[0x18];
4344
Matan Barakb4ff3a32016-02-09 14:57:42 +02004345 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004346
4347 u8 flow_index[0x20];
4348
Matan Barakb4ff3a32016-02-09 14:57:42 +02004349 u8 reserved_at_120[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004350};
4351
4352enum {
4353 MLX5_QUERY_FLOW_GROUP_OUT_MATCH_CRITERIA_ENABLE_OUTER_HEADERS = 0x0,
4354 MLX5_QUERY_FLOW_GROUP_OUT_MATCH_CRITERIA_ENABLE_MISC_PARAMETERS = 0x1,
4355 MLX5_QUERY_FLOW_GROUP_OUT_MATCH_CRITERIA_ENABLE_INNER_HEADERS = 0x2,
4356};
4357
4358struct mlx5_ifc_query_flow_group_out_bits {
4359 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004360 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004361
4362 u8 syndrome[0x20];
4363
Matan Barakb4ff3a32016-02-09 14:57:42 +02004364 u8 reserved_at_40[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004365
4366 u8 start_flow_index[0x20];
4367
Matan Barakb4ff3a32016-02-09 14:57:42 +02004368 u8 reserved_at_100[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004369
4370 u8 end_flow_index[0x20];
4371
Matan Barakb4ff3a32016-02-09 14:57:42 +02004372 u8 reserved_at_140[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004373
Matan Barakb4ff3a32016-02-09 14:57:42 +02004374 u8 reserved_at_1e0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004375 u8 match_criteria_enable[0x8];
4376
4377 struct mlx5_ifc_fte_match_param_bits match_criteria;
4378
Matan Barakb4ff3a32016-02-09 14:57:42 +02004379 u8 reserved_at_1200[0xe00];
Saeed Mahameede2816822015-05-28 22:28:40 +03004380};
4381
4382struct mlx5_ifc_query_flow_group_in_bits {
4383 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004384 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004385
Matan Barakb4ff3a32016-02-09 14:57:42 +02004386 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004387 u8 op_mod[0x10];
4388
Matan Barakb4ff3a32016-02-09 14:57:42 +02004389 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004390
4391 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004392 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004393
Matan Barakb4ff3a32016-02-09 14:57:42 +02004394 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004395 u8 table_id[0x18];
4396
4397 u8 group_id[0x20];
4398
Matan Barakb4ff3a32016-02-09 14:57:42 +02004399 u8 reserved_at_e0[0x120];
Saeed Mahameede2816822015-05-28 22:28:40 +03004400};
4401
Amir Vadai9dc0b282016-05-13 12:55:39 +00004402struct mlx5_ifc_query_flow_counter_out_bits {
4403 u8 status[0x8];
4404 u8 reserved_at_8[0x18];
4405
4406 u8 syndrome[0x20];
4407
4408 u8 reserved_at_40[0x40];
4409
4410 struct mlx5_ifc_traffic_counter_bits flow_statistics[0];
4411};
4412
4413struct mlx5_ifc_query_flow_counter_in_bits {
4414 u8 opcode[0x10];
4415 u8 reserved_at_10[0x10];
4416
4417 u8 reserved_at_20[0x10];
4418 u8 op_mod[0x10];
4419
4420 u8 reserved_at_40[0x80];
4421
4422 u8 clear[0x1];
4423 u8 reserved_at_c1[0xf];
4424 u8 num_of_counters[0x10];
4425
Rabie Louloua8ffcc72017-07-09 13:39:30 +03004426 u8 flow_counter_id[0x20];
Amir Vadai9dc0b282016-05-13 12:55:39 +00004427};
4428
Saeed Mahameedd6666752015-12-01 18:03:22 +02004429struct mlx5_ifc_query_esw_vport_context_out_bits {
4430 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004431 u8 reserved_at_8[0x18];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004432
4433 u8 syndrome[0x20];
4434
Matan Barakb4ff3a32016-02-09 14:57:42 +02004435 u8 reserved_at_40[0x40];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004436
4437 struct mlx5_ifc_esw_vport_context_bits esw_vport_context;
4438};
4439
4440struct mlx5_ifc_query_esw_vport_context_in_bits {
4441 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004442 u8 reserved_at_10[0x10];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004443
Matan Barakb4ff3a32016-02-09 14:57:42 +02004444 u8 reserved_at_20[0x10];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004445 u8 op_mod[0x10];
4446
4447 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004448 u8 reserved_at_41[0xf];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004449 u8 vport_number[0x10];
4450
Matan Barakb4ff3a32016-02-09 14:57:42 +02004451 u8 reserved_at_60[0x20];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004452};
4453
4454struct mlx5_ifc_modify_esw_vport_context_out_bits {
4455 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004456 u8 reserved_at_8[0x18];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004457
4458 u8 syndrome[0x20];
4459
Matan Barakb4ff3a32016-02-09 14:57:42 +02004460 u8 reserved_at_40[0x40];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004461};
4462
4463struct mlx5_ifc_esw_vport_context_fields_select_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02004464 u8 reserved_at_0[0x1c];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004465 u8 vport_cvlan_insert[0x1];
4466 u8 vport_svlan_insert[0x1];
4467 u8 vport_cvlan_strip[0x1];
4468 u8 vport_svlan_strip[0x1];
4469};
4470
4471struct mlx5_ifc_modify_esw_vport_context_in_bits {
4472 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004473 u8 reserved_at_10[0x10];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004474
Matan Barakb4ff3a32016-02-09 14:57:42 +02004475 u8 reserved_at_20[0x10];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004476 u8 op_mod[0x10];
4477
4478 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004479 u8 reserved_at_41[0xf];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004480 u8 vport_number[0x10];
4481
4482 struct mlx5_ifc_esw_vport_context_fields_select_bits field_select;
4483
4484 struct mlx5_ifc_esw_vport_context_bits esw_vport_context;
4485};
4486
Saeed Mahameede2816822015-05-28 22:28:40 +03004487struct mlx5_ifc_query_eq_out_bits {
Eli Cohenb7755162014-10-02 12:19:44 +03004488 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004489 u8 reserved_at_8[0x18];
Eli Cohenb7755162014-10-02 12:19:44 +03004490
4491 u8 syndrome[0x20];
4492
Matan Barakb4ff3a32016-02-09 14:57:42 +02004493 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004494
4495 struct mlx5_ifc_eqc_bits eq_context_entry;
4496
Matan Barakb4ff3a32016-02-09 14:57:42 +02004497 u8 reserved_at_280[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004498
4499 u8 event_bitmask[0x40];
4500
Matan Barakb4ff3a32016-02-09 14:57:42 +02004501 u8 reserved_at_300[0x580];
Saeed Mahameede2816822015-05-28 22:28:40 +03004502
4503 u8 pas[0][0x40];
4504};
4505
4506struct mlx5_ifc_query_eq_in_bits {
4507 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004508 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004509
Matan Barakb4ff3a32016-02-09 14:57:42 +02004510 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004511 u8 op_mod[0x10];
4512
Matan Barakb4ff3a32016-02-09 14:57:42 +02004513 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004514 u8 eq_number[0x8];
4515
Matan Barakb4ff3a32016-02-09 14:57:42 +02004516 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004517};
4518
Hadar Hen Zion7adbde22016-08-03 15:08:33 +03004519struct mlx5_ifc_encap_header_in_bits {
4520 u8 reserved_at_0[0x5];
4521 u8 header_type[0x3];
4522 u8 reserved_at_8[0xe];
4523 u8 encap_header_size[0xa];
4524
4525 u8 reserved_at_20[0x10];
4526 u8 encap_header[2][0x8];
4527
4528 u8 more_encap_header[0][0x8];
4529};
4530
4531struct mlx5_ifc_query_encap_header_out_bits {
4532 u8 status[0x8];
4533 u8 reserved_at_8[0x18];
4534
4535 u8 syndrome[0x20];
4536
4537 u8 reserved_at_40[0xa0];
4538
4539 struct mlx5_ifc_encap_header_in_bits encap_header[0];
4540};
4541
4542struct mlx5_ifc_query_encap_header_in_bits {
4543 u8 opcode[0x10];
4544 u8 reserved_at_10[0x10];
4545
4546 u8 reserved_at_20[0x10];
4547 u8 op_mod[0x10];
4548
4549 u8 encap_id[0x20];
4550
4551 u8 reserved_at_60[0xa0];
4552};
4553
4554struct mlx5_ifc_alloc_encap_header_out_bits {
4555 u8 status[0x8];
4556 u8 reserved_at_8[0x18];
4557
4558 u8 syndrome[0x20];
4559
4560 u8 encap_id[0x20];
4561
4562 u8 reserved_at_60[0x20];
4563};
4564
4565struct mlx5_ifc_alloc_encap_header_in_bits {
4566 u8 opcode[0x10];
4567 u8 reserved_at_10[0x10];
4568
4569 u8 reserved_at_20[0x10];
4570 u8 op_mod[0x10];
4571
4572 u8 reserved_at_40[0xa0];
4573
4574 struct mlx5_ifc_encap_header_in_bits encap_header;
4575};
4576
4577struct mlx5_ifc_dealloc_encap_header_out_bits {
4578 u8 status[0x8];
4579 u8 reserved_at_8[0x18];
4580
4581 u8 syndrome[0x20];
4582
4583 u8 reserved_at_40[0x40];
4584};
4585
4586struct mlx5_ifc_dealloc_encap_header_in_bits {
4587 u8 opcode[0x10];
4588 u8 reserved_at_10[0x10];
4589
4590 u8 reserved_20[0x10];
4591 u8 op_mod[0x10];
4592
4593 u8 encap_id[0x20];
4594
4595 u8 reserved_60[0x20];
4596};
4597
Or Gerlitz2a69cb92017-01-19 19:31:25 +02004598struct mlx5_ifc_set_action_in_bits {
4599 u8 action_type[0x4];
4600 u8 field[0xc];
4601 u8 reserved_at_10[0x3];
4602 u8 offset[0x5];
4603 u8 reserved_at_18[0x3];
4604 u8 length[0x5];
4605
4606 u8 data[0x20];
4607};
4608
4609struct mlx5_ifc_add_action_in_bits {
4610 u8 action_type[0x4];
4611 u8 field[0xc];
4612 u8 reserved_at_10[0x10];
4613
4614 u8 data[0x20];
4615};
4616
4617union mlx5_ifc_set_action_in_add_action_in_auto_bits {
4618 struct mlx5_ifc_set_action_in_bits set_action_in;
4619 struct mlx5_ifc_add_action_in_bits add_action_in;
4620 u8 reserved_at_0[0x40];
4621};
4622
4623enum {
4624 MLX5_ACTION_TYPE_SET = 0x1,
4625 MLX5_ACTION_TYPE_ADD = 0x2,
4626};
4627
4628enum {
4629 MLX5_ACTION_IN_FIELD_OUT_SMAC_47_16 = 0x1,
4630 MLX5_ACTION_IN_FIELD_OUT_SMAC_15_0 = 0x2,
4631 MLX5_ACTION_IN_FIELD_OUT_ETHERTYPE = 0x3,
4632 MLX5_ACTION_IN_FIELD_OUT_DMAC_47_16 = 0x4,
4633 MLX5_ACTION_IN_FIELD_OUT_DMAC_15_0 = 0x5,
4634 MLX5_ACTION_IN_FIELD_OUT_IP_DSCP = 0x6,
4635 MLX5_ACTION_IN_FIELD_OUT_TCP_FLAGS = 0x7,
4636 MLX5_ACTION_IN_FIELD_OUT_TCP_SPORT = 0x8,
4637 MLX5_ACTION_IN_FIELD_OUT_TCP_DPORT = 0x9,
4638 MLX5_ACTION_IN_FIELD_OUT_IP_TTL = 0xa,
4639 MLX5_ACTION_IN_FIELD_OUT_UDP_SPORT = 0xb,
4640 MLX5_ACTION_IN_FIELD_OUT_UDP_DPORT = 0xc,
4641 MLX5_ACTION_IN_FIELD_OUT_SIPV6_127_96 = 0xd,
4642 MLX5_ACTION_IN_FIELD_OUT_SIPV6_95_64 = 0xe,
4643 MLX5_ACTION_IN_FIELD_OUT_SIPV6_63_32 = 0xf,
4644 MLX5_ACTION_IN_FIELD_OUT_SIPV6_31_0 = 0x10,
4645 MLX5_ACTION_IN_FIELD_OUT_DIPV6_127_96 = 0x11,
4646 MLX5_ACTION_IN_FIELD_OUT_DIPV6_95_64 = 0x12,
4647 MLX5_ACTION_IN_FIELD_OUT_DIPV6_63_32 = 0x13,
4648 MLX5_ACTION_IN_FIELD_OUT_DIPV6_31_0 = 0x14,
4649 MLX5_ACTION_IN_FIELD_OUT_SIPV4 = 0x15,
4650 MLX5_ACTION_IN_FIELD_OUT_DIPV4 = 0x16,
Or Gerlitz0c0316f2017-06-13 11:09:57 +03004651 MLX5_ACTION_IN_FIELD_OUT_IPV6_HOPLIMIT = 0x47,
Or Gerlitz2a69cb92017-01-19 19:31:25 +02004652};
4653
4654struct mlx5_ifc_alloc_modify_header_context_out_bits {
4655 u8 status[0x8];
4656 u8 reserved_at_8[0x18];
4657
4658 u8 syndrome[0x20];
4659
4660 u8 modify_header_id[0x20];
4661
4662 u8 reserved_at_60[0x20];
4663};
4664
4665struct mlx5_ifc_alloc_modify_header_context_in_bits {
4666 u8 opcode[0x10];
4667 u8 reserved_at_10[0x10];
4668
4669 u8 reserved_at_20[0x10];
4670 u8 op_mod[0x10];
4671
4672 u8 reserved_at_40[0x20];
4673
4674 u8 table_type[0x8];
4675 u8 reserved_at_68[0x10];
4676 u8 num_of_actions[0x8];
4677
4678 union mlx5_ifc_set_action_in_add_action_in_auto_bits actions[0];
4679};
4680
4681struct mlx5_ifc_dealloc_modify_header_context_out_bits {
4682 u8 status[0x8];
4683 u8 reserved_at_8[0x18];
4684
4685 u8 syndrome[0x20];
4686
4687 u8 reserved_at_40[0x40];
4688};
4689
4690struct mlx5_ifc_dealloc_modify_header_context_in_bits {
4691 u8 opcode[0x10];
4692 u8 reserved_at_10[0x10];
4693
4694 u8 reserved_at_20[0x10];
4695 u8 op_mod[0x10];
4696
4697 u8 modify_header_id[0x20];
4698
4699 u8 reserved_at_60[0x20];
4700};
4701
Saeed Mahameede2816822015-05-28 22:28:40 +03004702struct mlx5_ifc_query_dct_out_bits {
4703 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004704 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004705
4706 u8 syndrome[0x20];
4707
Matan Barakb4ff3a32016-02-09 14:57:42 +02004708 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004709
4710 struct mlx5_ifc_dctc_bits dct_context_entry;
4711
Matan Barakb4ff3a32016-02-09 14:57:42 +02004712 u8 reserved_at_280[0x180];
Saeed Mahameede2816822015-05-28 22:28:40 +03004713};
4714
4715struct mlx5_ifc_query_dct_in_bits {
4716 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004717 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004718
Matan Barakb4ff3a32016-02-09 14:57:42 +02004719 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004720 u8 op_mod[0x10];
4721
Matan Barakb4ff3a32016-02-09 14:57:42 +02004722 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004723 u8 dctn[0x18];
4724
Matan Barakb4ff3a32016-02-09 14:57:42 +02004725 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004726};
4727
4728struct mlx5_ifc_query_cq_out_bits {
4729 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004730 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004731
4732 u8 syndrome[0x20];
4733
Matan Barakb4ff3a32016-02-09 14:57:42 +02004734 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004735
4736 struct mlx5_ifc_cqc_bits cq_context;
4737
Matan Barakb4ff3a32016-02-09 14:57:42 +02004738 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03004739
4740 u8 pas[0][0x40];
4741};
4742
4743struct mlx5_ifc_query_cq_in_bits {
4744 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004745 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004746
Matan Barakb4ff3a32016-02-09 14:57:42 +02004747 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004748 u8 op_mod[0x10];
4749
Matan Barakb4ff3a32016-02-09 14:57:42 +02004750 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004751 u8 cqn[0x18];
4752
Matan Barakb4ff3a32016-02-09 14:57:42 +02004753 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004754};
4755
4756struct mlx5_ifc_query_cong_status_out_bits {
4757 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004758 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004759
4760 u8 syndrome[0x20];
4761
Matan Barakb4ff3a32016-02-09 14:57:42 +02004762 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004763
4764 u8 enable[0x1];
4765 u8 tag_enable[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004766 u8 reserved_at_62[0x1e];
Saeed Mahameede2816822015-05-28 22:28:40 +03004767};
4768
4769struct mlx5_ifc_query_cong_status_in_bits {
4770 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004771 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004772
Matan Barakb4ff3a32016-02-09 14:57:42 +02004773 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004774 u8 op_mod[0x10];
4775
Matan Barakb4ff3a32016-02-09 14:57:42 +02004776 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004777 u8 priority[0x4];
4778 u8 cong_protocol[0x4];
4779
Matan Barakb4ff3a32016-02-09 14:57:42 +02004780 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004781};
4782
4783struct mlx5_ifc_query_cong_statistics_out_bits {
4784 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004785 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004786
4787 u8 syndrome[0x20];
4788
Matan Barakb4ff3a32016-02-09 14:57:42 +02004789 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004790
Parav Pandite1f24a72017-04-16 07:29:29 +03004791 u8 rp_cur_flows[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004792
4793 u8 sum_flows[0x20];
4794
Parav Pandite1f24a72017-04-16 07:29:29 +03004795 u8 rp_cnp_ignored_high[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004796
Parav Pandite1f24a72017-04-16 07:29:29 +03004797 u8 rp_cnp_ignored_low[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004798
Parav Pandite1f24a72017-04-16 07:29:29 +03004799 u8 rp_cnp_handled_high[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004800
Parav Pandite1f24a72017-04-16 07:29:29 +03004801 u8 rp_cnp_handled_low[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004802
Matan Barakb4ff3a32016-02-09 14:57:42 +02004803 u8 reserved_at_140[0x100];
Saeed Mahameede2816822015-05-28 22:28:40 +03004804
4805 u8 time_stamp_high[0x20];
4806
4807 u8 time_stamp_low[0x20];
4808
4809 u8 accumulators_period[0x20];
4810
Parav Pandite1f24a72017-04-16 07:29:29 +03004811 u8 np_ecn_marked_roce_packets_high[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004812
Parav Pandite1f24a72017-04-16 07:29:29 +03004813 u8 np_ecn_marked_roce_packets_low[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004814
Parav Pandite1f24a72017-04-16 07:29:29 +03004815 u8 np_cnp_sent_high[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004816
Parav Pandite1f24a72017-04-16 07:29:29 +03004817 u8 np_cnp_sent_low[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004818
Matan Barakb4ff3a32016-02-09 14:57:42 +02004819 u8 reserved_at_320[0x560];
Saeed Mahameede2816822015-05-28 22:28:40 +03004820};
4821
4822struct mlx5_ifc_query_cong_statistics_in_bits {
4823 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004824 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004825
Matan Barakb4ff3a32016-02-09 14:57:42 +02004826 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004827 u8 op_mod[0x10];
4828
4829 u8 clear[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004830 u8 reserved_at_41[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03004831
Matan Barakb4ff3a32016-02-09 14:57:42 +02004832 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004833};
4834
4835struct mlx5_ifc_query_cong_params_out_bits {
4836 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004837 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004838
4839 u8 syndrome[0x20];
4840
Matan Barakb4ff3a32016-02-09 14:57:42 +02004841 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004842
4843 union mlx5_ifc_cong_control_roce_ecn_auto_bits congestion_parameters;
4844};
4845
4846struct mlx5_ifc_query_cong_params_in_bits {
4847 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004848 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004849
Matan Barakb4ff3a32016-02-09 14:57:42 +02004850 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004851 u8 op_mod[0x10];
4852
Matan Barakb4ff3a32016-02-09 14:57:42 +02004853 u8 reserved_at_40[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03004854 u8 cong_protocol[0x4];
4855
Matan Barakb4ff3a32016-02-09 14:57:42 +02004856 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004857};
4858
4859struct mlx5_ifc_query_adapter_out_bits {
4860 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004861 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004862
4863 u8 syndrome[0x20];
4864
Matan Barakb4ff3a32016-02-09 14:57:42 +02004865 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004866
4867 struct mlx5_ifc_query_adapter_param_block_bits query_adapter_struct;
4868};
4869
4870struct mlx5_ifc_query_adapter_in_bits {
4871 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004872 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004873
Matan Barakb4ff3a32016-02-09 14:57:42 +02004874 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004875 u8 op_mod[0x10];
4876
Matan Barakb4ff3a32016-02-09 14:57:42 +02004877 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004878};
4879
4880struct mlx5_ifc_qp_2rst_out_bits {
4881 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004882 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004883
4884 u8 syndrome[0x20];
4885
Matan Barakb4ff3a32016-02-09 14:57:42 +02004886 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004887};
4888
4889struct mlx5_ifc_qp_2rst_in_bits {
4890 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004891 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004892
Matan Barakb4ff3a32016-02-09 14:57:42 +02004893 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004894 u8 op_mod[0x10];
4895
Matan Barakb4ff3a32016-02-09 14:57:42 +02004896 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004897 u8 qpn[0x18];
4898
Matan Barakb4ff3a32016-02-09 14:57:42 +02004899 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004900};
4901
4902struct mlx5_ifc_qp_2err_out_bits {
4903 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004904 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004905
4906 u8 syndrome[0x20];
4907
Matan Barakb4ff3a32016-02-09 14:57:42 +02004908 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004909};
4910
4911struct mlx5_ifc_qp_2err_in_bits {
4912 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004913 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004914
Matan Barakb4ff3a32016-02-09 14:57:42 +02004915 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004916 u8 op_mod[0x10];
4917
Matan Barakb4ff3a32016-02-09 14:57:42 +02004918 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004919 u8 qpn[0x18];
4920
Matan Barakb4ff3a32016-02-09 14:57:42 +02004921 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004922};
4923
4924struct mlx5_ifc_page_fault_resume_out_bits {
4925 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004926 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004927
4928 u8 syndrome[0x20];
4929
Matan Barakb4ff3a32016-02-09 14:57:42 +02004930 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004931};
4932
4933struct mlx5_ifc_page_fault_resume_in_bits {
4934 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004935 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004936
Matan Barakb4ff3a32016-02-09 14:57:42 +02004937 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004938 u8 op_mod[0x10];
4939
4940 u8 error[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004941 u8 reserved_at_41[0x4];
Artemy Kovalyov223cdc72017-01-02 11:37:45 +02004942 u8 page_fault_type[0x3];
4943 u8 wq_number[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004944
Artemy Kovalyov223cdc72017-01-02 11:37:45 +02004945 u8 reserved_at_60[0x8];
4946 u8 token[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004947};
4948
4949struct mlx5_ifc_nop_out_bits {
4950 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004951 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004952
4953 u8 syndrome[0x20];
4954
Matan Barakb4ff3a32016-02-09 14:57:42 +02004955 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004956};
4957
4958struct mlx5_ifc_nop_in_bits {
4959 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004960 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004961
Matan Barakb4ff3a32016-02-09 14:57:42 +02004962 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004963 u8 op_mod[0x10];
4964
Matan Barakb4ff3a32016-02-09 14:57:42 +02004965 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004966};
4967
4968struct mlx5_ifc_modify_vport_state_out_bits {
4969 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004970 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004971
4972 u8 syndrome[0x20];
4973
Matan Barakb4ff3a32016-02-09 14:57:42 +02004974 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004975};
4976
4977struct mlx5_ifc_modify_vport_state_in_bits {
4978 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004979 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004980
Matan Barakb4ff3a32016-02-09 14:57:42 +02004981 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004982 u8 op_mod[0x10];
4983
4984 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004985 u8 reserved_at_41[0xf];
Saeed Mahameede2816822015-05-28 22:28:40 +03004986 u8 vport_number[0x10];
4987
Matan Barakb4ff3a32016-02-09 14:57:42 +02004988 u8 reserved_at_60[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004989 u8 admin_state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004990 u8 reserved_at_7c[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03004991};
4992
4993struct mlx5_ifc_modify_tis_out_bits {
4994 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004995 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004996
4997 u8 syndrome[0x20];
4998
Matan Barakb4ff3a32016-02-09 14:57:42 +02004999 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005000};
5001
majd@mellanox.com75850d02016-01-14 19:13:06 +02005002struct mlx5_ifc_modify_tis_bitmask_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02005003 u8 reserved_at_0[0x20];
majd@mellanox.com75850d02016-01-14 19:13:06 +02005004
Aviv Heller84df61e2016-05-10 13:47:50 +03005005 u8 reserved_at_20[0x1d];
5006 u8 lag_tx_port_affinity[0x1];
5007 u8 strict_lag_tx_port_affinity[0x1];
majd@mellanox.com75850d02016-01-14 19:13:06 +02005008 u8 prio[0x1];
5009};
5010
Saeed Mahameede2816822015-05-28 22:28:40 +03005011struct mlx5_ifc_modify_tis_in_bits {
5012 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005013 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005014
Matan Barakb4ff3a32016-02-09 14:57:42 +02005015 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005016 u8 op_mod[0x10];
5017
Matan Barakb4ff3a32016-02-09 14:57:42 +02005018 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005019 u8 tisn[0x18];
5020
Matan Barakb4ff3a32016-02-09 14:57:42 +02005021 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005022
majd@mellanox.com75850d02016-01-14 19:13:06 +02005023 struct mlx5_ifc_modify_tis_bitmask_bits bitmask;
Saeed Mahameede2816822015-05-28 22:28:40 +03005024
Matan Barakb4ff3a32016-02-09 14:57:42 +02005025 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005026
5027 struct mlx5_ifc_tisc_bits ctx;
5028};
5029
Achiad Shochatd9eea402015-08-04 14:05:42 +03005030struct mlx5_ifc_modify_tir_bitmask_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02005031 u8 reserved_at_0[0x20];
Achiad Shochatd9eea402015-08-04 14:05:42 +03005032
Matan Barakb4ff3a32016-02-09 14:57:42 +02005033 u8 reserved_at_20[0x1b];
Tariq Toukan66189962015-11-12 19:35:26 +02005034 u8 self_lb_en[0x1];
Tariq Toukanbdfc0282016-02-29 21:17:12 +02005035 u8 reserved_at_3c[0x1];
5036 u8 hash[0x1];
5037 u8 reserved_at_3e[0x1];
Achiad Shochatd9eea402015-08-04 14:05:42 +03005038 u8 lro[0x1];
5039};
5040
Saeed Mahameede2816822015-05-28 22:28:40 +03005041struct mlx5_ifc_modify_tir_out_bits {
5042 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005043 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005044
5045 u8 syndrome[0x20];
5046
Matan Barakb4ff3a32016-02-09 14:57:42 +02005047 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005048};
5049
5050struct mlx5_ifc_modify_tir_in_bits {
5051 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005052 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005053
Matan Barakb4ff3a32016-02-09 14:57:42 +02005054 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005055 u8 op_mod[0x10];
5056
Matan Barakb4ff3a32016-02-09 14:57:42 +02005057 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005058 u8 tirn[0x18];
5059
Matan Barakb4ff3a32016-02-09 14:57:42 +02005060 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005061
Achiad Shochatd9eea402015-08-04 14:05:42 +03005062 struct mlx5_ifc_modify_tir_bitmask_bits bitmask;
Saeed Mahameede2816822015-05-28 22:28:40 +03005063
Matan Barakb4ff3a32016-02-09 14:57:42 +02005064 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005065
5066 struct mlx5_ifc_tirc_bits ctx;
5067};
5068
5069struct mlx5_ifc_modify_sq_out_bits {
5070 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005071 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005072
5073 u8 syndrome[0x20];
5074
Matan Barakb4ff3a32016-02-09 14:57:42 +02005075 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005076};
5077
5078struct mlx5_ifc_modify_sq_in_bits {
5079 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005080 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005081
Matan Barakb4ff3a32016-02-09 14:57:42 +02005082 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005083 u8 op_mod[0x10];
5084
5085 u8 sq_state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005086 u8 reserved_at_44[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03005087 u8 sqn[0x18];
5088
Matan Barakb4ff3a32016-02-09 14:57:42 +02005089 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005090
5091 u8 modify_bitmask[0x40];
5092
Matan Barakb4ff3a32016-02-09 14:57:42 +02005093 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005094
5095 struct mlx5_ifc_sqc_bits ctx;
5096};
5097
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03005098struct mlx5_ifc_modify_scheduling_element_out_bits {
5099 u8 status[0x8];
5100 u8 reserved_at_8[0x18];
5101
5102 u8 syndrome[0x20];
5103
5104 u8 reserved_at_40[0x1c0];
5105};
5106
5107enum {
5108 MODIFY_SCHEDULING_ELEMENT_IN_MODIFY_BITMASK_BW_SHARE = 0x1,
5109 MODIFY_SCHEDULING_ELEMENT_IN_MODIFY_BITMASK_MAX_AVERAGE_BW = 0x2,
5110};
5111
5112struct mlx5_ifc_modify_scheduling_element_in_bits {
5113 u8 opcode[0x10];
5114 u8 reserved_at_10[0x10];
5115
5116 u8 reserved_at_20[0x10];
5117 u8 op_mod[0x10];
5118
5119 u8 scheduling_hierarchy[0x8];
5120 u8 reserved_at_48[0x18];
5121
5122 u8 scheduling_element_id[0x20];
5123
5124 u8 reserved_at_80[0x20];
5125
5126 u8 modify_bitmask[0x20];
5127
5128 u8 reserved_at_c0[0x40];
5129
5130 struct mlx5_ifc_scheduling_context_bits scheduling_context;
5131
5132 u8 reserved_at_300[0x100];
5133};
5134
Saeed Mahameede2816822015-05-28 22:28:40 +03005135struct mlx5_ifc_modify_rqt_out_bits {
5136 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005137 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005138
5139 u8 syndrome[0x20];
5140
Matan Barakb4ff3a32016-02-09 14:57:42 +02005141 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005142};
5143
Achiad Shochat5c503682015-08-04 14:05:43 +03005144struct mlx5_ifc_rqt_bitmask_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02005145 u8 reserved_at_0[0x20];
Achiad Shochat5c503682015-08-04 14:05:43 +03005146
Matan Barakb4ff3a32016-02-09 14:57:42 +02005147 u8 reserved_at_20[0x1f];
Achiad Shochat5c503682015-08-04 14:05:43 +03005148 u8 rqn_list[0x1];
5149};
5150
Saeed Mahameede2816822015-05-28 22:28:40 +03005151struct mlx5_ifc_modify_rqt_in_bits {
5152 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005153 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005154
Matan Barakb4ff3a32016-02-09 14:57:42 +02005155 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005156 u8 op_mod[0x10];
5157
Matan Barakb4ff3a32016-02-09 14:57:42 +02005158 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005159 u8 rqtn[0x18];
5160
Matan Barakb4ff3a32016-02-09 14:57:42 +02005161 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005162
Achiad Shochat5c503682015-08-04 14:05:43 +03005163 struct mlx5_ifc_rqt_bitmask_bits bitmask;
Saeed Mahameede2816822015-05-28 22:28:40 +03005164
Matan Barakb4ff3a32016-02-09 14:57:42 +02005165 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005166
5167 struct mlx5_ifc_rqtc_bits ctx;
5168};
5169
5170struct mlx5_ifc_modify_rq_out_bits {
5171 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005172 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005173
5174 u8 syndrome[0x20];
5175
Matan Barakb4ff3a32016-02-09 14:57:42 +02005176 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005177};
5178
Alex Vesker83b502a2016-08-04 17:32:02 +03005179enum {
5180 MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_VSD = 1ULL << 1,
Guy Ergas102722f2017-02-20 16:18:17 +02005181 MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_SCATTER_FCS = 1ULL << 2,
Majd Dibbiny23a69642017-01-18 15:25:10 +02005182 MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_RQ_COUNTER_SET_ID = 1ULL << 3,
Alex Vesker83b502a2016-08-04 17:32:02 +03005183};
5184
Saeed Mahameede2816822015-05-28 22:28:40 +03005185struct mlx5_ifc_modify_rq_in_bits {
5186 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005187 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005188
Matan Barakb4ff3a32016-02-09 14:57:42 +02005189 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005190 u8 op_mod[0x10];
5191
5192 u8 rq_state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005193 u8 reserved_at_44[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03005194 u8 rqn[0x18];
5195
Matan Barakb4ff3a32016-02-09 14:57:42 +02005196 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005197
5198 u8 modify_bitmask[0x40];
5199
Matan Barakb4ff3a32016-02-09 14:57:42 +02005200 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005201
5202 struct mlx5_ifc_rqc_bits ctx;
5203};
5204
5205struct mlx5_ifc_modify_rmp_out_bits {
5206 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005207 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005208
5209 u8 syndrome[0x20];
5210
Matan Barakb4ff3a32016-02-09 14:57:42 +02005211 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005212};
5213
Haggai Abramonvsky01949d02015-06-04 19:30:38 +03005214struct mlx5_ifc_rmp_bitmask_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02005215 u8 reserved_at_0[0x20];
Haggai Abramonvsky01949d02015-06-04 19:30:38 +03005216
Matan Barakb4ff3a32016-02-09 14:57:42 +02005217 u8 reserved_at_20[0x1f];
Haggai Abramonvsky01949d02015-06-04 19:30:38 +03005218 u8 lwm[0x1];
5219};
5220
Saeed Mahameede2816822015-05-28 22:28:40 +03005221struct mlx5_ifc_modify_rmp_in_bits {
5222 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005223 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005224
Matan Barakb4ff3a32016-02-09 14:57:42 +02005225 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005226 u8 op_mod[0x10];
5227
5228 u8 rmp_state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005229 u8 reserved_at_44[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03005230 u8 rmpn[0x18];
5231
Matan Barakb4ff3a32016-02-09 14:57:42 +02005232 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005233
Haggai Abramonvsky01949d02015-06-04 19:30:38 +03005234 struct mlx5_ifc_rmp_bitmask_bits bitmask;
Saeed Mahameede2816822015-05-28 22:28:40 +03005235
Matan Barakb4ff3a32016-02-09 14:57:42 +02005236 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005237
5238 struct mlx5_ifc_rmpc_bits ctx;
5239};
5240
5241struct mlx5_ifc_modify_nic_vport_context_out_bits {
5242 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005243 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005244
5245 u8 syndrome[0x20];
5246
Matan Barakb4ff3a32016-02-09 14:57:42 +02005247 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005248};
5249
5250struct mlx5_ifc_modify_nic_vport_field_select_bits {
Noa Osherovich23898c72016-06-10 00:07:37 +03005251 u8 reserved_at_0[0x16];
5252 u8 node_guid[0x1];
5253 u8 port_guid[0x1];
Hadar Hen Zion9def7122016-08-03 17:27:30 +03005254 u8 min_inline[0x1];
Saeed Mahameedd82b7312015-12-01 18:03:14 +02005255 u8 mtu[0x1];
5256 u8 change_event[0x1];
5257 u8 promisc[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03005258 u8 permanent_address[0x1];
5259 u8 addresses_list[0x1];
5260 u8 roce_en[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005261 u8 reserved_at_1f[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03005262};
5263
5264struct mlx5_ifc_modify_nic_vport_context_in_bits {
5265 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005266 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005267
Matan Barakb4ff3a32016-02-09 14:57:42 +02005268 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005269 u8 op_mod[0x10];
5270
5271 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005272 u8 reserved_at_41[0xf];
Saeed Mahameede2816822015-05-28 22:28:40 +03005273 u8 vport_number[0x10];
5274
5275 struct mlx5_ifc_modify_nic_vport_field_select_bits field_select;
5276
Matan Barakb4ff3a32016-02-09 14:57:42 +02005277 u8 reserved_at_80[0x780];
Saeed Mahameede2816822015-05-28 22:28:40 +03005278
5279 struct mlx5_ifc_nic_vport_context_bits nic_vport_context;
5280};
5281
5282struct mlx5_ifc_modify_hca_vport_context_out_bits {
5283 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005284 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005285
5286 u8 syndrome[0x20];
5287
Matan Barakb4ff3a32016-02-09 14:57:42 +02005288 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005289};
5290
5291struct mlx5_ifc_modify_hca_vport_context_in_bits {
5292 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005293 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005294
Matan Barakb4ff3a32016-02-09 14:57:42 +02005295 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005296 u8 op_mod[0x10];
5297
5298 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005299 u8 reserved_at_41[0xb];
Majd Dibbiny707c4602015-06-04 19:30:41 +03005300 u8 port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03005301 u8 vport_number[0x10];
5302
Matan Barakb4ff3a32016-02-09 14:57:42 +02005303 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005304
5305 struct mlx5_ifc_hca_vport_context_bits hca_vport_context;
5306};
5307
5308struct mlx5_ifc_modify_cq_out_bits {
5309 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005310 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005311
5312 u8 syndrome[0x20];
5313
Matan Barakb4ff3a32016-02-09 14:57:42 +02005314 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005315};
5316
5317enum {
5318 MLX5_MODIFY_CQ_IN_OP_MOD_MODIFY_CQ = 0x0,
5319 MLX5_MODIFY_CQ_IN_OP_MOD_RESIZE_CQ = 0x1,
5320};
5321
5322struct mlx5_ifc_modify_cq_in_bits {
5323 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005324 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005325
Matan Barakb4ff3a32016-02-09 14:57:42 +02005326 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005327 u8 op_mod[0x10];
5328
Matan Barakb4ff3a32016-02-09 14:57:42 +02005329 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005330 u8 cqn[0x18];
5331
5332 union mlx5_ifc_modify_field_select_resize_field_select_auto_bits modify_field_select_resize_field_select;
5333
5334 struct mlx5_ifc_cqc_bits cq_context;
5335
Matan Barakb4ff3a32016-02-09 14:57:42 +02005336 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03005337
5338 u8 pas[0][0x40];
5339};
5340
5341struct mlx5_ifc_modify_cong_status_out_bits {
5342 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005343 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005344
5345 u8 syndrome[0x20];
5346
Matan Barakb4ff3a32016-02-09 14:57:42 +02005347 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005348};
5349
5350struct mlx5_ifc_modify_cong_status_in_bits {
5351 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005352 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005353
Matan Barakb4ff3a32016-02-09 14:57:42 +02005354 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005355 u8 op_mod[0x10];
5356
Matan Barakb4ff3a32016-02-09 14:57:42 +02005357 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005358 u8 priority[0x4];
5359 u8 cong_protocol[0x4];
5360
5361 u8 enable[0x1];
5362 u8 tag_enable[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005363 u8 reserved_at_62[0x1e];
Saeed Mahameede2816822015-05-28 22:28:40 +03005364};
5365
5366struct mlx5_ifc_modify_cong_params_out_bits {
5367 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005368 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005369
5370 u8 syndrome[0x20];
5371
Matan Barakb4ff3a32016-02-09 14:57:42 +02005372 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005373};
5374
5375struct mlx5_ifc_modify_cong_params_in_bits {
5376 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005377 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005378
Matan Barakb4ff3a32016-02-09 14:57:42 +02005379 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005380 u8 op_mod[0x10];
5381
Matan Barakb4ff3a32016-02-09 14:57:42 +02005382 u8 reserved_at_40[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03005383 u8 cong_protocol[0x4];
5384
5385 union mlx5_ifc_field_select_802_1_r_roce_auto_bits field_select;
5386
Matan Barakb4ff3a32016-02-09 14:57:42 +02005387 u8 reserved_at_80[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03005388
5389 union mlx5_ifc_cong_control_roce_ecn_auto_bits congestion_parameters;
5390};
5391
5392struct mlx5_ifc_manage_pages_out_bits {
5393 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005394 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005395
5396 u8 syndrome[0x20];
5397
5398 u8 output_num_entries[0x20];
5399
Matan Barakb4ff3a32016-02-09 14:57:42 +02005400 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005401
5402 u8 pas[0][0x40];
5403};
5404
5405enum {
5406 MLX5_MANAGE_PAGES_IN_OP_MOD_ALLOCATION_FAIL = 0x0,
5407 MLX5_MANAGE_PAGES_IN_OP_MOD_ALLOCATION_SUCCESS = 0x1,
5408 MLX5_MANAGE_PAGES_IN_OP_MOD_HCA_RETURN_PAGES = 0x2,
5409};
5410
5411struct mlx5_ifc_manage_pages_in_bits {
5412 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005413 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005414
Matan Barakb4ff3a32016-02-09 14:57:42 +02005415 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005416 u8 op_mod[0x10];
5417
Matan Barakb4ff3a32016-02-09 14:57:42 +02005418 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005419 u8 function_id[0x10];
5420
5421 u8 input_num_entries[0x20];
5422
5423 u8 pas[0][0x40];
5424};
5425
5426struct mlx5_ifc_mad_ifc_out_bits {
5427 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005428 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005429
5430 u8 syndrome[0x20];
5431
Matan Barakb4ff3a32016-02-09 14:57:42 +02005432 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005433
5434 u8 response_mad_packet[256][0x8];
5435};
5436
5437struct mlx5_ifc_mad_ifc_in_bits {
5438 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005439 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005440
Matan Barakb4ff3a32016-02-09 14:57:42 +02005441 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005442 u8 op_mod[0x10];
5443
5444 u8 remote_lid[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005445 u8 reserved_at_50[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005446 u8 port[0x8];
5447
Matan Barakb4ff3a32016-02-09 14:57:42 +02005448 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005449
5450 u8 mad[256][0x8];
5451};
5452
5453struct mlx5_ifc_init_hca_out_bits {
5454 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005455 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005456
5457 u8 syndrome[0x20];
5458
Matan Barakb4ff3a32016-02-09 14:57:42 +02005459 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005460};
5461
5462struct mlx5_ifc_init_hca_in_bits {
5463 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005464 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005465
Matan Barakb4ff3a32016-02-09 14:57:42 +02005466 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005467 u8 op_mod[0x10];
5468
Matan Barakb4ff3a32016-02-09 14:57:42 +02005469 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005470};
5471
5472struct mlx5_ifc_init2rtr_qp_out_bits {
5473 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005474 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005475
5476 u8 syndrome[0x20];
5477
Matan Barakb4ff3a32016-02-09 14:57:42 +02005478 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005479};
5480
5481struct mlx5_ifc_init2rtr_qp_in_bits {
5482 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005483 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005484
Matan Barakb4ff3a32016-02-09 14:57:42 +02005485 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005486 u8 op_mod[0x10];
5487
Matan Barakb4ff3a32016-02-09 14:57:42 +02005488 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005489 u8 qpn[0x18];
5490
Matan Barakb4ff3a32016-02-09 14:57:42 +02005491 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005492
5493 u8 opt_param_mask[0x20];
5494
Matan Barakb4ff3a32016-02-09 14:57:42 +02005495 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005496
5497 struct mlx5_ifc_qpc_bits qpc;
5498
Matan Barakb4ff3a32016-02-09 14:57:42 +02005499 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03005500};
5501
5502struct mlx5_ifc_init2init_qp_out_bits {
5503 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005504 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005505
5506 u8 syndrome[0x20];
5507
Matan Barakb4ff3a32016-02-09 14:57:42 +02005508 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005509};
5510
5511struct mlx5_ifc_init2init_qp_in_bits {
5512 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005513 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005514
Matan Barakb4ff3a32016-02-09 14:57:42 +02005515 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005516 u8 op_mod[0x10];
5517
Matan Barakb4ff3a32016-02-09 14:57:42 +02005518 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005519 u8 qpn[0x18];
5520
Matan Barakb4ff3a32016-02-09 14:57:42 +02005521 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005522
5523 u8 opt_param_mask[0x20];
5524
Matan Barakb4ff3a32016-02-09 14:57:42 +02005525 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005526
5527 struct mlx5_ifc_qpc_bits qpc;
5528
Matan Barakb4ff3a32016-02-09 14:57:42 +02005529 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03005530};
5531
5532struct mlx5_ifc_get_dropped_packet_log_out_bits {
5533 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005534 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005535
5536 u8 syndrome[0x20];
5537
Matan Barakb4ff3a32016-02-09 14:57:42 +02005538 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005539
5540 u8 packet_headers_log[128][0x8];
5541
5542 u8 packet_syndrome[64][0x8];
5543};
5544
5545struct mlx5_ifc_get_dropped_packet_log_in_bits {
5546 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005547 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005548
Matan Barakb4ff3a32016-02-09 14:57:42 +02005549 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005550 u8 op_mod[0x10];
5551
Matan Barakb4ff3a32016-02-09 14:57:42 +02005552 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005553};
5554
5555struct mlx5_ifc_gen_eqe_in_bits {
5556 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005557 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005558
Matan Barakb4ff3a32016-02-09 14:57:42 +02005559 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005560 u8 op_mod[0x10];
5561
Matan Barakb4ff3a32016-02-09 14:57:42 +02005562 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005563 u8 eq_number[0x8];
5564
Matan Barakb4ff3a32016-02-09 14:57:42 +02005565 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005566
5567 u8 eqe[64][0x8];
5568};
5569
5570struct mlx5_ifc_gen_eq_out_bits {
5571 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005572 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005573
5574 u8 syndrome[0x20];
5575
Matan Barakb4ff3a32016-02-09 14:57:42 +02005576 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005577};
5578
5579struct mlx5_ifc_enable_hca_out_bits {
5580 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005581 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005582
5583 u8 syndrome[0x20];
5584
Matan Barakb4ff3a32016-02-09 14:57:42 +02005585 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005586};
5587
5588struct mlx5_ifc_enable_hca_in_bits {
5589 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005590 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005591
Matan Barakb4ff3a32016-02-09 14:57:42 +02005592 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005593 u8 op_mod[0x10];
5594
Matan Barakb4ff3a32016-02-09 14:57:42 +02005595 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005596 u8 function_id[0x10];
5597
Matan Barakb4ff3a32016-02-09 14:57:42 +02005598 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005599};
5600
5601struct mlx5_ifc_drain_dct_out_bits {
5602 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005603 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005604
5605 u8 syndrome[0x20];
5606
Matan Barakb4ff3a32016-02-09 14:57:42 +02005607 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005608};
5609
5610struct mlx5_ifc_drain_dct_in_bits {
5611 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005612 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005613
Matan Barakb4ff3a32016-02-09 14:57:42 +02005614 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005615 u8 op_mod[0x10];
5616
Matan Barakb4ff3a32016-02-09 14:57:42 +02005617 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005618 u8 dctn[0x18];
5619
Matan Barakb4ff3a32016-02-09 14:57:42 +02005620 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005621};
5622
5623struct mlx5_ifc_disable_hca_out_bits {
5624 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005625 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005626
5627 u8 syndrome[0x20];
5628
Matan Barakb4ff3a32016-02-09 14:57:42 +02005629 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005630};
5631
5632struct mlx5_ifc_disable_hca_in_bits {
5633 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005634 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005635
Matan Barakb4ff3a32016-02-09 14:57:42 +02005636 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005637 u8 op_mod[0x10];
5638
Matan Barakb4ff3a32016-02-09 14:57:42 +02005639 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005640 u8 function_id[0x10];
5641
Matan Barakb4ff3a32016-02-09 14:57:42 +02005642 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005643};
5644
5645struct mlx5_ifc_detach_from_mcg_out_bits {
5646 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005647 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005648
5649 u8 syndrome[0x20];
5650
Matan Barakb4ff3a32016-02-09 14:57:42 +02005651 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005652};
5653
5654struct mlx5_ifc_detach_from_mcg_in_bits {
5655 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005656 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005657
Matan Barakb4ff3a32016-02-09 14:57:42 +02005658 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005659 u8 op_mod[0x10];
5660
Matan Barakb4ff3a32016-02-09 14:57:42 +02005661 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005662 u8 qpn[0x18];
5663
Matan Barakb4ff3a32016-02-09 14:57:42 +02005664 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005665
5666 u8 multicast_gid[16][0x8];
5667};
5668
Saeed Mahameed74862162016-06-09 15:11:34 +03005669struct mlx5_ifc_destroy_xrq_out_bits {
5670 u8 status[0x8];
5671 u8 reserved_at_8[0x18];
5672
5673 u8 syndrome[0x20];
5674
5675 u8 reserved_at_40[0x40];
5676};
5677
5678struct mlx5_ifc_destroy_xrq_in_bits {
5679 u8 opcode[0x10];
5680 u8 reserved_at_10[0x10];
5681
5682 u8 reserved_at_20[0x10];
5683 u8 op_mod[0x10];
5684
5685 u8 reserved_at_40[0x8];
5686 u8 xrqn[0x18];
5687
5688 u8 reserved_at_60[0x20];
5689};
5690
Saeed Mahameede2816822015-05-28 22:28:40 +03005691struct mlx5_ifc_destroy_xrc_srq_out_bits {
5692 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005693 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005694
5695 u8 syndrome[0x20];
5696
Matan Barakb4ff3a32016-02-09 14:57:42 +02005697 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005698};
5699
5700struct mlx5_ifc_destroy_xrc_srq_in_bits {
5701 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005702 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005703
Matan Barakb4ff3a32016-02-09 14:57:42 +02005704 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005705 u8 op_mod[0x10];
5706
Matan Barakb4ff3a32016-02-09 14:57:42 +02005707 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005708 u8 xrc_srqn[0x18];
5709
Matan Barakb4ff3a32016-02-09 14:57:42 +02005710 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005711};
5712
5713struct mlx5_ifc_destroy_tis_out_bits {
5714 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005715 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005716
5717 u8 syndrome[0x20];
5718
Matan Barakb4ff3a32016-02-09 14:57:42 +02005719 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005720};
5721
5722struct mlx5_ifc_destroy_tis_in_bits {
5723 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005724 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005725
Matan Barakb4ff3a32016-02-09 14:57:42 +02005726 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005727 u8 op_mod[0x10];
5728
Matan Barakb4ff3a32016-02-09 14:57:42 +02005729 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005730 u8 tisn[0x18];
5731
Matan Barakb4ff3a32016-02-09 14:57:42 +02005732 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005733};
5734
5735struct mlx5_ifc_destroy_tir_out_bits {
5736 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005737 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005738
5739 u8 syndrome[0x20];
5740
Matan Barakb4ff3a32016-02-09 14:57:42 +02005741 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005742};
5743
5744struct mlx5_ifc_destroy_tir_in_bits {
5745 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005746 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005747
Matan Barakb4ff3a32016-02-09 14:57:42 +02005748 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005749 u8 op_mod[0x10];
5750
Matan Barakb4ff3a32016-02-09 14:57:42 +02005751 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005752 u8 tirn[0x18];
5753
Matan Barakb4ff3a32016-02-09 14:57:42 +02005754 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005755};
5756
5757struct mlx5_ifc_destroy_srq_out_bits {
5758 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005759 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005760
5761 u8 syndrome[0x20];
5762
Matan Barakb4ff3a32016-02-09 14:57:42 +02005763 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005764};
5765
5766struct mlx5_ifc_destroy_srq_in_bits {
5767 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005768 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005769
Matan Barakb4ff3a32016-02-09 14:57:42 +02005770 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005771 u8 op_mod[0x10];
5772
Matan Barakb4ff3a32016-02-09 14:57:42 +02005773 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005774 u8 srqn[0x18];
5775
Matan Barakb4ff3a32016-02-09 14:57:42 +02005776 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005777};
5778
5779struct mlx5_ifc_destroy_sq_out_bits {
5780 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005781 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005782
5783 u8 syndrome[0x20];
5784
Matan Barakb4ff3a32016-02-09 14:57:42 +02005785 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005786};
5787
5788struct mlx5_ifc_destroy_sq_in_bits {
5789 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005790 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005791
Matan Barakb4ff3a32016-02-09 14:57:42 +02005792 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005793 u8 op_mod[0x10];
5794
Matan Barakb4ff3a32016-02-09 14:57:42 +02005795 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005796 u8 sqn[0x18];
5797
Matan Barakb4ff3a32016-02-09 14:57:42 +02005798 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005799};
5800
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03005801struct mlx5_ifc_destroy_scheduling_element_out_bits {
5802 u8 status[0x8];
5803 u8 reserved_at_8[0x18];
5804
5805 u8 syndrome[0x20];
5806
5807 u8 reserved_at_40[0x1c0];
5808};
5809
5810struct mlx5_ifc_destroy_scheduling_element_in_bits {
5811 u8 opcode[0x10];
5812 u8 reserved_at_10[0x10];
5813
5814 u8 reserved_at_20[0x10];
5815 u8 op_mod[0x10];
5816
5817 u8 scheduling_hierarchy[0x8];
5818 u8 reserved_at_48[0x18];
5819
5820 u8 scheduling_element_id[0x20];
5821
5822 u8 reserved_at_80[0x180];
5823};
5824
Saeed Mahameede2816822015-05-28 22:28:40 +03005825struct mlx5_ifc_destroy_rqt_out_bits {
5826 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005827 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005828
5829 u8 syndrome[0x20];
5830
Matan Barakb4ff3a32016-02-09 14:57:42 +02005831 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005832};
5833
5834struct mlx5_ifc_destroy_rqt_in_bits {
5835 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005836 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005837
Matan Barakb4ff3a32016-02-09 14:57:42 +02005838 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005839 u8 op_mod[0x10];
5840
Matan Barakb4ff3a32016-02-09 14:57:42 +02005841 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005842 u8 rqtn[0x18];
5843
Matan Barakb4ff3a32016-02-09 14:57:42 +02005844 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005845};
5846
5847struct mlx5_ifc_destroy_rq_out_bits {
5848 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005849 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005850
5851 u8 syndrome[0x20];
5852
Matan Barakb4ff3a32016-02-09 14:57:42 +02005853 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005854};
5855
5856struct mlx5_ifc_destroy_rq_in_bits {
5857 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005858 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005859
Matan Barakb4ff3a32016-02-09 14:57:42 +02005860 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005861 u8 op_mod[0x10];
5862
Matan Barakb4ff3a32016-02-09 14:57:42 +02005863 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005864 u8 rqn[0x18];
5865
Matan Barakb4ff3a32016-02-09 14:57:42 +02005866 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005867};
5868
5869struct mlx5_ifc_destroy_rmp_out_bits {
5870 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005871 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005872
5873 u8 syndrome[0x20];
5874
Matan Barakb4ff3a32016-02-09 14:57:42 +02005875 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005876};
5877
5878struct mlx5_ifc_destroy_rmp_in_bits {
5879 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005880 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005881
Matan Barakb4ff3a32016-02-09 14:57:42 +02005882 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005883 u8 op_mod[0x10];
5884
Matan Barakb4ff3a32016-02-09 14:57:42 +02005885 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005886 u8 rmpn[0x18];
5887
Matan Barakb4ff3a32016-02-09 14:57:42 +02005888 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005889};
5890
5891struct mlx5_ifc_destroy_qp_out_bits {
5892 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005893 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005894
5895 u8 syndrome[0x20];
5896
Matan Barakb4ff3a32016-02-09 14:57:42 +02005897 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005898};
5899
5900struct mlx5_ifc_destroy_qp_in_bits {
5901 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005902 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005903
Matan Barakb4ff3a32016-02-09 14:57:42 +02005904 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005905 u8 op_mod[0x10];
5906
Matan Barakb4ff3a32016-02-09 14:57:42 +02005907 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005908 u8 qpn[0x18];
5909
Matan Barakb4ff3a32016-02-09 14:57:42 +02005910 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005911};
5912
5913struct mlx5_ifc_destroy_psv_out_bits {
5914 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005915 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005916
5917 u8 syndrome[0x20];
5918
Matan Barakb4ff3a32016-02-09 14:57:42 +02005919 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005920};
5921
5922struct mlx5_ifc_destroy_psv_in_bits {
5923 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005924 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005925
Matan Barakb4ff3a32016-02-09 14:57:42 +02005926 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005927 u8 op_mod[0x10];
5928
Matan Barakb4ff3a32016-02-09 14:57:42 +02005929 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005930 u8 psvn[0x18];
5931
Matan Barakb4ff3a32016-02-09 14:57:42 +02005932 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005933};
5934
5935struct mlx5_ifc_destroy_mkey_out_bits {
5936 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005937 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005938
5939 u8 syndrome[0x20];
5940
Matan Barakb4ff3a32016-02-09 14:57:42 +02005941 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005942};
5943
5944struct mlx5_ifc_destroy_mkey_in_bits {
5945 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005946 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005947
Matan Barakb4ff3a32016-02-09 14:57:42 +02005948 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005949 u8 op_mod[0x10];
5950
Matan Barakb4ff3a32016-02-09 14:57:42 +02005951 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005952 u8 mkey_index[0x18];
5953
Matan Barakb4ff3a32016-02-09 14:57:42 +02005954 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005955};
5956
5957struct mlx5_ifc_destroy_flow_table_out_bits {
5958 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005959 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005960
5961 u8 syndrome[0x20];
5962
Matan Barakb4ff3a32016-02-09 14:57:42 +02005963 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005964};
5965
5966struct mlx5_ifc_destroy_flow_table_in_bits {
5967 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005968 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005969
Matan Barakb4ff3a32016-02-09 14:57:42 +02005970 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005971 u8 op_mod[0x10];
5972
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03005973 u8 other_vport[0x1];
5974 u8 reserved_at_41[0xf];
5975 u8 vport_number[0x10];
5976
5977 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005978
5979 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005980 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005981
Matan Barakb4ff3a32016-02-09 14:57:42 +02005982 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005983 u8 table_id[0x18];
5984
Matan Barakb4ff3a32016-02-09 14:57:42 +02005985 u8 reserved_at_c0[0x140];
Saeed Mahameede2816822015-05-28 22:28:40 +03005986};
5987
5988struct mlx5_ifc_destroy_flow_group_out_bits {
5989 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005990 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005991
5992 u8 syndrome[0x20];
5993
Matan Barakb4ff3a32016-02-09 14:57:42 +02005994 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005995};
5996
5997struct mlx5_ifc_destroy_flow_group_in_bits {
5998 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005999 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006000
Matan Barakb4ff3a32016-02-09 14:57:42 +02006001 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006002 u8 op_mod[0x10];
6003
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03006004 u8 other_vport[0x1];
6005 u8 reserved_at_41[0xf];
6006 u8 vport_number[0x10];
6007
6008 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006009
6010 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006011 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006012
Matan Barakb4ff3a32016-02-09 14:57:42 +02006013 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006014 u8 table_id[0x18];
6015
6016 u8 group_id[0x20];
6017
Matan Barakb4ff3a32016-02-09 14:57:42 +02006018 u8 reserved_at_e0[0x120];
Saeed Mahameede2816822015-05-28 22:28:40 +03006019};
6020
6021struct mlx5_ifc_destroy_eq_out_bits {
6022 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006023 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006024
6025 u8 syndrome[0x20];
6026
Matan Barakb4ff3a32016-02-09 14:57:42 +02006027 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006028};
6029
6030struct mlx5_ifc_destroy_eq_in_bits {
6031 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006032 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006033
Matan Barakb4ff3a32016-02-09 14:57:42 +02006034 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006035 u8 op_mod[0x10];
6036
Matan Barakb4ff3a32016-02-09 14:57:42 +02006037 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006038 u8 eq_number[0x8];
6039
Matan Barakb4ff3a32016-02-09 14:57:42 +02006040 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006041};
6042
6043struct mlx5_ifc_destroy_dct_out_bits {
6044 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006045 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006046
6047 u8 syndrome[0x20];
6048
Matan Barakb4ff3a32016-02-09 14:57:42 +02006049 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006050};
6051
6052struct mlx5_ifc_destroy_dct_in_bits {
6053 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006054 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006055
Matan Barakb4ff3a32016-02-09 14:57:42 +02006056 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006057 u8 op_mod[0x10];
6058
Matan Barakb4ff3a32016-02-09 14:57:42 +02006059 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006060 u8 dctn[0x18];
6061
Matan Barakb4ff3a32016-02-09 14:57:42 +02006062 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006063};
6064
6065struct mlx5_ifc_destroy_cq_out_bits {
6066 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006067 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006068
6069 u8 syndrome[0x20];
6070
Matan Barakb4ff3a32016-02-09 14:57:42 +02006071 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006072};
6073
6074struct mlx5_ifc_destroy_cq_in_bits {
6075 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006076 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006077
Matan Barakb4ff3a32016-02-09 14:57:42 +02006078 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006079 u8 op_mod[0x10];
6080
Matan Barakb4ff3a32016-02-09 14:57:42 +02006081 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006082 u8 cqn[0x18];
6083
Matan Barakb4ff3a32016-02-09 14:57:42 +02006084 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006085};
6086
6087struct mlx5_ifc_delete_vxlan_udp_dport_out_bits {
6088 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006089 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006090
6091 u8 syndrome[0x20];
6092
Matan Barakb4ff3a32016-02-09 14:57:42 +02006093 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006094};
6095
6096struct mlx5_ifc_delete_vxlan_udp_dport_in_bits {
6097 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006098 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006099
Matan Barakb4ff3a32016-02-09 14:57:42 +02006100 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006101 u8 op_mod[0x10];
6102
Matan Barakb4ff3a32016-02-09 14:57:42 +02006103 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006104
Matan Barakb4ff3a32016-02-09 14:57:42 +02006105 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006106 u8 vxlan_udp_port[0x10];
6107};
6108
6109struct mlx5_ifc_delete_l2_table_entry_out_bits {
6110 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006111 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006112
6113 u8 syndrome[0x20];
6114
Matan Barakb4ff3a32016-02-09 14:57:42 +02006115 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006116};
6117
6118struct mlx5_ifc_delete_l2_table_entry_in_bits {
6119 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006120 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006121
Matan Barakb4ff3a32016-02-09 14:57:42 +02006122 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006123 u8 op_mod[0x10];
6124
Matan Barakb4ff3a32016-02-09 14:57:42 +02006125 u8 reserved_at_40[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03006126
Matan Barakb4ff3a32016-02-09 14:57:42 +02006127 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006128 u8 table_index[0x18];
6129
Matan Barakb4ff3a32016-02-09 14:57:42 +02006130 u8 reserved_at_c0[0x140];
Saeed Mahameede2816822015-05-28 22:28:40 +03006131};
6132
6133struct mlx5_ifc_delete_fte_out_bits {
6134 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006135 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006136
6137 u8 syndrome[0x20];
6138
Matan Barakb4ff3a32016-02-09 14:57:42 +02006139 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006140};
6141
6142struct mlx5_ifc_delete_fte_in_bits {
6143 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006144 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006145
Matan Barakb4ff3a32016-02-09 14:57:42 +02006146 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006147 u8 op_mod[0x10];
6148
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03006149 u8 other_vport[0x1];
6150 u8 reserved_at_41[0xf];
6151 u8 vport_number[0x10];
6152
6153 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006154
6155 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006156 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006157
Matan Barakb4ff3a32016-02-09 14:57:42 +02006158 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006159 u8 table_id[0x18];
6160
Matan Barakb4ff3a32016-02-09 14:57:42 +02006161 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006162
6163 u8 flow_index[0x20];
6164
Matan Barakb4ff3a32016-02-09 14:57:42 +02006165 u8 reserved_at_120[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006166};
6167
6168struct mlx5_ifc_dealloc_xrcd_out_bits {
6169 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006170 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006171
6172 u8 syndrome[0x20];
6173
Matan Barakb4ff3a32016-02-09 14:57:42 +02006174 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006175};
6176
6177struct mlx5_ifc_dealloc_xrcd_in_bits {
6178 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006179 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006180
Matan Barakb4ff3a32016-02-09 14:57:42 +02006181 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006182 u8 op_mod[0x10];
6183
Matan Barakb4ff3a32016-02-09 14:57:42 +02006184 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006185 u8 xrcd[0x18];
6186
Matan Barakb4ff3a32016-02-09 14:57:42 +02006187 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006188};
6189
6190struct mlx5_ifc_dealloc_uar_out_bits {
6191 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006192 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006193
6194 u8 syndrome[0x20];
6195
Matan Barakb4ff3a32016-02-09 14:57:42 +02006196 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006197};
6198
6199struct mlx5_ifc_dealloc_uar_in_bits {
6200 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006201 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006202
Matan Barakb4ff3a32016-02-09 14:57:42 +02006203 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006204 u8 op_mod[0x10];
6205
Matan Barakb4ff3a32016-02-09 14:57:42 +02006206 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006207 u8 uar[0x18];
6208
Matan Barakb4ff3a32016-02-09 14:57:42 +02006209 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006210};
6211
6212struct mlx5_ifc_dealloc_transport_domain_out_bits {
6213 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006214 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006215
6216 u8 syndrome[0x20];
6217
Matan Barakb4ff3a32016-02-09 14:57:42 +02006218 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006219};
6220
6221struct mlx5_ifc_dealloc_transport_domain_in_bits {
6222 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006223 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006224
Matan Barakb4ff3a32016-02-09 14:57:42 +02006225 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006226 u8 op_mod[0x10];
6227
Matan Barakb4ff3a32016-02-09 14:57:42 +02006228 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006229 u8 transport_domain[0x18];
6230
Matan Barakb4ff3a32016-02-09 14:57:42 +02006231 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006232};
6233
6234struct mlx5_ifc_dealloc_q_counter_out_bits {
6235 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006236 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006237
6238 u8 syndrome[0x20];
6239
Matan Barakb4ff3a32016-02-09 14:57:42 +02006240 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006241};
6242
6243struct mlx5_ifc_dealloc_q_counter_in_bits {
6244 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006245 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006246
Matan Barakb4ff3a32016-02-09 14:57:42 +02006247 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006248 u8 op_mod[0x10];
6249
Matan Barakb4ff3a32016-02-09 14:57:42 +02006250 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006251 u8 counter_set_id[0x8];
6252
Matan Barakb4ff3a32016-02-09 14:57:42 +02006253 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006254};
6255
6256struct mlx5_ifc_dealloc_pd_out_bits {
6257 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006258 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006259
6260 u8 syndrome[0x20];
6261
Matan Barakb4ff3a32016-02-09 14:57:42 +02006262 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006263};
6264
6265struct mlx5_ifc_dealloc_pd_in_bits {
6266 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006267 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006268
Matan Barakb4ff3a32016-02-09 14:57:42 +02006269 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006270 u8 op_mod[0x10];
6271
Matan Barakb4ff3a32016-02-09 14:57:42 +02006272 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006273 u8 pd[0x18];
6274
Matan Barakb4ff3a32016-02-09 14:57:42 +02006275 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006276};
6277
Amir Vadai9dc0b282016-05-13 12:55:39 +00006278struct mlx5_ifc_dealloc_flow_counter_out_bits {
6279 u8 status[0x8];
6280 u8 reserved_at_8[0x18];
6281
6282 u8 syndrome[0x20];
6283
6284 u8 reserved_at_40[0x40];
6285};
6286
6287struct mlx5_ifc_dealloc_flow_counter_in_bits {
6288 u8 opcode[0x10];
6289 u8 reserved_at_10[0x10];
6290
6291 u8 reserved_at_20[0x10];
6292 u8 op_mod[0x10];
6293
Rabie Louloua8ffcc72017-07-09 13:39:30 +03006294 u8 flow_counter_id[0x20];
Amir Vadai9dc0b282016-05-13 12:55:39 +00006295
6296 u8 reserved_at_60[0x20];
6297};
6298
Saeed Mahameed74862162016-06-09 15:11:34 +03006299struct mlx5_ifc_create_xrq_out_bits {
6300 u8 status[0x8];
6301 u8 reserved_at_8[0x18];
6302
6303 u8 syndrome[0x20];
6304
6305 u8 reserved_at_40[0x8];
6306 u8 xrqn[0x18];
6307
6308 u8 reserved_at_60[0x20];
6309};
6310
6311struct mlx5_ifc_create_xrq_in_bits {
6312 u8 opcode[0x10];
6313 u8 reserved_at_10[0x10];
6314
6315 u8 reserved_at_20[0x10];
6316 u8 op_mod[0x10];
6317
6318 u8 reserved_at_40[0x40];
6319
6320 struct mlx5_ifc_xrqc_bits xrq_context;
6321};
6322
Saeed Mahameede2816822015-05-28 22:28:40 +03006323struct mlx5_ifc_create_xrc_srq_out_bits {
6324 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006325 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006326
6327 u8 syndrome[0x20];
6328
Matan Barakb4ff3a32016-02-09 14:57:42 +02006329 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006330 u8 xrc_srqn[0x18];
6331
Matan Barakb4ff3a32016-02-09 14:57:42 +02006332 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006333};
6334
6335struct mlx5_ifc_create_xrc_srq_in_bits {
6336 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006337 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006338
Matan Barakb4ff3a32016-02-09 14:57:42 +02006339 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006340 u8 op_mod[0x10];
6341
Matan Barakb4ff3a32016-02-09 14:57:42 +02006342 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006343
6344 struct mlx5_ifc_xrc_srqc_bits xrc_srq_context_entry;
6345
Matan Barakb4ff3a32016-02-09 14:57:42 +02006346 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03006347
6348 u8 pas[0][0x40];
6349};
6350
6351struct mlx5_ifc_create_tis_out_bits {
6352 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006353 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006354
6355 u8 syndrome[0x20];
6356
Matan Barakb4ff3a32016-02-09 14:57:42 +02006357 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006358 u8 tisn[0x18];
6359
Matan Barakb4ff3a32016-02-09 14:57:42 +02006360 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006361};
6362
6363struct mlx5_ifc_create_tis_in_bits {
6364 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006365 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006366
Matan Barakb4ff3a32016-02-09 14:57:42 +02006367 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006368 u8 op_mod[0x10];
6369
Matan Barakb4ff3a32016-02-09 14:57:42 +02006370 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006371
6372 struct mlx5_ifc_tisc_bits ctx;
6373};
6374
6375struct mlx5_ifc_create_tir_out_bits {
6376 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006377 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006378
6379 u8 syndrome[0x20];
6380
Matan Barakb4ff3a32016-02-09 14:57:42 +02006381 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006382 u8 tirn[0x18];
6383
Matan Barakb4ff3a32016-02-09 14:57:42 +02006384 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006385};
6386
6387struct mlx5_ifc_create_tir_in_bits {
6388 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006389 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006390
Matan Barakb4ff3a32016-02-09 14:57:42 +02006391 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006392 u8 op_mod[0x10];
6393
Matan Barakb4ff3a32016-02-09 14:57:42 +02006394 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006395
6396 struct mlx5_ifc_tirc_bits ctx;
6397};
6398
6399struct mlx5_ifc_create_srq_out_bits {
6400 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006401 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006402
6403 u8 syndrome[0x20];
6404
Matan Barakb4ff3a32016-02-09 14:57:42 +02006405 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006406 u8 srqn[0x18];
6407
Matan Barakb4ff3a32016-02-09 14:57:42 +02006408 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006409};
6410
6411struct mlx5_ifc_create_srq_in_bits {
6412 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006413 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006414
Matan Barakb4ff3a32016-02-09 14:57:42 +02006415 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006416 u8 op_mod[0x10];
6417
Matan Barakb4ff3a32016-02-09 14:57:42 +02006418 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006419
6420 struct mlx5_ifc_srqc_bits srq_context_entry;
6421
Matan Barakb4ff3a32016-02-09 14:57:42 +02006422 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03006423
6424 u8 pas[0][0x40];
6425};
6426
6427struct mlx5_ifc_create_sq_out_bits {
6428 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006429 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006430
6431 u8 syndrome[0x20];
6432
Matan Barakb4ff3a32016-02-09 14:57:42 +02006433 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006434 u8 sqn[0x18];
6435
Matan Barakb4ff3a32016-02-09 14:57:42 +02006436 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006437};
6438
6439struct mlx5_ifc_create_sq_in_bits {
6440 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006441 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006442
Matan Barakb4ff3a32016-02-09 14:57:42 +02006443 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006444 u8 op_mod[0x10];
6445
Matan Barakb4ff3a32016-02-09 14:57:42 +02006446 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006447
6448 struct mlx5_ifc_sqc_bits ctx;
6449};
6450
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03006451struct mlx5_ifc_create_scheduling_element_out_bits {
6452 u8 status[0x8];
6453 u8 reserved_at_8[0x18];
6454
6455 u8 syndrome[0x20];
6456
6457 u8 reserved_at_40[0x40];
6458
6459 u8 scheduling_element_id[0x20];
6460
6461 u8 reserved_at_a0[0x160];
6462};
6463
6464struct mlx5_ifc_create_scheduling_element_in_bits {
6465 u8 opcode[0x10];
6466 u8 reserved_at_10[0x10];
6467
6468 u8 reserved_at_20[0x10];
6469 u8 op_mod[0x10];
6470
6471 u8 scheduling_hierarchy[0x8];
6472 u8 reserved_at_48[0x18];
6473
6474 u8 reserved_at_60[0xa0];
6475
6476 struct mlx5_ifc_scheduling_context_bits scheduling_context;
6477
6478 u8 reserved_at_300[0x100];
6479};
6480
Saeed Mahameede2816822015-05-28 22:28:40 +03006481struct mlx5_ifc_create_rqt_out_bits {
6482 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006483 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006484
6485 u8 syndrome[0x20];
6486
Matan Barakb4ff3a32016-02-09 14:57:42 +02006487 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006488 u8 rqtn[0x18];
6489
Matan Barakb4ff3a32016-02-09 14:57:42 +02006490 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006491};
6492
6493struct mlx5_ifc_create_rqt_in_bits {
6494 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006495 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006496
Matan Barakb4ff3a32016-02-09 14:57:42 +02006497 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006498 u8 op_mod[0x10];
6499
Matan Barakb4ff3a32016-02-09 14:57:42 +02006500 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006501
6502 struct mlx5_ifc_rqtc_bits rqt_context;
6503};
6504
6505struct mlx5_ifc_create_rq_out_bits {
6506 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006507 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006508
6509 u8 syndrome[0x20];
6510
Matan Barakb4ff3a32016-02-09 14:57:42 +02006511 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006512 u8 rqn[0x18];
6513
Matan Barakb4ff3a32016-02-09 14:57:42 +02006514 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006515};
6516
6517struct mlx5_ifc_create_rq_in_bits {
6518 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006519 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006520
Matan Barakb4ff3a32016-02-09 14:57:42 +02006521 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006522 u8 op_mod[0x10];
6523
Matan Barakb4ff3a32016-02-09 14:57:42 +02006524 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006525
6526 struct mlx5_ifc_rqc_bits ctx;
6527};
6528
6529struct mlx5_ifc_create_rmp_out_bits {
6530 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006531 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006532
6533 u8 syndrome[0x20];
6534
Matan Barakb4ff3a32016-02-09 14:57:42 +02006535 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006536 u8 rmpn[0x18];
6537
Matan Barakb4ff3a32016-02-09 14:57:42 +02006538 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006539};
6540
6541struct mlx5_ifc_create_rmp_in_bits {
6542 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006543 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006544
Matan Barakb4ff3a32016-02-09 14:57:42 +02006545 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006546 u8 op_mod[0x10];
6547
Matan Barakb4ff3a32016-02-09 14:57:42 +02006548 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006549
6550 struct mlx5_ifc_rmpc_bits ctx;
6551};
6552
6553struct mlx5_ifc_create_qp_out_bits {
6554 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006555 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006556
6557 u8 syndrome[0x20];
6558
Matan Barakb4ff3a32016-02-09 14:57:42 +02006559 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006560 u8 qpn[0x18];
6561
Matan Barakb4ff3a32016-02-09 14:57:42 +02006562 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006563};
6564
6565struct mlx5_ifc_create_qp_in_bits {
6566 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006567 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006568
Matan Barakb4ff3a32016-02-09 14:57:42 +02006569 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006570 u8 op_mod[0x10];
6571
Matan Barakb4ff3a32016-02-09 14:57:42 +02006572 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006573
6574 u8 opt_param_mask[0x20];
6575
Matan Barakb4ff3a32016-02-09 14:57:42 +02006576 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006577
6578 struct mlx5_ifc_qpc_bits qpc;
6579
Matan Barakb4ff3a32016-02-09 14:57:42 +02006580 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03006581
6582 u8 pas[0][0x40];
6583};
6584
6585struct mlx5_ifc_create_psv_out_bits {
6586 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006587 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006588
6589 u8 syndrome[0x20];
6590
Matan Barakb4ff3a32016-02-09 14:57:42 +02006591 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006592
Matan Barakb4ff3a32016-02-09 14:57:42 +02006593 u8 reserved_at_80[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006594 u8 psv0_index[0x18];
6595
Matan Barakb4ff3a32016-02-09 14:57:42 +02006596 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006597 u8 psv1_index[0x18];
6598
Matan Barakb4ff3a32016-02-09 14:57:42 +02006599 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006600 u8 psv2_index[0x18];
6601
Matan Barakb4ff3a32016-02-09 14:57:42 +02006602 u8 reserved_at_e0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006603 u8 psv3_index[0x18];
6604};
6605
6606struct mlx5_ifc_create_psv_in_bits {
6607 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006608 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006609
Matan Barakb4ff3a32016-02-09 14:57:42 +02006610 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006611 u8 op_mod[0x10];
6612
6613 u8 num_psv[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006614 u8 reserved_at_44[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03006615 u8 pd[0x18];
6616
Matan Barakb4ff3a32016-02-09 14:57:42 +02006617 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006618};
6619
6620struct mlx5_ifc_create_mkey_out_bits {
6621 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006622 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006623
6624 u8 syndrome[0x20];
6625
Matan Barakb4ff3a32016-02-09 14:57:42 +02006626 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006627 u8 mkey_index[0x18];
6628
Matan Barakb4ff3a32016-02-09 14:57:42 +02006629 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006630};
6631
6632struct mlx5_ifc_create_mkey_in_bits {
6633 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006634 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006635
Matan Barakb4ff3a32016-02-09 14:57:42 +02006636 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006637 u8 op_mod[0x10];
6638
Matan Barakb4ff3a32016-02-09 14:57:42 +02006639 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006640
6641 u8 pg_access[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006642 u8 reserved_at_61[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03006643
6644 struct mlx5_ifc_mkc_bits memory_key_mkey_entry;
6645
Matan Barakb4ff3a32016-02-09 14:57:42 +02006646 u8 reserved_at_280[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03006647
6648 u8 translations_octword_actual_size[0x20];
6649
Matan Barakb4ff3a32016-02-09 14:57:42 +02006650 u8 reserved_at_320[0x560];
Saeed Mahameede2816822015-05-28 22:28:40 +03006651
6652 u8 klm_pas_mtt[0][0x20];
6653};
6654
6655struct mlx5_ifc_create_flow_table_out_bits {
6656 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006657 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006658
6659 u8 syndrome[0x20];
6660
Matan Barakb4ff3a32016-02-09 14:57:42 +02006661 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006662 u8 table_id[0x18];
6663
Matan Barakb4ff3a32016-02-09 14:57:42 +02006664 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006665};
6666
Maor Gottlieb0c90e9c2017-03-12 11:35:23 +02006667struct mlx5_ifc_flow_table_context_bits {
6668 u8 encap_en[0x1];
6669 u8 decap_en[0x1];
6670 u8 reserved_at_2[0x2];
6671 u8 table_miss_action[0x4];
6672 u8 level[0x8];
6673 u8 reserved_at_10[0x8];
6674 u8 log_size[0x8];
6675
6676 u8 reserved_at_20[0x8];
6677 u8 table_miss_id[0x18];
6678
6679 u8 reserved_at_40[0x8];
6680 u8 lag_master_next_table_id[0x18];
6681
6682 u8 reserved_at_60[0xe0];
6683};
6684
Saeed Mahameede2816822015-05-28 22:28:40 +03006685struct mlx5_ifc_create_flow_table_in_bits {
6686 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006687 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006688
Matan Barakb4ff3a32016-02-09 14:57:42 +02006689 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006690 u8 op_mod[0x10];
6691
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03006692 u8 other_vport[0x1];
6693 u8 reserved_at_41[0xf];
6694 u8 vport_number[0x10];
6695
6696 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006697
6698 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006699 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006700
Matan Barakb4ff3a32016-02-09 14:57:42 +02006701 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006702
Maor Gottlieb0c90e9c2017-03-12 11:35:23 +02006703 struct mlx5_ifc_flow_table_context_bits flow_table_context;
Saeed Mahameede2816822015-05-28 22:28:40 +03006704};
6705
6706struct mlx5_ifc_create_flow_group_out_bits {
6707 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006708 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006709
6710 u8 syndrome[0x20];
6711
Matan Barakb4ff3a32016-02-09 14:57:42 +02006712 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006713 u8 group_id[0x18];
6714
Matan Barakb4ff3a32016-02-09 14:57:42 +02006715 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006716};
6717
6718enum {
6719 MLX5_CREATE_FLOW_GROUP_IN_MATCH_CRITERIA_ENABLE_OUTER_HEADERS = 0x0,
6720 MLX5_CREATE_FLOW_GROUP_IN_MATCH_CRITERIA_ENABLE_MISC_PARAMETERS = 0x1,
6721 MLX5_CREATE_FLOW_GROUP_IN_MATCH_CRITERIA_ENABLE_INNER_HEADERS = 0x2,
6722};
6723
6724struct mlx5_ifc_create_flow_group_in_bits {
6725 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006726 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006727
Matan Barakb4ff3a32016-02-09 14:57:42 +02006728 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006729 u8 op_mod[0x10];
6730
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03006731 u8 other_vport[0x1];
6732 u8 reserved_at_41[0xf];
6733 u8 vport_number[0x10];
6734
6735 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006736
6737 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006738 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006739
Matan Barakb4ff3a32016-02-09 14:57:42 +02006740 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006741 u8 table_id[0x18];
6742
Matan Barakb4ff3a32016-02-09 14:57:42 +02006743 u8 reserved_at_c0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006744
6745 u8 start_flow_index[0x20];
6746
Matan Barakb4ff3a32016-02-09 14:57:42 +02006747 u8 reserved_at_100[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006748
6749 u8 end_flow_index[0x20];
6750
Matan Barakb4ff3a32016-02-09 14:57:42 +02006751 u8 reserved_at_140[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006752
Matan Barakb4ff3a32016-02-09 14:57:42 +02006753 u8 reserved_at_1e0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006754 u8 match_criteria_enable[0x8];
6755
6756 struct mlx5_ifc_fte_match_param_bits match_criteria;
6757
Matan Barakb4ff3a32016-02-09 14:57:42 +02006758 u8 reserved_at_1200[0xe00];
Saeed Mahameede2816822015-05-28 22:28:40 +03006759};
6760
6761struct mlx5_ifc_create_eq_out_bits {
6762 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006763 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006764
6765 u8 syndrome[0x20];
6766
Matan Barakb4ff3a32016-02-09 14:57:42 +02006767 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006768 u8 eq_number[0x8];
6769
Matan Barakb4ff3a32016-02-09 14:57:42 +02006770 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006771};
6772
6773struct mlx5_ifc_create_eq_in_bits {
6774 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006775 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006776
Matan Barakb4ff3a32016-02-09 14:57:42 +02006777 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006778 u8 op_mod[0x10];
6779
Matan Barakb4ff3a32016-02-09 14:57:42 +02006780 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006781
6782 struct mlx5_ifc_eqc_bits eq_context_entry;
6783
Matan Barakb4ff3a32016-02-09 14:57:42 +02006784 u8 reserved_at_280[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006785
6786 u8 event_bitmask[0x40];
6787
Matan Barakb4ff3a32016-02-09 14:57:42 +02006788 u8 reserved_at_300[0x580];
Saeed Mahameede2816822015-05-28 22:28:40 +03006789
6790 u8 pas[0][0x40];
6791};
6792
6793struct mlx5_ifc_create_dct_out_bits {
6794 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006795 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006796
6797 u8 syndrome[0x20];
6798
Matan Barakb4ff3a32016-02-09 14:57:42 +02006799 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006800 u8 dctn[0x18];
6801
Matan Barakb4ff3a32016-02-09 14:57:42 +02006802 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006803};
6804
6805struct mlx5_ifc_create_dct_in_bits {
6806 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006807 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006808
Matan Barakb4ff3a32016-02-09 14:57:42 +02006809 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006810 u8 op_mod[0x10];
6811
Matan Barakb4ff3a32016-02-09 14:57:42 +02006812 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006813
6814 struct mlx5_ifc_dctc_bits dct_context_entry;
6815
Matan Barakb4ff3a32016-02-09 14:57:42 +02006816 u8 reserved_at_280[0x180];
Saeed Mahameede2816822015-05-28 22:28:40 +03006817};
6818
6819struct mlx5_ifc_create_cq_out_bits {
6820 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006821 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006822
6823 u8 syndrome[0x20];
6824
Matan Barakb4ff3a32016-02-09 14:57:42 +02006825 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006826 u8 cqn[0x18];
6827
Matan Barakb4ff3a32016-02-09 14:57:42 +02006828 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006829};
6830
6831struct mlx5_ifc_create_cq_in_bits {
6832 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006833 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006834
Matan Barakb4ff3a32016-02-09 14:57:42 +02006835 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006836 u8 op_mod[0x10];
6837
Matan Barakb4ff3a32016-02-09 14:57:42 +02006838 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006839
6840 struct mlx5_ifc_cqc_bits cq_context;
6841
Matan Barakb4ff3a32016-02-09 14:57:42 +02006842 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03006843
6844 u8 pas[0][0x40];
6845};
6846
6847struct mlx5_ifc_config_int_moderation_out_bits {
6848 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006849 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006850
6851 u8 syndrome[0x20];
6852
Matan Barakb4ff3a32016-02-09 14:57:42 +02006853 u8 reserved_at_40[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03006854 u8 min_delay[0xc];
6855 u8 int_vector[0x10];
6856
Matan Barakb4ff3a32016-02-09 14:57:42 +02006857 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006858};
6859
6860enum {
6861 MLX5_CONFIG_INT_MODERATION_IN_OP_MOD_WRITE = 0x0,
6862 MLX5_CONFIG_INT_MODERATION_IN_OP_MOD_READ = 0x1,
6863};
6864
6865struct mlx5_ifc_config_int_moderation_in_bits {
6866 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006867 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006868
Matan Barakb4ff3a32016-02-09 14:57:42 +02006869 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006870 u8 op_mod[0x10];
6871
Matan Barakb4ff3a32016-02-09 14:57:42 +02006872 u8 reserved_at_40[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03006873 u8 min_delay[0xc];
6874 u8 int_vector[0x10];
6875
Matan Barakb4ff3a32016-02-09 14:57:42 +02006876 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006877};
6878
6879struct mlx5_ifc_attach_to_mcg_out_bits {
6880 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006881 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006882
6883 u8 syndrome[0x20];
6884
Matan Barakb4ff3a32016-02-09 14:57:42 +02006885 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006886};
6887
6888struct mlx5_ifc_attach_to_mcg_in_bits {
6889 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006890 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006891
Matan Barakb4ff3a32016-02-09 14:57:42 +02006892 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006893 u8 op_mod[0x10];
6894
Matan Barakb4ff3a32016-02-09 14:57:42 +02006895 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006896 u8 qpn[0x18];
6897
Matan Barakb4ff3a32016-02-09 14:57:42 +02006898 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006899
6900 u8 multicast_gid[16][0x8];
6901};
6902
Saeed Mahameed74862162016-06-09 15:11:34 +03006903struct mlx5_ifc_arm_xrq_out_bits {
6904 u8 status[0x8];
6905 u8 reserved_at_8[0x18];
6906
6907 u8 syndrome[0x20];
6908
6909 u8 reserved_at_40[0x40];
6910};
6911
6912struct mlx5_ifc_arm_xrq_in_bits {
6913 u8 opcode[0x10];
6914 u8 reserved_at_10[0x10];
6915
6916 u8 reserved_at_20[0x10];
6917 u8 op_mod[0x10];
6918
6919 u8 reserved_at_40[0x8];
6920 u8 xrqn[0x18];
6921
6922 u8 reserved_at_60[0x10];
6923 u8 lwm[0x10];
6924};
6925
Saeed Mahameede2816822015-05-28 22:28:40 +03006926struct mlx5_ifc_arm_xrc_srq_out_bits {
6927 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006928 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006929
6930 u8 syndrome[0x20];
6931
Matan Barakb4ff3a32016-02-09 14:57:42 +02006932 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006933};
6934
6935enum {
6936 MLX5_ARM_XRC_SRQ_IN_OP_MOD_XRC_SRQ = 0x1,
6937};
6938
6939struct mlx5_ifc_arm_xrc_srq_in_bits {
6940 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006941 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006942
Matan Barakb4ff3a32016-02-09 14:57:42 +02006943 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006944 u8 op_mod[0x10];
6945
Matan Barakb4ff3a32016-02-09 14:57:42 +02006946 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006947 u8 xrc_srqn[0x18];
6948
Matan Barakb4ff3a32016-02-09 14:57:42 +02006949 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006950 u8 lwm[0x10];
6951};
6952
6953struct mlx5_ifc_arm_rq_out_bits {
6954 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006955 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006956
6957 u8 syndrome[0x20];
6958
Matan Barakb4ff3a32016-02-09 14:57:42 +02006959 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006960};
6961
6962enum {
Saeed Mahameed74862162016-06-09 15:11:34 +03006963 MLX5_ARM_RQ_IN_OP_MOD_SRQ = 0x1,
6964 MLX5_ARM_RQ_IN_OP_MOD_XRQ = 0x2,
Saeed Mahameede2816822015-05-28 22:28:40 +03006965};
6966
6967struct mlx5_ifc_arm_rq_in_bits {
6968 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006969 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006970
Matan Barakb4ff3a32016-02-09 14:57:42 +02006971 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006972 u8 op_mod[0x10];
6973
Matan Barakb4ff3a32016-02-09 14:57:42 +02006974 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006975 u8 srq_number[0x18];
6976
Matan Barakb4ff3a32016-02-09 14:57:42 +02006977 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006978 u8 lwm[0x10];
6979};
6980
6981struct mlx5_ifc_arm_dct_out_bits {
6982 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006983 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006984
6985 u8 syndrome[0x20];
6986
Matan Barakb4ff3a32016-02-09 14:57:42 +02006987 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006988};
6989
6990struct mlx5_ifc_arm_dct_in_bits {
6991 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006992 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006993
Matan Barakb4ff3a32016-02-09 14:57:42 +02006994 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006995 u8 op_mod[0x10];
6996
Matan Barakb4ff3a32016-02-09 14:57:42 +02006997 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006998 u8 dct_number[0x18];
6999
Matan Barakb4ff3a32016-02-09 14:57:42 +02007000 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007001};
7002
7003struct mlx5_ifc_alloc_xrcd_out_bits {
7004 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007005 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007006
7007 u8 syndrome[0x20];
7008
Matan Barakb4ff3a32016-02-09 14:57:42 +02007009 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007010 u8 xrcd[0x18];
7011
Matan Barakb4ff3a32016-02-09 14:57:42 +02007012 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007013};
7014
7015struct mlx5_ifc_alloc_xrcd_in_bits {
7016 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007017 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007018
Matan Barakb4ff3a32016-02-09 14:57:42 +02007019 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007020 u8 op_mod[0x10];
7021
Matan Barakb4ff3a32016-02-09 14:57:42 +02007022 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007023};
7024
7025struct mlx5_ifc_alloc_uar_out_bits {
7026 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007027 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007028
7029 u8 syndrome[0x20];
7030
Matan Barakb4ff3a32016-02-09 14:57:42 +02007031 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007032 u8 uar[0x18];
7033
Matan Barakb4ff3a32016-02-09 14:57:42 +02007034 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007035};
7036
7037struct mlx5_ifc_alloc_uar_in_bits {
7038 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007039 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007040
Matan Barakb4ff3a32016-02-09 14:57:42 +02007041 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007042 u8 op_mod[0x10];
7043
Matan Barakb4ff3a32016-02-09 14:57:42 +02007044 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007045};
7046
7047struct mlx5_ifc_alloc_transport_domain_out_bits {
7048 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007049 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007050
7051 u8 syndrome[0x20];
7052
Matan Barakb4ff3a32016-02-09 14:57:42 +02007053 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007054 u8 transport_domain[0x18];
7055
Matan Barakb4ff3a32016-02-09 14:57:42 +02007056 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007057};
7058
7059struct mlx5_ifc_alloc_transport_domain_in_bits {
7060 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007061 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007062
Matan Barakb4ff3a32016-02-09 14:57:42 +02007063 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007064 u8 op_mod[0x10];
7065
Matan Barakb4ff3a32016-02-09 14:57:42 +02007066 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007067};
7068
7069struct mlx5_ifc_alloc_q_counter_out_bits {
7070 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007071 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007072
7073 u8 syndrome[0x20];
7074
Matan Barakb4ff3a32016-02-09 14:57:42 +02007075 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007076 u8 counter_set_id[0x8];
7077
Matan Barakb4ff3a32016-02-09 14:57:42 +02007078 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007079};
7080
7081struct mlx5_ifc_alloc_q_counter_in_bits {
7082 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007083 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007084
Matan Barakb4ff3a32016-02-09 14:57:42 +02007085 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007086 u8 op_mod[0x10];
7087
Matan Barakb4ff3a32016-02-09 14:57:42 +02007088 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007089};
7090
7091struct mlx5_ifc_alloc_pd_out_bits {
7092 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007093 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007094
7095 u8 syndrome[0x20];
7096
Matan Barakb4ff3a32016-02-09 14:57:42 +02007097 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007098 u8 pd[0x18];
7099
Matan Barakb4ff3a32016-02-09 14:57:42 +02007100 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007101};
7102
7103struct mlx5_ifc_alloc_pd_in_bits {
7104 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007105 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007106
Matan Barakb4ff3a32016-02-09 14:57:42 +02007107 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007108 u8 op_mod[0x10];
7109
Matan Barakb4ff3a32016-02-09 14:57:42 +02007110 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007111};
7112
Amir Vadai9dc0b282016-05-13 12:55:39 +00007113struct mlx5_ifc_alloc_flow_counter_out_bits {
7114 u8 status[0x8];
7115 u8 reserved_at_8[0x18];
7116
7117 u8 syndrome[0x20];
7118
Rabie Louloua8ffcc72017-07-09 13:39:30 +03007119 u8 flow_counter_id[0x20];
Amir Vadai9dc0b282016-05-13 12:55:39 +00007120
7121 u8 reserved_at_60[0x20];
7122};
7123
7124struct mlx5_ifc_alloc_flow_counter_in_bits {
7125 u8 opcode[0x10];
7126 u8 reserved_at_10[0x10];
7127
7128 u8 reserved_at_20[0x10];
7129 u8 op_mod[0x10];
7130
7131 u8 reserved_at_40[0x40];
7132};
7133
Saeed Mahameede2816822015-05-28 22:28:40 +03007134struct mlx5_ifc_add_vxlan_udp_dport_out_bits {
7135 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007136 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007137
7138 u8 syndrome[0x20];
7139
Matan Barakb4ff3a32016-02-09 14:57:42 +02007140 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007141};
7142
7143struct mlx5_ifc_add_vxlan_udp_dport_in_bits {
7144 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007145 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007146
Matan Barakb4ff3a32016-02-09 14:57:42 +02007147 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007148 u8 op_mod[0x10];
7149
Matan Barakb4ff3a32016-02-09 14:57:42 +02007150 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007151
Matan Barakb4ff3a32016-02-09 14:57:42 +02007152 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007153 u8 vxlan_udp_port[0x10];
7154};
7155
Saeed Mahameed74862162016-06-09 15:11:34 +03007156struct mlx5_ifc_set_rate_limit_out_bits {
7157 u8 status[0x8];
7158 u8 reserved_at_8[0x18];
7159
7160 u8 syndrome[0x20];
7161
7162 u8 reserved_at_40[0x40];
7163};
7164
7165struct mlx5_ifc_set_rate_limit_in_bits {
7166 u8 opcode[0x10];
7167 u8 reserved_at_10[0x10];
7168
7169 u8 reserved_at_20[0x10];
7170 u8 op_mod[0x10];
7171
7172 u8 reserved_at_40[0x10];
7173 u8 rate_limit_index[0x10];
7174
7175 u8 reserved_at_60[0x20];
7176
7177 u8 rate_limit[0x20];
7178};
7179
Saeed Mahameede2816822015-05-28 22:28:40 +03007180struct mlx5_ifc_access_register_out_bits {
7181 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007182 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007183
7184 u8 syndrome[0x20];
7185
Matan Barakb4ff3a32016-02-09 14:57:42 +02007186 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007187
7188 u8 register_data[0][0x20];
7189};
7190
7191enum {
7192 MLX5_ACCESS_REGISTER_IN_OP_MOD_WRITE = 0x0,
7193 MLX5_ACCESS_REGISTER_IN_OP_MOD_READ = 0x1,
7194};
7195
7196struct mlx5_ifc_access_register_in_bits {
7197 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007198 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007199
Matan Barakb4ff3a32016-02-09 14:57:42 +02007200 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007201 u8 op_mod[0x10];
7202
Matan Barakb4ff3a32016-02-09 14:57:42 +02007203 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007204 u8 register_id[0x10];
7205
7206 u8 argument[0x20];
7207
7208 u8 register_data[0][0x20];
7209};
7210
7211struct mlx5_ifc_sltp_reg_bits {
7212 u8 status[0x4];
7213 u8 version[0x4];
7214 u8 local_port[0x8];
7215 u8 pnat[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007216 u8 reserved_at_12[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03007217 u8 lane[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007218 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007219
Matan Barakb4ff3a32016-02-09 14:57:42 +02007220 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007221
Matan Barakb4ff3a32016-02-09 14:57:42 +02007222 u8 reserved_at_40[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03007223 u8 polarity[0x1];
7224 u8 ob_tap0[0x8];
7225 u8 ob_tap1[0x8];
7226 u8 ob_tap2[0x8];
7227
Matan Barakb4ff3a32016-02-09 14:57:42 +02007228 u8 reserved_at_60[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007229 u8 ob_preemp_mode[0x4];
7230 u8 ob_reg[0x8];
7231 u8 ob_bias[0x8];
7232
Matan Barakb4ff3a32016-02-09 14:57:42 +02007233 u8 reserved_at_80[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007234};
7235
7236struct mlx5_ifc_slrg_reg_bits {
7237 u8 status[0x4];
7238 u8 version[0x4];
7239 u8 local_port[0x8];
7240 u8 pnat[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007241 u8 reserved_at_12[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03007242 u8 lane[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007243 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007244
7245 u8 time_to_link_up[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007246 u8 reserved_at_30[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007247 u8 grade_lane_speed[0x4];
7248
7249 u8 grade_version[0x8];
7250 u8 grade[0x18];
7251
Matan Barakb4ff3a32016-02-09 14:57:42 +02007252 u8 reserved_at_60[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007253 u8 height_grade_type[0x4];
7254 u8 height_grade[0x18];
7255
7256 u8 height_dz[0x10];
7257 u8 height_dv[0x10];
7258
Matan Barakb4ff3a32016-02-09 14:57:42 +02007259 u8 reserved_at_a0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007260 u8 height_sigma[0x10];
7261
Matan Barakb4ff3a32016-02-09 14:57:42 +02007262 u8 reserved_at_c0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007263
Matan Barakb4ff3a32016-02-09 14:57:42 +02007264 u8 reserved_at_e0[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007265 u8 phase_grade_type[0x4];
7266 u8 phase_grade[0x18];
7267
Matan Barakb4ff3a32016-02-09 14:57:42 +02007268 u8 reserved_at_100[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007269 u8 phase_eo_pos[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007270 u8 reserved_at_110[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007271 u8 phase_eo_neg[0x8];
7272
7273 u8 ffe_set_tested[0x10];
7274 u8 test_errors_per_lane[0x10];
7275};
7276
7277struct mlx5_ifc_pvlc_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007278 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007279 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007280 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007281
Matan Barakb4ff3a32016-02-09 14:57:42 +02007282 u8 reserved_at_20[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007283 u8 vl_hw_cap[0x4];
7284
Matan Barakb4ff3a32016-02-09 14:57:42 +02007285 u8 reserved_at_40[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007286 u8 vl_admin[0x4];
7287
Matan Barakb4ff3a32016-02-09 14:57:42 +02007288 u8 reserved_at_60[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007289 u8 vl_operational[0x4];
7290};
7291
7292struct mlx5_ifc_pude_reg_bits {
7293 u8 swid[0x8];
7294 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007295 u8 reserved_at_10[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007296 u8 admin_status[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007297 u8 reserved_at_18[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007298 u8 oper_status[0x4];
7299
Matan Barakb4ff3a32016-02-09 14:57:42 +02007300 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007301};
7302
7303struct mlx5_ifc_ptys_reg_bits {
Bodong Wange7e31ca2016-09-07 19:07:58 +03007304 u8 reserved_at_0[0x1];
Saeed Mahameed74862162016-06-09 15:11:34 +03007305 u8 an_disable_admin[0x1];
Bodong Wange7e31ca2016-09-07 19:07:58 +03007306 u8 an_disable_cap[0x1];
7307 u8 reserved_at_3[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03007308 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007309 u8 reserved_at_10[0xd];
Saeed Mahameede2816822015-05-28 22:28:40 +03007310 u8 proto_mask[0x3];
7311
Saeed Mahameed74862162016-06-09 15:11:34 +03007312 u8 an_status[0x4];
7313 u8 reserved_at_24[0x3c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007314
7315 u8 eth_proto_capability[0x20];
7316
7317 u8 ib_link_width_capability[0x10];
7318 u8 ib_proto_capability[0x10];
7319
Matan Barakb4ff3a32016-02-09 14:57:42 +02007320 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007321
7322 u8 eth_proto_admin[0x20];
7323
7324 u8 ib_link_width_admin[0x10];
7325 u8 ib_proto_admin[0x10];
7326
Matan Barakb4ff3a32016-02-09 14:57:42 +02007327 u8 reserved_at_100[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007328
7329 u8 eth_proto_oper[0x20];
7330
7331 u8 ib_link_width_oper[0x10];
7332 u8 ib_proto_oper[0x10];
7333
Eran Ben Elisha5b4793f2017-02-13 14:00:59 +02007334 u8 reserved_at_160[0x1c];
7335 u8 connector_type[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007336
7337 u8 eth_proto_lp_advertise[0x20];
7338
Matan Barakb4ff3a32016-02-09 14:57:42 +02007339 u8 reserved_at_1a0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007340};
7341
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03007342struct mlx5_ifc_mlcr_reg_bits {
7343 u8 reserved_at_0[0x8];
7344 u8 local_port[0x8];
7345 u8 reserved_at_10[0x20];
7346
7347 u8 beacon_duration[0x10];
7348 u8 reserved_at_40[0x10];
7349
7350 u8 beacon_remain[0x10];
7351};
7352
Saeed Mahameede2816822015-05-28 22:28:40 +03007353struct mlx5_ifc_ptas_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007354 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007355
7356 u8 algorithm_options[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007357 u8 reserved_at_30[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007358 u8 repetitions_mode[0x4];
7359 u8 num_of_repetitions[0x8];
7360
7361 u8 grade_version[0x8];
7362 u8 height_grade_type[0x4];
7363 u8 phase_grade_type[0x4];
7364 u8 height_grade_weight[0x8];
7365 u8 phase_grade_weight[0x8];
7366
7367 u8 gisim_measure_bits[0x10];
7368 u8 adaptive_tap_measure_bits[0x10];
7369
7370 u8 ber_bath_high_error_threshold[0x10];
7371 u8 ber_bath_mid_error_threshold[0x10];
7372
7373 u8 ber_bath_low_error_threshold[0x10];
7374 u8 one_ratio_high_threshold[0x10];
7375
7376 u8 one_ratio_high_mid_threshold[0x10];
7377 u8 one_ratio_low_mid_threshold[0x10];
7378
7379 u8 one_ratio_low_threshold[0x10];
7380 u8 ndeo_error_threshold[0x10];
7381
7382 u8 mixer_offset_step_size[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007383 u8 reserved_at_110[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007384 u8 mix90_phase_for_voltage_bath[0x8];
7385
7386 u8 mixer_offset_start[0x10];
7387 u8 mixer_offset_end[0x10];
7388
Matan Barakb4ff3a32016-02-09 14:57:42 +02007389 u8 reserved_at_140[0x15];
Saeed Mahameede2816822015-05-28 22:28:40 +03007390 u8 ber_test_time[0xb];
7391};
7392
7393struct mlx5_ifc_pspa_reg_bits {
7394 u8 swid[0x8];
7395 u8 local_port[0x8];
7396 u8 sub_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007397 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007398
Matan Barakb4ff3a32016-02-09 14:57:42 +02007399 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007400};
7401
7402struct mlx5_ifc_pqdr_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007403 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007404 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007405 u8 reserved_at_10[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03007406 u8 prio[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007407 u8 reserved_at_18[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03007408 u8 mode[0x2];
7409
Matan Barakb4ff3a32016-02-09 14:57:42 +02007410 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007411
Matan Barakb4ff3a32016-02-09 14:57:42 +02007412 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007413 u8 min_threshold[0x10];
7414
Matan Barakb4ff3a32016-02-09 14:57:42 +02007415 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007416 u8 max_threshold[0x10];
7417
Matan Barakb4ff3a32016-02-09 14:57:42 +02007418 u8 reserved_at_80[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007419 u8 mark_probability_denominator[0x10];
7420
Matan Barakb4ff3a32016-02-09 14:57:42 +02007421 u8 reserved_at_a0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007422};
7423
7424struct mlx5_ifc_ppsc_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007425 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007426 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007427 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007428
Matan Barakb4ff3a32016-02-09 14:57:42 +02007429 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007430
Matan Barakb4ff3a32016-02-09 14:57:42 +02007431 u8 reserved_at_80[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007432 u8 wrps_admin[0x4];
7433
Matan Barakb4ff3a32016-02-09 14:57:42 +02007434 u8 reserved_at_a0[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007435 u8 wrps_status[0x4];
7436
Matan Barakb4ff3a32016-02-09 14:57:42 +02007437 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007438 u8 up_threshold[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007439 u8 reserved_at_d0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007440 u8 down_threshold[0x8];
7441
Matan Barakb4ff3a32016-02-09 14:57:42 +02007442 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007443
Matan Barakb4ff3a32016-02-09 14:57:42 +02007444 u8 reserved_at_100[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007445 u8 srps_admin[0x4];
7446
Matan Barakb4ff3a32016-02-09 14:57:42 +02007447 u8 reserved_at_120[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007448 u8 srps_status[0x4];
7449
Matan Barakb4ff3a32016-02-09 14:57:42 +02007450 u8 reserved_at_140[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007451};
7452
7453struct mlx5_ifc_pplr_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007454 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007455 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007456 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007457
Matan Barakb4ff3a32016-02-09 14:57:42 +02007458 u8 reserved_at_20[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007459 u8 lb_cap[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007460 u8 reserved_at_30[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007461 u8 lb_en[0x8];
7462};
7463
7464struct mlx5_ifc_pplm_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007465 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007466 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007467 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007468
Matan Barakb4ff3a32016-02-09 14:57:42 +02007469 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007470
7471 u8 port_profile_mode[0x8];
7472 u8 static_port_profile[0x8];
7473 u8 active_port_profile[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007474 u8 reserved_at_58[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007475
7476 u8 retransmission_active[0x8];
7477 u8 fec_mode_active[0x18];
7478
Matan Barakb4ff3a32016-02-09 14:57:42 +02007479 u8 reserved_at_80[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007480};
7481
7482struct mlx5_ifc_ppcnt_reg_bits {
7483 u8 swid[0x8];
7484 u8 local_port[0x8];
7485 u8 pnat[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007486 u8 reserved_at_12[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007487 u8 grp[0x6];
7488
7489 u8 clr[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007490 u8 reserved_at_21[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007491 u8 prio_tc[0x3];
7492
7493 union mlx5_ifc_eth_cntrs_grp_data_layout_auto_bits counter_set;
7494};
7495
Gal Pressman8ed1a632016-11-17 13:46:01 +02007496struct mlx5_ifc_mpcnt_reg_bits {
7497 u8 reserved_at_0[0x8];
7498 u8 pcie_index[0x8];
7499 u8 reserved_at_10[0xa];
7500 u8 grp[0x6];
7501
7502 u8 clr[0x1];
7503 u8 reserved_at_21[0x1f];
7504
7505 union mlx5_ifc_pcie_cntrs_grp_data_layout_auto_bits counter_set;
7506};
7507
Saeed Mahameede2816822015-05-28 22:28:40 +03007508struct mlx5_ifc_ppad_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007509 u8 reserved_at_0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03007510 u8 single_mac[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007511 u8 reserved_at_4[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007512 u8 local_port[0x8];
7513 u8 mac_47_32[0x10];
7514
7515 u8 mac_31_0[0x20];
7516
Matan Barakb4ff3a32016-02-09 14:57:42 +02007517 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007518};
7519
7520struct mlx5_ifc_pmtu_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007521 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007522 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007523 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007524
7525 u8 max_mtu[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007526 u8 reserved_at_30[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007527
7528 u8 admin_mtu[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007529 u8 reserved_at_50[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007530
7531 u8 oper_mtu[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007532 u8 reserved_at_70[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007533};
7534
7535struct mlx5_ifc_pmpr_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007536 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007537 u8 module[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007538 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007539
Matan Barakb4ff3a32016-02-09 14:57:42 +02007540 u8 reserved_at_20[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007541 u8 attenuation_5g[0x8];
7542
Matan Barakb4ff3a32016-02-09 14:57:42 +02007543 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007544 u8 attenuation_7g[0x8];
7545
Matan Barakb4ff3a32016-02-09 14:57:42 +02007546 u8 reserved_at_60[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007547 u8 attenuation_12g[0x8];
7548};
7549
7550struct mlx5_ifc_pmpe_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007551 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007552 u8 module[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007553 u8 reserved_at_10[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007554 u8 module_status[0x4];
7555
Matan Barakb4ff3a32016-02-09 14:57:42 +02007556 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007557};
7558
7559struct mlx5_ifc_pmpc_reg_bits {
7560 u8 module_state_updated[32][0x8];
7561};
7562
7563struct mlx5_ifc_pmlpn_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007564 u8 reserved_at_0[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007565 u8 mlpn_status[0x4];
7566 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007567 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007568
7569 u8 e[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007570 u8 reserved_at_21[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03007571};
7572
7573struct mlx5_ifc_pmlp_reg_bits {
7574 u8 rxtx[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007575 u8 reserved_at_1[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03007576 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007577 u8 reserved_at_10[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007578 u8 width[0x8];
7579
7580 u8 lane0_module_mapping[0x20];
7581
7582 u8 lane1_module_mapping[0x20];
7583
7584 u8 lane2_module_mapping[0x20];
7585
7586 u8 lane3_module_mapping[0x20];
7587
Matan Barakb4ff3a32016-02-09 14:57:42 +02007588 u8 reserved_at_a0[0x160];
Saeed Mahameede2816822015-05-28 22:28:40 +03007589};
7590
7591struct mlx5_ifc_pmaos_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007592 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007593 u8 module[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007594 u8 reserved_at_10[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007595 u8 admin_status[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007596 u8 reserved_at_18[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007597 u8 oper_status[0x4];
7598
7599 u8 ase[0x1];
7600 u8 ee[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007601 u8 reserved_at_22[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007602 u8 e[0x2];
7603
Matan Barakb4ff3a32016-02-09 14:57:42 +02007604 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007605};
7606
7607struct mlx5_ifc_plpc_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007608 u8 reserved_at_0[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007609 u8 profile_id[0xc];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007610 u8 reserved_at_10[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007611 u8 proto_mask[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007612 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007613
Matan Barakb4ff3a32016-02-09 14:57:42 +02007614 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007615 u8 lane_speed[0x10];
7616
Matan Barakb4ff3a32016-02-09 14:57:42 +02007617 u8 reserved_at_40[0x17];
Saeed Mahameede2816822015-05-28 22:28:40 +03007618 u8 lpbf[0x1];
7619 u8 fec_mode_policy[0x8];
7620
7621 u8 retransmission_capability[0x8];
7622 u8 fec_mode_capability[0x18];
7623
7624 u8 retransmission_support_admin[0x8];
7625 u8 fec_mode_support_admin[0x18];
7626
7627 u8 retransmission_request_admin[0x8];
7628 u8 fec_mode_request_admin[0x18];
7629
Matan Barakb4ff3a32016-02-09 14:57:42 +02007630 u8 reserved_at_c0[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03007631};
7632
7633struct mlx5_ifc_plib_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007634 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007635 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007636 u8 reserved_at_10[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007637 u8 ib_port[0x8];
7638
Matan Barakb4ff3a32016-02-09 14:57:42 +02007639 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007640};
7641
7642struct mlx5_ifc_plbf_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007643 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007644 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007645 u8 reserved_at_10[0xd];
Saeed Mahameede2816822015-05-28 22:28:40 +03007646 u8 lbf_mode[0x3];
7647
Matan Barakb4ff3a32016-02-09 14:57:42 +02007648 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007649};
7650
7651struct mlx5_ifc_pipg_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007652 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007653 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007654 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007655
7656 u8 dic[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007657 u8 reserved_at_21[0x19];
Saeed Mahameede2816822015-05-28 22:28:40 +03007658 u8 ipg[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007659 u8 reserved_at_3e[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03007660};
7661
7662struct mlx5_ifc_pifr_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007663 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007664 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007665 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007666
Matan Barakb4ff3a32016-02-09 14:57:42 +02007667 u8 reserved_at_20[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03007668
7669 u8 port_filter[8][0x20];
7670
7671 u8 port_filter_update_en[8][0x20];
7672};
7673
7674struct mlx5_ifc_pfcc_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007675 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007676 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007677 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007678
7679 u8 ppan[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007680 u8 reserved_at_24[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007681 u8 prio_mask_tx[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007682 u8 reserved_at_30[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007683 u8 prio_mask_rx[0x8];
7684
7685 u8 pptx[0x1];
7686 u8 aptx[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007687 u8 reserved_at_42[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03007688 u8 pfctx[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007689 u8 reserved_at_50[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007690
7691 u8 pprx[0x1];
7692 u8 aprx[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007693 u8 reserved_at_62[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03007694 u8 pfcrx[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007695 u8 reserved_at_70[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007696
Matan Barakb4ff3a32016-02-09 14:57:42 +02007697 u8 reserved_at_80[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03007698};
7699
7700struct mlx5_ifc_pelc_reg_bits {
7701 u8 op[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007702 u8 reserved_at_4[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007703 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007704 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007705
7706 u8 op_admin[0x8];
7707 u8 op_capability[0x8];
7708 u8 op_request[0x8];
7709 u8 op_active[0x8];
7710
7711 u8 admin[0x40];
7712
7713 u8 capability[0x40];
7714
7715 u8 request[0x40];
7716
7717 u8 active[0x40];
7718
Matan Barakb4ff3a32016-02-09 14:57:42 +02007719 u8 reserved_at_140[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03007720};
7721
7722struct mlx5_ifc_peir_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007723 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007724 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007725 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007726
Matan Barakb4ff3a32016-02-09 14:57:42 +02007727 u8 reserved_at_20[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007728 u8 error_count[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007729 u8 reserved_at_30[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007730
Matan Barakb4ff3a32016-02-09 14:57:42 +02007731 u8 reserved_at_40[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007732 u8 lane[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007733 u8 reserved_at_50[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007734 u8 error_type[0x8];
7735};
7736
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02007737struct mlx5_ifc_pcam_enhanced_features_bits {
Gal Pressman2dba0792017-06-18 14:56:45 +03007738 u8 reserved_at_0[0x7b];
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02007739
Gal Pressman2dba0792017-06-18 14:56:45 +03007740 u8 rx_buffer_fullness_counters[0x1];
Eran Ben Elisha5b4793f2017-02-13 14:00:59 +02007741 u8 ptys_connector_type[0x1];
7742 u8 reserved_at_7d[0x1];
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02007743 u8 ppcnt_discard_group[0x1];
7744 u8 ppcnt_statistical_group[0x1];
7745};
7746
7747struct mlx5_ifc_pcam_reg_bits {
7748 u8 reserved_at_0[0x8];
7749 u8 feature_group[0x8];
7750 u8 reserved_at_10[0x8];
7751 u8 access_reg_group[0x8];
7752
7753 u8 reserved_at_20[0x20];
7754
7755 union {
7756 u8 reserved_at_0[0x80];
7757 } port_access_reg_cap_mask;
7758
7759 u8 reserved_at_c0[0x80];
7760
7761 union {
7762 struct mlx5_ifc_pcam_enhanced_features_bits enhanced_features;
7763 u8 reserved_at_0[0x80];
7764 } feature_cap_mask;
7765
7766 u8 reserved_at_1c0[0xc0];
7767};
7768
7769struct mlx5_ifc_mcam_enhanced_features_bits {
Gal Pressman5405fa22017-06-15 18:29:23 +03007770 u8 reserved_at_0[0x7b];
7771 u8 pcie_outbound_stalled[0x1];
Eran Ben Elishaefae7f72017-05-12 02:47:02 +03007772 u8 tx_overflow_buffer_pkt[0x1];
Eugenia Emantayevfa367682017-05-25 16:09:34 +03007773 u8 mtpps_enh_out_per_adj[0x1];
7774 u8 mtpps_fs[0x1];
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02007775 u8 pcie_performance_group[0x1];
7776};
7777
Or Gerlitz0ab87742017-06-11 15:25:38 +03007778struct mlx5_ifc_mcam_access_reg_bits {
7779 u8 reserved_at_0[0x1c];
7780 u8 mcda[0x1];
7781 u8 mcc[0x1];
7782 u8 mcqi[0x1];
7783 u8 reserved_at_1f[0x1];
7784
7785 u8 regs_95_to_64[0x20];
7786 u8 regs_63_to_32[0x20];
7787 u8 regs_31_to_0[0x20];
7788};
7789
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02007790struct mlx5_ifc_mcam_reg_bits {
7791 u8 reserved_at_0[0x8];
7792 u8 feature_group[0x8];
7793 u8 reserved_at_10[0x8];
7794 u8 access_reg_group[0x8];
7795
7796 u8 reserved_at_20[0x20];
7797
7798 union {
Or Gerlitz0ab87742017-06-11 15:25:38 +03007799 struct mlx5_ifc_mcam_access_reg_bits access_regs;
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02007800 u8 reserved_at_0[0x80];
7801 } mng_access_reg_cap_mask;
7802
7803 u8 reserved_at_c0[0x80];
7804
7805 union {
7806 struct mlx5_ifc_mcam_enhanced_features_bits enhanced_features;
7807 u8 reserved_at_0[0x80];
7808 } mng_feature_cap_mask;
7809
7810 u8 reserved_at_1c0[0x80];
7811};
7812
Saeed Mahameede2816822015-05-28 22:28:40 +03007813struct mlx5_ifc_pcap_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007814 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007815 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007816 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007817
7818 u8 port_capability_mask[4][0x20];
7819};
7820
7821struct mlx5_ifc_paos_reg_bits {
7822 u8 swid[0x8];
7823 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007824 u8 reserved_at_10[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007825 u8 admin_status[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007826 u8 reserved_at_18[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007827 u8 oper_status[0x4];
7828
7829 u8 ase[0x1];
7830 u8 ee[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007831 u8 reserved_at_22[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007832 u8 e[0x2];
7833
Matan Barakb4ff3a32016-02-09 14:57:42 +02007834 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007835};
7836
7837struct mlx5_ifc_pamp_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007838 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007839 u8 opamp_group[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007840 u8 reserved_at_10[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007841 u8 opamp_group_type[0x4];
7842
7843 u8 start_index[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007844 u8 reserved_at_30[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007845 u8 num_of_indices[0xc];
7846
7847 u8 index_data[18][0x10];
7848};
7849
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03007850struct mlx5_ifc_pcmr_reg_bits {
7851 u8 reserved_at_0[0x8];
7852 u8 local_port[0x8];
7853 u8 reserved_at_10[0x2e];
7854 u8 fcs_cap[0x1];
7855 u8 reserved_at_3f[0x1f];
7856 u8 fcs_chk[0x1];
7857 u8 reserved_at_5f[0x1];
7858};
7859
Saeed Mahameede2816822015-05-28 22:28:40 +03007860struct mlx5_ifc_lane_2_module_mapping_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007861 u8 reserved_at_0[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03007862 u8 rx_lane[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007863 u8 reserved_at_8[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03007864 u8 tx_lane[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007865 u8 reserved_at_10[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007866 u8 module[0x8];
7867};
7868
7869struct mlx5_ifc_bufferx_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007870 u8 reserved_at_0[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03007871 u8 lossy[0x1];
7872 u8 epsb[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007873 u8 reserved_at_8[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007874 u8 size[0xc];
7875
7876 u8 xoff_threshold[0x10];
7877 u8 xon_threshold[0x10];
7878};
7879
7880struct mlx5_ifc_set_node_in_bits {
7881 u8 node_description[64][0x8];
7882};
7883
7884struct mlx5_ifc_register_power_settings_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007885 u8 reserved_at_0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007886 u8 power_settings_level[0x8];
7887
Matan Barakb4ff3a32016-02-09 14:57:42 +02007888 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007889};
7890
7891struct mlx5_ifc_register_host_endianness_bits {
7892 u8 he[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007893 u8 reserved_at_1[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03007894
Matan Barakb4ff3a32016-02-09 14:57:42 +02007895 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007896};
7897
7898struct mlx5_ifc_umr_pointer_desc_argument_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007899 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007900
7901 u8 mkey[0x20];
7902
7903 u8 addressh_63_32[0x20];
7904
7905 u8 addressl_31_0[0x20];
7906};
7907
7908struct mlx5_ifc_ud_adrs_vector_bits {
7909 u8 dc_key[0x40];
7910
7911 u8 ext[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007912 u8 reserved_at_41[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03007913 u8 destination_qp_dct[0x18];
7914
7915 u8 static_rate[0x4];
7916 u8 sl_eth_prio[0x4];
7917 u8 fl[0x1];
7918 u8 mlid[0x7];
7919 u8 rlid_udp_sport[0x10];
7920
Matan Barakb4ff3a32016-02-09 14:57:42 +02007921 u8 reserved_at_80[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007922
7923 u8 rmac_47_16[0x20];
7924
7925 u8 rmac_15_0[0x10];
7926 u8 tclass[0x8];
7927 u8 hop_limit[0x8];
7928
Matan Barakb4ff3a32016-02-09 14:57:42 +02007929 u8 reserved_at_e0[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03007930 u8 grh[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007931 u8 reserved_at_e2[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03007932 u8 src_addr_index[0x8];
7933 u8 flow_label[0x14];
7934
7935 u8 rgid_rip[16][0x8];
7936};
7937
7938struct mlx5_ifc_pages_req_event_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007939 u8 reserved_at_0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007940 u8 function_id[0x10];
7941
7942 u8 num_pages[0x20];
7943
Matan Barakb4ff3a32016-02-09 14:57:42 +02007944 u8 reserved_at_40[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03007945};
7946
7947struct mlx5_ifc_eqe_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007948 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007949 u8 event_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007950 u8 reserved_at_10[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007951 u8 event_sub_type[0x8];
7952
Matan Barakb4ff3a32016-02-09 14:57:42 +02007953 u8 reserved_at_20[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03007954
7955 union mlx5_ifc_event_auto_bits event_data;
7956
Matan Barakb4ff3a32016-02-09 14:57:42 +02007957 u8 reserved_at_1e0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007958 u8 signature[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007959 u8 reserved_at_1f8[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03007960 u8 owner[0x1];
7961};
7962
7963enum {
7964 MLX5_CMD_QUEUE_ENTRY_TYPE_PCIE_CMD_IF_TRANSPORT = 0x7,
7965};
7966
7967struct mlx5_ifc_cmd_queue_entry_bits {
7968 u8 type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007969 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007970
7971 u8 input_length[0x20];
7972
7973 u8 input_mailbox_pointer_63_32[0x20];
7974
7975 u8 input_mailbox_pointer_31_9[0x17];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007976 u8 reserved_at_77[0x9];
Saeed Mahameede2816822015-05-28 22:28:40 +03007977
7978 u8 command_input_inline_data[16][0x8];
7979
7980 u8 command_output_inline_data[16][0x8];
7981
7982 u8 output_mailbox_pointer_63_32[0x20];
7983
7984 u8 output_mailbox_pointer_31_9[0x17];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007985 u8 reserved_at_1b7[0x9];
Saeed Mahameede2816822015-05-28 22:28:40 +03007986
7987 u8 output_length[0x20];
7988
7989 u8 token[0x8];
7990 u8 signature[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007991 u8 reserved_at_1f0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007992 u8 status[0x7];
7993 u8 ownership[0x1];
7994};
7995
7996struct mlx5_ifc_cmd_out_bits {
7997 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007998 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007999
8000 u8 syndrome[0x20];
8001
8002 u8 command_output[0x20];
8003};
8004
8005struct mlx5_ifc_cmd_in_bits {
8006 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008007 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03008008
Matan Barakb4ff3a32016-02-09 14:57:42 +02008009 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03008010 u8 op_mod[0x10];
8011
8012 u8 command[0][0x20];
8013};
8014
8015struct mlx5_ifc_cmd_if_box_bits {
8016 u8 mailbox_data[512][0x8];
8017
Matan Barakb4ff3a32016-02-09 14:57:42 +02008018 u8 reserved_at_1000[0x180];
Saeed Mahameede2816822015-05-28 22:28:40 +03008019
8020 u8 next_pointer_63_32[0x20];
8021
8022 u8 next_pointer_31_10[0x16];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008023 u8 reserved_at_11b6[0xa];
Saeed Mahameede2816822015-05-28 22:28:40 +03008024
8025 u8 block_number[0x20];
8026
Matan Barakb4ff3a32016-02-09 14:57:42 +02008027 u8 reserved_at_11e0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03008028 u8 token[0x8];
8029 u8 ctrl_signature[0x8];
8030 u8 signature[0x8];
8031};
8032
8033struct mlx5_ifc_mtt_bits {
8034 u8 ptag_63_32[0x20];
8035
8036 u8 ptag_31_8[0x18];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008037 u8 reserved_at_38[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03008038 u8 wr_en[0x1];
8039 u8 rd_en[0x1];
8040};
8041
Tariq Toukan928cfe82016-02-22 18:17:29 +02008042struct mlx5_ifc_query_wol_rol_out_bits {
8043 u8 status[0x8];
8044 u8 reserved_at_8[0x18];
8045
8046 u8 syndrome[0x20];
8047
8048 u8 reserved_at_40[0x10];
8049 u8 rol_mode[0x8];
8050 u8 wol_mode[0x8];
8051
8052 u8 reserved_at_60[0x20];
8053};
8054
8055struct mlx5_ifc_query_wol_rol_in_bits {
8056 u8 opcode[0x10];
8057 u8 reserved_at_10[0x10];
8058
8059 u8 reserved_at_20[0x10];
8060 u8 op_mod[0x10];
8061
8062 u8 reserved_at_40[0x40];
8063};
8064
8065struct mlx5_ifc_set_wol_rol_out_bits {
8066 u8 status[0x8];
8067 u8 reserved_at_8[0x18];
8068
8069 u8 syndrome[0x20];
8070
8071 u8 reserved_at_40[0x40];
8072};
8073
8074struct mlx5_ifc_set_wol_rol_in_bits {
8075 u8 opcode[0x10];
8076 u8 reserved_at_10[0x10];
8077
8078 u8 reserved_at_20[0x10];
8079 u8 op_mod[0x10];
8080
8081 u8 rol_mode_valid[0x1];
8082 u8 wol_mode_valid[0x1];
8083 u8 reserved_at_42[0xe];
8084 u8 rol_mode[0x8];
8085 u8 wol_mode[0x8];
8086
8087 u8 reserved_at_60[0x20];
8088};
8089
Saeed Mahameede2816822015-05-28 22:28:40 +03008090enum {
8091 MLX5_INITIAL_SEG_NIC_INTERFACE_FULL_DRIVER = 0x0,
8092 MLX5_INITIAL_SEG_NIC_INTERFACE_DISABLED = 0x1,
8093 MLX5_INITIAL_SEG_NIC_INTERFACE_NO_DRAM_NIC = 0x2,
8094};
8095
8096enum {
8097 MLX5_INITIAL_SEG_NIC_INTERFACE_SUPPORTED_FULL_DRIVER = 0x0,
8098 MLX5_INITIAL_SEG_NIC_INTERFACE_SUPPORTED_DISABLED = 0x1,
8099 MLX5_INITIAL_SEG_NIC_INTERFACE_SUPPORTED_NO_DRAM_NIC = 0x2,
8100};
8101
8102enum {
8103 MLX5_INITIAL_SEG_HEALTH_SYNDROME_FW_INTERNAL_ERR = 0x1,
8104 MLX5_INITIAL_SEG_HEALTH_SYNDROME_DEAD_IRISC = 0x7,
8105 MLX5_INITIAL_SEG_HEALTH_SYNDROME_HW_FATAL_ERR = 0x8,
8106 MLX5_INITIAL_SEG_HEALTH_SYNDROME_FW_CRC_ERR = 0x9,
8107 MLX5_INITIAL_SEG_HEALTH_SYNDROME_ICM_FETCH_PCI_ERR = 0xa,
8108 MLX5_INITIAL_SEG_HEALTH_SYNDROME_ICM_PAGE_ERR = 0xb,
8109 MLX5_INITIAL_SEG_HEALTH_SYNDROME_ASYNCHRONOUS_EQ_BUF_OVERRUN = 0xc,
8110 MLX5_INITIAL_SEG_HEALTH_SYNDROME_EQ_IN_ERR = 0xd,
8111 MLX5_INITIAL_SEG_HEALTH_SYNDROME_EQ_INV = 0xe,
8112 MLX5_INITIAL_SEG_HEALTH_SYNDROME_FFSER_ERR = 0xf,
8113 MLX5_INITIAL_SEG_HEALTH_SYNDROME_HIGH_TEMP_ERR = 0x10,
8114};
8115
8116struct mlx5_ifc_initial_seg_bits {
8117 u8 fw_rev_minor[0x10];
8118 u8 fw_rev_major[0x10];
8119
8120 u8 cmd_interface_rev[0x10];
8121 u8 fw_rev_subminor[0x10];
8122
Matan Barakb4ff3a32016-02-09 14:57:42 +02008123 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03008124
8125 u8 cmdq_phy_addr_63_32[0x20];
8126
8127 u8 cmdq_phy_addr_31_12[0x14];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008128 u8 reserved_at_b4[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03008129 u8 nic_interface[0x2];
8130 u8 log_cmdq_size[0x4];
8131 u8 log_cmdq_stride[0x4];
8132
8133 u8 command_doorbell_vector[0x20];
8134
Matan Barakb4ff3a32016-02-09 14:57:42 +02008135 u8 reserved_at_e0[0xf00];
Saeed Mahameede2816822015-05-28 22:28:40 +03008136
8137 u8 initializing[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008138 u8 reserved_at_fe1[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03008139 u8 nic_interface_supported[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008140 u8 reserved_at_fe8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03008141
8142 struct mlx5_ifc_health_buffer_bits health_buffer;
8143
8144 u8 no_dram_nic_offset[0x20];
8145
Matan Barakb4ff3a32016-02-09 14:57:42 +02008146 u8 reserved_at_1220[0x6e40];
Saeed Mahameede2816822015-05-28 22:28:40 +03008147
Matan Barakb4ff3a32016-02-09 14:57:42 +02008148 u8 reserved_at_8060[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03008149 u8 clear_int[0x1];
8150
8151 u8 health_syndrome[0x8];
8152 u8 health_counter[0x18];
8153
Matan Barakb4ff3a32016-02-09 14:57:42 +02008154 u8 reserved_at_80a0[0x17fc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03008155};
8156
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +03008157struct mlx5_ifc_mtpps_reg_bits {
8158 u8 reserved_at_0[0xc];
8159 u8 cap_number_of_pps_pins[0x4];
8160 u8 reserved_at_10[0x4];
8161 u8 cap_max_num_of_pps_in_pins[0x4];
8162 u8 reserved_at_18[0x4];
8163 u8 cap_max_num_of_pps_out_pins[0x4];
8164
8165 u8 reserved_at_20[0x24];
8166 u8 cap_pin_3_mode[0x4];
8167 u8 reserved_at_48[0x4];
8168 u8 cap_pin_2_mode[0x4];
8169 u8 reserved_at_50[0x4];
8170 u8 cap_pin_1_mode[0x4];
8171 u8 reserved_at_58[0x4];
8172 u8 cap_pin_0_mode[0x4];
8173
8174 u8 reserved_at_60[0x4];
8175 u8 cap_pin_7_mode[0x4];
8176 u8 reserved_at_68[0x4];
8177 u8 cap_pin_6_mode[0x4];
8178 u8 reserved_at_70[0x4];
8179 u8 cap_pin_5_mode[0x4];
8180 u8 reserved_at_78[0x4];
8181 u8 cap_pin_4_mode[0x4];
8182
Eugenia Emantayevfa367682017-05-25 16:09:34 +03008183 u8 field_select[0x20];
8184 u8 reserved_at_a0[0x60];
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +03008185
8186 u8 enable[0x1];
8187 u8 reserved_at_101[0xb];
8188 u8 pattern[0x4];
8189 u8 reserved_at_110[0x4];
8190 u8 pin_mode[0x4];
8191 u8 pin[0x8];
8192
8193 u8 reserved_at_120[0x20];
8194
8195 u8 time_stamp[0x40];
8196
8197 u8 out_pulse_duration[0x10];
8198 u8 out_periodic_adjustment[0x10];
Eugenia Emantayevfa367682017-05-25 16:09:34 +03008199 u8 enhanced_out_periodic_adjustment[0x20];
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +03008200
Eugenia Emantayevfa367682017-05-25 16:09:34 +03008201 u8 reserved_at_1c0[0x20];
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +03008202};
8203
8204struct mlx5_ifc_mtppse_reg_bits {
8205 u8 reserved_at_0[0x18];
8206 u8 pin[0x8];
8207 u8 event_arm[0x1];
8208 u8 reserved_at_21[0x1b];
8209 u8 event_generation_mode[0x4];
8210 u8 reserved_at_40[0x40];
8211};
8212
Or Gerlitz47176282017-04-18 13:35:39 +03008213struct mlx5_ifc_mcqi_cap_bits {
8214 u8 supported_info_bitmask[0x20];
8215
8216 u8 component_size[0x20];
8217
8218 u8 max_component_size[0x20];
8219
8220 u8 log_mcda_word_size[0x4];
8221 u8 reserved_at_64[0xc];
8222 u8 mcda_max_write_size[0x10];
8223
8224 u8 rd_en[0x1];
8225 u8 reserved_at_81[0x1];
8226 u8 match_chip_id[0x1];
8227 u8 match_psid[0x1];
8228 u8 check_user_timestamp[0x1];
8229 u8 match_base_guid_mac[0x1];
8230 u8 reserved_at_86[0x1a];
8231};
8232
8233struct mlx5_ifc_mcqi_reg_bits {
8234 u8 read_pending_component[0x1];
8235 u8 reserved_at_1[0xf];
8236 u8 component_index[0x10];
8237
8238 u8 reserved_at_20[0x20];
8239
8240 u8 reserved_at_40[0x1b];
8241 u8 info_type[0x5];
8242
8243 u8 info_size[0x20];
8244
8245 u8 offset[0x20];
8246
8247 u8 reserved_at_a0[0x10];
8248 u8 data_size[0x10];
8249
8250 u8 data[0][0x20];
8251};
8252
8253struct mlx5_ifc_mcc_reg_bits {
8254 u8 reserved_at_0[0x4];
8255 u8 time_elapsed_since_last_cmd[0xc];
8256 u8 reserved_at_10[0x8];
8257 u8 instruction[0x8];
8258
8259 u8 reserved_at_20[0x10];
8260 u8 component_index[0x10];
8261
8262 u8 reserved_at_40[0x8];
8263 u8 update_handle[0x18];
8264
8265 u8 handle_owner_type[0x4];
8266 u8 handle_owner_host_id[0x4];
8267 u8 reserved_at_68[0x1];
8268 u8 control_progress[0x7];
8269 u8 error_code[0x8];
8270 u8 reserved_at_78[0x4];
8271 u8 control_state[0x4];
8272
8273 u8 component_size[0x20];
8274
8275 u8 reserved_at_a0[0x60];
8276};
8277
8278struct mlx5_ifc_mcda_reg_bits {
8279 u8 reserved_at_0[0x8];
8280 u8 update_handle[0x18];
8281
8282 u8 offset[0x20];
8283
8284 u8 reserved_at_40[0x10];
8285 u8 size[0x10];
8286
8287 u8 reserved_at_60[0x20];
8288
8289 u8 data[0][0x20];
8290};
8291
Saeed Mahameede2816822015-05-28 22:28:40 +03008292union mlx5_ifc_ports_control_registers_document_bits {
8293 struct mlx5_ifc_bufferx_reg_bits bufferx_reg;
8294 struct mlx5_ifc_eth_2819_cntrs_grp_data_layout_bits eth_2819_cntrs_grp_data_layout;
8295 struct mlx5_ifc_eth_2863_cntrs_grp_data_layout_bits eth_2863_cntrs_grp_data_layout;
8296 struct mlx5_ifc_eth_3635_cntrs_grp_data_layout_bits eth_3635_cntrs_grp_data_layout;
8297 struct mlx5_ifc_eth_802_3_cntrs_grp_data_layout_bits eth_802_3_cntrs_grp_data_layout;
8298 struct mlx5_ifc_eth_extended_cntrs_grp_data_layout_bits eth_extended_cntrs_grp_data_layout;
8299 struct mlx5_ifc_eth_per_prio_grp_data_layout_bits eth_per_prio_grp_data_layout;
8300 struct mlx5_ifc_eth_per_traffic_grp_data_layout_bits eth_per_traffic_grp_data_layout;
8301 struct mlx5_ifc_lane_2_module_mapping_bits lane_2_module_mapping;
8302 struct mlx5_ifc_pamp_reg_bits pamp_reg;
8303 struct mlx5_ifc_paos_reg_bits paos_reg;
8304 struct mlx5_ifc_pcap_reg_bits pcap_reg;
8305 struct mlx5_ifc_peir_reg_bits peir_reg;
8306 struct mlx5_ifc_pelc_reg_bits pelc_reg;
8307 struct mlx5_ifc_pfcc_reg_bits pfcc_reg;
Meny Yossefi1c64bf62016-02-18 18:15:00 +02008308 struct mlx5_ifc_ib_port_cntrs_grp_data_layout_bits ib_port_cntrs_grp_data_layout;
Saeed Mahameede2816822015-05-28 22:28:40 +03008309 struct mlx5_ifc_phys_layer_cntrs_bits phys_layer_cntrs;
8310 struct mlx5_ifc_pifr_reg_bits pifr_reg;
8311 struct mlx5_ifc_pipg_reg_bits pipg_reg;
8312 struct mlx5_ifc_plbf_reg_bits plbf_reg;
8313 struct mlx5_ifc_plib_reg_bits plib_reg;
8314 struct mlx5_ifc_plpc_reg_bits plpc_reg;
8315 struct mlx5_ifc_pmaos_reg_bits pmaos_reg;
8316 struct mlx5_ifc_pmlp_reg_bits pmlp_reg;
8317 struct mlx5_ifc_pmlpn_reg_bits pmlpn_reg;
8318 struct mlx5_ifc_pmpc_reg_bits pmpc_reg;
8319 struct mlx5_ifc_pmpe_reg_bits pmpe_reg;
8320 struct mlx5_ifc_pmpr_reg_bits pmpr_reg;
8321 struct mlx5_ifc_pmtu_reg_bits pmtu_reg;
8322 struct mlx5_ifc_ppad_reg_bits ppad_reg;
8323 struct mlx5_ifc_ppcnt_reg_bits ppcnt_reg;
Gal Pressman8ed1a632016-11-17 13:46:01 +02008324 struct mlx5_ifc_mpcnt_reg_bits mpcnt_reg;
Saeed Mahameede2816822015-05-28 22:28:40 +03008325 struct mlx5_ifc_pplm_reg_bits pplm_reg;
8326 struct mlx5_ifc_pplr_reg_bits pplr_reg;
8327 struct mlx5_ifc_ppsc_reg_bits ppsc_reg;
8328 struct mlx5_ifc_pqdr_reg_bits pqdr_reg;
8329 struct mlx5_ifc_pspa_reg_bits pspa_reg;
8330 struct mlx5_ifc_ptas_reg_bits ptas_reg;
8331 struct mlx5_ifc_ptys_reg_bits ptys_reg;
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03008332 struct mlx5_ifc_mlcr_reg_bits mlcr_reg;
Saeed Mahameede2816822015-05-28 22:28:40 +03008333 struct mlx5_ifc_pude_reg_bits pude_reg;
8334 struct mlx5_ifc_pvlc_reg_bits pvlc_reg;
8335 struct mlx5_ifc_slrg_reg_bits slrg_reg;
8336 struct mlx5_ifc_sltp_reg_bits sltp_reg;
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +03008337 struct mlx5_ifc_mtpps_reg_bits mtpps_reg;
8338 struct mlx5_ifc_mtppse_reg_bits mtppse_reg;
Ilan Tayaria9956d32017-04-18 13:10:41 +03008339 struct mlx5_ifc_fpga_access_reg_bits fpga_access_reg;
Ilan Tayarie29341f2017-03-13 20:05:45 +02008340 struct mlx5_ifc_fpga_ctrl_bits fpga_ctrl_bits;
8341 struct mlx5_ifc_fpga_cap_bits fpga_cap_bits;
Or Gerlitz47176282017-04-18 13:35:39 +03008342 struct mlx5_ifc_mcqi_reg_bits mcqi_reg;
8343 struct mlx5_ifc_mcc_reg_bits mcc_reg;
8344 struct mlx5_ifc_mcda_reg_bits mcda_reg;
Matan Barakb4ff3a32016-02-09 14:57:42 +02008345 u8 reserved_at_0[0x60e0];
Saeed Mahameede2816822015-05-28 22:28:40 +03008346};
8347
8348union mlx5_ifc_debug_enhancements_document_bits {
8349 struct mlx5_ifc_health_buffer_bits health_buffer;
Matan Barakb4ff3a32016-02-09 14:57:42 +02008350 u8 reserved_at_0[0x200];
Saeed Mahameede2816822015-05-28 22:28:40 +03008351};
8352
8353union mlx5_ifc_uplink_pci_interface_document_bits {
8354 struct mlx5_ifc_initial_seg_bits initial_seg;
Matan Barakb4ff3a32016-02-09 14:57:42 +02008355 u8 reserved_at_0[0x20060];
Eli Cohenb7755162014-10-02 12:19:44 +03008356};
8357
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008358struct mlx5_ifc_set_flow_table_root_out_bits {
8359 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008360 u8 reserved_at_8[0x18];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008361
8362 u8 syndrome[0x20];
8363
Matan Barakb4ff3a32016-02-09 14:57:42 +02008364 u8 reserved_at_40[0x40];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008365};
8366
8367struct mlx5_ifc_set_flow_table_root_in_bits {
8368 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008369 u8 reserved_at_10[0x10];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008370
Matan Barakb4ff3a32016-02-09 14:57:42 +02008371 u8 reserved_at_20[0x10];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008372 u8 op_mod[0x10];
8373
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03008374 u8 other_vport[0x1];
8375 u8 reserved_at_41[0xf];
8376 u8 vport_number[0x10];
8377
8378 u8 reserved_at_60[0x20];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008379
8380 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008381 u8 reserved_at_88[0x18];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008382
Matan Barakb4ff3a32016-02-09 14:57:42 +02008383 u8 reserved_at_a0[0x8];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008384 u8 table_id[0x18];
8385
Erez Shitrit500a3d02017-04-13 06:36:51 +03008386 u8 reserved_at_c0[0x8];
8387 u8 underlay_qpn[0x18];
8388 u8 reserved_at_e0[0x120];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008389};
8390
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008391enum {
Aviv Heller84df61e2016-05-10 13:47:50 +03008392 MLX5_MODIFY_FLOW_TABLE_MISS_TABLE_ID = (1UL << 0),
8393 MLX5_MODIFY_FLOW_TABLE_LAG_NEXT_TABLE_ID = (1UL << 15),
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008394};
8395
8396struct mlx5_ifc_modify_flow_table_out_bits {
8397 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008398 u8 reserved_at_8[0x18];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008399
8400 u8 syndrome[0x20];
8401
Matan Barakb4ff3a32016-02-09 14:57:42 +02008402 u8 reserved_at_40[0x40];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008403};
8404
8405struct mlx5_ifc_modify_flow_table_in_bits {
8406 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008407 u8 reserved_at_10[0x10];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008408
Matan Barakb4ff3a32016-02-09 14:57:42 +02008409 u8 reserved_at_20[0x10];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008410 u8 op_mod[0x10];
8411
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03008412 u8 other_vport[0x1];
8413 u8 reserved_at_41[0xf];
8414 u8 vport_number[0x10];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008415
Matan Barakb4ff3a32016-02-09 14:57:42 +02008416 u8 reserved_at_60[0x10];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008417 u8 modify_field_select[0x10];
8418
8419 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008420 u8 reserved_at_88[0x18];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008421
Matan Barakb4ff3a32016-02-09 14:57:42 +02008422 u8 reserved_at_a0[0x8];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008423 u8 table_id[0x18];
8424
Maor Gottlieb0c90e9c2017-03-12 11:35:23 +02008425 struct mlx5_ifc_flow_table_context_bits flow_table_context;
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008426};
8427
Saeed Mahameed4f3961e2016-02-22 18:17:25 +02008428struct mlx5_ifc_ets_tcn_config_reg_bits {
8429 u8 g[0x1];
8430 u8 b[0x1];
8431 u8 r[0x1];
8432 u8 reserved_at_3[0x9];
8433 u8 group[0x4];
8434 u8 reserved_at_10[0x9];
8435 u8 bw_allocation[0x7];
8436
8437 u8 reserved_at_20[0xc];
8438 u8 max_bw_units[0x4];
8439 u8 reserved_at_30[0x8];
8440 u8 max_bw_value[0x8];
8441};
8442
8443struct mlx5_ifc_ets_global_config_reg_bits {
8444 u8 reserved_at_0[0x2];
8445 u8 r[0x1];
8446 u8 reserved_at_3[0x1d];
8447
8448 u8 reserved_at_20[0xc];
8449 u8 max_bw_units[0x4];
8450 u8 reserved_at_30[0x8];
8451 u8 max_bw_value[0x8];
8452};
8453
8454struct mlx5_ifc_qetc_reg_bits {
8455 u8 reserved_at_0[0x8];
8456 u8 port_number[0x8];
8457 u8 reserved_at_10[0x30];
8458
8459 struct mlx5_ifc_ets_tcn_config_reg_bits tc_configuration[0x8];
8460 struct mlx5_ifc_ets_global_config_reg_bits global_configuration;
8461};
8462
8463struct mlx5_ifc_qtct_reg_bits {
8464 u8 reserved_at_0[0x8];
8465 u8 port_number[0x8];
8466 u8 reserved_at_10[0xd];
8467 u8 prio[0x3];
8468
8469 u8 reserved_at_20[0x1d];
8470 u8 tclass[0x3];
8471};
8472
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03008473struct mlx5_ifc_mcia_reg_bits {
8474 u8 l[0x1];
8475 u8 reserved_at_1[0x7];
8476 u8 module[0x8];
8477 u8 reserved_at_10[0x8];
8478 u8 status[0x8];
8479
8480 u8 i2c_device_address[0x8];
8481 u8 page_number[0x8];
8482 u8 device_address[0x10];
8483
8484 u8 reserved_at_40[0x10];
8485 u8 size[0x10];
8486
8487 u8 reserved_at_60[0x20];
8488
8489 u8 dword_0[0x20];
8490 u8 dword_1[0x20];
8491 u8 dword_2[0x20];
8492 u8 dword_3[0x20];
8493 u8 dword_4[0x20];
8494 u8 dword_5[0x20];
8495 u8 dword_6[0x20];
8496 u8 dword_7[0x20];
8497 u8 dword_8[0x20];
8498 u8 dword_9[0x20];
8499 u8 dword_10[0x20];
8500 u8 dword_11[0x20];
8501};
8502
Saeed Mahameed74862162016-06-09 15:11:34 +03008503struct mlx5_ifc_dcbx_param_bits {
8504 u8 dcbx_cee_cap[0x1];
8505 u8 dcbx_ieee_cap[0x1];
8506 u8 dcbx_standby_cap[0x1];
8507 u8 reserved_at_0[0x5];
8508 u8 port_number[0x8];
8509 u8 reserved_at_10[0xa];
8510 u8 max_application_table_size[6];
8511 u8 reserved_at_20[0x15];
8512 u8 version_oper[0x3];
8513 u8 reserved_at_38[5];
8514 u8 version_admin[0x3];
8515 u8 willing_admin[0x1];
8516 u8 reserved_at_41[0x3];
8517 u8 pfc_cap_oper[0x4];
8518 u8 reserved_at_48[0x4];
8519 u8 pfc_cap_admin[0x4];
8520 u8 reserved_at_50[0x4];
8521 u8 num_of_tc_oper[0x4];
8522 u8 reserved_at_58[0x4];
8523 u8 num_of_tc_admin[0x4];
8524 u8 remote_willing[0x1];
8525 u8 reserved_at_61[3];
8526 u8 remote_pfc_cap[4];
8527 u8 reserved_at_68[0x14];
8528 u8 remote_num_of_tc[0x4];
8529 u8 reserved_at_80[0x18];
8530 u8 error[0x8];
8531 u8 reserved_at_a0[0x160];
8532};
Aviv Heller84df61e2016-05-10 13:47:50 +03008533
8534struct mlx5_ifc_lagc_bits {
8535 u8 reserved_at_0[0x1d];
8536 u8 lag_state[0x3];
8537
8538 u8 reserved_at_20[0x14];
8539 u8 tx_remap_affinity_2[0x4];
8540 u8 reserved_at_38[0x4];
8541 u8 tx_remap_affinity_1[0x4];
8542};
8543
8544struct mlx5_ifc_create_lag_out_bits {
8545 u8 status[0x8];
8546 u8 reserved_at_8[0x18];
8547
8548 u8 syndrome[0x20];
8549
8550 u8 reserved_at_40[0x40];
8551};
8552
8553struct mlx5_ifc_create_lag_in_bits {
8554 u8 opcode[0x10];
8555 u8 reserved_at_10[0x10];
8556
8557 u8 reserved_at_20[0x10];
8558 u8 op_mod[0x10];
8559
8560 struct mlx5_ifc_lagc_bits ctx;
8561};
8562
8563struct mlx5_ifc_modify_lag_out_bits {
8564 u8 status[0x8];
8565 u8 reserved_at_8[0x18];
8566
8567 u8 syndrome[0x20];
8568
8569 u8 reserved_at_40[0x40];
8570};
8571
8572struct mlx5_ifc_modify_lag_in_bits {
8573 u8 opcode[0x10];
8574 u8 reserved_at_10[0x10];
8575
8576 u8 reserved_at_20[0x10];
8577 u8 op_mod[0x10];
8578
8579 u8 reserved_at_40[0x20];
8580 u8 field_select[0x20];
8581
8582 struct mlx5_ifc_lagc_bits ctx;
8583};
8584
8585struct mlx5_ifc_query_lag_out_bits {
8586 u8 status[0x8];
8587 u8 reserved_at_8[0x18];
8588
8589 u8 syndrome[0x20];
8590
8591 u8 reserved_at_40[0x40];
8592
8593 struct mlx5_ifc_lagc_bits ctx;
8594};
8595
8596struct mlx5_ifc_query_lag_in_bits {
8597 u8 opcode[0x10];
8598 u8 reserved_at_10[0x10];
8599
8600 u8 reserved_at_20[0x10];
8601 u8 op_mod[0x10];
8602
8603 u8 reserved_at_40[0x40];
8604};
8605
8606struct mlx5_ifc_destroy_lag_out_bits {
8607 u8 status[0x8];
8608 u8 reserved_at_8[0x18];
8609
8610 u8 syndrome[0x20];
8611
8612 u8 reserved_at_40[0x40];
8613};
8614
8615struct mlx5_ifc_destroy_lag_in_bits {
8616 u8 opcode[0x10];
8617 u8 reserved_at_10[0x10];
8618
8619 u8 reserved_at_20[0x10];
8620 u8 op_mod[0x10];
8621
8622 u8 reserved_at_40[0x40];
8623};
8624
8625struct mlx5_ifc_create_vport_lag_out_bits {
8626 u8 status[0x8];
8627 u8 reserved_at_8[0x18];
8628
8629 u8 syndrome[0x20];
8630
8631 u8 reserved_at_40[0x40];
8632};
8633
8634struct mlx5_ifc_create_vport_lag_in_bits {
8635 u8 opcode[0x10];
8636 u8 reserved_at_10[0x10];
8637
8638 u8 reserved_at_20[0x10];
8639 u8 op_mod[0x10];
8640
8641 u8 reserved_at_40[0x40];
8642};
8643
8644struct mlx5_ifc_destroy_vport_lag_out_bits {
8645 u8 status[0x8];
8646 u8 reserved_at_8[0x18];
8647
8648 u8 syndrome[0x20];
8649
8650 u8 reserved_at_40[0x40];
8651};
8652
8653struct mlx5_ifc_destroy_vport_lag_in_bits {
8654 u8 opcode[0x10];
8655 u8 reserved_at_10[0x10];
8656
8657 u8 reserved_at_20[0x10];
8658 u8 op_mod[0x10];
8659
8660 u8 reserved_at_40[0x40];
8661};
8662
Eli Cohend29b7962014-10-02 12:19:43 +03008663#endif /* MLX5_IFC_H */