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gerrit-public.fairphone.software / kernel / msm-5.4 / 27d47356b6dfa92042a17a0b474f08910d4c8e8f / . / tools / power / x86 / turbostat / turbostat.c
blob: d599f91318442230b1172b747946c78be246617e [file] [log] [blame]
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1/*
2 * turbostat -- show CPU frequency and C-state residency
3 * on modern Intel turbo-capable processors.
4 *
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]5 * Copyright (c) 2013 Intel Corporation.
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]6 * Len Brown <len.brown@intel.com>
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms and conditions of the GNU General Public License,
10 * version 2, as published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
16 *
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
20 */
21
Len Brown88c32812012-03-29 21:44:40 -0400[diff] [blame]22#define _GNU_SOURCE
Josh Triplettb731f312013-08-20 17:20:12 -0700[diff] [blame]23#include MSRHEADER
Josh Triplett95aebc42013-08-20 17:20:16 -0700[diff] [blame]24#include <stdarg.h>
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]25#include <stdio.h>
Josh Triplettb2c95d92013-08-20 17:20:18 -0700[diff] [blame]26#include <err.h>
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]27#include <unistd.h>
28#include <sys/types.h>
29#include <sys/wait.h>
30#include <sys/stat.h>
31#include <sys/resource.h>
32#include <fcntl.h>
33#include <signal.h>
34#include <sys/time.h>
35#include <stdlib.h>
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]36#include <getopt.h>
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]37#include <dirent.h>
38#include <string.h>
39#include <ctype.h>
Len Brown88c32812012-03-29 21:44:40 -0400[diff] [blame]40#include <sched.h>
Len Brown2a0609c2016-02-12 22:44:48 -0500[diff] [blame]41#include <time.h>
Josh Triplett2b928652013-08-20 17:20:14 -0700[diff] [blame]42#include <cpuid.h>
Len Brown98481e72014-08-15 00:36:50 -0400[diff] [blame]43#include <linux/capability.h>
44#include <errno.h>
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]45
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]46char *proc_stat = "/proc/stat";
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]47FILE *outf;
Len Brown36229892016-02-26 20:51:02 -0500[diff] [blame]48int *fd_percpu;
Len Brown2a0609c2016-02-12 22:44:48 -0500[diff] [blame]49struct timespec interval_ts = {5, 0};
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]50unsigned int debug;
51unsigned int rapl_joules;
52unsigned int summary_only;
53unsigned int dump_only;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]54unsigned int skip_c0;
55unsigned int skip_c1;
56unsigned int do_nhm_cstates;
57unsigned int do_snb_cstates;
Dasaratharaman Chandramoulifb5d4322015-05-20 09:49:34 -0700[diff] [blame]58unsigned int do_knl_cstates;
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]59unsigned int do_pc2;
60unsigned int do_pc3;
61unsigned int do_pc6;
62unsigned int do_pc7;
Kristen Carlson Accardica587102012-11-21 05:22:43 -0800[diff] [blame]63unsigned int do_c8_c9_c10;
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame]64unsigned int do_skl_residency;
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]65unsigned int do_slm_cstates;
66unsigned int use_c1_residency_msr;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]67unsigned int has_aperf;
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]68unsigned int has_epb;
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]69unsigned int units = 1000000; /* MHz etc */
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]70unsigned int genuine_intel;
71unsigned int has_invariant_tsc;
Len Brownd7899442015-01-23 00:12:33 -0500[diff] [blame]72unsigned int do_nhm_platform_info;
Len Brown2f32edf2012-09-21 23:45:46 -0400[diff] [blame]73unsigned int extra_msr_offset32;
74unsigned int extra_msr_offset64;
Len Brown8e180f32012-09-22 01:25:08 -0400[diff] [blame]75unsigned int extra_delta_offset32;
76unsigned int extra_delta_offset64;
Hubert Chrzaniukb2b34df2015-09-14 13:31:00 +0200[diff] [blame]77unsigned int aperf_mperf_multiplier = 1;
Len Brown562a2d32016-02-26 23:48:05 -0500[diff] [blame]78int do_irq = 1;
Len Brown1ed51012013-02-10 17:19:24 -0500[diff] [blame]79int do_smi;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]80double bclk;
Len Browna2b7b742015-09-26 00:12:38 -0400[diff] [blame]81double base_hz;
Len Brown21ed5572015-10-19 22:37:40 -0400[diff] [blame]82unsigned int has_base_hz;
Len Browna2b7b742015-09-26 00:12:38 -0400[diff] [blame]83double tsc_tweak = 1.0;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]84unsigned int show_pkg;
85unsigned int show_core;
86unsigned int show_cpu;
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]87unsigned int show_pkg_only;
88unsigned int show_core_only;
89char *output_buffer, *outp;
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]90unsigned int do_rapl;
91unsigned int do_dts;
92unsigned int do_ptm;
Len Brown27d47352016-02-27 00:37:54 -0500[diff] [blame^]93unsigned int do_gfx_mhz;
94unsigned int gfx_cur_mhz;
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]95unsigned int tcc_activation_temp;
96unsigned int tcc_activation_temp_override;
Andrey Semin40ee8e32014-12-05 00:07:00 -0500[diff] [blame]97double rapl_power_units, rapl_time_units;
98double rapl_dram_energy_units, rapl_energy_units;
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]99double rapl_joule_counter_range;
Len Brown3a9a9412014-08-15 02:39:52 -0400[diff] [blame]100unsigned int do_core_perf_limit_reasons;
101unsigned int do_gfx_perf_limit_reasons;
102unsigned int do_ring_perf_limit_reasons;
Len Brown8a5bdf42015-04-01 21:02:57 -0400[diff] [blame]103unsigned int crystal_hz;
104unsigned long long tsc_hz;
Prarit Bhargava7ce7d5d2015-05-25 08:34:28 -0400[diff] [blame]105int base_cpu;
Len Brown21ed5572015-10-19 22:37:40 -0400[diff] [blame]106double discover_bclk(unsigned int family, unsigned int model);
Len Brown7f5c2582015-12-01 01:36:39 -0500[diff] [blame]107unsigned int has_hwp; /* IA32_PM_ENABLE, IA32_HWP_CAPABILITIES */
108 /* IA32_HWP_REQUEST, IA32_HWP_STATUS */
109unsigned int has_hwp_notify; /* IA32_HWP_INTERRUPT */
110unsigned int has_hwp_activity_window; /* IA32_HWP_REQUEST[bits 41:32] */
111unsigned int has_hwp_epp; /* IA32_HWP_REQUEST[bits 31:24] */
112unsigned int has_hwp_pkg; /* IA32_HWP_REQUEST_PKG */
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]113
Len Browne6f9bb32013-12-03 02:19:19 -0500[diff] [blame]114#define RAPL_PKG (1 << 0)
115 /* 0x610 MSR_PKG_POWER_LIMIT */
116 /* 0x611 MSR_PKG_ENERGY_STATUS */
117#define RAPL_PKG_PERF_STATUS (1 << 1)
118 /* 0x613 MSR_PKG_PERF_STATUS */
119#define RAPL_PKG_POWER_INFO (1 << 2)
120 /* 0x614 MSR_PKG_POWER_INFO */
121
122#define RAPL_DRAM (1 << 3)
123 /* 0x618 MSR_DRAM_POWER_LIMIT */
124 /* 0x619 MSR_DRAM_ENERGY_STATUS */
Len Browne6f9bb32013-12-03 02:19:19 -0500[diff] [blame]125#define RAPL_DRAM_PERF_STATUS (1 << 4)
126 /* 0x61b MSR_DRAM_PERF_STATUS */
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame]127#define RAPL_DRAM_POWER_INFO (1 << 5)
128 /* 0x61c MSR_DRAM_POWER_INFO */
Len Browne6f9bb32013-12-03 02:19:19 -0500[diff] [blame]129
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame]130#define RAPL_CORES (1 << 6)
Len Browne6f9bb32013-12-03 02:19:19 -0500[diff] [blame]131 /* 0x638 MSR_PP0_POWER_LIMIT */
132 /* 0x639 MSR_PP0_ENERGY_STATUS */
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame]133#define RAPL_CORE_POLICY (1 << 7)
Len Browne6f9bb32013-12-03 02:19:19 -0500[diff] [blame]134 /* 0x63a MSR_PP0_POLICY */
135
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame]136#define RAPL_GFX (1 << 8)
Len Browne6f9bb32013-12-03 02:19:19 -0500[diff] [blame]137 /* 0x640 MSR_PP1_POWER_LIMIT */
138 /* 0x641 MSR_PP1_ENERGY_STATUS */
139 /* 0x642 MSR_PP1_POLICY */
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]140#define TJMAX_DEFAULT 100
141
142#define MAX(a, b) ((a) > (b) ? (a) : (b))
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]143
144int aperf_mperf_unstable;
145int backwards_count;
146char *progname;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]147
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]148cpu_set_t *cpu_present_set, *cpu_affinity_set;
149size_t cpu_present_setsize, cpu_affinity_setsize;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]150
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]151struct thread_data {
152 unsigned long long tsc;
153 unsigned long long aperf;
154 unsigned long long mperf;
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]155 unsigned long long c1;
Len Brown2f32edf2012-09-21 23:45:46 -0400[diff] [blame]156 unsigned long long extra_msr64;
Len Brown8e180f32012-09-22 01:25:08 -0400[diff] [blame]157 unsigned long long extra_delta64;
158 unsigned long long extra_msr32;
159 unsigned long long extra_delta32;
Len Brown562a2d32016-02-26 23:48:05 -0500[diff] [blame]160 unsigned int irq_count;
Len Brown1ed51012013-02-10 17:19:24 -0500[diff] [blame]161 unsigned int smi_count;
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]162 unsigned int cpu_id;
163 unsigned int flags;
164#define CPU_IS_FIRST_THREAD_IN_CORE 0x2
165#define CPU_IS_FIRST_CORE_IN_PACKAGE 0x4
166} *thread_even, *thread_odd;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]167
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]168struct core_data {
169 unsigned long long c3;
170 unsigned long long c6;
171 unsigned long long c7;
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]172 unsigned int core_temp_c;
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]173 unsigned int core_id;
174} *core_even, *core_odd;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]175
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]176struct pkg_data {
177 unsigned long long pc2;
178 unsigned long long pc3;
179 unsigned long long pc6;
180 unsigned long long pc7;
Kristen Carlson Accardica587102012-11-21 05:22:43 -0800[diff] [blame]181 unsigned long long pc8;
182 unsigned long long pc9;
183 unsigned long long pc10;
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame]184 unsigned long long pkg_wtd_core_c0;
185 unsigned long long pkg_any_core_c0;
186 unsigned long long pkg_any_gfxe_c0;
187 unsigned long long pkg_both_core_gfxe_c0;
Len Brown27d47352016-02-27 00:37:54 -0500[diff] [blame^]188 unsigned int gfx_mhz;
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]189 unsigned int package_id;
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]190 unsigned int energy_pkg; /* MSR_PKG_ENERGY_STATUS */
191 unsigned int energy_dram; /* MSR_DRAM_ENERGY_STATUS */
192 unsigned int energy_cores; /* MSR_PP0_ENERGY_STATUS */
193 unsigned int energy_gfx; /* MSR_PP1_ENERGY_STATUS */
194 unsigned int rapl_pkg_perf_status; /* MSR_PKG_PERF_STATUS */
195 unsigned int rapl_dram_perf_status; /* MSR_DRAM_PERF_STATUS */
196 unsigned int pkg_temp_c;
197
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]198} *package_even, *package_odd;
199
200#define ODD_COUNTERS thread_odd, core_odd, package_odd
201#define EVEN_COUNTERS thread_even, core_even, package_even
202
203#define GET_THREAD(thread_base, thread_no, core_no, pkg_no) \
204 (thread_base + (pkg_no) * topo.num_cores_per_pkg * \
205 topo.num_threads_per_core + \
206 (core_no) * topo.num_threads_per_core + (thread_no))
207#define GET_CORE(core_base, core_no, pkg_no) \
208 (core_base + (pkg_no) * topo.num_cores_per_pkg + (core_no))
209#define GET_PKG(pkg_base, pkg_no) (pkg_base + pkg_no)
210
211struct system_summary {
212 struct thread_data threads;
213 struct core_data cores;
214 struct pkg_data packages;
215} sum, average;
216
217
218struct topo_params {
219 int num_packages;
220 int num_cpus;
221 int num_cores;
222 int max_cpu_num;
223 int num_cores_per_pkg;
224 int num_threads_per_core;
225} topo;
226
227struct timeval tv_even, tv_odd, tv_delta;
228
Len Brown562a2d32016-02-26 23:48:05 -0500[diff] [blame]229int *irq_column_2_cpu; /* /proc/interrupts column numbers */
230int *irqs_per_cpu; /* indexed by cpu_num */
231
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]232void setup_all_buffers(void);
233
234int cpu_is_not_present(int cpu)
Len Brownd15cf7c2012-06-03 23:24:00 -0400[diff] [blame]235{
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]236 return !CPU_ISSET_S(cpu, cpu_present_setsize, cpu_present_set);
Len Brownd15cf7c2012-06-03 23:24:00 -0400[diff] [blame]237}
Len Brown88c32812012-03-29 21:44:40 -0400[diff] [blame]238/*
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]239 * run func(thread, core, package) in topology order
240 * skip non-present cpus
Len Brown88c32812012-03-29 21:44:40 -0400[diff] [blame]241 */
Len Brownd15cf7c2012-06-03 23:24:00 -0400[diff] [blame]242
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]243int for_all_cpus(int (func)(struct thread_data *, struct core_data *, struct pkg_data *),
244 struct thread_data *thread_base, struct core_data *core_base, struct pkg_data *pkg_base)
Len Brown88c32812012-03-29 21:44:40 -0400[diff] [blame]245{
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]246 int retval, pkg_no, core_no, thread_no;
247
248 for (pkg_no = 0; pkg_no < topo.num_packages; ++pkg_no) {
249 for (core_no = 0; core_no < topo.num_cores_per_pkg; ++core_no) {
250 for (thread_no = 0; thread_no <
251 topo.num_threads_per_core; ++thread_no) {
252 struct thread_data *t;
253 struct core_data *c;
254 struct pkg_data *p;
255
256 t = GET_THREAD(thread_base, thread_no, core_no, pkg_no);
257
258 if (cpu_is_not_present(t->cpu_id))
259 continue;
260
261 c = GET_CORE(core_base, core_no, pkg_no);
262 p = GET_PKG(pkg_base, pkg_no);
263
264 retval = func(t, c, p);
265 if (retval)
266 return retval;
267 }
268 }
269 }
270 return 0;
Len Brown88c32812012-03-29 21:44:40 -0400[diff] [blame]271}
272
273int cpu_migrate(int cpu)
274{
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]275 CPU_ZERO_S(cpu_affinity_setsize, cpu_affinity_set);
276 CPU_SET_S(cpu, cpu_affinity_setsize, cpu_affinity_set);
277 if (sched_setaffinity(0, cpu_affinity_setsize, cpu_affinity_set) == -1)
Len Brown88c32812012-03-29 21:44:40 -0400[diff] [blame]278 return -1;
279 else
280 return 0;
281}
Len Brown36229892016-02-26 20:51:02 -0500[diff] [blame]282int get_msr_fd(int cpu)
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]283{
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]284 char pathname[32];
285 int fd;
286
Len Brown36229892016-02-26 20:51:02 -0500[diff] [blame]287 fd = fd_percpu[cpu];
288
289 if (fd)
290 return fd;
291
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]292 sprintf(pathname, "/dev/cpu/%d/msr", cpu);
293 fd = open(pathname, O_RDONLY);
Len Brown15aaa342012-03-29 22:19:58 -0400[diff] [blame]294 if (fd < 0)
Len Brown98481e72014-08-15 00:36:50 -0400[diff] [blame]295 err(-1, "%s open failed, try chown or chmod +r /dev/cpu/*/msr, or run as root", pathname);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]296
Len Brown36229892016-02-26 20:51:02 -0500[diff] [blame]297 fd_percpu[cpu] = fd;
298
299 return fd;
300}
301
302int get_msr(int cpu, off_t offset, unsigned long long *msr)
303{
304 ssize_t retval;
305
306 retval = pread(get_msr_fd(cpu), msr, sizeof(*msr), offset);
Len Brown15aaa342012-03-29 22:19:58 -0400[diff] [blame]307
Len Brown98481e72014-08-15 00:36:50 -0400[diff] [blame]308 if (retval != sizeof *msr)
Len Brown36229892016-02-26 20:51:02 -0500[diff] [blame]309 err(-1, "msr %d offset 0x%llx read failed", cpu, (unsigned long long)offset);
Len Brown15aaa342012-03-29 22:19:58 -0400[diff] [blame]310
311 return 0;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]312}
313
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]314/*
315 * Example Format w/ field column widths:
316 *
Len Brown27d47352016-02-27 00:37:54 -0500[diff] [blame^]317 * Package Core CPU Avg_MHz Bzy_MHz TSC_MHz IRQ SMI Busy% CPU_%c1 CPU_%c3 CPU_%c6 CPU_%c7 CoreTmp PkgTmp GFXMHz Pkg%pc2 Pkg%pc3 Pkg%pc6 Pkg%pc7 PkgWatt CorWatt GFXWatt
Len Brown562a2d32016-02-26 23:48:05 -0500[diff] [blame]318 * 12345678123456781234567812345678123456781234567812345678123456781234567812345678123456781234567812345678123456781234567812345678123456781234567812345678123456781234567812345678
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]319 */
320
Len Browna829eb42011-02-10 23:36:34 -0500[diff] [blame]321void print_header(void)
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]322{
323 if (show_pkg)
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]324 outp += sprintf(outp, " Package");
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]325 if (show_core)
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]326 outp += sprintf(outp, " Core");
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]327 if (show_cpu)
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]328 outp += sprintf(outp, " CPU");
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]329 if (has_aperf)
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]330 outp += sprintf(outp, " Avg_MHz");
Len Brownd7899442015-01-23 00:12:33 -0500[diff] [blame]331 if (has_aperf)
Len Brown75d2e442016-02-13 23:41:53 -0500[diff] [blame]332 outp += sprintf(outp, " Busy%%");
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]333 if (has_aperf)
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]334 outp += sprintf(outp, " Bzy_MHz");
335 outp += sprintf(outp, " TSC_MHz");
Len Brown1cc21f72015-02-23 00:34:57 -0500[diff] [blame]336
Len Brown8e180f32012-09-22 01:25:08 -0400[diff] [blame]337 if (extra_delta_offset32)
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]338 outp += sprintf(outp, " count 0x%03X", extra_delta_offset32);
Len Brown8e180f32012-09-22 01:25:08 -0400[diff] [blame]339 if (extra_delta_offset64)
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]340 outp += sprintf(outp, " COUNT 0x%03X", extra_delta_offset64);
Len Brown2f32edf2012-09-21 23:45:46 -0400[diff] [blame]341 if (extra_msr_offset32)
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]342 outp += sprintf(outp, " MSR 0x%03X", extra_msr_offset32);
Len Brown2f32edf2012-09-21 23:45:46 -0400[diff] [blame]343 if (extra_msr_offset64)
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]344 outp += sprintf(outp, " MSR 0x%03X", extra_msr_offset64);
Len Brown1cc21f72015-02-23 00:34:57 -0500[diff] [blame]345
346 if (!debug)
347 goto done;
348
Len Brown562a2d32016-02-26 23:48:05 -0500[diff] [blame]349 if (do_irq)
350 outp += sprintf(outp, " IRQ");
Len Brown1cc21f72015-02-23 00:34:57 -0500[diff] [blame]351 if (do_smi)
352 outp += sprintf(outp, " SMI");
353
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]354 if (do_nhm_cstates)
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]355 outp += sprintf(outp, " CPU%%c1");
Dasaratharaman Chandramoulifb5d4322015-05-20 09:49:34 -0700[diff] [blame]356 if (do_nhm_cstates && !do_slm_cstates && !do_knl_cstates)
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]357 outp += sprintf(outp, " CPU%%c3");
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]358 if (do_nhm_cstates)
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]359 outp += sprintf(outp, " CPU%%c6");
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]360 if (do_snb_cstates)
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]361 outp += sprintf(outp, " CPU%%c7");
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]362
363 if (do_dts)
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]364 outp += sprintf(outp, " CoreTmp");
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]365 if (do_ptm)
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]366 outp += sprintf(outp, " PkgTmp");
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]367
Len Brown27d47352016-02-27 00:37:54 -0500[diff] [blame^]368 if (do_gfx_mhz)
369 outp += sprintf(outp, " GFXMHz");
370
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame]371 if (do_skl_residency) {
372 outp += sprintf(outp, " Totl%%C0");
373 outp += sprintf(outp, " Any%%C0");
374 outp += sprintf(outp, " GFX%%C0");
375 outp += sprintf(outp, " CPUGFX%%");
376 }
377
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]378 if (do_pc2)
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]379 outp += sprintf(outp, " Pkg%%pc2");
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]380 if (do_pc3)
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]381 outp += sprintf(outp, " Pkg%%pc3");
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]382 if (do_pc6)
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]383 outp += sprintf(outp, " Pkg%%pc6");
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]384 if (do_pc7)
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]385 outp += sprintf(outp, " Pkg%%pc7");
Kristen Carlson Accardica587102012-11-21 05:22:43 -0800[diff] [blame]386 if (do_c8_c9_c10) {
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]387 outp += sprintf(outp, " Pkg%%pc8");
388 outp += sprintf(outp, " Pkg%%pc9");
389 outp += sprintf(outp, " Pk%%pc10");
Kristen Carlson Accardica587102012-11-21 05:22:43 -0800[diff] [blame]390 }
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]391
Dirk Brandewie5c56be92013-12-16 10:23:41 -0800[diff] [blame]392 if (do_rapl && !rapl_joules) {
393 if (do_rapl & RAPL_PKG)
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]394 outp += sprintf(outp, " PkgWatt");
Dirk Brandewie5c56be92013-12-16 10:23:41 -0800[diff] [blame]395 if (do_rapl & RAPL_CORES)
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]396 outp += sprintf(outp, " CorWatt");
Dirk Brandewie5c56be92013-12-16 10:23:41 -0800[diff] [blame]397 if (do_rapl & RAPL_GFX)
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]398 outp += sprintf(outp, " GFXWatt");
Dirk Brandewie5c56be92013-12-16 10:23:41 -0800[diff] [blame]399 if (do_rapl & RAPL_DRAM)
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]400 outp += sprintf(outp, " RAMWatt");
Dirk Brandewie5c56be92013-12-16 10:23:41 -0800[diff] [blame]401 if (do_rapl & RAPL_PKG_PERF_STATUS)
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]402 outp += sprintf(outp, " PKG_%%");
Dirk Brandewie5c56be92013-12-16 10:23:41 -0800[diff] [blame]403 if (do_rapl & RAPL_DRAM_PERF_STATUS)
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]404 outp += sprintf(outp, " RAM_%%");
Len Brownd7899442015-01-23 00:12:33 -0500[diff] [blame]405 } else if (do_rapl && rapl_joules) {
Dirk Brandewie5c56be92013-12-16 10:23:41 -0800[diff] [blame]406 if (do_rapl & RAPL_PKG)
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]407 outp += sprintf(outp, " Pkg_J");
Dirk Brandewie5c56be92013-12-16 10:23:41 -0800[diff] [blame]408 if (do_rapl & RAPL_CORES)
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]409 outp += sprintf(outp, " Cor_J");
Dirk Brandewie5c56be92013-12-16 10:23:41 -0800[diff] [blame]410 if (do_rapl & RAPL_GFX)
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]411 outp += sprintf(outp, " GFX_J");
Dirk Brandewie5c56be92013-12-16 10:23:41 -0800[diff] [blame]412 if (do_rapl & RAPL_DRAM)
Len Brownbd6906e2015-07-24 10:35:23 -0400[diff] [blame]413 outp += sprintf(outp, " RAM_J");
Dirk Brandewie5c56be92013-12-16 10:23:41 -0800[diff] [blame]414 if (do_rapl & RAPL_PKG_PERF_STATUS)
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]415 outp += sprintf(outp, " PKG_%%");
Dirk Brandewie5c56be92013-12-16 10:23:41 -0800[diff] [blame]416 if (do_rapl & RAPL_DRAM_PERF_STATUS)
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]417 outp += sprintf(outp, " RAM_%%");
418 outp += sprintf(outp, " time");
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]419
Dirk Brandewie5c56be92013-12-16 10:23:41 -0800[diff] [blame]420 }
Len Brown1cc21f72015-02-23 00:34:57 -0500[diff] [blame]421 done:
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]422 outp += sprintf(outp, "\n");
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]423}
424
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]425int dump_counters(struct thread_data *t, struct core_data *c,
426 struct pkg_data *p)
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]427{
Andy Shevchenko3b4d5c72014-01-23 17:13:15 +0200[diff] [blame]428 outp += sprintf(outp, "t %p, c %p, p %p\n", t, c, p);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]429
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]430 if (t) {
Andy Shevchenko3b4d5c72014-01-23 17:13:15 +0200[diff] [blame]431 outp += sprintf(outp, "CPU: %d flags 0x%x\n",
432 t->cpu_id, t->flags);
433 outp += sprintf(outp, "TSC: %016llX\n", t->tsc);
434 outp += sprintf(outp, "aperf: %016llX\n", t->aperf);
435 outp += sprintf(outp, "mperf: %016llX\n", t->mperf);
436 outp += sprintf(outp, "c1: %016llX\n", t->c1);
437 outp += sprintf(outp, "msr0x%x: %08llX\n",
Len Brown8e180f32012-09-22 01:25:08 -0400[diff] [blame]438 extra_delta_offset32, t->extra_delta32);
Andy Shevchenko3b4d5c72014-01-23 17:13:15 +0200[diff] [blame]439 outp += sprintf(outp, "msr0x%x: %016llX\n",
Len Brown8e180f32012-09-22 01:25:08 -0400[diff] [blame]440 extra_delta_offset64, t->extra_delta64);
Andy Shevchenko3b4d5c72014-01-23 17:13:15 +0200[diff] [blame]441 outp += sprintf(outp, "msr0x%x: %08llX\n",
Len Brown2f32edf2012-09-21 23:45:46 -0400[diff] [blame]442 extra_msr_offset32, t->extra_msr32);
Andy Shevchenko3b4d5c72014-01-23 17:13:15 +0200[diff] [blame]443 outp += sprintf(outp, "msr0x%x: %016llX\n",
Len Brown2f32edf2012-09-21 23:45:46 -0400[diff] [blame]444 extra_msr_offset64, t->extra_msr64);
Len Brown562a2d32016-02-26 23:48:05 -0500[diff] [blame]445 if (do_irq)
446 outp += sprintf(outp, "IRQ: %08X\n", t->irq_count);
Len Brown1ed51012013-02-10 17:19:24 -0500[diff] [blame]447 if (do_smi)
Andy Shevchenko3b4d5c72014-01-23 17:13:15 +0200[diff] [blame]448 outp += sprintf(outp, "SMI: %08X\n", t->smi_count);
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]449 }
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]450
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]451 if (c) {
Andy Shevchenko3b4d5c72014-01-23 17:13:15 +0200[diff] [blame]452 outp += sprintf(outp, "core: %d\n", c->core_id);
453 outp += sprintf(outp, "c3: %016llX\n", c->c3);
454 outp += sprintf(outp, "c6: %016llX\n", c->c6);
455 outp += sprintf(outp, "c7: %016llX\n", c->c7);
456 outp += sprintf(outp, "DTS: %dC\n", c->core_temp_c);
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]457 }
458
459 if (p) {
Andy Shevchenko3b4d5c72014-01-23 17:13:15 +0200[diff] [blame]460 outp += sprintf(outp, "package: %d\n", p->package_id);
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame]461
462 outp += sprintf(outp, "Weighted cores: %016llX\n", p->pkg_wtd_core_c0);
463 outp += sprintf(outp, "Any cores: %016llX\n", p->pkg_any_core_c0);
464 outp += sprintf(outp, "Any GFX: %016llX\n", p->pkg_any_gfxe_c0);
465 outp += sprintf(outp, "CPU + GFX: %016llX\n", p->pkg_both_core_gfxe_c0);
466
Andy Shevchenko3b4d5c72014-01-23 17:13:15 +0200[diff] [blame]467 outp += sprintf(outp, "pc2: %016llX\n", p->pc2);
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]468 if (do_pc3)
469 outp += sprintf(outp, "pc3: %016llX\n", p->pc3);
470 if (do_pc6)
471 outp += sprintf(outp, "pc6: %016llX\n", p->pc6);
472 if (do_pc7)
473 outp += sprintf(outp, "pc7: %016llX\n", p->pc7);
Andy Shevchenko3b4d5c72014-01-23 17:13:15 +0200[diff] [blame]474 outp += sprintf(outp, "pc8: %016llX\n", p->pc8);
475 outp += sprintf(outp, "pc9: %016llX\n", p->pc9);
476 outp += sprintf(outp, "pc10: %016llX\n", p->pc10);
477 outp += sprintf(outp, "Joules PKG: %0X\n", p->energy_pkg);
478 outp += sprintf(outp, "Joules COR: %0X\n", p->energy_cores);
479 outp += sprintf(outp, "Joules GFX: %0X\n", p->energy_gfx);
480 outp += sprintf(outp, "Joules RAM: %0X\n", p->energy_dram);
481 outp += sprintf(outp, "Throttle PKG: %0X\n",
482 p->rapl_pkg_perf_status);
483 outp += sprintf(outp, "Throttle RAM: %0X\n",
484 p->rapl_dram_perf_status);
485 outp += sprintf(outp, "PTM: %dC\n", p->pkg_temp_c);
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]486 }
Andy Shevchenko3b4d5c72014-01-23 17:13:15 +0200[diff] [blame]487
488 outp += sprintf(outp, "\n");
489
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]490 return 0;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]491}
492
Len Browne23da032012-02-06 18:37:16 -0500[diff] [blame]493/*
494 * column formatting convention & formats
Len Browne23da032012-02-06 18:37:16 -0500[diff] [blame]495 */
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]496int format_counters(struct thread_data *t, struct core_data *c,
497 struct pkg_data *p)
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]498{
499 double interval_float;
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]500 char *fmt8;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]501
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]502 /* if showing only 1st thread in core and this isn't one, bail out */
503 if (show_core_only && !(t->flags & CPU_IS_FIRST_THREAD_IN_CORE))
504 return 0;
505
506 /* if showing only 1st thread in pkg and this isn't one, bail out */
507 if (show_pkg_only && !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
508 return 0;
509
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]510 interval_float = tv_delta.tv_sec + tv_delta.tv_usec/1000000.0;
511
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]512 /* topo columns, print blanks on 1st (average) line */
513 if (t == &average.threads) {
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]514 if (show_pkg)
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]515 outp += sprintf(outp, " -");
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]516 if (show_core)
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]517 outp += sprintf(outp, " -");
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]518 if (show_cpu)
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]519 outp += sprintf(outp, " -");
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]520 } else {
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]521 if (show_pkg) {
522 if (p)
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]523 outp += sprintf(outp, "%8d", p->package_id);
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]524 else
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]525 outp += sprintf(outp, " -");
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]526 }
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]527 if (show_core) {
528 if (c)
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]529 outp += sprintf(outp, "%8d", c->core_id);
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]530 else
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]531 outp += sprintf(outp, " -");
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]532 }
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]533 if (show_cpu)
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]534 outp += sprintf(outp, "%8d", t->cpu_id);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]535 }
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]536
Len Brownd7899442015-01-23 00:12:33 -0500[diff] [blame]537 /* Avg_MHz */
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]538 if (has_aperf)
539 outp += sprintf(outp, "%8.0f",
540 1.0 / units * t->aperf / interval_float);
541
Len Brown75d2e442016-02-13 23:41:53 -0500[diff] [blame]542 /* Busy% */
Len Brownd7899442015-01-23 00:12:33 -0500[diff] [blame]543 if (has_aperf) {
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]544 if (!skip_c0)
Len Browna2b7b742015-09-26 00:12:38 -0400[diff] [blame]545 outp += sprintf(outp, "%8.2f", 100.0 * t->mperf/t->tsc/tsc_tweak);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]546 else
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]547 outp += sprintf(outp, "********");
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]548 }
549
Len Brownd7899442015-01-23 00:12:33 -0500[diff] [blame]550 /* Bzy_MHz */
Len Brown21ed5572015-10-19 22:37:40 -0400[diff] [blame]551 if (has_aperf) {
552 if (has_base_hz)
553 outp += sprintf(outp, "%8.0f", base_hz / units * t->aperf / t->mperf);
554 else
555 outp += sprintf(outp, "%8.0f",
556 1.0 * t->tsc / units * t->aperf / t->mperf / interval_float);
557 }
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]558
Len Brownd7899442015-01-23 00:12:33 -0500[diff] [blame]559 /* TSC_MHz */
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]560 outp += sprintf(outp, "%8.0f", 1.0 * t->tsc/units/interval_float);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]561
Len Brown8e180f32012-09-22 01:25:08 -0400[diff] [blame]562 /* delta */
563 if (extra_delta_offset32)
564 outp += sprintf(outp, " %11llu", t->extra_delta32);
565
566 /* DELTA */
567 if (extra_delta_offset64)
568 outp += sprintf(outp, " %11llu", t->extra_delta64);
Len Brown2f32edf2012-09-21 23:45:46 -0400[diff] [blame]569 /* msr */
570 if (extra_msr_offset32)
Len Brown8e180f32012-09-22 01:25:08 -0400[diff] [blame]571 outp += sprintf(outp, " 0x%08llx", t->extra_msr32);
Len Brown2f32edf2012-09-21 23:45:46 -0400[diff] [blame]572
Len Brown130ff302012-09-21 22:56:06 -0400[diff] [blame]573 /* MSR */
Len Brown2f32edf2012-09-21 23:45:46 -0400[diff] [blame]574 if (extra_msr_offset64)
575 outp += sprintf(outp, " 0x%016llx", t->extra_msr64);
Len Brown130ff302012-09-21 22:56:06 -0400[diff] [blame]576
Len Brown1cc21f72015-02-23 00:34:57 -0500[diff] [blame]577 if (!debug)
578 goto done;
579
Len Brown562a2d32016-02-26 23:48:05 -0500[diff] [blame]580 /* IRQ */
581 if (do_irq)
582 outp += sprintf(outp, "%8d", t->irq_count);
583
Len Brown1cc21f72015-02-23 00:34:57 -0500[diff] [blame]584 /* SMI */
585 if (do_smi)
586 outp += sprintf(outp, "%8d", t->smi_count);
587
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]588 if (do_nhm_cstates) {
589 if (!skip_c1)
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]590 outp += sprintf(outp, "%8.2f", 100.0 * t->c1/t->tsc);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]591 else
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]592 outp += sprintf(outp, "********");
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]593 }
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]594
595 /* print per-core data only for 1st thread in core */
596 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE))
597 goto done;
598
Dasaratharaman Chandramoulifb5d4322015-05-20 09:49:34 -0700[diff] [blame]599 if (do_nhm_cstates && !do_slm_cstates && !do_knl_cstates)
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]600 outp += sprintf(outp, "%8.2f", 100.0 * c->c3/t->tsc);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]601 if (do_nhm_cstates)
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]602 outp += sprintf(outp, "%8.2f", 100.0 * c->c6/t->tsc);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]603 if (do_snb_cstates)
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]604 outp += sprintf(outp, "%8.2f", 100.0 * c->c7/t->tsc);
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]605
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]606 if (do_dts)
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]607 outp += sprintf(outp, "%8d", c->core_temp_c);
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]608
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]609 /* print per-package data only for 1st core in package */
610 if (!(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
611 goto done;
612
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame]613 /* PkgTmp */
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]614 if (do_ptm)
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]615 outp += sprintf(outp, "%8d", p->pkg_temp_c);
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]616
Len Brown27d47352016-02-27 00:37:54 -0500[diff] [blame^]617 /* GFXMHz */
618 if (do_gfx_mhz)
619 outp += sprintf(outp, "%8d", p->gfx_mhz);
620
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame]621 /* Totl%C0, Any%C0 GFX%C0 CPUGFX% */
622 if (do_skl_residency) {
623 outp += sprintf(outp, "%8.2f", 100.0 * p->pkg_wtd_core_c0/t->tsc);
624 outp += sprintf(outp, "%8.2f", 100.0 * p->pkg_any_core_c0/t->tsc);
625 outp += sprintf(outp, "%8.2f", 100.0 * p->pkg_any_gfxe_c0/t->tsc);
626 outp += sprintf(outp, "%8.2f", 100.0 * p->pkg_both_core_gfxe_c0/t->tsc);
627 }
628
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]629 if (do_pc2)
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]630 outp += sprintf(outp, "%8.2f", 100.0 * p->pc2/t->tsc);
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]631 if (do_pc3)
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]632 outp += sprintf(outp, "%8.2f", 100.0 * p->pc3/t->tsc);
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]633 if (do_pc6)
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]634 outp += sprintf(outp, "%8.2f", 100.0 * p->pc6/t->tsc);
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]635 if (do_pc7)
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]636 outp += sprintf(outp, "%8.2f", 100.0 * p->pc7/t->tsc);
Kristen Carlson Accardica587102012-11-21 05:22:43 -0800[diff] [blame]637 if (do_c8_c9_c10) {
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]638 outp += sprintf(outp, "%8.2f", 100.0 * p->pc8/t->tsc);
639 outp += sprintf(outp, "%8.2f", 100.0 * p->pc9/t->tsc);
640 outp += sprintf(outp, "%8.2f", 100.0 * p->pc10/t->tsc);
Kristen Carlson Accardica587102012-11-21 05:22:43 -0800[diff] [blame]641 }
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]642
643 /*
644 * If measurement interval exceeds minimum RAPL Joule Counter range,
645 * indicate that results are suspect by printing "**" in fraction place.
646 */
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]647 if (interval_float < rapl_joule_counter_range)
648 fmt8 = "%8.2f";
649 else
650 fmt8 = " %6.0f**";
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]651
Dirk Brandewie5c56be92013-12-16 10:23:41 -0800[diff] [blame]652 if (do_rapl && !rapl_joules) {
653 if (do_rapl & RAPL_PKG)
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]654 outp += sprintf(outp, fmt8, p->energy_pkg * rapl_energy_units / interval_float);
Dirk Brandewie5c56be92013-12-16 10:23:41 -0800[diff] [blame]655 if (do_rapl & RAPL_CORES)
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]656 outp += sprintf(outp, fmt8, p->energy_cores * rapl_energy_units / interval_float);
Dirk Brandewie5c56be92013-12-16 10:23:41 -0800[diff] [blame]657 if (do_rapl & RAPL_GFX)
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]658 outp += sprintf(outp, fmt8, p->energy_gfx * rapl_energy_units / interval_float);
Dirk Brandewie5c56be92013-12-16 10:23:41 -0800[diff] [blame]659 if (do_rapl & RAPL_DRAM)
Andrey Semin40ee8e32014-12-05 00:07:00 -0500[diff] [blame]660 outp += sprintf(outp, fmt8, p->energy_dram * rapl_dram_energy_units / interval_float);
Dirk Brandewie5c56be92013-12-16 10:23:41 -0800[diff] [blame]661 if (do_rapl & RAPL_PKG_PERF_STATUS)
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]662 outp += sprintf(outp, fmt8, 100.0 * p->rapl_pkg_perf_status * rapl_time_units / interval_float);
Dirk Brandewie5c56be92013-12-16 10:23:41 -0800[diff] [blame]663 if (do_rapl & RAPL_DRAM_PERF_STATUS)
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]664 outp += sprintf(outp, fmt8, 100.0 * p->rapl_dram_perf_status * rapl_time_units / interval_float);
Len Brownd7899442015-01-23 00:12:33 -0500[diff] [blame]665 } else if (do_rapl && rapl_joules) {
Dirk Brandewie5c56be92013-12-16 10:23:41 -0800[diff] [blame]666 if (do_rapl & RAPL_PKG)
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]667 outp += sprintf(outp, fmt8,
Dirk Brandewie5c56be92013-12-16 10:23:41 -0800[diff] [blame]668 p->energy_pkg * rapl_energy_units);
669 if (do_rapl & RAPL_CORES)
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]670 outp += sprintf(outp, fmt8,
Dirk Brandewie5c56be92013-12-16 10:23:41 -0800[diff] [blame]671 p->energy_cores * rapl_energy_units);
672 if (do_rapl & RAPL_GFX)
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]673 outp += sprintf(outp, fmt8,
Dirk Brandewie5c56be92013-12-16 10:23:41 -0800[diff] [blame]674 p->energy_gfx * rapl_energy_units);
675 if (do_rapl & RAPL_DRAM)
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]676 outp += sprintf(outp, fmt8,
Andrey Semin40ee8e32014-12-05 00:07:00 -0500[diff] [blame]677 p->energy_dram * rapl_dram_energy_units);
Dirk Brandewie5c56be92013-12-16 10:23:41 -0800[diff] [blame]678 if (do_rapl & RAPL_PKG_PERF_STATUS)
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]679 outp += sprintf(outp, fmt8, 100.0 * p->rapl_pkg_perf_status * rapl_time_units / interval_float);
Dirk Brandewie5c56be92013-12-16 10:23:41 -0800[diff] [blame]680 if (do_rapl & RAPL_DRAM_PERF_STATUS)
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]681 outp += sprintf(outp, fmt8, 100.0 * p->rapl_dram_perf_status * rapl_time_units / interval_float);
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]682
Len Brownd7899442015-01-23 00:12:33 -0500[diff] [blame]683 outp += sprintf(outp, fmt8, interval_float);
Dirk Brandewie5c56be92013-12-16 10:23:41 -0800[diff] [blame]684 }
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]685done:
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]686 outp += sprintf(outp, "\n");
687
688 return 0;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]689}
690
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]691void flush_output_stdout(void)
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]692{
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]693 FILE *filep;
694
695 if (outf == stderr)
696 filep = stdout;
697 else
698 filep = outf;
699
700 fputs(output_buffer, filep);
701 fflush(filep);
702
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]703 outp = output_buffer;
704}
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]705void flush_output_stderr(void)
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]706{
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]707 fputs(output_buffer, outf);
708 fflush(outf);
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]709 outp = output_buffer;
710}
711void format_all_counters(struct thread_data *t, struct core_data *c, struct pkg_data *p)
712{
Len Browne23da032012-02-06 18:37:16 -0500[diff] [blame]713 static int printed;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]714
Len Browne23da032012-02-06 18:37:16 -0500[diff] [blame]715 if (!printed || !summary_only)
716 print_header();
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]717
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]718 if (topo.num_cpus > 1)
719 format_counters(&average.threads, &average.cores,
720 &average.packages);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]721
Len Browne23da032012-02-06 18:37:16 -0500[diff] [blame]722 printed = 1;
723
724 if (summary_only)
725 return;
726
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]727 for_all_cpus(format_counters, t, c, p);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]728}
729
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]730#define DELTA_WRAP32(new, old) \
731 if (new > old) { \
732 old = new - old; \
733 } else { \
734 old = 0x100000000 + new - old; \
735 }
736
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]737void
738delta_package(struct pkg_data *new, struct pkg_data *old)
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]739{
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame]740
741 if (do_skl_residency) {
742 old->pkg_wtd_core_c0 = new->pkg_wtd_core_c0 - old->pkg_wtd_core_c0;
743 old->pkg_any_core_c0 = new->pkg_any_core_c0 - old->pkg_any_core_c0;
744 old->pkg_any_gfxe_c0 = new->pkg_any_gfxe_c0 - old->pkg_any_gfxe_c0;
745 old->pkg_both_core_gfxe_c0 = new->pkg_both_core_gfxe_c0 - old->pkg_both_core_gfxe_c0;
746 }
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]747 old->pc2 = new->pc2 - old->pc2;
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]748 if (do_pc3)
749 old->pc3 = new->pc3 - old->pc3;
750 if (do_pc6)
751 old->pc6 = new->pc6 - old->pc6;
752 if (do_pc7)
753 old->pc7 = new->pc7 - old->pc7;
Kristen Carlson Accardica587102012-11-21 05:22:43 -0800[diff] [blame]754 old->pc8 = new->pc8 - old->pc8;
755 old->pc9 = new->pc9 - old->pc9;
756 old->pc10 = new->pc10 - old->pc10;
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]757 old->pkg_temp_c = new->pkg_temp_c;
758
Len Brown27d47352016-02-27 00:37:54 -0500[diff] [blame^]759 old->gfx_mhz = new->gfx_mhz;
760
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]761 DELTA_WRAP32(new->energy_pkg, old->energy_pkg);
762 DELTA_WRAP32(new->energy_cores, old->energy_cores);
763 DELTA_WRAP32(new->energy_gfx, old->energy_gfx);
764 DELTA_WRAP32(new->energy_dram, old->energy_dram);
765 DELTA_WRAP32(new->rapl_pkg_perf_status, old->rapl_pkg_perf_status);
766 DELTA_WRAP32(new->rapl_dram_perf_status, old->rapl_dram_perf_status);
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]767}
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]768
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]769void
770delta_core(struct core_data *new, struct core_data *old)
771{
772 old->c3 = new->c3 - old->c3;
773 old->c6 = new->c6 - old->c6;
774 old->c7 = new->c7 - old->c7;
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]775 old->core_temp_c = new->core_temp_c;
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]776}
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]777
Len Brownc3ae3312012-06-13 21:31:46 -0400[diff] [blame]778/*
779 * old = new - old
780 */
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]781void
782delta_thread(struct thread_data *new, struct thread_data *old,
783 struct core_data *core_delta)
784{
785 old->tsc = new->tsc - old->tsc;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]786
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]787 /* check for TSC < 1 Mcycles over interval */
Josh Triplettb2c95d92013-08-20 17:20:18 -0700[diff] [blame]788 if (old->tsc < (1000 * 1000))
789 errx(-3, "Insanely slow TSC rate, TSC stops in idle?\n"
790 "You can disable all c-states by booting with \"idle=poll\"\n"
791 "or just the deep ones with \"processor.max_cstate=1\"");
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]792
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]793 old->c1 = new->c1 - old->c1;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]794
Len Browna7296172015-01-23 01:33:58 -0500[diff] [blame]795 if (has_aperf) {
796 if ((new->aperf > old->aperf) && (new->mperf > old->mperf)) {
797 old->aperf = new->aperf - old->aperf;
798 old->mperf = new->mperf - old->mperf;
799 } else {
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]800
Len Browna7296172015-01-23 01:33:58 -0500[diff] [blame]801 if (!aperf_mperf_unstable) {
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]802 fprintf(outf, "%s: APERF or MPERF went backwards *\n", progname);
803 fprintf(outf, "* Frequency results do not cover entire interval *\n");
804 fprintf(outf, "* fix this by running Linux-2.6.30 or later *\n");
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]805
Len Browna7296172015-01-23 01:33:58 -0500[diff] [blame]806 aperf_mperf_unstable = 1;
807 }
808 /*
809 * mperf delta is likely a huge "positive" number
810 * can not use it for calculating c0 time
811 */
812 skip_c0 = 1;
813 skip_c1 = 1;
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]814 }
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]815 }
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]816
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]817
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]818 if (use_c1_residency_msr) {
819 /*
820 * Some models have a dedicated C1 residency MSR,
821 * which should be more accurate than the derivation below.
822 */
823 } else {
824 /*
825 * As counter collection is not atomic,
826 * it is possible for mperf's non-halted cycles + idle states
827 * to exceed TSC's all cycles: show c1 = 0% in that case.
828 */
829 if ((old->mperf + core_delta->c3 + core_delta->c6 + core_delta->c7) > old->tsc)
830 old->c1 = 0;
831 else {
832 /* normal case, derive c1 */
833 old->c1 = old->tsc - old->mperf - core_delta->c3
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]834 - core_delta->c6 - core_delta->c7;
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]835 }
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]836 }
Len Brownc3ae3312012-06-13 21:31:46 -0400[diff] [blame]837
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]838 if (old->mperf == 0) {
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]839 if (debug > 1)
840 fprintf(outf, "cpu%d MPERF 0!\n", old->cpu_id);
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]841 old->mperf = 1; /* divide by 0 protection */
842 }
843
Len Brown8e180f32012-09-22 01:25:08 -0400[diff] [blame]844 old->extra_delta32 = new->extra_delta32 - old->extra_delta32;
845 old->extra_delta32 &= 0xFFFFFFFF;
846
847 old->extra_delta64 = new->extra_delta64 - old->extra_delta64;
848
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]849 /*
Len Brown8e180f32012-09-22 01:25:08 -0400[diff] [blame]850 * Extra MSR is just a snapshot, simply copy latest w/o subtracting
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]851 */
Len Brown2f32edf2012-09-21 23:45:46 -0400[diff] [blame]852 old->extra_msr32 = new->extra_msr32;
853 old->extra_msr64 = new->extra_msr64;
Len Brown1ed51012013-02-10 17:19:24 -0500[diff] [blame]854
Len Brown562a2d32016-02-26 23:48:05 -0500[diff] [blame]855 if (do_irq)
856 old->irq_count = new->irq_count - old->irq_count;
857
Len Brown1ed51012013-02-10 17:19:24 -0500[diff] [blame]858 if (do_smi)
859 old->smi_count = new->smi_count - old->smi_count;
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]860}
861
862int delta_cpu(struct thread_data *t, struct core_data *c,
863 struct pkg_data *p, struct thread_data *t2,
864 struct core_data *c2, struct pkg_data *p2)
865{
866 /* calculate core delta only for 1st thread in core */
867 if (t->flags & CPU_IS_FIRST_THREAD_IN_CORE)
868 delta_core(c, c2);
869
870 /* always calculate thread delta */
871 delta_thread(t, t2, c2); /* c2 is core delta */
872
873 /* calculate package delta only for 1st core in package */
874 if (t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE)
875 delta_package(p, p2);
876
877 return 0;
878}
879
880void clear_counters(struct thread_data *t, struct core_data *c, struct pkg_data *p)
881{
882 t->tsc = 0;
883 t->aperf = 0;
884 t->mperf = 0;
885 t->c1 = 0;
886
Len Brown8e180f32012-09-22 01:25:08 -0400[diff] [blame]887 t->extra_delta32 = 0;
888 t->extra_delta64 = 0;
889
Len Brown562a2d32016-02-26 23:48:05 -0500[diff] [blame]890 t->irq_count = 0;
891 t->smi_count = 0;
892
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]893 /* tells format_counters to dump all fields from this set */
894 t->flags = CPU_IS_FIRST_THREAD_IN_CORE | CPU_IS_FIRST_CORE_IN_PACKAGE;
895
896 c->c3 = 0;
897 c->c6 = 0;
898 c->c7 = 0;
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]899 c->core_temp_c = 0;
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]900
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame]901 p->pkg_wtd_core_c0 = 0;
902 p->pkg_any_core_c0 = 0;
903 p->pkg_any_gfxe_c0 = 0;
904 p->pkg_both_core_gfxe_c0 = 0;
905
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]906 p->pc2 = 0;
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]907 if (do_pc3)
908 p->pc3 = 0;
909 if (do_pc6)
910 p->pc6 = 0;
911 if (do_pc7)
912 p->pc7 = 0;
Kristen Carlson Accardica587102012-11-21 05:22:43 -0800[diff] [blame]913 p->pc8 = 0;
914 p->pc9 = 0;
915 p->pc10 = 0;
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]916
917 p->energy_pkg = 0;
918 p->energy_dram = 0;
919 p->energy_cores = 0;
920 p->energy_gfx = 0;
921 p->rapl_pkg_perf_status = 0;
922 p->rapl_dram_perf_status = 0;
923 p->pkg_temp_c = 0;
Len Brown27d47352016-02-27 00:37:54 -0500[diff] [blame^]924
925 p->gfx_mhz = 0;
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]926}
927int sum_counters(struct thread_data *t, struct core_data *c,
928 struct pkg_data *p)
929{
930 average.threads.tsc += t->tsc;
931 average.threads.aperf += t->aperf;
932 average.threads.mperf += t->mperf;
933 average.threads.c1 += t->c1;
934
Len Brown8e180f32012-09-22 01:25:08 -0400[diff] [blame]935 average.threads.extra_delta32 += t->extra_delta32;
936 average.threads.extra_delta64 += t->extra_delta64;
937
Len Brown562a2d32016-02-26 23:48:05 -0500[diff] [blame]938 average.threads.irq_count += t->irq_count;
939 average.threads.smi_count += t->smi_count;
940
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]941 /* sum per-core values only for 1st thread in core */
942 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE))
943 return 0;
944
945 average.cores.c3 += c->c3;
946 average.cores.c6 += c->c6;
947 average.cores.c7 += c->c7;
948
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]949 average.cores.core_temp_c = MAX(average.cores.core_temp_c, c->core_temp_c);
950
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]951 /* sum per-pkg values only for 1st core in pkg */
952 if (!(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
953 return 0;
954
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame]955 if (do_skl_residency) {
956 average.packages.pkg_wtd_core_c0 += p->pkg_wtd_core_c0;
957 average.packages.pkg_any_core_c0 += p->pkg_any_core_c0;
958 average.packages.pkg_any_gfxe_c0 += p->pkg_any_gfxe_c0;
959 average.packages.pkg_both_core_gfxe_c0 += p->pkg_both_core_gfxe_c0;
960 }
961
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]962 average.packages.pc2 += p->pc2;
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]963 if (do_pc3)
964 average.packages.pc3 += p->pc3;
965 if (do_pc6)
966 average.packages.pc6 += p->pc6;
967 if (do_pc7)
968 average.packages.pc7 += p->pc7;
Kristen Carlson Accardica587102012-11-21 05:22:43 -0800[diff] [blame]969 average.packages.pc8 += p->pc8;
970 average.packages.pc9 += p->pc9;
971 average.packages.pc10 += p->pc10;
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]972
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]973 average.packages.energy_pkg += p->energy_pkg;
974 average.packages.energy_dram += p->energy_dram;
975 average.packages.energy_cores += p->energy_cores;
976 average.packages.energy_gfx += p->energy_gfx;
977
Len Brown27d47352016-02-27 00:37:54 -0500[diff] [blame^]978 average.packages.gfx_mhz = p->gfx_mhz;
979
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]980 average.packages.pkg_temp_c = MAX(average.packages.pkg_temp_c, p->pkg_temp_c);
981
982 average.packages.rapl_pkg_perf_status += p->rapl_pkg_perf_status;
983 average.packages.rapl_dram_perf_status += p->rapl_dram_perf_status;
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]984 return 0;
985}
986/*
987 * sum the counters for all cpus in the system
988 * compute the weighted average
989 */
990void compute_average(struct thread_data *t, struct core_data *c,
991 struct pkg_data *p)
992{
993 clear_counters(&average.threads, &average.cores, &average.packages);
994
995 for_all_cpus(sum_counters, t, c, p);
996
997 average.threads.tsc /= topo.num_cpus;
998 average.threads.aperf /= topo.num_cpus;
999 average.threads.mperf /= topo.num_cpus;
1000 average.threads.c1 /= topo.num_cpus;
1001
Len Brown8e180f32012-09-22 01:25:08 -0400[diff] [blame]1002 average.threads.extra_delta32 /= topo.num_cpus;
1003 average.threads.extra_delta32 &= 0xFFFFFFFF;
1004
1005 average.threads.extra_delta64 /= topo.num_cpus;
1006
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1007 average.cores.c3 /= topo.num_cores;
1008 average.cores.c6 /= topo.num_cores;
1009 average.cores.c7 /= topo.num_cores;
1010
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame]1011 if (do_skl_residency) {
1012 average.packages.pkg_wtd_core_c0 /= topo.num_packages;
1013 average.packages.pkg_any_core_c0 /= topo.num_packages;
1014 average.packages.pkg_any_gfxe_c0 /= topo.num_packages;
1015 average.packages.pkg_both_core_gfxe_c0 /= topo.num_packages;
1016 }
1017
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1018 average.packages.pc2 /= topo.num_packages;
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]1019 if (do_pc3)
1020 average.packages.pc3 /= topo.num_packages;
1021 if (do_pc6)
1022 average.packages.pc6 /= topo.num_packages;
1023 if (do_pc7)
1024 average.packages.pc7 /= topo.num_packages;
Kristen Carlson Accardica587102012-11-21 05:22:43 -0800[diff] [blame]1025
1026 average.packages.pc8 /= topo.num_packages;
1027 average.packages.pc9 /= topo.num_packages;
1028 average.packages.pc10 /= topo.num_packages;
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1029}
1030
1031static unsigned long long rdtsc(void)
1032{
1033 unsigned int low, high;
1034
1035 asm volatile("rdtsc" : "=a" (low), "=d" (high));
1036
1037 return low | ((unsigned long long)high) << 32;
1038}
1039
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1040/*
1041 * get_counters(...)
1042 * migrate to cpu
1043 * acquire and record local counters for that cpu
1044 */
1045int get_counters(struct thread_data *t, struct core_data *c, struct pkg_data *p)
1046{
1047 int cpu = t->cpu_id;
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]1048 unsigned long long msr;
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1049
Len Browne52966c2012-11-08 22:38:05 -0500[diff] [blame]1050 if (cpu_migrate(cpu)) {
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]1051 fprintf(outf, "Could not migrate to CPU %d\n", cpu);
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1052 return -1;
Len Browne52966c2012-11-08 22:38:05 -0500[diff] [blame]1053 }
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1054
1055 t->tsc = rdtsc(); /* we are running on local CPU of interest */
1056
1057 if (has_aperf) {
Len Brown9c63a652012-10-31 01:29:52 -0400[diff] [blame]1058 if (get_msr(cpu, MSR_IA32_APERF, &t->aperf))
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1059 return -3;
Len Brown9c63a652012-10-31 01:29:52 -0400[diff] [blame]1060 if (get_msr(cpu, MSR_IA32_MPERF, &t->mperf))
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1061 return -4;
Hubert Chrzaniukb2b34df2015-09-14 13:31:00 +0200[diff] [blame]1062 t->aperf = t->aperf * aperf_mperf_multiplier;
1063 t->mperf = t->mperf * aperf_mperf_multiplier;
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1064 }
1065
Len Brown562a2d32016-02-26 23:48:05 -0500[diff] [blame]1066 if (do_irq)
1067 t->irq_count = irqs_per_cpu[cpu];
Len Brown1ed51012013-02-10 17:19:24 -0500[diff] [blame]1068 if (do_smi) {
1069 if (get_msr(cpu, MSR_SMI_COUNT, &msr))
1070 return -5;
1071 t->smi_count = msr & 0xFFFFFFFF;
1072 }
Len Brown8e180f32012-09-22 01:25:08 -0400[diff] [blame]1073 if (extra_delta_offset32) {
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]1074 if (get_msr(cpu, extra_delta_offset32, &msr))
Len Brown2f32edf2012-09-21 23:45:46 -0400[diff] [blame]1075 return -5;
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]1076 t->extra_delta32 = msr & 0xFFFFFFFF;
Len Brown8e180f32012-09-22 01:25:08 -0400[diff] [blame]1077 }
1078
1079 if (extra_delta_offset64)
1080 if (get_msr(cpu, extra_delta_offset64, &t->extra_delta64))
1081 return -5;
1082
1083 if (extra_msr_offset32) {
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]1084 if (get_msr(cpu, extra_msr_offset32, &msr))
Len Brown8e180f32012-09-22 01:25:08 -0400[diff] [blame]1085 return -5;
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]1086 t->extra_msr32 = msr & 0xFFFFFFFF;
Len Brown8e180f32012-09-22 01:25:08 -0400[diff] [blame]1087 }
Len Brown2f32edf2012-09-21 23:45:46 -0400[diff] [blame]1088
1089 if (extra_msr_offset64)
1090 if (get_msr(cpu, extra_msr_offset64, &t->extra_msr64))
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1091 return -5;
1092
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]1093 if (use_c1_residency_msr) {
1094 if (get_msr(cpu, MSR_CORE_C1_RES, &t->c1))
1095 return -6;
1096 }
1097
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1098 /* collect core counters only for 1st thread in core */
1099 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE))
1100 return 0;
1101
Dasaratharaman Chandramoulifb5d4322015-05-20 09:49:34 -0700[diff] [blame]1102 if (do_nhm_cstates && !do_slm_cstates && !do_knl_cstates) {
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1103 if (get_msr(cpu, MSR_CORE_C3_RESIDENCY, &c->c3))
1104 return -6;
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]1105 }
1106
Dasaratharaman Chandramoulifb5d4322015-05-20 09:49:34 -0700[diff] [blame]1107 if (do_nhm_cstates && !do_knl_cstates) {
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1108 if (get_msr(cpu, MSR_CORE_C6_RESIDENCY, &c->c6))
1109 return -7;
Dasaratharaman Chandramoulifb5d4322015-05-20 09:49:34 -0700[diff] [blame]1110 } else if (do_knl_cstates) {
1111 if (get_msr(cpu, MSR_KNL_CORE_C6_RESIDENCY, &c->c6))
1112 return -7;
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1113 }
1114
1115 if (do_snb_cstates)
1116 if (get_msr(cpu, MSR_CORE_C7_RESIDENCY, &c->c7))
1117 return -8;
1118
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]1119 if (do_dts) {
1120 if (get_msr(cpu, MSR_IA32_THERM_STATUS, &msr))
1121 return -9;
1122 c->core_temp_c = tcc_activation_temp - ((msr >> 16) & 0x7F);
1123 }
1124
1125
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1126 /* collect package counters only for 1st core in package */
1127 if (!(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
1128 return 0;
1129
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame]1130 if (do_skl_residency) {
1131 if (get_msr(cpu, MSR_PKG_WEIGHTED_CORE_C0_RES, &p->pkg_wtd_core_c0))
1132 return -10;
1133 if (get_msr(cpu, MSR_PKG_ANY_CORE_C0_RES, &p->pkg_any_core_c0))
1134 return -11;
1135 if (get_msr(cpu, MSR_PKG_ANY_GFXE_C0_RES, &p->pkg_any_gfxe_c0))
1136 return -12;
1137 if (get_msr(cpu, MSR_PKG_BOTH_CORE_GFXE_C0_RES, &p->pkg_both_core_gfxe_c0))
1138 return -13;
1139 }
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]1140 if (do_pc3)
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1141 if (get_msr(cpu, MSR_PKG_C3_RESIDENCY, &p->pc3))
1142 return -9;
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]1143 if (do_pc6)
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1144 if (get_msr(cpu, MSR_PKG_C6_RESIDENCY, &p->pc6))
1145 return -10;
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]1146 if (do_pc2)
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1147 if (get_msr(cpu, MSR_PKG_C2_RESIDENCY, &p->pc2))
1148 return -11;
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]1149 if (do_pc7)
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1150 if (get_msr(cpu, MSR_PKG_C7_RESIDENCY, &p->pc7))
1151 return -12;
Kristen Carlson Accardica587102012-11-21 05:22:43 -0800[diff] [blame]1152 if (do_c8_c9_c10) {
1153 if (get_msr(cpu, MSR_PKG_C8_RESIDENCY, &p->pc8))
1154 return -13;
1155 if (get_msr(cpu, MSR_PKG_C9_RESIDENCY, &p->pc9))
1156 return -13;
1157 if (get_msr(cpu, MSR_PKG_C10_RESIDENCY, &p->pc10))
1158 return -13;
1159 }
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]1160 if (do_rapl & RAPL_PKG) {
1161 if (get_msr(cpu, MSR_PKG_ENERGY_STATUS, &msr))
1162 return -13;
1163 p->energy_pkg = msr & 0xFFFFFFFF;
1164 }
1165 if (do_rapl & RAPL_CORES) {
1166 if (get_msr(cpu, MSR_PP0_ENERGY_STATUS, &msr))
1167 return -14;
1168 p->energy_cores = msr & 0xFFFFFFFF;
1169 }
1170 if (do_rapl & RAPL_DRAM) {
1171 if (get_msr(cpu, MSR_DRAM_ENERGY_STATUS, &msr))
1172 return -15;
1173 p->energy_dram = msr & 0xFFFFFFFF;
1174 }
1175 if (do_rapl & RAPL_GFX) {
1176 if (get_msr(cpu, MSR_PP1_ENERGY_STATUS, &msr))
1177 return -16;
1178 p->energy_gfx = msr & 0xFFFFFFFF;
1179 }
1180 if (do_rapl & RAPL_PKG_PERF_STATUS) {
1181 if (get_msr(cpu, MSR_PKG_PERF_STATUS, &msr))
1182 return -16;
1183 p->rapl_pkg_perf_status = msr & 0xFFFFFFFF;
1184 }
1185 if (do_rapl & RAPL_DRAM_PERF_STATUS) {
1186 if (get_msr(cpu, MSR_DRAM_PERF_STATUS, &msr))
1187 return -16;
1188 p->rapl_dram_perf_status = msr & 0xFFFFFFFF;
1189 }
1190 if (do_ptm) {
1191 if (get_msr(cpu, MSR_IA32_PACKAGE_THERM_STATUS, &msr))
1192 return -17;
1193 p->pkg_temp_c = tcc_activation_temp - ((msr >> 16) & 0x7F);
1194 }
Len Brown27d47352016-02-27 00:37:54 -0500[diff] [blame^]1195 if (do_gfx_mhz)
1196 p->gfx_mhz = gfx_cur_mhz;
1197
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1198 return 0;
1199}
1200
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]1201/*
1202 * MSR_PKG_CST_CONFIG_CONTROL decoding for pkg_cstate_limit:
1203 * If you change the values, note they are used both in comparisons
1204 * (>= PCL__7) and to index pkg_cstate_limit_strings[].
1205 */
1206
1207#define PCLUKN 0 /* Unknown */
1208#define PCLRSV 1 /* Reserved */
1209#define PCL__0 2 /* PC0 */
1210#define PCL__1 3 /* PC1 */
1211#define PCL__2 4 /* PC2 */
1212#define PCL__3 5 /* PC3 */
1213#define PCL__4 6 /* PC4 */
1214#define PCL__6 7 /* PC6 */
1215#define PCL_6N 8 /* PC6 No Retention */
1216#define PCL_6R 9 /* PC6 Retention */
1217#define PCL__7 10 /* PC7 */
1218#define PCL_7S 11 /* PC7 Shrink */
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame]1219#define PCL__8 12 /* PC8 */
1220#define PCL__9 13 /* PC9 */
1221#define PCLUNL 14 /* Unlimited */
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]1222
1223int pkg_cstate_limit = PCLUKN;
1224char *pkg_cstate_limit_strings[] = { "reserved", "unknown", "pc0", "pc1", "pc2",
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame]1225 "pc3", "pc4", "pc6", "pc6n", "pc6r", "pc7", "pc7s", "pc8", "pc9", "unlimited"};
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]1226
Len Browne9257f52015-04-01 21:02:57 -0400[diff] [blame]1227int nhm_pkg_cstate_limits[16] = {PCL__0, PCL__1, PCL__3, PCL__6, PCL__7, PCLRSV, PCLRSV, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
1228int snb_pkg_cstate_limits[16] = {PCL__0, PCL__2, PCL_6N, PCL_6R, PCL__7, PCL_7S, PCLRSV, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
1229int hsw_pkg_cstate_limits[16] = {PCL__0, PCL__2, PCL__3, PCL__6, PCL__7, PCL_7S, PCL__8, PCL__9, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
1230int slv_pkg_cstate_limits[16] = {PCL__0, PCL__1, PCLRSV, PCLRSV, PCL__4, PCLRSV, PCL__6, PCL__7, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
1231int amt_pkg_cstate_limits[16] = {PCL__0, PCL__1, PCL__2, PCLRSV, PCLRSV, PCLRSV, PCL__6, PCL__7, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
1232int phi_pkg_cstate_limits[16] = {PCL__0, PCL__2, PCL_6N, PCL_6R, PCLRSV, PCLRSV, PCLRSV, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]1233
Len Browna2b7b742015-09-26 00:12:38 -0400[diff] [blame]1234
1235static void
1236calculate_tsc_tweak()
1237{
Len Browna2b7b742015-09-26 00:12:38 -0400[diff] [blame]1238 tsc_tweak = base_hz / tsc_hz;
1239}
1240
Len Brownfcd17212015-03-23 20:29:09 -0400[diff] [blame]1241static void
1242dump_nhm_platform_info(void)
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1243{
1244 unsigned long long msr;
1245 unsigned int ratio;
1246
Len Brownec0adc52015-11-12 02:42:31 -0500[diff] [blame]1247 get_msr(base_cpu, MSR_PLATFORM_INFO, &msr);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1248
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]1249 fprintf(outf, "cpu%d: MSR_PLATFORM_INFO: 0x%08llx\n", base_cpu, msr);
Len Brown6574a5d2012-09-21 00:01:31 -0400[diff] [blame]1250
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1251 ratio = (msr >> 40) & 0xFF;
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]1252 fprintf(outf, "%d * %.0f = %.0f MHz max efficiency frequency\n",
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1253 ratio, bclk, ratio * bclk);
1254
1255 ratio = (msr >> 8) & 0xFF;
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]1256 fprintf(outf, "%d * %.0f = %.0f MHz base frequency\n",
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1257 ratio, bclk, ratio * bclk);
1258
Prarit Bhargava7ce7d5d2015-05-25 08:34:28 -0400[diff] [blame]1259 get_msr(base_cpu, MSR_IA32_POWER_CTL, &msr);
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]1260 fprintf(outf, "cpu%d: MSR_IA32_POWER_CTL: 0x%08llx (C1E auto-promotion: %sabled)\n",
Len Brownbfae2052015-06-17 12:27:21 -0400[diff] [blame]1261 base_cpu, msr, msr & 0x2 ? "EN" : "DIS");
Len Brown67920412013-01-31 15:22:15 -0500[diff] [blame]1262
Len Brownfcd17212015-03-23 20:29:09 -0400[diff] [blame]1263 return;
1264}
1265
1266static void
1267dump_hsw_turbo_ratio_limits(void)
1268{
1269 unsigned long long msr;
1270 unsigned int ratio;
1271
Prarit Bhargava7ce7d5d2015-05-25 08:34:28 -0400[diff] [blame]1272 get_msr(base_cpu, MSR_TURBO_RATIO_LIMIT2, &msr);
Len Brownfcd17212015-03-23 20:29:09 -0400[diff] [blame]1273
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]1274 fprintf(outf, "cpu%d: MSR_TURBO_RATIO_LIMIT2: 0x%08llx\n", base_cpu, msr);
Len Brownfcd17212015-03-23 20:29:09 -0400[diff] [blame]1275
1276 ratio = (msr >> 8) & 0xFF;
1277 if (ratio)
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]1278 fprintf(outf, "%d * %.0f = %.0f MHz max turbo 18 active cores\n",
Len Brownfcd17212015-03-23 20:29:09 -0400[diff] [blame]1279 ratio, bclk, ratio * bclk);
1280
1281 ratio = (msr >> 0) & 0xFF;
1282 if (ratio)
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]1283 fprintf(outf, "%d * %.0f = %.0f MHz max turbo 17 active cores\n",
Len Brownfcd17212015-03-23 20:29:09 -0400[diff] [blame]1284 ratio, bclk, ratio * bclk);
1285 return;
1286}
1287
1288static void
1289dump_ivt_turbo_ratio_limits(void)
1290{
1291 unsigned long long msr;
1292 unsigned int ratio;
Len Brown6574a5d2012-09-21 00:01:31 -0400[diff] [blame]1293
Prarit Bhargava7ce7d5d2015-05-25 08:34:28 -0400[diff] [blame]1294 get_msr(base_cpu, MSR_TURBO_RATIO_LIMIT1, &msr);
Len Brown6574a5d2012-09-21 00:01:31 -0400[diff] [blame]1295
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]1296 fprintf(outf, "cpu%d: MSR_TURBO_RATIO_LIMIT1: 0x%08llx\n", base_cpu, msr);
Len Brown6574a5d2012-09-21 00:01:31 -0400[diff] [blame]1297
1298 ratio = (msr >> 56) & 0xFF;
1299 if (ratio)
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]1300 fprintf(outf, "%d * %.0f = %.0f MHz max turbo 16 active cores\n",
Len Brown6574a5d2012-09-21 00:01:31 -0400[diff] [blame]1301 ratio, bclk, ratio * bclk);
1302
1303 ratio = (msr >> 48) & 0xFF;
1304 if (ratio)
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]1305 fprintf(outf, "%d * %.0f = %.0f MHz max turbo 15 active cores\n",
Len Brown6574a5d2012-09-21 00:01:31 -0400[diff] [blame]1306 ratio, bclk, ratio * bclk);
1307
1308 ratio = (msr >> 40) & 0xFF;
1309 if (ratio)
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]1310 fprintf(outf, "%d * %.0f = %.0f MHz max turbo 14 active cores\n",
Len Brown6574a5d2012-09-21 00:01:31 -0400[diff] [blame]1311 ratio, bclk, ratio * bclk);
1312
1313 ratio = (msr >> 32) & 0xFF;
1314 if (ratio)
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]1315 fprintf(outf, "%d * %.0f = %.0f MHz max turbo 13 active cores\n",
Len Brown6574a5d2012-09-21 00:01:31 -0400[diff] [blame]1316 ratio, bclk, ratio * bclk);
1317
1318 ratio = (msr >> 24) & 0xFF;
1319 if (ratio)
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]1320 fprintf(outf, "%d * %.0f = %.0f MHz max turbo 12 active cores\n",
Len Brown6574a5d2012-09-21 00:01:31 -0400[diff] [blame]1321 ratio, bclk, ratio * bclk);
1322
1323 ratio = (msr >> 16) & 0xFF;
1324 if (ratio)
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]1325 fprintf(outf, "%d * %.0f = %.0f MHz max turbo 11 active cores\n",
Len Brown6574a5d2012-09-21 00:01:31 -0400[diff] [blame]1326 ratio, bclk, ratio * bclk);
1327
1328 ratio = (msr >> 8) & 0xFF;
1329 if (ratio)
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]1330 fprintf(outf, "%d * %.0f = %.0f MHz max turbo 10 active cores\n",
Len Brown6574a5d2012-09-21 00:01:31 -0400[diff] [blame]1331 ratio, bclk, ratio * bclk);
1332
1333 ratio = (msr >> 0) & 0xFF;
1334 if (ratio)
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]1335 fprintf(outf, "%d * %.0f = %.0f MHz max turbo 9 active cores\n",
Len Brown6574a5d2012-09-21 00:01:31 -0400[diff] [blame]1336 ratio, bclk, ratio * bclk);
Len Brownfcd17212015-03-23 20:29:09 -0400[diff] [blame]1337 return;
1338}
Len Brown6574a5d2012-09-21 00:01:31 -0400[diff] [blame]1339
Len Brownfcd17212015-03-23 20:29:09 -0400[diff] [blame]1340static void
1341dump_nhm_turbo_ratio_limits(void)
1342{
1343 unsigned long long msr;
1344 unsigned int ratio;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1345
Prarit Bhargava7ce7d5d2015-05-25 08:34:28 -0400[diff] [blame]1346 get_msr(base_cpu, MSR_TURBO_RATIO_LIMIT, &msr);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1347
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]1348 fprintf(outf, "cpu%d: MSR_TURBO_RATIO_LIMIT: 0x%08llx\n", base_cpu, msr);
Len Brown6574a5d2012-09-21 00:01:31 -0400[diff] [blame]1349
1350 ratio = (msr >> 56) & 0xFF;
1351 if (ratio)
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]1352 fprintf(outf, "%d * %.0f = %.0f MHz max turbo 8 active cores\n",
Len Brown6574a5d2012-09-21 00:01:31 -0400[diff] [blame]1353 ratio, bclk, ratio * bclk);
1354
1355 ratio = (msr >> 48) & 0xFF;
1356 if (ratio)
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]1357 fprintf(outf, "%d * %.0f = %.0f MHz max turbo 7 active cores\n",
Len Brown6574a5d2012-09-21 00:01:31 -0400[diff] [blame]1358 ratio, bclk, ratio * bclk);
1359
1360 ratio = (msr >> 40) & 0xFF;
1361 if (ratio)
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]1362 fprintf(outf, "%d * %.0f = %.0f MHz max turbo 6 active cores\n",
Len Brown6574a5d2012-09-21 00:01:31 -0400[diff] [blame]1363 ratio, bclk, ratio * bclk);
1364
1365 ratio = (msr >> 32) & 0xFF;
1366 if (ratio)
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]1367 fprintf(outf, "%d * %.0f = %.0f MHz max turbo 5 active cores\n",
Len Brown6574a5d2012-09-21 00:01:31 -0400[diff] [blame]1368 ratio, bclk, ratio * bclk);
1369
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1370 ratio = (msr >> 24) & 0xFF;
1371 if (ratio)
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]1372 fprintf(outf, "%d * %.0f = %.0f MHz max turbo 4 active cores\n",
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1373 ratio, bclk, ratio * bclk);
1374
1375 ratio = (msr >> 16) & 0xFF;
1376 if (ratio)
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]1377 fprintf(outf, "%d * %.0f = %.0f MHz max turbo 3 active cores\n",
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1378 ratio, bclk, ratio * bclk);
1379
1380 ratio = (msr >> 8) & 0xFF;
1381 if (ratio)
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]1382 fprintf(outf, "%d * %.0f = %.0f MHz max turbo 2 active cores\n",
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1383 ratio, bclk, ratio * bclk);
1384
1385 ratio = (msr >> 0) & 0xFF;
1386 if (ratio)
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]1387 fprintf(outf, "%d * %.0f = %.0f MHz max turbo 1 active cores\n",
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1388 ratio, bclk, ratio * bclk);
Len Brownfcd17212015-03-23 20:29:09 -0400[diff] [blame]1389 return;
1390}
Len Brown3a9a9412014-08-15 02:39:52 -0400[diff] [blame]1391
Len Brownfcd17212015-03-23 20:29:09 -0400[diff] [blame]1392static void
Dasaratharaman Chandramoulifb5d4322015-05-20 09:49:34 -0700[diff] [blame]1393dump_knl_turbo_ratio_limits(void)
1394{
Hubert Chrzaniukcbf97ab2016-02-10 14:55:22 +0100[diff] [blame]1395 const unsigned int buckets_no = 7;
1396
Dasaratharaman Chandramoulifb5d4322015-05-20 09:49:34 -0700[diff] [blame]1397 unsigned long long msr;
Hubert Chrzaniukcbf97ab2016-02-10 14:55:22 +0100[diff] [blame]1398 int delta_cores, delta_ratio;
1399 int i, b_nr;
1400 unsigned int cores[buckets_no];
1401 unsigned int ratio[buckets_no];
Dasaratharaman Chandramoulifb5d4322015-05-20 09:49:34 -0700[diff] [blame]1402
Prarit Bhargava7ce7d5d2015-05-25 08:34:28 -0400[diff] [blame]1403 get_msr(base_cpu, MSR_NHM_TURBO_RATIO_LIMIT, &msr);
Dasaratharaman Chandramoulifb5d4322015-05-20 09:49:34 -0700[diff] [blame]1404
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]1405 fprintf(outf, "cpu%d: MSR_TURBO_RATIO_LIMIT: 0x%08llx\n",
Len Brownbfae2052015-06-17 12:27:21 -0400[diff] [blame]1406 base_cpu, msr);
Dasaratharaman Chandramoulifb5d4322015-05-20 09:49:34 -0700[diff] [blame]1407
1408 /**
1409 * Turbo encoding in KNL is as follows:
Hubert Chrzaniukcbf97ab2016-02-10 14:55:22 +0100[diff] [blame]1410 * [0] -- Reserved
1411 * [7:1] -- Base value of number of active cores of bucket 1.
Dasaratharaman Chandramoulifb5d4322015-05-20 09:49:34 -0700[diff] [blame]1412 * [15:8] -- Base value of freq ratio of bucket 1.
1413 * [20:16] -- +ve delta of number of active cores of bucket 2.
1414 * i.e. active cores of bucket 2 =
1415 * active cores of bucket 1 + delta
1416 * [23:21] -- Negative delta of freq ratio of bucket 2.
1417 * i.e. freq ratio of bucket 2 =
1418 * freq ratio of bucket 1 - delta
1419 * [28:24]-- +ve delta of number of active cores of bucket 3.
1420 * [31:29]-- -ve delta of freq ratio of bucket 3.
1421 * [36:32]-- +ve delta of number of active cores of bucket 4.
1422 * [39:37]-- -ve delta of freq ratio of bucket 4.
1423 * [44:40]-- +ve delta of number of active cores of bucket 5.
1424 * [47:45]-- -ve delta of freq ratio of bucket 5.
1425 * [52:48]-- +ve delta of number of active cores of bucket 6.
1426 * [55:53]-- -ve delta of freq ratio of bucket 6.
1427 * [60:56]-- +ve delta of number of active cores of bucket 7.
1428 * [63:61]-- -ve delta of freq ratio of bucket 7.
1429 */
Dasaratharaman Chandramoulifb5d4322015-05-20 09:49:34 -0700[diff] [blame]1430
Hubert Chrzaniukcbf97ab2016-02-10 14:55:22 +0100[diff] [blame]1431 b_nr = 0;
1432 cores[b_nr] = (msr & 0xFF) >> 1;
1433 ratio[b_nr] = (msr >> 8) & 0xFF;
1434
1435 for (i = 16; i < 64; i += 8) {
Dasaratharaman Chandramoulifb5d4322015-05-20 09:49:34 -0700[diff] [blame]1436 delta_cores = (msr >> i) & 0x1F;
Hubert Chrzaniukcbf97ab2016-02-10 14:55:22 +0100[diff] [blame]1437 delta_ratio = (msr >> (i + 5)) & 0x7;
Dasaratharaman Chandramoulifb5d4322015-05-20 09:49:34 -0700[diff] [blame]1438
Hubert Chrzaniukcbf97ab2016-02-10 14:55:22 +0100[diff] [blame]1439 cores[b_nr + 1] = cores[b_nr] + delta_cores;
1440 ratio[b_nr + 1] = ratio[b_nr] - delta_ratio;
1441 b_nr++;
1442 }
1443
1444 for (i = buckets_no - 1; i >= 0; i--)
1445 if (i > 0 ? ratio[i] != ratio[i - 1] : 1)
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]1446 fprintf(outf,
Dasaratharaman Chandramoulifb5d4322015-05-20 09:49:34 -0700[diff] [blame]1447 "%d * %.0f = %.0f MHz max turbo %d active cores\n",
Hubert Chrzaniukcbf97ab2016-02-10 14:55:22 +0100[diff] [blame]1448 ratio[i], bclk, ratio[i] * bclk, cores[i]);
Dasaratharaman Chandramoulifb5d4322015-05-20 09:49:34 -0700[diff] [blame]1449}
1450
1451static void
Len Brownfcd17212015-03-23 20:29:09 -0400[diff] [blame]1452dump_nhm_cst_cfg(void)
1453{
1454 unsigned long long msr;
1455
Prarit Bhargava7ce7d5d2015-05-25 08:34:28 -0400[diff] [blame]1456 get_msr(base_cpu, MSR_NHM_SNB_PKG_CST_CFG_CTL, &msr);
Len Brownfcd17212015-03-23 20:29:09 -0400[diff] [blame]1457
1458#define SNB_C1_AUTO_UNDEMOTE (1UL << 27)
1459#define SNB_C3_AUTO_UNDEMOTE (1UL << 28)
1460
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]1461 fprintf(outf, "cpu%d: MSR_NHM_SNB_PKG_CST_CFG_CTL: 0x%08llx", base_cpu, msr);
Len Brownfcd17212015-03-23 20:29:09 -0400[diff] [blame]1462
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]1463 fprintf(outf, " (%s%s%s%s%slocked: pkg-cstate-limit=%d: %s)\n",
Len Brownfcd17212015-03-23 20:29:09 -0400[diff] [blame]1464 (msr & SNB_C3_AUTO_UNDEMOTE) ? "UNdemote-C3, " : "",
1465 (msr & SNB_C1_AUTO_UNDEMOTE) ? "UNdemote-C1, " : "",
1466 (msr & NHM_C3_AUTO_DEMOTE) ? "demote-C3, " : "",
1467 (msr & NHM_C1_AUTO_DEMOTE) ? "demote-C1, " : "",
1468 (msr & (1 << 15)) ? "" : "UN",
1469 (unsigned int)msr & 7,
1470 pkg_cstate_limit_strings[pkg_cstate_limit]);
1471 return;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1472}
1473
Len Brown6fb31432015-06-17 16:23:45 -0400[diff] [blame]1474static void
1475dump_config_tdp(void)
1476{
1477 unsigned long long msr;
1478
1479 get_msr(base_cpu, MSR_CONFIG_TDP_NOMINAL, &msr);
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]1480 fprintf(outf, "cpu%d: MSR_CONFIG_TDP_NOMINAL: 0x%08llx", base_cpu, msr);
1481 fprintf(outf, " (base_ratio=%d)\n", (unsigned int)msr & 0xEF);
Len Brown6fb31432015-06-17 16:23:45 -0400[diff] [blame]1482
1483 get_msr(base_cpu, MSR_CONFIG_TDP_LEVEL_1, &msr);
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]1484 fprintf(outf, "cpu%d: MSR_CONFIG_TDP_LEVEL_1: 0x%08llx (", base_cpu, msr);
Len Brown6fb31432015-06-17 16:23:45 -0400[diff] [blame]1485 if (msr) {
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]1486 fprintf(outf, "PKG_MIN_PWR_LVL1=%d ", (unsigned int)(msr >> 48) & 0xEFFF);
1487 fprintf(outf, "PKG_MAX_PWR_LVL1=%d ", (unsigned int)(msr >> 32) & 0xEFFF);
1488 fprintf(outf, "LVL1_RATIO=%d ", (unsigned int)(msr >> 16) & 0xEF);
1489 fprintf(outf, "PKG_TDP_LVL1=%d", (unsigned int)(msr) & 0xEFFF);
Len Brown6fb31432015-06-17 16:23:45 -0400[diff] [blame]1490 }
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]1491 fprintf(outf, ")\n");
Len Brown6fb31432015-06-17 16:23:45 -0400[diff] [blame]1492
1493 get_msr(base_cpu, MSR_CONFIG_TDP_LEVEL_2, &msr);
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]1494 fprintf(outf, "cpu%d: MSR_CONFIG_TDP_LEVEL_2: 0x%08llx (", base_cpu, msr);
Len Brown6fb31432015-06-17 16:23:45 -0400[diff] [blame]1495 if (msr) {
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]1496 fprintf(outf, "PKG_MIN_PWR_LVL2=%d ", (unsigned int)(msr >> 48) & 0xEFFF);
1497 fprintf(outf, "PKG_MAX_PWR_LVL2=%d ", (unsigned int)(msr >> 32) & 0xEFFF);
1498 fprintf(outf, "LVL2_RATIO=%d ", (unsigned int)(msr >> 16) & 0xEF);
1499 fprintf(outf, "PKG_TDP_LVL2=%d", (unsigned int)(msr) & 0xEFFF);
Len Brown6fb31432015-06-17 16:23:45 -0400[diff] [blame]1500 }
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]1501 fprintf(outf, ")\n");
Len Brown6fb31432015-06-17 16:23:45 -0400[diff] [blame]1502
1503 get_msr(base_cpu, MSR_CONFIG_TDP_CONTROL, &msr);
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]1504 fprintf(outf, "cpu%d: MSR_CONFIG_TDP_CONTROL: 0x%08llx (", base_cpu, msr);
Len Brown6fb31432015-06-17 16:23:45 -0400[diff] [blame]1505 if ((msr) & 0x3)
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]1506 fprintf(outf, "TDP_LEVEL=%d ", (unsigned int)(msr) & 0x3);
1507 fprintf(outf, " lock=%d", (unsigned int)(msr >> 31) & 1);
1508 fprintf(outf, ")\n");
Len Brown36229892016-02-26 20:51:02 -0500[diff] [blame]1509
Len Brown6fb31432015-06-17 16:23:45 -0400[diff] [blame]1510 get_msr(base_cpu, MSR_TURBO_ACTIVATION_RATIO, &msr);
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]1511 fprintf(outf, "cpu%d: MSR_TURBO_ACTIVATION_RATIO: 0x%08llx (", base_cpu, msr);
1512 fprintf(outf, "MAX_NON_TURBO_RATIO=%d", (unsigned int)(msr) & 0x7F);
1513 fprintf(outf, " lock=%d", (unsigned int)(msr >> 31) & 1);
1514 fprintf(outf, ")\n");
Len Brown6fb31432015-06-17 16:23:45 -0400[diff] [blame]1515}
Len Brown36229892016-02-26 20:51:02 -0500[diff] [blame]1516void free_fd_percpu(void)
1517{
1518 int i;
1519
1520 for (i = 0; i < topo.max_cpu_num; ++i) {
1521 if (fd_percpu[i] != 0)
1522 close(fd_percpu[i]);
1523 }
1524
1525 free(fd_percpu);
1526}
Len Brown6fb31432015-06-17 16:23:45 -0400[diff] [blame]1527
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1528void free_all_buffers(void)
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1529{
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1530 CPU_FREE(cpu_present_set);
1531 cpu_present_set = NULL;
Len Brown36229892016-02-26 20:51:02 -0500[diff] [blame]1532 cpu_present_setsize = 0;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1533
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1534 CPU_FREE(cpu_affinity_set);
1535 cpu_affinity_set = NULL;
1536 cpu_affinity_setsize = 0;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1537
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1538 free(thread_even);
1539 free(core_even);
1540 free(package_even);
1541
1542 thread_even = NULL;
1543 core_even = NULL;
1544 package_even = NULL;
1545
1546 free(thread_odd);
1547 free(core_odd);
1548 free(package_odd);
1549
1550 thread_odd = NULL;
1551 core_odd = NULL;
1552 package_odd = NULL;
1553
1554 free(output_buffer);
1555 output_buffer = NULL;
1556 outp = NULL;
Len Brown36229892016-02-26 20:51:02 -0500[diff] [blame]1557
1558 free_fd_percpu();
Len Brown562a2d32016-02-26 23:48:05 -0500[diff] [blame]1559
1560 free(irq_column_2_cpu);
1561 free(irqs_per_cpu);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1562}
1563
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1564/*
Josh Triplett57a42a32013-08-20 17:20:17 -0700[diff] [blame]1565 * Open a file, and exit on failure
1566 */
1567FILE *fopen_or_die(const char *path, const char *mode)
1568{
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]1569 FILE *filep = fopen(path, mode);
Josh Triplettb2c95d92013-08-20 17:20:18 -0700[diff] [blame]1570 if (!filep)
1571 err(1, "%s: open failed", path);
Josh Triplett57a42a32013-08-20 17:20:17 -0700[diff] [blame]1572 return filep;
1573}
1574
1575/*
Josh Triplett95aebc42013-08-20 17:20:16 -0700[diff] [blame]1576 * Parse a file containing a single int.
1577 */
1578int parse_int_file(const char *fmt, ...)
1579{
1580 va_list args;
1581 char path[PATH_MAX];
1582 FILE *filep;
1583 int value;
1584
1585 va_start(args, fmt);
1586 vsnprintf(path, sizeof(path), fmt, args);
1587 va_end(args);
Josh Triplett57a42a32013-08-20 17:20:17 -0700[diff] [blame]1588 filep = fopen_or_die(path, "r");
Josh Triplettb2c95d92013-08-20 17:20:18 -0700[diff] [blame]1589 if (fscanf(filep, "%d", &value) != 1)
1590 err(1, "%s: failed to parse number from file", path);
Josh Triplett95aebc42013-08-20 17:20:16 -0700[diff] [blame]1591 fclose(filep);
1592 return value;
1593}
1594
1595/*
Dasaratharaman Chandramoulie275b382015-04-15 10:09:50 -0700[diff] [blame]1596 * get_cpu_position_in_core(cpu)
1597 * return the position of the CPU among its HT siblings in the core
1598 * return -1 if the sibling is not in list
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1599 */
Dasaratharaman Chandramoulie275b382015-04-15 10:09:50 -0700[diff] [blame]1600int get_cpu_position_in_core(int cpu)
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1601{
Dasaratharaman Chandramoulie275b382015-04-15 10:09:50 -0700[diff] [blame]1602 char path[64];
1603 FILE *filep;
1604 int this_cpu;
1605 char character;
1606 int i;
1607
1608 sprintf(path,
1609 "/sys/devices/system/cpu/cpu%d/topology/thread_siblings_list",
1610 cpu);
1611 filep = fopen(path, "r");
1612 if (filep == NULL) {
1613 perror(path);
1614 exit(1);
1615 }
1616
1617 for (i = 0; i < topo.num_threads_per_core; i++) {
1618 fscanf(filep, "%d", &this_cpu);
1619 if (this_cpu == cpu) {
1620 fclose(filep);
1621 return i;
1622 }
1623
1624 /* Account for no separator after last thread*/
1625 if (i != (topo.num_threads_per_core - 1))
1626 fscanf(filep, "%c", &character);
1627 }
1628
1629 fclose(filep);
1630 return -1;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1631}
1632
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1633/*
1634 * cpu_is_first_core_in_package(cpu)
1635 * return 1 if given CPU is 1st core in package
1636 */
1637int cpu_is_first_core_in_package(int cpu)
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1638{
Josh Triplett95aebc42013-08-20 17:20:16 -0700[diff] [blame]1639 return cpu == parse_int_file("/sys/devices/system/cpu/cpu%d/topology/core_siblings_list", cpu);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1640}
1641
1642int get_physical_package_id(int cpu)
1643{
Josh Triplett95aebc42013-08-20 17:20:16 -0700[diff] [blame]1644 return parse_int_file("/sys/devices/system/cpu/cpu%d/topology/physical_package_id", cpu);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1645}
1646
1647int get_core_id(int cpu)
1648{
Josh Triplett95aebc42013-08-20 17:20:16 -0700[diff] [blame]1649 return parse_int_file("/sys/devices/system/cpu/cpu%d/topology/core_id", cpu);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1650}
1651
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1652int get_num_ht_siblings(int cpu)
1653{
1654 char path[80];
1655 FILE *filep;
Dasaratharaman Chandramoulie275b382015-04-15 10:09:50 -0700[diff] [blame]1656 int sib1;
1657 int matches = 0;
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1658 char character;
Dasaratharaman Chandramoulie275b382015-04-15 10:09:50 -0700[diff] [blame]1659 char str[100];
1660 char *ch;
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1661
1662 sprintf(path, "/sys/devices/system/cpu/cpu%d/topology/thread_siblings_list", cpu);
Josh Triplett57a42a32013-08-20 17:20:17 -0700[diff] [blame]1663 filep = fopen_or_die(path, "r");
Dasaratharaman Chandramoulie275b382015-04-15 10:09:50 -0700[diff] [blame]1664
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1665 /*
1666 * file format:
Dasaratharaman Chandramoulie275b382015-04-15 10:09:50 -0700[diff] [blame]1667 * A ',' separated or '-' separated set of numbers
1668 * (eg 1-2 or 1,3,4,5)
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1669 */
Dasaratharaman Chandramoulie275b382015-04-15 10:09:50 -0700[diff] [blame]1670 fscanf(filep, "%d%c\n", &sib1, &character);
1671 fseek(filep, 0, SEEK_SET);
1672 fgets(str, 100, filep);
1673 ch = strchr(str, character);
1674 while (ch != NULL) {
1675 matches++;
1676 ch = strchr(ch+1, character);
1677 }
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1678
1679 fclose(filep);
Dasaratharaman Chandramoulie275b382015-04-15 10:09:50 -0700[diff] [blame]1680 return matches+1;
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1681}
1682
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1683/*
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1684 * run func(thread, core, package) in topology order
1685 * skip non-present cpus
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1686 */
1687
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1688int for_all_cpus_2(int (func)(struct thread_data *, struct core_data *,
1689 struct pkg_data *, struct thread_data *, struct core_data *,
1690 struct pkg_data *), struct thread_data *thread_base,
1691 struct core_data *core_base, struct pkg_data *pkg_base,
1692 struct thread_data *thread_base2, struct core_data *core_base2,
1693 struct pkg_data *pkg_base2)
1694{
1695 int retval, pkg_no, core_no, thread_no;
1696
1697 for (pkg_no = 0; pkg_no < topo.num_packages; ++pkg_no) {
1698 for (core_no = 0; core_no < topo.num_cores_per_pkg; ++core_no) {
1699 for (thread_no = 0; thread_no <
1700 topo.num_threads_per_core; ++thread_no) {
1701 struct thread_data *t, *t2;
1702 struct core_data *c, *c2;
1703 struct pkg_data *p, *p2;
1704
1705 t = GET_THREAD(thread_base, thread_no, core_no, pkg_no);
1706
1707 if (cpu_is_not_present(t->cpu_id))
1708 continue;
1709
1710 t2 = GET_THREAD(thread_base2, thread_no, core_no, pkg_no);
1711
1712 c = GET_CORE(core_base, core_no, pkg_no);
1713 c2 = GET_CORE(core_base2, core_no, pkg_no);
1714
1715 p = GET_PKG(pkg_base, pkg_no);
1716 p2 = GET_PKG(pkg_base2, pkg_no);
1717
1718 retval = func(t, c, p, t2, c2, p2);
1719 if (retval)
1720 return retval;
1721 }
1722 }
1723 }
1724 return 0;
1725}
1726
1727/*
1728 * run func(cpu) on every cpu in /proc/stat
1729 * return max_cpu number
1730 */
1731int for_all_proc_cpus(int (func)(int))
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1732{
1733 FILE *fp;
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1734 int cpu_num;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1735 int retval;
1736
Josh Triplett57a42a32013-08-20 17:20:17 -0700[diff] [blame]1737 fp = fopen_or_die(proc_stat, "r");
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1738
1739 retval = fscanf(fp, "cpu %*d %*d %*d %*d %*d %*d %*d %*d %*d %*d\n");
Josh Triplettb2c95d92013-08-20 17:20:18 -0700[diff] [blame]1740 if (retval != 0)
1741 err(1, "%s: failed to parse format", proc_stat);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1742
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1743 while (1) {
1744 retval = fscanf(fp, "cpu%u %*d %*d %*d %*d %*d %*d %*d %*d %*d %*d\n", &cpu_num);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1745 if (retval != 1)
1746 break;
1747
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1748 retval = func(cpu_num);
1749 if (retval) {
1750 fclose(fp);
1751 return(retval);
1752 }
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1753 }
1754 fclose(fp);
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1755 return 0;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1756}
1757
1758void re_initialize(void)
1759{
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1760 free_all_buffers();
1761 setup_all_buffers();
1762 printf("turbostat: re-initialized with num_cpus %d\n", topo.num_cpus);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1763}
1764
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1765
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1766/*
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1767 * count_cpus()
1768 * remember the last one seen, it will be the max
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1769 */
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1770int count_cpus(int cpu)
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1771{
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1772 if (topo.max_cpu_num < cpu)
1773 topo.max_cpu_num = cpu;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1774
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1775 topo.num_cpus += 1;
1776 return 0;
1777}
1778int mark_cpu_present(int cpu)
1779{
1780 CPU_SET_S(cpu, cpu_present_setsize, cpu_present_set);
Len Brown15aaa342012-03-29 22:19:58 -0400[diff] [blame]1781 return 0;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1782}
1783
Len Brown562a2d32016-02-26 23:48:05 -0500[diff] [blame]1784/*
1785 * snapshot_proc_interrupts()
1786 *
1787 * read and record summary of /proc/interrupts
1788 *
1789 * return 1 if config change requires a restart, else return 0
1790 */
1791int snapshot_proc_interrupts(void)
1792{
1793 static FILE *fp;
1794 int column, retval;
1795
1796 if (fp == NULL)
1797 fp = fopen_or_die("/proc/interrupts", "r");
1798 else
1799 rewind(fp);
1800
1801 /* read 1st line of /proc/interrupts to get cpu* name for each column */
1802 for (column = 0; column < topo.num_cpus; ++column) {
1803 int cpu_number;
1804
1805 retval = fscanf(fp, " CPU%d", &cpu_number);
1806 if (retval != 1)
1807 break;
1808
1809 if (cpu_number > topo.max_cpu_num) {
1810 warn("/proc/interrupts: cpu%d: > %d", cpu_number, topo.max_cpu_num);
1811 return 1;
1812 }
1813
1814 irq_column_2_cpu[column] = cpu_number;
1815 irqs_per_cpu[cpu_number] = 0;
1816 }
1817
1818 /* read /proc/interrupt count lines and sum up irqs per cpu */
1819 while (1) {
1820 int column;
1821 char buf[64];
1822
1823 retval = fscanf(fp, " %s:", buf); /* flush irq# "N:" */
1824 if (retval != 1)
1825 break;
1826
1827 /* read the count per cpu */
1828 for (column = 0; column < topo.num_cpus; ++column) {
1829
1830 int cpu_number, irq_count;
1831
1832 retval = fscanf(fp, " %d", &irq_count);
1833 if (retval != 1)
1834 break;
1835
1836 cpu_number = irq_column_2_cpu[column];
1837 irqs_per_cpu[cpu_number] += irq_count;
1838
1839 }
1840
1841 while (getc(fp) != '\n')
1842 ; /* flush interrupt description */
1843
1844 }
1845 return 0;
1846}
Len Brown27d47352016-02-27 00:37:54 -0500[diff] [blame^]1847/*
1848 * snapshot_gfx_mhz()
1849 *
1850 * record snapshot of
1851 * /sys/class/graphics/fb0/device/drm/card0/gt_cur_freq_mhz
1852 *
1853 * return 1 if config change requires a restart, else return 0
1854 */
1855int snapshot_gfx_mhz(void)
1856{
1857 static FILE *fp;
1858 int retval;
1859
1860 if (fp == NULL)
1861 fp = fopen_or_die("/sys/class/graphics/fb0/device/drm/card0/gt_cur_freq_mhz", "r");
1862 else
1863 rewind(fp);
1864
1865 retval = fscanf(fp, "%d", &gfx_cur_mhz);
1866 if (retval != 1)
1867 err(1, "GFX MHz");
1868
1869 return 0;
1870}
Len Brown562a2d32016-02-26 23:48:05 -0500[diff] [blame]1871
1872/*
1873 * snapshot /proc and /sys files
1874 *
1875 * return 1 if configuration restart needed, else return 0
1876 */
1877int snapshot_proc_sysfs_files(void)
1878{
1879 if (snapshot_proc_interrupts())
1880 return 1;
1881
Len Brown27d47352016-02-27 00:37:54 -0500[diff] [blame^]1882 if (do_gfx_mhz)
1883 snapshot_gfx_mhz();
1884
Len Brown562a2d32016-02-26 23:48:05 -0500[diff] [blame]1885 return 0;
1886}
1887
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1888void turbostat_loop()
1889{
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1890 int retval;
Len Browne52966c2012-11-08 22:38:05 -0500[diff] [blame]1891 int restarted = 0;
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1892
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1893restart:
Len Browne52966c2012-11-08 22:38:05 -0500[diff] [blame]1894 restarted++;
1895
Len Brown562a2d32016-02-26 23:48:05 -0500[diff] [blame]1896 snapshot_proc_sysfs_files();
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1897 retval = for_all_cpus(get_counters, EVEN_COUNTERS);
Len Brownd91bb172012-11-01 00:08:19 -0400[diff] [blame]1898 if (retval < -1) {
1899 exit(retval);
1900 } else if (retval == -1) {
Len Browne52966c2012-11-08 22:38:05 -0500[diff] [blame]1901 if (restarted > 1) {
1902 exit(retval);
1903 }
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1904 re_initialize();
1905 goto restart;
1906 }
Len Browne52966c2012-11-08 22:38:05 -0500[diff] [blame]1907 restarted = 0;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1908 gettimeofday(&tv_even, (struct timezone *)NULL);
1909
1910 while (1) {
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1911 if (for_all_proc_cpus(cpu_is_not_present)) {
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1912 re_initialize();
1913 goto restart;
1914 }
Len Brown2a0609c2016-02-12 22:44:48 -0500[diff] [blame]1915 nanosleep(&interval_ts, NULL);
Len Brown562a2d32016-02-26 23:48:05 -0500[diff] [blame]1916 if (snapshot_proc_sysfs_files())
1917 goto restart;
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1918 retval = for_all_cpus(get_counters, ODD_COUNTERS);
Len Brownd91bb172012-11-01 00:08:19 -0400[diff] [blame]1919 if (retval < -1) {
1920 exit(retval);
1921 } else if (retval == -1) {
Len Brown15aaa342012-03-29 22:19:58 -0400[diff] [blame]1922 re_initialize();
1923 goto restart;
1924 }
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1925 gettimeofday(&tv_odd, (struct timezone *)NULL);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1926 timersub(&tv_odd, &tv_even, &tv_delta);
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1927 for_all_cpus_2(delta_cpu, ODD_COUNTERS, EVEN_COUNTERS);
1928 compute_average(EVEN_COUNTERS);
1929 format_all_counters(EVEN_COUNTERS);
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]1930 flush_output_stdout();
Len Brown2a0609c2016-02-12 22:44:48 -0500[diff] [blame]1931 nanosleep(&interval_ts, NULL);
Len Brown562a2d32016-02-26 23:48:05 -0500[diff] [blame]1932 if (snapshot_proc_sysfs_files())
1933 goto restart;
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1934 retval = for_all_cpus(get_counters, EVEN_COUNTERS);
Len Brownd91bb172012-11-01 00:08:19 -0400[diff] [blame]1935 if (retval < -1) {
1936 exit(retval);
1937 } else if (retval == -1) {
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1938 re_initialize();
1939 goto restart;
1940 }
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1941 gettimeofday(&tv_even, (struct timezone *)NULL);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1942 timersub(&tv_even, &tv_odd, &tv_delta);
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1943 for_all_cpus_2(delta_cpu, EVEN_COUNTERS, ODD_COUNTERS);
1944 compute_average(ODD_COUNTERS);
1945 format_all_counters(ODD_COUNTERS);
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]1946 flush_output_stdout();
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1947 }
1948}
1949
1950void check_dev_msr()
1951{
1952 struct stat sb;
Prarit Bhargava7ce7d5d2015-05-25 08:34:28 -0400[diff] [blame]1953 char pathname[32];
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1954
Prarit Bhargava7ce7d5d2015-05-25 08:34:28 -0400[diff] [blame]1955 sprintf(pathname, "/dev/cpu/%d/msr", base_cpu);
1956 if (stat(pathname, &sb))
Len Browna21d38c2015-03-24 16:37:35 -0400[diff] [blame]1957 if (system("/sbin/modprobe msr > /dev/null 2>&1"))
1958 err(-5, "no /dev/cpu/0/msr, Try \"# modprobe msr\" ");
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1959}
1960
Len Brown98481e72014-08-15 00:36:50 -0400[diff] [blame]1961void check_permissions()
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1962{
Len Brown98481e72014-08-15 00:36:50 -0400[diff] [blame]1963 struct __user_cap_header_struct cap_header_data;
1964 cap_user_header_t cap_header = &cap_header_data;
1965 struct __user_cap_data_struct cap_data_data;
1966 cap_user_data_t cap_data = &cap_data_data;
1967 extern int capget(cap_user_header_t hdrp, cap_user_data_t datap);
1968 int do_exit = 0;
Prarit Bhargava7ce7d5d2015-05-25 08:34:28 -0400[diff] [blame]1969 char pathname[32];
Len Brown98481e72014-08-15 00:36:50 -0400[diff] [blame]1970
1971 /* check for CAP_SYS_RAWIO */
1972 cap_header->pid = getpid();
1973 cap_header->version = _LINUX_CAPABILITY_VERSION;
1974 if (capget(cap_header, cap_data) < 0)
1975 err(-6, "capget(2) failed");
1976
1977 if ((cap_data->effective & (1 << CAP_SYS_RAWIO)) == 0) {
1978 do_exit++;
1979 warnx("capget(CAP_SYS_RAWIO) failed,"
1980 " try \"# setcap cap_sys_rawio=ep %s\"", progname);
1981 }
1982
1983 /* test file permissions */
Prarit Bhargava7ce7d5d2015-05-25 08:34:28 -0400[diff] [blame]1984 sprintf(pathname, "/dev/cpu/%d/msr", base_cpu);
1985 if (euidaccess(pathname, R_OK)) {
Len Brown98481e72014-08-15 00:36:50 -0400[diff] [blame]1986 do_exit++;
1987 warn("/dev/cpu/0/msr open failed, try chown or chmod +r /dev/cpu/*/msr");
1988 }
1989
1990 /* if all else fails, thell them to be root */
1991 if (do_exit)
1992 if (getuid() != 0)
Len Brownd7899442015-01-23 00:12:33 -0500[diff] [blame]1993 warnx("... or simply run as root");
Len Brown98481e72014-08-15 00:36:50 -0400[diff] [blame]1994
1995 if (do_exit)
1996 exit(-6);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1997}
1998
Len Brownd7899442015-01-23 00:12:33 -0500[diff] [blame]1999/*
2000 * NHM adds support for additional MSRs:
2001 *
2002 * MSR_SMI_COUNT 0x00000034
2003 *
Len Brownec0adc52015-11-12 02:42:31 -0500[diff] [blame]2004 * MSR_PLATFORM_INFO 0x000000ce
Len Brownd7899442015-01-23 00:12:33 -0500[diff] [blame]2005 * MSR_NHM_SNB_PKG_CST_CFG_CTL 0x000000e2
2006 *
2007 * MSR_PKG_C3_RESIDENCY 0x000003f8
2008 * MSR_PKG_C6_RESIDENCY 0x000003f9
2009 * MSR_CORE_C3_RESIDENCY 0x000003fc
2010 * MSR_CORE_C6_RESIDENCY 0x000003fd
2011 *
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]2012 * Side effect:
2013 * sets global pkg_cstate_limit to decode MSR_NHM_SNB_PKG_CST_CFG_CTL
Len Brownd7899442015-01-23 00:12:33 -0500[diff] [blame]2014 */
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]2015int probe_nhm_msrs(unsigned int family, unsigned int model)
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2016{
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]2017 unsigned long long msr;
Len Brown21ed5572015-10-19 22:37:40 -0400[diff] [blame]2018 unsigned int base_ratio;
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]2019 int *pkg_cstate_limits;
2020
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2021 if (!genuine_intel)
2022 return 0;
2023
2024 if (family != 6)
2025 return 0;
2026
Len Brown21ed5572015-10-19 22:37:40 -0400[diff] [blame]2027 bclk = discover_bclk(family, model);
2028
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2029 switch (model) {
2030 case 0x1A: /* Core i7, Xeon 5500 series - Bloomfield, Gainstown NHM-EP */
2031 case 0x1E: /* Core i7 and i5 Processor - Clarksfield, Lynnfield, Jasper Forest */
2032 case 0x1F: /* Core i7 and i5 Processor - Nehalem */
2033 case 0x25: /* Westmere Client - Clarkdale, Arrandale */
2034 case 0x2C: /* Westmere EP - Gulftown */
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]2035 case 0x2E: /* Nehalem-EX Xeon - Beckton */
2036 case 0x2F: /* Westmere-EX Xeon - Eagleton */
2037 pkg_cstate_limits = nhm_pkg_cstate_limits;
2038 break;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2039 case 0x2A: /* SNB */
2040 case 0x2D: /* SNB Xeon */
Len Brown553575f2011-11-18 03:32:01 -0500[diff] [blame]2041 case 0x3A: /* IVB */
Len Brown13006512012-09-26 18:11:31 -0400[diff] [blame]2042 case 0x3E: /* IVB Xeon */
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]2043 pkg_cstate_limits = snb_pkg_cstate_limits;
2044 break;
Len Brown70b43402013-01-08 01:26:07 -0500[diff] [blame]2045 case 0x3C: /* HSW */
Len Browne6f9bb32013-12-03 02:19:19 -0500[diff] [blame]2046 case 0x3F: /* HSX */
Len Brown70b43402013-01-08 01:26:07 -0500[diff] [blame]2047 case 0x45: /* HSW */
Len Brown149c2312013-03-15 10:58:02 -0400[diff] [blame]2048 case 0x46: /* HSW */
Len Brown4e8e863f2014-02-27 23:28:53 -0500[diff] [blame]2049 case 0x3D: /* BDW */
Len Brown48a06312015-02-10 15:38:04 -0500[diff] [blame]2050 case 0x47: /* BDW */
Len Brown4e8e863f2014-02-27 23:28:53 -0500[diff] [blame]2051 case 0x4F: /* BDX */
2052 case 0x56: /* BDX-DE */
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame]2053 case 0x4E: /* SKL */
2054 case 0x5E: /* SKL */
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]2055 pkg_cstate_limits = hsw_pkg_cstate_limits;
2056 break;
2057 case 0x37: /* BYT */
2058 case 0x4D: /* AVN */
2059 pkg_cstate_limits = slv_pkg_cstate_limits;
2060 break;
2061 case 0x4C: /* AMT */
2062 pkg_cstate_limits = amt_pkg_cstate_limits;
2063 break;
2064 case 0x57: /* PHI */
2065 pkg_cstate_limits = phi_pkg_cstate_limits;
2066 break;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2067 default:
2068 return 0;
2069 }
Prarit Bhargava7ce7d5d2015-05-25 08:34:28 -0400[diff] [blame]2070 get_msr(base_cpu, MSR_NHM_SNB_PKG_CST_CFG_CTL, &msr);
Len Browne9257f52015-04-01 21:02:57 -0400[diff] [blame]2071 pkg_cstate_limit = pkg_cstate_limits[msr & 0xF];
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]2072
Len Brownec0adc52015-11-12 02:42:31 -0500[diff] [blame]2073 get_msr(base_cpu, MSR_PLATFORM_INFO, &msr);
Len Brown21ed5572015-10-19 22:37:40 -0400[diff] [blame]2074 base_ratio = (msr >> 8) & 0xFF;
2075
2076 base_hz = base_ratio * bclk * 1000000;
2077 has_base_hz = 1;
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]2078 return 1;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2079}
Len Brownd7899442015-01-23 00:12:33 -0500[diff] [blame]2080int has_nhm_turbo_ratio_limit(unsigned int family, unsigned int model)
2081{
Len Brownd7899442015-01-23 00:12:33 -0500[diff] [blame]2082 switch (model) {
2083 /* Nehalem compatible, but do not include turbo-ratio limit support */
2084 case 0x2E: /* Nehalem-EX Xeon - Beckton */
2085 case 0x2F: /* Westmere-EX Xeon - Eagleton */
Hubert Chrzaniukcbf97ab2016-02-10 14:55:22 +0100[diff] [blame]2086 case 0x57: /* PHI - Knights Landing (different MSR definition) */
Len Brownd7899442015-01-23 00:12:33 -0500[diff] [blame]2087 return 0;
2088 default:
2089 return 1;
2090 }
2091}
Len Brown6574a5d2012-09-21 00:01:31 -0400[diff] [blame]2092int has_ivt_turbo_ratio_limit(unsigned int family, unsigned int model)
2093{
2094 if (!genuine_intel)
2095 return 0;
2096
2097 if (family != 6)
2098 return 0;
2099
2100 switch (model) {
2101 case 0x3E: /* IVB Xeon */
Len Brownfcd17212015-03-23 20:29:09 -0400[diff] [blame]2102 case 0x3F: /* HSW Xeon */
Len Brown6574a5d2012-09-21 00:01:31 -0400[diff] [blame]2103 return 1;
2104 default:
2105 return 0;
2106 }
2107}
Len Brownfcd17212015-03-23 20:29:09 -0400[diff] [blame]2108int has_hsw_turbo_ratio_limit(unsigned int family, unsigned int model)
2109{
2110 if (!genuine_intel)
2111 return 0;
2112
2113 if (family != 6)
2114 return 0;
2115
2116 switch (model) {
2117 case 0x3F: /* HSW Xeon */
2118 return 1;
2119 default:
2120 return 0;
2121 }
2122}
2123
Dasaratharaman Chandramoulifb5d4322015-05-20 09:49:34 -0700[diff] [blame]2124int has_knl_turbo_ratio_limit(unsigned int family, unsigned int model)
2125{
2126 if (!genuine_intel)
2127 return 0;
2128
2129 if (family != 6)
2130 return 0;
2131
2132 switch (model) {
2133 case 0x57: /* Knights Landing */
2134 return 1;
2135 default:
2136 return 0;
2137 }
2138}
Len Brown6fb31432015-06-17 16:23:45 -0400[diff] [blame]2139int has_config_tdp(unsigned int family, unsigned int model)
2140{
2141 if (!genuine_intel)
2142 return 0;
2143
2144 if (family != 6)
2145 return 0;
2146
2147 switch (model) {
2148 case 0x3A: /* IVB */
Len Brown6fb31432015-06-17 16:23:45 -0400[diff] [blame]2149 case 0x3C: /* HSW */
2150 case 0x3F: /* HSX */
2151 case 0x45: /* HSW */
2152 case 0x46: /* HSW */
2153 case 0x3D: /* BDW */
2154 case 0x47: /* BDW */
2155 case 0x4F: /* BDX */
2156 case 0x56: /* BDX-DE */
2157 case 0x4E: /* SKL */
2158 case 0x5E: /* SKL */
2159
2160 case 0x57: /* Knights Landing */
2161 return 1;
2162 default:
2163 return 0;
2164 }
2165}
2166
Len Brownfcd17212015-03-23 20:29:09 -0400[diff] [blame]2167static void
Len Brown58cc30a2016-02-24 18:16:40 -0500[diff] [blame]2168dump_cstate_pstate_config_info(int family, int model)
Len Brownfcd17212015-03-23 20:29:09 -0400[diff] [blame]2169{
2170 if (!do_nhm_platform_info)
2171 return;
2172
2173 dump_nhm_platform_info();
2174
2175 if (has_hsw_turbo_ratio_limit(family, model))
2176 dump_hsw_turbo_ratio_limits();
2177
2178 if (has_ivt_turbo_ratio_limit(family, model))
2179 dump_ivt_turbo_ratio_limits();
2180
2181 if (has_nhm_turbo_ratio_limit(family, model))
2182 dump_nhm_turbo_ratio_limits();
2183
Dasaratharaman Chandramoulifb5d4322015-05-20 09:49:34 -0700[diff] [blame]2184 if (has_knl_turbo_ratio_limit(family, model))
2185 dump_knl_turbo_ratio_limits();
2186
Len Brown6fb31432015-06-17 16:23:45 -0400[diff] [blame]2187 if (has_config_tdp(family, model))
2188 dump_config_tdp();
2189
Len Brownfcd17212015-03-23 20:29:09 -0400[diff] [blame]2190 dump_nhm_cst_cfg();
2191}
2192
Len Brown6574a5d2012-09-21 00:01:31 -0400[diff] [blame]2193
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2194/*
2195 * print_epb()
2196 * Decode the ENERGY_PERF_BIAS MSR
2197 */
2198int print_epb(struct thread_data *t, struct core_data *c, struct pkg_data *p)
2199{
2200 unsigned long long msr;
2201 char *epb_string;
2202 int cpu;
2203
2204 if (!has_epb)
2205 return 0;
2206
2207 cpu = t->cpu_id;
2208
2209 /* EPB is per-package */
2210 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE) || !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
2211 return 0;
2212
2213 if (cpu_migrate(cpu)) {
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]2214 fprintf(outf, "Could not migrate to CPU %d\n", cpu);
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2215 return -1;
2216 }
2217
2218 if (get_msr(cpu, MSR_IA32_ENERGY_PERF_BIAS, &msr))
2219 return 0;
2220
Len Browne9be7dd2015-05-26 12:19:37 -0400[diff] [blame]2221 switch (msr & 0xF) {
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2222 case ENERGY_PERF_BIAS_PERFORMANCE:
2223 epb_string = "performance";
2224 break;
2225 case ENERGY_PERF_BIAS_NORMAL:
2226 epb_string = "balanced";
2227 break;
2228 case ENERGY_PERF_BIAS_POWERSAVE:
2229 epb_string = "powersave";
2230 break;
2231 default:
2232 epb_string = "custom";
2233 break;
2234 }
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]2235 fprintf(outf, "cpu%d: MSR_IA32_ENERGY_PERF_BIAS: 0x%08llx (%s)\n", cpu, msr, epb_string);
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2236
2237 return 0;
2238}
Len Brown7f5c2582015-12-01 01:36:39 -0500[diff] [blame]2239/*
2240 * print_hwp()
2241 * Decode the MSR_HWP_CAPABILITIES
2242 */
2243int print_hwp(struct thread_data *t, struct core_data *c, struct pkg_data *p)
2244{
2245 unsigned long long msr;
2246 int cpu;
2247
2248 if (!has_hwp)
2249 return 0;
2250
2251 cpu = t->cpu_id;
2252
2253 /* MSR_HWP_CAPABILITIES is per-package */
2254 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE) || !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
2255 return 0;
2256
2257 if (cpu_migrate(cpu)) {
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]2258 fprintf(outf, "Could not migrate to CPU %d\n", cpu);
Len Brown7f5c2582015-12-01 01:36:39 -0500[diff] [blame]2259 return -1;
2260 }
2261
2262 if (get_msr(cpu, MSR_PM_ENABLE, &msr))
2263 return 0;
2264
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]2265 fprintf(outf, "cpu%d: MSR_PM_ENABLE: 0x%08llx (%sHWP)\n",
Len Brown7f5c2582015-12-01 01:36:39 -0500[diff] [blame]2266 cpu, msr, (msr & (1 << 0)) ? "" : "No-");
2267
2268 /* MSR_PM_ENABLE[1] == 1 if HWP is enabled and MSRs visible */
2269 if ((msr & (1 << 0)) == 0)
2270 return 0;
2271
2272 if (get_msr(cpu, MSR_HWP_CAPABILITIES, &msr))
2273 return 0;
2274
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]2275 fprintf(outf, "cpu%d: MSR_HWP_CAPABILITIES: 0x%08llx "
Len Brown7f5c2582015-12-01 01:36:39 -0500[diff] [blame]2276 "(high 0x%x guar 0x%x eff 0x%x low 0x%x)\n",
2277 cpu, msr,
2278 (unsigned int)HWP_HIGHEST_PERF(msr),
2279 (unsigned int)HWP_GUARANTEED_PERF(msr),
2280 (unsigned int)HWP_MOSTEFFICIENT_PERF(msr),
2281 (unsigned int)HWP_LOWEST_PERF(msr));
2282
2283 if (get_msr(cpu, MSR_HWP_REQUEST, &msr))
2284 return 0;
2285
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]2286 fprintf(outf, "cpu%d: MSR_HWP_REQUEST: 0x%08llx "
Len Brown7f5c2582015-12-01 01:36:39 -0500[diff] [blame]2287 "(min 0x%x max 0x%x des 0x%x epp 0x%x window 0x%x pkg 0x%x)\n",
2288 cpu, msr,
2289 (unsigned int)(((msr) >> 0) & 0xff),
2290 (unsigned int)(((msr) >> 8) & 0xff),
2291 (unsigned int)(((msr) >> 16) & 0xff),
2292 (unsigned int)(((msr) >> 24) & 0xff),
2293 (unsigned int)(((msr) >> 32) & 0xff3),
2294 (unsigned int)(((msr) >> 42) & 0x1));
2295
2296 if (has_hwp_pkg) {
2297 if (get_msr(cpu, MSR_HWP_REQUEST_PKG, &msr))
2298 return 0;
2299
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]2300 fprintf(outf, "cpu%d: MSR_HWP_REQUEST_PKG: 0x%08llx "
Len Brown7f5c2582015-12-01 01:36:39 -0500[diff] [blame]2301 "(min 0x%x max 0x%x des 0x%x epp 0x%x window 0x%x)\n",
2302 cpu, msr,
2303 (unsigned int)(((msr) >> 0) & 0xff),
2304 (unsigned int)(((msr) >> 8) & 0xff),
2305 (unsigned int)(((msr) >> 16) & 0xff),
2306 (unsigned int)(((msr) >> 24) & 0xff),
2307 (unsigned int)(((msr) >> 32) & 0xff3));
2308 }
2309 if (has_hwp_notify) {
2310 if (get_msr(cpu, MSR_HWP_INTERRUPT, &msr))
2311 return 0;
2312
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]2313 fprintf(outf, "cpu%d: MSR_HWP_INTERRUPT: 0x%08llx "
Len Brown7f5c2582015-12-01 01:36:39 -0500[diff] [blame]2314 "(%s_Guaranteed_Perf_Change, %s_Excursion_Min)\n",
2315 cpu, msr,
2316 ((msr) & 0x1) ? "EN" : "Dis",
2317 ((msr) & 0x2) ? "EN" : "Dis");
2318 }
2319 if (get_msr(cpu, MSR_HWP_STATUS, &msr))
2320 return 0;
2321
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]2322 fprintf(outf, "cpu%d: MSR_HWP_STATUS: 0x%08llx "
Len Brown7f5c2582015-12-01 01:36:39 -0500[diff] [blame]2323 "(%sGuaranteed_Perf_Change, %sExcursion_Min)\n",
2324 cpu, msr,
2325 ((msr) & 0x1) ? "" : "No-",
2326 ((msr) & 0x2) ? "" : "No-");
2327
2328 return 0;
2329}
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2330
Len Brown3a9a9412014-08-15 02:39:52 -0400[diff] [blame]2331/*
2332 * print_perf_limit()
2333 */
2334int print_perf_limit(struct thread_data *t, struct core_data *c, struct pkg_data *p)
2335{
2336 unsigned long long msr;
2337 int cpu;
2338
2339 cpu = t->cpu_id;
2340
2341 /* per-package */
2342 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE) || !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
2343 return 0;
2344
2345 if (cpu_migrate(cpu)) {
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]2346 fprintf(outf, "Could not migrate to CPU %d\n", cpu);
Len Brown3a9a9412014-08-15 02:39:52 -0400[diff] [blame]2347 return -1;
2348 }
2349
2350 if (do_core_perf_limit_reasons) {
2351 get_msr(cpu, MSR_CORE_PERF_LIMIT_REASONS, &msr);
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]2352 fprintf(outf, "cpu%d: MSR_CORE_PERF_LIMIT_REASONS, 0x%08llx", cpu, msr);
2353 fprintf(outf, " (Active: %s%s%s%s%s%s%s%s%s%s%s%s%s%s)",
Len Browne33cbe82015-03-13 16:30:57 -0400[diff] [blame]2354 (msr & 1 << 15) ? "bit15, " : "",
Len Brown3a9a9412014-08-15 02:39:52 -0400[diff] [blame]2355 (msr & 1 << 14) ? "bit14, " : "",
Len Browne33cbe82015-03-13 16:30:57 -0400[diff] [blame]2356 (msr & 1 << 13) ? "Transitions, " : "",
2357 (msr & 1 << 12) ? "MultiCoreTurbo, " : "",
2358 (msr & 1 << 11) ? "PkgPwrL2, " : "",
2359 (msr & 1 << 10) ? "PkgPwrL1, " : "",
2360 (msr & 1 << 9) ? "CorePwr, " : "",
2361 (msr & 1 << 8) ? "Amps, " : "",
2362 (msr & 1 << 6) ? "VR-Therm, " : "",
2363 (msr & 1 << 5) ? "Auto-HWP, " : "",
2364 (msr & 1 << 4) ? "Graphics, " : "",
2365 (msr & 1 << 2) ? "bit2, " : "",
2366 (msr & 1 << 1) ? "ThermStatus, " : "",
2367 (msr & 1 << 0) ? "PROCHOT, " : "");
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]2368 fprintf(outf, " (Logged: %s%s%s%s%s%s%s%s%s%s%s%s%s%s)\n",
Len Browne33cbe82015-03-13 16:30:57 -0400[diff] [blame]2369 (msr & 1 << 31) ? "bit31, " : "",
Len Brown3a9a9412014-08-15 02:39:52 -0400[diff] [blame]2370 (msr & 1 << 30) ? "bit30, " : "",
Len Browne33cbe82015-03-13 16:30:57 -0400[diff] [blame]2371 (msr & 1 << 29) ? "Transitions, " : "",
2372 (msr & 1 << 28) ? "MultiCoreTurbo, " : "",
2373 (msr & 1 << 27) ? "PkgPwrL2, " : "",
2374 (msr & 1 << 26) ? "PkgPwrL1, " : "",
2375 (msr & 1 << 25) ? "CorePwr, " : "",
2376 (msr & 1 << 24) ? "Amps, " : "",
2377 (msr & 1 << 22) ? "VR-Therm, " : "",
2378 (msr & 1 << 21) ? "Auto-HWP, " : "",
2379 (msr & 1 << 20) ? "Graphics, " : "",
2380 (msr & 1 << 18) ? "bit18, " : "",
2381 (msr & 1 << 17) ? "ThermStatus, " : "",
2382 (msr & 1 << 16) ? "PROCHOT, " : "");
Len Brown3a9a9412014-08-15 02:39:52 -0400[diff] [blame]2383
2384 }
2385 if (do_gfx_perf_limit_reasons) {
2386 get_msr(cpu, MSR_GFX_PERF_LIMIT_REASONS, &msr);
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]2387 fprintf(outf, "cpu%d: MSR_GFX_PERF_LIMIT_REASONS, 0x%08llx", cpu, msr);
2388 fprintf(outf, " (Active: %s%s%s%s%s%s%s%s)",
Len Brown3a9a9412014-08-15 02:39:52 -0400[diff] [blame]2389 (msr & 1 << 0) ? "PROCHOT, " : "",
2390 (msr & 1 << 1) ? "ThermStatus, " : "",
2391 (msr & 1 << 4) ? "Graphics, " : "",
2392 (msr & 1 << 6) ? "VR-Therm, " : "",
2393 (msr & 1 << 8) ? "Amps, " : "",
2394 (msr & 1 << 9) ? "GFXPwr, " : "",
2395 (msr & 1 << 10) ? "PkgPwrL1, " : "",
2396 (msr & 1 << 11) ? "PkgPwrL2, " : "");
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]2397 fprintf(outf, " (Logged: %s%s%s%s%s%s%s%s)\n",
Len Brown3a9a9412014-08-15 02:39:52 -0400[diff] [blame]2398 (msr & 1 << 16) ? "PROCHOT, " : "",
2399 (msr & 1 << 17) ? "ThermStatus, " : "",
2400 (msr & 1 << 20) ? "Graphics, " : "",
2401 (msr & 1 << 22) ? "VR-Therm, " : "",
2402 (msr & 1 << 24) ? "Amps, " : "",
2403 (msr & 1 << 25) ? "GFXPwr, " : "",
2404 (msr & 1 << 26) ? "PkgPwrL1, " : "",
2405 (msr & 1 << 27) ? "PkgPwrL2, " : "");
2406 }
2407 if (do_ring_perf_limit_reasons) {
2408 get_msr(cpu, MSR_RING_PERF_LIMIT_REASONS, &msr);
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]2409 fprintf(outf, "cpu%d: MSR_RING_PERF_LIMIT_REASONS, 0x%08llx", cpu, msr);
2410 fprintf(outf, " (Active: %s%s%s%s%s%s)",
Len Brown3a9a9412014-08-15 02:39:52 -0400[diff] [blame]2411 (msr & 1 << 0) ? "PROCHOT, " : "",
2412 (msr & 1 << 1) ? "ThermStatus, " : "",
2413 (msr & 1 << 6) ? "VR-Therm, " : "",
2414 (msr & 1 << 8) ? "Amps, " : "",
2415 (msr & 1 << 10) ? "PkgPwrL1, " : "",
2416 (msr & 1 << 11) ? "PkgPwrL2, " : "");
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]2417 fprintf(outf, " (Logged: %s%s%s%s%s%s)\n",
Len Brown3a9a9412014-08-15 02:39:52 -0400[diff] [blame]2418 (msr & 1 << 16) ? "PROCHOT, " : "",
2419 (msr & 1 << 17) ? "ThermStatus, " : "",
2420 (msr & 1 << 22) ? "VR-Therm, " : "",
2421 (msr & 1 << 24) ? "Amps, " : "",
2422 (msr & 1 << 26) ? "PkgPwrL1, " : "",
2423 (msr & 1 << 27) ? "PkgPwrL2, " : "");
2424 }
2425 return 0;
2426}
2427
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2428#define RAPL_POWER_GRANULARITY 0x7FFF /* 15 bit power granularity */
2429#define RAPL_TIME_GRANULARITY 0x3F /* 6 bit time granularity */
2430
Len Brown58cc30a2016-02-24 18:16:40 -0500[diff] [blame]2431double get_tdp(int model)
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]2432{
2433 unsigned long long msr;
2434
2435 if (do_rapl & RAPL_PKG_POWER_INFO)
Prarit Bhargava7ce7d5d2015-05-25 08:34:28 -0400[diff] [blame]2436 if (!get_msr(base_cpu, MSR_PKG_POWER_INFO, &msr))
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]2437 return ((msr >> 0) & RAPL_POWER_GRANULARITY) * rapl_power_units;
2438
2439 switch (model) {
2440 case 0x37:
2441 case 0x4D:
2442 return 30.0;
2443 default:
2444 return 135.0;
2445 }
2446}
2447
Andrey Semin40ee8e32014-12-05 00:07:00 -0500[diff] [blame]2448/*
2449 * rapl_dram_energy_units_probe()
2450 * Energy units are either hard-coded, or come from RAPL Energy Unit MSR.
2451 */
2452static double
2453rapl_dram_energy_units_probe(int model, double rapl_energy_units)
2454{
2455 /* only called for genuine_intel, family 6 */
2456
2457 switch (model) {
2458 case 0x3F: /* HSX */
2459 case 0x4F: /* BDX */
2460 case 0x56: /* BDX-DE */
Dasaratharaman Chandramoulifb5d4322015-05-20 09:49:34 -0700[diff] [blame]2461 case 0x57: /* KNL */
Andrey Semin40ee8e32014-12-05 00:07:00 -0500[diff] [blame]2462 return (rapl_dram_energy_units = 15.3 / 1000000);
2463 default:
2464 return (rapl_energy_units);
2465 }
2466}
2467
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]2468
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2469/*
2470 * rapl_probe()
2471 *
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]2472 * sets do_rapl, rapl_power_units, rapl_energy_units, rapl_time_units
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2473 */
2474void rapl_probe(unsigned int family, unsigned int model)
2475{
2476 unsigned long long msr;
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]2477 unsigned int time_unit;
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2478 double tdp;
2479
2480 if (!genuine_intel)
2481 return;
2482
2483 if (family != 6)
2484 return;
2485
2486 switch (model) {
2487 case 0x2A:
2488 case 0x3A:
Len Brown70b43402013-01-08 01:26:07 -0500[diff] [blame]2489 case 0x3C: /* HSW */
Len Brown70b43402013-01-08 01:26:07 -0500[diff] [blame]2490 case 0x45: /* HSW */
Len Brown149c2312013-03-15 10:58:02 -0400[diff] [blame]2491 case 0x46: /* HSW */
Len Brown4e8e863f2014-02-27 23:28:53 -0500[diff] [blame]2492 case 0x3D: /* BDW */
Len Brown48a06312015-02-10 15:38:04 -0500[diff] [blame]2493 case 0x47: /* BDW */
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]2494 do_rapl = RAPL_PKG | RAPL_CORES | RAPL_CORE_POLICY | RAPL_GFX | RAPL_PKG_POWER_INFO;
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2495 break;
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame]2496 case 0x4E: /* SKL */
2497 case 0x5E: /* SKL */
2498 do_rapl = RAPL_PKG | RAPL_DRAM | RAPL_DRAM_PERF_STATUS | RAPL_PKG_PERF_STATUS | RAPL_PKG_POWER_INFO;
2499 break;
Len Browne6f9bb32013-12-03 02:19:19 -0500[diff] [blame]2500 case 0x3F: /* HSX */
Len Brown4e8e863f2014-02-27 23:28:53 -0500[diff] [blame]2501 case 0x4F: /* BDX */
2502 case 0x56: /* BDX-DE */
Dasaratharaman Chandramoulifb5d4322015-05-20 09:49:34 -0700[diff] [blame]2503 case 0x57: /* KNL */
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame]2504 do_rapl = RAPL_PKG | RAPL_DRAM | RAPL_DRAM_POWER_INFO | RAPL_DRAM_PERF_STATUS | RAPL_PKG_PERF_STATUS | RAPL_PKG_POWER_INFO;
Len Browne6f9bb32013-12-03 02:19:19 -0500[diff] [blame]2505 break;
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2506 case 0x2D:
2507 case 0x3E:
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame]2508 do_rapl = RAPL_PKG | RAPL_CORES | RAPL_CORE_POLICY | RAPL_DRAM | RAPL_DRAM_POWER_INFO | RAPL_PKG_PERF_STATUS | RAPL_DRAM_PERF_STATUS | RAPL_PKG_POWER_INFO;
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]2509 break;
2510 case 0x37: /* BYT */
2511 case 0x4D: /* AVN */
2512 do_rapl = RAPL_PKG | RAPL_CORES ;
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2513 break;
2514 default:
2515 return;
2516 }
2517
2518 /* units on package 0, verify later other packages match */
Prarit Bhargava7ce7d5d2015-05-25 08:34:28 -0400[diff] [blame]2519 if (get_msr(base_cpu, MSR_RAPL_POWER_UNIT, &msr))
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2520 return;
2521
2522 rapl_power_units = 1.0 / (1 << (msr & 0xF));
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]2523 if (model == 0x37)
2524 rapl_energy_units = 1.0 * (1 << (msr >> 8 & 0x1F)) / 1000000;
2525 else
2526 rapl_energy_units = 1.0 / (1 << (msr >> 8 & 0x1F));
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2527
Andrey Semin40ee8e32014-12-05 00:07:00 -0500[diff] [blame]2528 rapl_dram_energy_units = rapl_dram_energy_units_probe(model, rapl_energy_units);
2529
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]2530 time_unit = msr >> 16 & 0xF;
2531 if (time_unit == 0)
2532 time_unit = 0xA;
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2533
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]2534 rapl_time_units = 1.0 / (1 << (time_unit));
2535
2536 tdp = get_tdp(model);
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2537
2538 rapl_joule_counter_range = 0xFFFFFFFF * rapl_energy_units / tdp;
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]2539 if (debug)
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]2540 fprintf(outf, "RAPL: %.0f sec. Joule Counter Range, at %.0f Watts\n", rapl_joule_counter_range, tdp);
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2541
2542 return;
2543}
2544
Len Brown58cc30a2016-02-24 18:16:40 -0500[diff] [blame]2545void perf_limit_reasons_probe(int family, int model)
Len Brown3a9a9412014-08-15 02:39:52 -0400[diff] [blame]2546{
2547 if (!genuine_intel)
2548 return;
2549
2550 if (family != 6)
2551 return;
2552
2553 switch (model) {
2554 case 0x3C: /* HSW */
2555 case 0x45: /* HSW */
2556 case 0x46: /* HSW */
2557 do_gfx_perf_limit_reasons = 1;
2558 case 0x3F: /* HSX */
2559 do_core_perf_limit_reasons = 1;
2560 do_ring_perf_limit_reasons = 1;
2561 default:
2562 return;
2563 }
2564}
2565
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2566int print_thermal(struct thread_data *t, struct core_data *c, struct pkg_data *p)
2567{
2568 unsigned long long msr;
2569 unsigned int dts;
2570 int cpu;
2571
2572 if (!(do_dts || do_ptm))
2573 return 0;
2574
2575 cpu = t->cpu_id;
2576
2577 /* DTS is per-core, no need to print for each thread */
2578 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE))
2579 return 0;
2580
2581 if (cpu_migrate(cpu)) {
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]2582 fprintf(outf, "Could not migrate to CPU %d\n", cpu);
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2583 return -1;
2584 }
2585
2586 if (do_ptm && (t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE)) {
2587 if (get_msr(cpu, MSR_IA32_PACKAGE_THERM_STATUS, &msr))
2588 return 0;
2589
2590 dts = (msr >> 16) & 0x7F;
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]2591 fprintf(outf, "cpu%d: MSR_IA32_PACKAGE_THERM_STATUS: 0x%08llx (%d C)\n",
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2592 cpu, msr, tcc_activation_temp - dts);
2593
2594#ifdef THERM_DEBUG
2595 if (get_msr(cpu, MSR_IA32_PACKAGE_THERM_INTERRUPT, &msr))
2596 return 0;
2597
2598 dts = (msr >> 16) & 0x7F;
2599 dts2 = (msr >> 8) & 0x7F;
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]2600 fprintf(outf, "cpu%d: MSR_IA32_PACKAGE_THERM_INTERRUPT: 0x%08llx (%d C, %d C)\n",
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2601 cpu, msr, tcc_activation_temp - dts, tcc_activation_temp - dts2);
2602#endif
2603 }
2604
2605
2606 if (do_dts) {
2607 unsigned int resolution;
2608
2609 if (get_msr(cpu, MSR_IA32_THERM_STATUS, &msr))
2610 return 0;
2611
2612 dts = (msr >> 16) & 0x7F;
2613 resolution = (msr >> 27) & 0xF;
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]2614 fprintf(outf, "cpu%d: MSR_IA32_THERM_STATUS: 0x%08llx (%d C +/- %d)\n",
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2615 cpu, msr, tcc_activation_temp - dts, resolution);
2616
2617#ifdef THERM_DEBUG
2618 if (get_msr(cpu, MSR_IA32_THERM_INTERRUPT, &msr))
2619 return 0;
2620
2621 dts = (msr >> 16) & 0x7F;
2622 dts2 = (msr >> 8) & 0x7F;
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]2623 fprintf(outf, "cpu%d: MSR_IA32_THERM_INTERRUPT: 0x%08llx (%d C, %d C)\n",
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2624 cpu, msr, tcc_activation_temp - dts, tcc_activation_temp - dts2);
2625#endif
2626 }
2627
2628 return 0;
2629}
Len Brown36229892016-02-26 20:51:02 -0500[diff] [blame]2630
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2631void print_power_limit_msr(int cpu, unsigned long long msr, char *label)
2632{
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]2633 fprintf(outf, "cpu%d: %s: %sabled (%f Watts, %f sec, clamp %sabled)\n",
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2634 cpu, label,
2635 ((msr >> 15) & 1) ? "EN" : "DIS",
2636 ((msr >> 0) & 0x7FFF) * rapl_power_units,
2637 (1.0 + (((msr >> 22) & 0x3)/4.0)) * (1 << ((msr >> 17) & 0x1F)) * rapl_time_units,
2638 (((msr >> 16) & 1) ? "EN" : "DIS"));
2639
2640 return;
2641}
2642
2643int print_rapl(struct thread_data *t, struct core_data *c, struct pkg_data *p)
2644{
2645 unsigned long long msr;
2646 int cpu;
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2647
2648 if (!do_rapl)
2649 return 0;
2650
2651 /* RAPL counters are per package, so print only for 1st thread/package */
2652 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE) || !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
2653 return 0;
2654
2655 cpu = t->cpu_id;
2656 if (cpu_migrate(cpu)) {
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]2657 fprintf(outf, "Could not migrate to CPU %d\n", cpu);
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2658 return -1;
2659 }
2660
2661 if (get_msr(cpu, MSR_RAPL_POWER_UNIT, &msr))
2662 return -1;
2663
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]2664 if (debug) {
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]2665 fprintf(outf, "cpu%d: MSR_RAPL_POWER_UNIT: 0x%08llx "
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2666 "(%f Watts, %f Joules, %f sec.)\n", cpu, msr,
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]2667 rapl_power_units, rapl_energy_units, rapl_time_units);
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2668 }
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]2669 if (do_rapl & RAPL_PKG_POWER_INFO) {
2670
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2671 if (get_msr(cpu, MSR_PKG_POWER_INFO, &msr))
2672 return -5;
2673
2674
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]2675 fprintf(outf, "cpu%d: MSR_PKG_POWER_INFO: 0x%08llx (%.0f W TDP, RAPL %.0f - %.0f W, %f sec.)\n",
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2676 cpu, msr,
2677 ((msr >> 0) & RAPL_POWER_GRANULARITY) * rapl_power_units,
2678 ((msr >> 16) & RAPL_POWER_GRANULARITY) * rapl_power_units,
2679 ((msr >> 32) & RAPL_POWER_GRANULARITY) * rapl_power_units,
2680 ((msr >> 48) & RAPL_TIME_GRANULARITY) * rapl_time_units);
2681
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]2682 }
2683 if (do_rapl & RAPL_PKG) {
2684
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2685 if (get_msr(cpu, MSR_PKG_POWER_LIMIT, &msr))
2686 return -9;
2687
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]2688 fprintf(outf, "cpu%d: MSR_PKG_POWER_LIMIT: 0x%08llx (%slocked)\n",
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2689 cpu, msr, (msr >> 63) & 1 ? "": "UN");
2690
2691 print_power_limit_msr(cpu, msr, "PKG Limit #1");
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]2692 fprintf(outf, "cpu%d: PKG Limit #2: %sabled (%f Watts, %f* sec, clamp %sabled)\n",
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2693 cpu,
2694 ((msr >> 47) & 1) ? "EN" : "DIS",
2695 ((msr >> 32) & 0x7FFF) * rapl_power_units,
2696 (1.0 + (((msr >> 54) & 0x3)/4.0)) * (1 << ((msr >> 49) & 0x1F)) * rapl_time_units,
2697 ((msr >> 48) & 1) ? "EN" : "DIS");
2698 }
2699
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame]2700 if (do_rapl & RAPL_DRAM_POWER_INFO) {
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2701 if (get_msr(cpu, MSR_DRAM_POWER_INFO, &msr))
2702 return -6;
2703
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]2704 fprintf(outf, "cpu%d: MSR_DRAM_POWER_INFO,: 0x%08llx (%.0f W TDP, RAPL %.0f - %.0f W, %f sec.)\n",
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2705 cpu, msr,
2706 ((msr >> 0) & RAPL_POWER_GRANULARITY) * rapl_power_units,
2707 ((msr >> 16) & RAPL_POWER_GRANULARITY) * rapl_power_units,
2708 ((msr >> 32) & RAPL_POWER_GRANULARITY) * rapl_power_units,
2709 ((msr >> 48) & RAPL_TIME_GRANULARITY) * rapl_time_units);
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame]2710 }
2711 if (do_rapl & RAPL_DRAM) {
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2712 if (get_msr(cpu, MSR_DRAM_POWER_LIMIT, &msr))
2713 return -9;
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]2714 fprintf(outf, "cpu%d: MSR_DRAM_POWER_LIMIT: 0x%08llx (%slocked)\n",
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2715 cpu, msr, (msr >> 31) & 1 ? "": "UN");
2716
2717 print_power_limit_msr(cpu, msr, "DRAM Limit");
2718 }
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]2719 if (do_rapl & RAPL_CORE_POLICY) {
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]2720 if (debug) {
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2721 if (get_msr(cpu, MSR_PP0_POLICY, &msr))
2722 return -7;
2723
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]2724 fprintf(outf, "cpu%d: MSR_PP0_POLICY: %lld\n", cpu, msr & 0xF);
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]2725 }
2726 }
2727 if (do_rapl & RAPL_CORES) {
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]2728 if (debug) {
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2729
2730 if (get_msr(cpu, MSR_PP0_POWER_LIMIT, &msr))
2731 return -9;
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]2732 fprintf(outf, "cpu%d: MSR_PP0_POWER_LIMIT: 0x%08llx (%slocked)\n",
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2733 cpu, msr, (msr >> 31) & 1 ? "": "UN");
2734 print_power_limit_msr(cpu, msr, "Cores Limit");
2735 }
2736 }
2737 if (do_rapl & RAPL_GFX) {
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]2738 if (debug) {
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2739 if (get_msr(cpu, MSR_PP1_POLICY, &msr))
2740 return -8;
2741
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]2742 fprintf(outf, "cpu%d: MSR_PP1_POLICY: %lld\n", cpu, msr & 0xF);
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2743
2744 if (get_msr(cpu, MSR_PP1_POWER_LIMIT, &msr))
2745 return -9;
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]2746 fprintf(outf, "cpu%d: MSR_PP1_POWER_LIMIT: 0x%08llx (%slocked)\n",
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2747 cpu, msr, (msr >> 31) & 1 ? "": "UN");
2748 print_power_limit_msr(cpu, msr, "GFX Limit");
2749 }
2750 }
2751 return 0;
2752}
2753
Len Brownd7899442015-01-23 00:12:33 -0500[diff] [blame]2754/*
2755 * SNB adds support for additional MSRs:
2756 *
2757 * MSR_PKG_C7_RESIDENCY 0x000003fa
2758 * MSR_CORE_C7_RESIDENCY 0x000003fe
2759 * MSR_PKG_C2_RESIDENCY 0x0000060d
2760 */
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2761
Len Brownd7899442015-01-23 00:12:33 -0500[diff] [blame]2762int has_snb_msrs(unsigned int family, unsigned int model)
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2763{
2764 if (!genuine_intel)
2765 return 0;
2766
2767 switch (model) {
2768 case 0x2A:
2769 case 0x2D:
Len Brown650a37f2012-06-03 23:34:44 -0400[diff] [blame]2770 case 0x3A: /* IVB */
Len Brown13006512012-09-26 18:11:31 -0400[diff] [blame]2771 case 0x3E: /* IVB Xeon */
Len Brown70b43402013-01-08 01:26:07 -0500[diff] [blame]2772 case 0x3C: /* HSW */
2773 case 0x3F: /* HSW */
2774 case 0x45: /* HSW */
Len Brown149c2312013-03-15 10:58:02 -0400[diff] [blame]2775 case 0x46: /* HSW */
Len Brown4e8e863f2014-02-27 23:28:53 -0500[diff] [blame]2776 case 0x3D: /* BDW */
Len Brown48a06312015-02-10 15:38:04 -0500[diff] [blame]2777 case 0x47: /* BDW */
Len Brown4e8e863f2014-02-27 23:28:53 -0500[diff] [blame]2778 case 0x4F: /* BDX */
2779 case 0x56: /* BDX-DE */
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame]2780 case 0x4E: /* SKL */
2781 case 0x5E: /* SKL */
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2782 return 1;
2783 }
2784 return 0;
2785}
2786
Len Brownd7899442015-01-23 00:12:33 -0500[diff] [blame]2787/*
2788 * HSW adds support for additional MSRs:
2789 *
2790 * MSR_PKG_C8_RESIDENCY 0x00000630
2791 * MSR_PKG_C9_RESIDENCY 0x00000631
2792 * MSR_PKG_C10_RESIDENCY 0x00000632
2793 */
2794int has_hsw_msrs(unsigned int family, unsigned int model)
Kristen Carlson Accardica587102012-11-21 05:22:43 -0800[diff] [blame]2795{
2796 if (!genuine_intel)
2797 return 0;
2798
2799 switch (model) {
Len Brown4e8e863f2014-02-27 23:28:53 -0500[diff] [blame]2800 case 0x45: /* HSW */
2801 case 0x3D: /* BDW */
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame]2802 case 0x4E: /* SKL */
2803 case 0x5E: /* SKL */
Kristen Carlson Accardica587102012-11-21 05:22:43 -0800[diff] [blame]2804 return 1;
2805 }
2806 return 0;
2807}
2808
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame]2809/*
2810 * SKL adds support for additional MSRS:
2811 *
2812 * MSR_PKG_WEIGHTED_CORE_C0_RES 0x00000658
2813 * MSR_PKG_ANY_CORE_C0_RES 0x00000659
2814 * MSR_PKG_ANY_GFXE_C0_RES 0x0000065A
2815 * MSR_PKG_BOTH_CORE_GFXE_C0_RES 0x0000065B
2816 */
2817int has_skl_msrs(unsigned int family, unsigned int model)
2818{
2819 if (!genuine_intel)
2820 return 0;
2821
2822 switch (model) {
2823 case 0x4E: /* SKL */
2824 case 0x5E: /* SKL */
2825 return 1;
2826 }
2827 return 0;
2828}
2829
2830
Kristen Carlson Accardica587102012-11-21 05:22:43 -0800[diff] [blame]2831
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]2832int is_slm(unsigned int family, unsigned int model)
2833{
2834 if (!genuine_intel)
2835 return 0;
2836 switch (model) {
2837 case 0x37: /* BYT */
2838 case 0x4D: /* AVN */
2839 return 1;
2840 }
2841 return 0;
2842}
2843
Dasaratharaman Chandramoulifb5d4322015-05-20 09:49:34 -0700[diff] [blame]2844int is_knl(unsigned int family, unsigned int model)
2845{
2846 if (!genuine_intel)
2847 return 0;
2848 switch (model) {
2849 case 0x57: /* KNL */
2850 return 1;
2851 }
2852 return 0;
2853}
2854
Hubert Chrzaniukb2b34df2015-09-14 13:31:00 +0200[diff] [blame]2855unsigned int get_aperf_mperf_multiplier(unsigned int family, unsigned int model)
2856{
2857 if (is_knl(family, model))
2858 return 1024;
2859 return 1;
2860}
2861
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]2862#define SLM_BCLK_FREQS 5
2863double slm_freq_table[SLM_BCLK_FREQS] = { 83.3, 100.0, 133.3, 116.7, 80.0};
2864
2865double slm_bclk(void)
2866{
2867 unsigned long long msr = 3;
2868 unsigned int i;
2869 double freq;
2870
Prarit Bhargava7ce7d5d2015-05-25 08:34:28 -0400[diff] [blame]2871 if (get_msr(base_cpu, MSR_FSB_FREQ, &msr))
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]2872 fprintf(outf, "SLM BCLK: unknown\n");
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]2873
2874 i = msr & 0xf;
2875 if (i >= SLM_BCLK_FREQS) {
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]2876 fprintf(outf, "SLM BCLK[%d] invalid\n", i);
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]2877 msr = 3;
2878 }
2879 freq = slm_freq_table[i];
2880
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]2881 fprintf(outf, "SLM BCLK: %.1f Mhz\n", freq);
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]2882
2883 return freq;
2884}
2885
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2886double discover_bclk(unsigned int family, unsigned int model)
2887{
Chrzaniuk, Hubert121b48b2016-02-10 16:35:17 +0100[diff] [blame]2888 if (has_snb_msrs(family, model) || is_knl(family, model))
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2889 return 100.00;
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]2890 else if (is_slm(family, model))
2891 return slm_bclk();
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2892 else
2893 return 133.33;
2894}
2895
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2896/*
2897 * MSR_IA32_TEMPERATURE_TARGET indicates the temperature where
2898 * the Thermal Control Circuit (TCC) activates.
2899 * This is usually equal to tjMax.
2900 *
2901 * Older processors do not have this MSR, so there we guess,
2902 * but also allow cmdline over-ride with -T.
2903 *
2904 * Several MSR temperature values are in units of degrees-C
2905 * below this value, including the Digital Thermal Sensor (DTS),
2906 * Package Thermal Management Sensor (PTM), and thermal event thresholds.
2907 */
2908int set_temperature_target(struct thread_data *t, struct core_data *c, struct pkg_data *p)
2909{
2910 unsigned long long msr;
2911 unsigned int target_c_local;
2912 int cpu;
2913
2914 /* tcc_activation_temp is used only for dts or ptm */
2915 if (!(do_dts || do_ptm))
2916 return 0;
2917
2918 /* this is a per-package concept */
2919 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE) || !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
2920 return 0;
2921
2922 cpu = t->cpu_id;
2923 if (cpu_migrate(cpu)) {
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]2924 fprintf(outf, "Could not migrate to CPU %d\n", cpu);
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2925 return -1;
2926 }
2927
2928 if (tcc_activation_temp_override != 0) {
2929 tcc_activation_temp = tcc_activation_temp_override;
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]2930 fprintf(outf, "cpu%d: Using cmdline TCC Target (%d C)\n",
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2931 cpu, tcc_activation_temp);
2932 return 0;
2933 }
2934
2935 /* Temperature Target MSR is Nehalem and newer only */
Len Brownd7899442015-01-23 00:12:33 -0500[diff] [blame]2936 if (!do_nhm_platform_info)
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2937 goto guess;
2938
Prarit Bhargava7ce7d5d2015-05-25 08:34:28 -0400[diff] [blame]2939 if (get_msr(base_cpu, MSR_IA32_TEMPERATURE_TARGET, &msr))
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2940 goto guess;
2941
Jean Delvare34821242014-05-01 11:40:19 +0200[diff] [blame]2942 target_c_local = (msr >> 16) & 0xFF;
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2943
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]2944 if (debug)
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]2945 fprintf(outf, "cpu%d: MSR_IA32_TEMPERATURE_TARGET: 0x%08llx (%d C)\n",
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2946 cpu, msr, target_c_local);
2947
Jean Delvare34821242014-05-01 11:40:19 +0200[diff] [blame]2948 if (!target_c_local)
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2949 goto guess;
2950
2951 tcc_activation_temp = target_c_local;
2952
2953 return 0;
2954
2955guess:
2956 tcc_activation_temp = TJMAX_DEFAULT;
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]2957 fprintf(outf, "cpu%d: Guessing tjMax %d C, Please use -T to specify\n",
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2958 cpu, tcc_activation_temp);
2959
2960 return 0;
2961}
Len Brown69807a62015-11-21 12:22:47 -0500[diff] [blame]2962
2963void decode_misc_enable_msr(void)
2964{
2965 unsigned long long msr;
2966
2967 if (!get_msr(base_cpu, MSR_IA32_MISC_ENABLE, &msr))
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]2968 fprintf(outf, "cpu%d: MSR_IA32_MISC_ENABLE: 0x%08llx (%s %s %s)\n",
Len Brown69807a62015-11-21 12:22:47 -0500[diff] [blame]2969 base_cpu, msr,
2970 msr & (1 << 3) ? "TCC" : "",
2971 msr & (1 << 16) ? "EIST" : "",
2972 msr & (1 << 18) ? "MONITOR" : "");
2973}
2974
Len Brownf0057312015-12-03 01:35:36 -0500[diff] [blame]2975/*
2976 * Decode MSR_MISC_PWR_MGMT
2977 *
2978 * Decode the bits according to the Nehalem documentation
2979 * bit[0] seems to continue to have same meaning going forward
2980 * bit[1] less so...
2981 */
2982void decode_misc_pwr_mgmt_msr(void)
2983{
2984 unsigned long long msr;
2985
2986 if (!do_nhm_platform_info)
2987 return;
2988
2989 if (!get_msr(base_cpu, MSR_MISC_PWR_MGMT, &msr))
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]2990 fprintf(outf, "cpu%d: MSR_MISC_PWR_MGMT: 0x%08llx (%sable-EIST_Coordination %sable-EPB)\n",
Len Brownf0057312015-12-03 01:35:36 -0500[diff] [blame]2991 base_cpu, msr,
2992 msr & (1 << 0) ? "DIS" : "EN",
2993 msr & (1 << 1) ? "EN" : "DIS");
2994}
Len Brown7f5c2582015-12-01 01:36:39 -0500[diff] [blame]2995
Len Brownfcd17212015-03-23 20:29:09 -0400[diff] [blame]2996void process_cpuid()
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2997{
Len Brown61a87ba2015-11-23 02:30:51 -0500[diff] [blame]2998 unsigned int eax, ebx, ecx, edx, max_level, max_extended_level;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2999 unsigned int fms, family, model, stepping;
3000
3001 eax = ebx = ecx = edx = 0;
3002
Josh Triplett2b928652013-08-20 17:20:14 -0700[diff] [blame]3003 __get_cpuid(0, &max_level, &ebx, &ecx, &edx);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]3004
3005 if (ebx == 0x756e6547 && edx == 0x49656e69 && ecx == 0x6c65746e)
3006 genuine_intel = 1;
3007
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]3008 if (debug)
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]3009 fprintf(outf, "CPUID(0): %.4s%.4s%.4s ",
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]3010 (char *)&ebx, (char *)&edx, (char *)&ecx);
3011
Josh Triplett2b928652013-08-20 17:20:14 -0700[diff] [blame]3012 __get_cpuid(1, &fms, &ebx, &ecx, &edx);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]3013 family = (fms >> 8) & 0xf;
3014 model = (fms >> 4) & 0xf;
3015 stepping = fms & 0xf;
3016 if (family == 6 || family == 0xf)
3017 model += ((fms >> 16) & 0xf) << 4;
3018
Len Brown69807a62015-11-21 12:22:47 -0500[diff] [blame]3019 if (debug) {
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]3020 fprintf(outf, "%d CPUID levels; family:model:stepping 0x%x:%x:%x (%d:%d:%d)\n",
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]3021 max_level, family, model, stepping, family, model, stepping);
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]3022 fprintf(outf, "CPUID(1): %s %s %s %s %s %s %s %s\n",
Len Brown69807a62015-11-21 12:22:47 -0500[diff] [blame]3023 ecx & (1 << 0) ? "SSE3" : "-",
3024 ecx & (1 << 3) ? "MONITOR" : "-",
3025 ecx & (1 << 7) ? "EIST" : "-",
3026 ecx & (1 << 8) ? "TM2" : "-",
3027 edx & (1 << 4) ? "TSC" : "-",
3028 edx & (1 << 5) ? "MSR" : "-",
3029 edx & (1 << 22) ? "ACPI-TM" : "-",
3030 edx & (1 << 29) ? "TM" : "-");
3031 }
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]3032
Josh Triplettb2c95d92013-08-20 17:20:18 -0700[diff] [blame]3033 if (!(edx & (1 << 5)))
3034 errx(1, "CPUID: no MSR");
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]3035
3036 /*
3037 * check max extended function levels of CPUID.
3038 * This is needed to check for invariant TSC.
3039 * This check is valid for both Intel and AMD.
3040 */
3041 ebx = ecx = edx = 0;
Len Brown61a87ba2015-11-23 02:30:51 -0500[diff] [blame]3042 __get_cpuid(0x80000000, &max_extended_level, &ebx, &ecx, &edx);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]3043
Len Brown61a87ba2015-11-23 02:30:51 -0500[diff] [blame]3044 if (max_extended_level >= 0x80000007) {
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]3045
Len Brownd7899442015-01-23 00:12:33 -0500[diff] [blame]3046 /*
3047 * Non-Stop TSC is advertised by CPUID.EAX=0x80000007: EDX.bit8
3048 * this check is valid for both Intel and AMD
3049 */
3050 __get_cpuid(0x80000007, &eax, &ebx, &ecx, &edx);
3051 has_invariant_tsc = edx & (1 << 8);
3052 }
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]3053
3054 /*
3055 * APERF/MPERF is advertised by CPUID.EAX=0x6: ECX.bit0
3056 * this check is valid for both Intel and AMD
3057 */
3058
Josh Triplett2b928652013-08-20 17:20:14 -0700[diff] [blame]3059 __get_cpuid(0x6, &eax, &ebx, &ecx, &edx);
Thomas Renninger8209e052011-01-21 15:11:19 +0100[diff] [blame]3060 has_aperf = ecx & (1 << 0);
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]3061 do_dts = eax & (1 << 0);
3062 do_ptm = eax & (1 << 6);
Len Brown7f5c2582015-12-01 01:36:39 -0500[diff] [blame]3063 has_hwp = eax & (1 << 7);
3064 has_hwp_notify = eax & (1 << 8);
3065 has_hwp_activity_window = eax & (1 << 9);
3066 has_hwp_epp = eax & (1 << 10);
3067 has_hwp_pkg = eax & (1 << 11);
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]3068 has_epb = ecx & (1 << 3);
3069
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]3070 if (debug)
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]3071 fprintf(outf, "CPUID(6): %sAPERF, %sDTS, %sPTM, %sHWP, "
Len Brown7f5c2582015-12-01 01:36:39 -0500[diff] [blame]3072 "%sHWPnotify, %sHWPwindow, %sHWPepp, %sHWPpkg, %sEPB\n",
3073 has_aperf ? "" : "No-",
3074 do_dts ? "" : "No-",
3075 do_ptm ? "" : "No-",
3076 has_hwp ? "" : "No-",
3077 has_hwp_notify ? "" : "No-",
3078 has_hwp_activity_window ? "" : "No-",
3079 has_hwp_epp ? "" : "No-",
3080 has_hwp_pkg ? "" : "No-",
3081 has_epb ? "" : "No-");
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]3082
Len Brown69807a62015-11-21 12:22:47 -0500[diff] [blame]3083 if (debug)
3084 decode_misc_enable_msr();
3085
Len Brown61a87ba2015-11-23 02:30:51 -0500[diff] [blame]3086 if (max_level >= 0x15) {
Len Brown8a5bdf42015-04-01 21:02:57 -0400[diff] [blame]3087 unsigned int eax_crystal;
3088 unsigned int ebx_tsc;
3089
3090 /*
3091 * CPUID 15H TSC/Crystal ratio, possibly Crystal Hz
3092 */
3093 eax_crystal = ebx_tsc = crystal_hz = edx = 0;
3094 __get_cpuid(0x15, &eax_crystal, &ebx_tsc, &crystal_hz, &edx);
3095
3096 if (ebx_tsc != 0) {
3097
3098 if (debug && (ebx != 0))
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]3099 fprintf(outf, "CPUID(0x15): eax_crystal: %d ebx_tsc: %d ecx_crystal_hz: %d\n",
Len Brown8a5bdf42015-04-01 21:02:57 -0400[diff] [blame]3100 eax_crystal, ebx_tsc, crystal_hz);
3101
3102 if (crystal_hz == 0)
3103 switch(model) {
3104 case 0x4E: /* SKL */
3105 case 0x5E: /* SKL */
3106 crystal_hz = 24000000; /* 24 MHz */
3107 break;
3108 default:
3109 crystal_hz = 0;
3110 }
3111
3112 if (crystal_hz) {
3113 tsc_hz = (unsigned long long) crystal_hz * ebx_tsc / eax_crystal;
3114 if (debug)
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]3115 fprintf(outf, "TSC: %lld MHz (%d Hz * %d / %d / 1000000)\n",
Len Brown8a5bdf42015-04-01 21:02:57 -0400[diff] [blame]3116 tsc_hz / 1000000, crystal_hz, ebx_tsc, eax_crystal);
3117 }
3118 }
3119 }
Len Brown61a87ba2015-11-23 02:30:51 -0500[diff] [blame]3120 if (max_level >= 0x16) {
3121 unsigned int base_mhz, max_mhz, bus_mhz, edx;
3122
3123 /*
3124 * CPUID 16H Base MHz, Max MHz, Bus MHz
3125 */
3126 base_mhz = max_mhz = bus_mhz = edx = 0;
3127
3128 __get_cpuid(0x16, &base_mhz, &max_mhz, &bus_mhz, &edx);
3129 if (debug)
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]3130 fprintf(outf, "CPUID(0x16): base_mhz: %d max_mhz: %d bus_mhz: %d\n",
Len Brown61a87ba2015-11-23 02:30:51 -0500[diff] [blame]3131 base_mhz, max_mhz, bus_mhz);
3132 }
Len Brown8a5bdf42015-04-01 21:02:57 -0400[diff] [blame]3133
Hubert Chrzaniukb2b34df2015-09-14 13:31:00 +0200[diff] [blame]3134 if (has_aperf)
3135 aperf_mperf_multiplier = get_aperf_mperf_multiplier(family, model);
3136
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]3137 do_nhm_platform_info = do_nhm_cstates = do_smi = probe_nhm_msrs(family, model);
Len Brownd7899442015-01-23 00:12:33 -0500[diff] [blame]3138 do_snb_cstates = has_snb_msrs(family, model);
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]3139 do_pc2 = do_snb_cstates && (pkg_cstate_limit >= PCL__2);
3140 do_pc3 = (pkg_cstate_limit >= PCL__3);
3141 do_pc6 = (pkg_cstate_limit >= PCL__6);
3142 do_pc7 = do_snb_cstates && (pkg_cstate_limit >= PCL__7);
Len Brownd7899442015-01-23 00:12:33 -0500[diff] [blame]3143 do_c8_c9_c10 = has_hsw_msrs(family, model);
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame]3144 do_skl_residency = has_skl_msrs(family, model);
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]3145 do_slm_cstates = is_slm(family, model);
Dasaratharaman Chandramoulifb5d4322015-05-20 09:49:34 -0700[diff] [blame]3146 do_knl_cstates = is_knl(family, model);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]3147
Len Brownf0057312015-12-03 01:35:36 -0500[diff] [blame]3148 if (debug)
3149 decode_misc_pwr_mgmt_msr();
3150
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]3151 rapl_probe(family, model);
Len Brown3a9a9412014-08-15 02:39:52 -0400[diff] [blame]3152 perf_limit_reasons_probe(family, model);
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]3153
Len Brownfcd17212015-03-23 20:29:09 -0400[diff] [blame]3154 if (debug)
Len Brown58cc30a2016-02-24 18:16:40 -0500[diff] [blame]3155 dump_cstate_pstate_config_info(family, model);
Len Brownfcd17212015-03-23 20:29:09 -0400[diff] [blame]3156
Len Browna2b7b742015-09-26 00:12:38 -0400[diff] [blame]3157 if (has_skl_msrs(family, model))
3158 calculate_tsc_tweak();
3159
Len Brown27d47352016-02-27 00:37:54 -0500[diff] [blame^]3160 do_gfx_mhz = !access("/sys/class/graphics/fb0/device/drm/card0/gt_cur_freq_mhz", R_OK);
3161
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]3162 return;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]3163}
3164
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]3165void help()
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]3166{
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]3167 fprintf(outf,
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]3168 "Usage: turbostat [OPTIONS][(--interval seconds) | COMMAND ...]\n"
3169 "\n"
3170 "Turbostat forks the specified COMMAND and prints statistics\n"
3171 "when COMMAND completes.\n"
3172 "If no COMMAND is specified, turbostat wakes every 5-seconds\n"
3173 "to print statistics, until interrupted.\n"
3174 "--debug run in \"debug\" mode\n"
3175 "--interval sec Override default 5-second measurement interval\n"
3176 "--help print this help message\n"
3177 "--counter msr print 32-bit counter at address \"msr\"\n"
3178 "--Counter msr print 64-bit Counter at address \"msr\"\n"
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]3179 "--out file create or truncate \"file\" for all output\n"
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]3180 "--msr msr print 32-bit value at address \"msr\"\n"
3181 "--MSR msr print 64-bit Value at address \"msr\"\n"
3182 "--version print version information\n"
3183 "\n"
3184 "For more help, run \"man turbostat\"\n");
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]3185}
3186
3187
3188/*
3189 * in /dev/cpu/ return success for names that are numbers
3190 * ie. filter out ".", "..", "microcode".
3191 */
3192int dir_filter(const struct dirent *dirp)
3193{
3194 if (isdigit(dirp->d_name[0]))
3195 return 1;
3196 else
3197 return 0;
3198}
3199
3200int open_dev_cpu_msr(int dummy1)
3201{
3202 return 0;
3203}
3204
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]3205void topology_probe()
3206{
3207 int i;
3208 int max_core_id = 0;
3209 int max_package_id = 0;
3210 int max_siblings = 0;
3211 struct cpu_topology {
3212 int core_id;
3213 int physical_package_id;
3214 } *cpus;
3215
3216 /* Initialize num_cpus, max_cpu_num */
3217 topo.num_cpus = 0;
3218 topo.max_cpu_num = 0;
3219 for_all_proc_cpus(count_cpus);
3220 if (!summary_only && topo.num_cpus > 1)
3221 show_cpu = 1;
3222
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]3223 if (debug > 1)
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]3224 fprintf(outf, "num_cpus %d max_cpu_num %d\n", topo.num_cpus, topo.max_cpu_num);
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]3225
3226 cpus = calloc(1, (topo.max_cpu_num + 1) * sizeof(struct cpu_topology));
Josh Triplettb2c95d92013-08-20 17:20:18 -0700[diff] [blame]3227 if (cpus == NULL)
3228 err(1, "calloc cpus");
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]3229
3230 /*
3231 * Allocate and initialize cpu_present_set
3232 */
3233 cpu_present_set = CPU_ALLOC((topo.max_cpu_num + 1));
Josh Triplettb2c95d92013-08-20 17:20:18 -0700[diff] [blame]3234 if (cpu_present_set == NULL)
3235 err(3, "CPU_ALLOC");
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]3236 cpu_present_setsize = CPU_ALLOC_SIZE((topo.max_cpu_num + 1));
3237 CPU_ZERO_S(cpu_present_setsize, cpu_present_set);
3238 for_all_proc_cpus(mark_cpu_present);
3239
3240 /*
3241 * Allocate and initialize cpu_affinity_set
3242 */
3243 cpu_affinity_set = CPU_ALLOC((topo.max_cpu_num + 1));
Josh Triplettb2c95d92013-08-20 17:20:18 -0700[diff] [blame]3244 if (cpu_affinity_set == NULL)
3245 err(3, "CPU_ALLOC");
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]3246 cpu_affinity_setsize = CPU_ALLOC_SIZE((topo.max_cpu_num + 1));
3247 CPU_ZERO_S(cpu_affinity_setsize, cpu_affinity_set);
3248
3249
3250 /*
3251 * For online cpus
3252 * find max_core_id, max_package_id
3253 */
3254 for (i = 0; i <= topo.max_cpu_num; ++i) {
3255 int siblings;
3256
3257 if (cpu_is_not_present(i)) {
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]3258 if (debug > 1)
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]3259 fprintf(outf, "cpu%d NOT PRESENT\n", i);
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]3260 continue;
3261 }
3262 cpus[i].core_id = get_core_id(i);
3263 if (cpus[i].core_id > max_core_id)
3264 max_core_id = cpus[i].core_id;
3265
3266 cpus[i].physical_package_id = get_physical_package_id(i);
3267 if (cpus[i].physical_package_id > max_package_id)
3268 max_package_id = cpus[i].physical_package_id;
3269
3270 siblings = get_num_ht_siblings(i);
3271 if (siblings > max_siblings)
3272 max_siblings = siblings;
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]3273 if (debug > 1)
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]3274 fprintf(outf, "cpu %d pkg %d core %d\n",
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]3275 i, cpus[i].physical_package_id, cpus[i].core_id);
3276 }
3277 topo.num_cores_per_pkg = max_core_id + 1;
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]3278 if (debug > 1)
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]3279 fprintf(outf, "max_core_id %d, sizing for %d cores per package\n",
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]3280 max_core_id, topo.num_cores_per_pkg);
Len Brown1cc21f72015-02-23 00:34:57 -0500[diff] [blame]3281 if (debug && !summary_only && topo.num_cores_per_pkg > 1)
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]3282 show_core = 1;
3283
3284 topo.num_packages = max_package_id + 1;
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]3285 if (debug > 1)
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]3286 fprintf(outf, "max_package_id %d, sizing for %d packages\n",
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]3287 max_package_id, topo.num_packages);
Len Brown1cc21f72015-02-23 00:34:57 -0500[diff] [blame]3288 if (debug && !summary_only && topo.num_packages > 1)
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]3289 show_pkg = 1;
3290
3291 topo.num_threads_per_core = max_siblings;
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]3292 if (debug > 1)
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]3293 fprintf(outf, "max_siblings %d\n", max_siblings);
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]3294
3295 free(cpus);
3296}
3297
3298void
3299allocate_counters(struct thread_data **t, struct core_data **c, struct pkg_data **p)
3300{
3301 int i;
3302
3303 *t = calloc(topo.num_threads_per_core * topo.num_cores_per_pkg *
3304 topo.num_packages, sizeof(struct thread_data));
3305 if (*t == NULL)
3306 goto error;
3307
3308 for (i = 0; i < topo.num_threads_per_core *
3309 topo.num_cores_per_pkg * topo.num_packages; i++)
3310 (*t)[i].cpu_id = -1;
3311
3312 *c = calloc(topo.num_cores_per_pkg * topo.num_packages,
3313 sizeof(struct core_data));
3314 if (*c == NULL)
3315 goto error;
3316
3317 for (i = 0; i < topo.num_cores_per_pkg * topo.num_packages; i++)
3318 (*c)[i].core_id = -1;
3319
3320 *p = calloc(topo.num_packages, sizeof(struct pkg_data));
3321 if (*p == NULL)
3322 goto error;
3323
3324 for (i = 0; i < topo.num_packages; i++)
3325 (*p)[i].package_id = i;
3326
3327 return;
3328error:
Josh Triplettb2c95d92013-08-20 17:20:18 -0700[diff] [blame]3329 err(1, "calloc counters");
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]3330}
3331/*
3332 * init_counter()
3333 *
3334 * set cpu_id, core_num, pkg_num
3335 * set FIRST_THREAD_IN_CORE and FIRST_CORE_IN_PACKAGE
3336 *
3337 * increment topo.num_cores when 1st core in pkg seen
3338 */
3339void init_counter(struct thread_data *thread_base, struct core_data *core_base,
3340 struct pkg_data *pkg_base, int thread_num, int core_num,
3341 int pkg_num, int cpu_id)
3342{
3343 struct thread_data *t;
3344 struct core_data *c;
3345 struct pkg_data *p;
3346
3347 t = GET_THREAD(thread_base, thread_num, core_num, pkg_num);
3348 c = GET_CORE(core_base, core_num, pkg_num);
3349 p = GET_PKG(pkg_base, pkg_num);
3350
3351 t->cpu_id = cpu_id;
3352 if (thread_num == 0) {
3353 t->flags |= CPU_IS_FIRST_THREAD_IN_CORE;
3354 if (cpu_is_first_core_in_package(cpu_id))
3355 t->flags |= CPU_IS_FIRST_CORE_IN_PACKAGE;
3356 }
3357
3358 c->core_id = core_num;
3359 p->package_id = pkg_num;
3360}
3361
3362
3363int initialize_counters(int cpu_id)
3364{
3365 int my_thread_id, my_core_id, my_package_id;
3366
3367 my_package_id = get_physical_package_id(cpu_id);
3368 my_core_id = get_core_id(cpu_id);
Dasaratharaman Chandramoulie275b382015-04-15 10:09:50 -0700[diff] [blame]3369 my_thread_id = get_cpu_position_in_core(cpu_id);
3370 if (!my_thread_id)
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]3371 topo.num_cores++;
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]3372
3373 init_counter(EVEN_COUNTERS, my_thread_id, my_core_id, my_package_id, cpu_id);
3374 init_counter(ODD_COUNTERS, my_thread_id, my_core_id, my_package_id, cpu_id);
3375 return 0;
3376}
3377
3378void allocate_output_buffer()
3379{
Andy Shevchenko3b4d5c72014-01-23 17:13:15 +0200[diff] [blame]3380 output_buffer = calloc(1, (1 + topo.num_cpus) * 1024);
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]3381 outp = output_buffer;
Josh Triplettb2c95d92013-08-20 17:20:18 -0700[diff] [blame]3382 if (outp == NULL)
3383 err(-1, "calloc output buffer");
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]3384}
Len Brown36229892016-02-26 20:51:02 -0500[diff] [blame]3385void allocate_fd_percpu(void)
3386{
3387 fd_percpu = calloc(topo.max_cpu_num, sizeof(int));
3388 if (fd_percpu == NULL)
3389 err(-1, "calloc fd_percpu");
3390}
Len Brown562a2d32016-02-26 23:48:05 -0500[diff] [blame]3391void allocate_irq_buffers(void)
3392{
3393 irq_column_2_cpu = calloc(topo.num_cpus, sizeof(int));
3394 if (irq_column_2_cpu == NULL)
3395 err(-1, "calloc %d", topo.num_cpus);
3396
3397 irqs_per_cpu = calloc(topo.max_cpu_num, sizeof(int));
3398 if (irqs_per_cpu == NULL)
3399 err(-1, "calloc %d", topo.max_cpu_num);
3400}
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]3401void setup_all_buffers(void)
3402{
3403 topology_probe();
Len Brown562a2d32016-02-26 23:48:05 -0500[diff] [blame]3404 allocate_irq_buffers();
Len Brown36229892016-02-26 20:51:02 -0500[diff] [blame]3405 allocate_fd_percpu();
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]3406 allocate_counters(&thread_even, &core_even, &package_even);
3407 allocate_counters(&thread_odd, &core_odd, &package_odd);
3408 allocate_output_buffer();
3409 for_all_proc_cpus(initialize_counters);
3410}
Andy Shevchenko3b4d5c72014-01-23 17:13:15 +0200[diff] [blame]3411
Prarit Bhargava7ce7d5d2015-05-25 08:34:28 -0400[diff] [blame]3412void set_base_cpu(void)
3413{
3414 base_cpu = sched_getcpu();
3415 if (base_cpu < 0)
3416 err(-ENODEV, "No valid cpus found");
3417
3418 if (debug > 1)
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]3419 fprintf(outf, "base_cpu = %d\n", base_cpu);
Prarit Bhargava7ce7d5d2015-05-25 08:34:28 -0400[diff] [blame]3420}
3421
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]3422void turbostat_init()
3423{
Prarit Bhargava7ce7d5d2015-05-25 08:34:28 -0400[diff] [blame]3424 setup_all_buffers();
3425 set_base_cpu();
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]3426 check_dev_msr();
Len Brown98481e72014-08-15 00:36:50 -0400[diff] [blame]3427 check_permissions();
Len Brownfcd17212015-03-23 20:29:09 -0400[diff] [blame]3428 process_cpuid();
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]3429
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]3430
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]3431 if (debug)
Len Brown7f5c2582015-12-01 01:36:39 -0500[diff] [blame]3432 for_all_cpus(print_hwp, ODD_COUNTERS);
3433
3434 if (debug)
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]3435 for_all_cpus(print_epb, ODD_COUNTERS);
3436
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]3437 if (debug)
Len Brown3a9a9412014-08-15 02:39:52 -0400[diff] [blame]3438 for_all_cpus(print_perf_limit, ODD_COUNTERS);
3439
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]3440 if (debug)
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]3441 for_all_cpus(print_rapl, ODD_COUNTERS);
3442
3443 for_all_cpus(set_temperature_target, ODD_COUNTERS);
3444
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]3445 if (debug)
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]3446 for_all_cpus(print_thermal, ODD_COUNTERS);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]3447}
3448
3449int fork_it(char **argv)
3450{
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]3451 pid_t child_pid;
Len Brownd91bb172012-11-01 00:08:19 -0400[diff] [blame]3452 int status;
Len Brownd15cf7c2012-06-03 23:24:00 -0400[diff] [blame]3453
Len Brownd91bb172012-11-01 00:08:19 -0400[diff] [blame]3454 status = for_all_cpus(get_counters, EVEN_COUNTERS);
3455 if (status)
3456 exit(status);
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]3457 /* clear affinity side-effect of get_counters() */
3458 sched_setaffinity(0, cpu_present_setsize, cpu_present_set);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]3459 gettimeofday(&tv_even, (struct timezone *)NULL);
3460
3461 child_pid = fork();
3462 if (!child_pid) {
3463 /* child */
3464 execvp(argv[0], argv);
3465 } else {
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]3466
3467 /* parent */
Josh Triplettb2c95d92013-08-20 17:20:18 -0700[diff] [blame]3468 if (child_pid == -1)
3469 err(1, "fork");
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]3470
3471 signal(SIGINT, SIG_IGN);
3472 signal(SIGQUIT, SIG_IGN);
Josh Triplettb2c95d92013-08-20 17:20:18 -0700[diff] [blame]3473 if (waitpid(child_pid, &status, 0) == -1)
3474 err(status, "waitpid");
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]3475 }
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]3476 /*
3477 * n.b. fork_it() does not check for errors from for_all_cpus()
3478 * because re-starting is problematic when forking
3479 */
3480 for_all_cpus(get_counters, ODD_COUNTERS);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]3481 gettimeofday(&tv_odd, (struct timezone *)NULL);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]3482 timersub(&tv_odd, &tv_even, &tv_delta);
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]3483 for_all_cpus_2(delta_cpu, ODD_COUNTERS, EVEN_COUNTERS);
3484 compute_average(EVEN_COUNTERS);
3485 format_all_counters(EVEN_COUNTERS);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]3486
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]3487 fprintf(outf, "%.6f sec\n", tv_delta.tv_sec + tv_delta.tv_usec/1000000.0);
3488
3489 flush_output_stderr();
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]3490
Len Brownd91bb172012-11-01 00:08:19 -0400[diff] [blame]3491 return status;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]3492}
3493
Andy Shevchenko3b4d5c72014-01-23 17:13:15 +0200[diff] [blame]3494int get_and_dump_counters(void)
3495{
3496 int status;
3497
3498 status = for_all_cpus(get_counters, ODD_COUNTERS);
3499 if (status)
3500 return status;
3501
3502 status = for_all_cpus(dump_counters, ODD_COUNTERS);
3503 if (status)
3504 return status;
3505
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]3506 flush_output_stdout();
Andy Shevchenko3b4d5c72014-01-23 17:13:15 +0200[diff] [blame]3507
3508 return status;
3509}
3510
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]3511void print_version() {
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]3512 fprintf(outf, "turbostat version 4.10 10 Dec, 2015"
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]3513 " - Len Brown <lenb@kernel.org>\n");
3514}
3515
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]3516void cmdline(int argc, char **argv)
3517{
3518 int opt;
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]3519 int option_index = 0;
3520 static struct option long_options[] = {
3521 {"Counter", required_argument, 0, 'C'},
3522 {"counter", required_argument, 0, 'c'},
3523 {"Dump", no_argument, 0, 'D'},
3524 {"debug", no_argument, 0, 'd'},
3525 {"interval", required_argument, 0, 'i'},
3526 {"help", no_argument, 0, 'h'},
3527 {"Joules", no_argument, 0, 'J'},
3528 {"MSR", required_argument, 0, 'M'},
3529 {"msr", required_argument, 0, 'm'},
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]3530 {"out", required_argument, 0, 'o'},
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]3531 {"Package", no_argument, 0, 'p'},
3532 {"processor", no_argument, 0, 'p'},
3533 {"Summary", no_argument, 0, 'S'},
3534 {"TCC", required_argument, 0, 'T'},
3535 {"version", no_argument, 0, 'v' },
3536 {0, 0, 0, 0 }
3537 };
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]3538
3539 progname = argv[0];
3540
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]3541 while ((opt = getopt_long_only(argc, argv, "+C:c:Ddhi:JM:m:o:PpST:v",
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]3542 long_options, &option_index)) != -1) {
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]3543 switch (opt) {
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]3544 case 'C':
3545 sscanf(optarg, "%x", &extra_delta_offset64);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]3546 break;
Len Brownf9240812012-10-06 15:26:31 -0400[diff] [blame]3547 case 'c':
Len Brown8e180f32012-09-22 01:25:08 -0400[diff] [blame]3548 sscanf(optarg, "%x", &extra_delta_offset32);
3549 break;
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]3550 case 'D':
3551 dump_only++;
Len Brown8e180f32012-09-22 01:25:08 -0400[diff] [blame]3552 break;
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]3553 case 'd':
3554 debug++;
Len Brown2f32edf2012-09-21 23:45:46 -0400[diff] [blame]3555 break;
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]3556 case 'h':
3557 default:
3558 help();
3559 exit(1);
3560 case 'i':
Len Brown2a0609c2016-02-12 22:44:48 -0500[diff] [blame]3561 {
3562 double interval = strtod(optarg, NULL);
3563
3564 if (interval < 0.001) {
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]3565 fprintf(outf, "interval %f seconds is too small\n",
Len Brown2a0609c2016-02-12 22:44:48 -0500[diff] [blame]3566 interval);
3567 exit(2);
3568 }
3569
3570 interval_ts.tv_sec = interval;
3571 interval_ts.tv_nsec = (interval - interval_ts.tv_sec) * 1000000000;
3572 }
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]3573 break;
Dirk Brandewie5c56be92013-12-16 10:23:41 -0800[diff] [blame]3574 case 'J':
3575 rapl_joules++;
3576 break;
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]3577 case 'M':
3578 sscanf(optarg, "%x", &extra_msr_offset64);
3579 break;
3580 case 'm':
3581 sscanf(optarg, "%x", &extra_msr_offset32);
3582 break;
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]3583 case 'o':
3584 outf = fopen_or_die(optarg, "w");
3585 break;
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]3586 case 'P':
3587 show_pkg_only++;
3588 break;
3589 case 'p':
3590 show_core_only++;
3591 break;
3592 case 'S':
3593 summary_only++;
3594 break;
3595 case 'T':
3596 tcc_activation_temp_override = atoi(optarg);
3597 break;
3598 case 'v':
3599 print_version();
3600 exit(0);
3601 break;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]3602 }
3603 }
3604}
3605
3606int main(int argc, char **argv)
3607{
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]3608 outf = stderr;
3609
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]3610 cmdline(argc, argv);
3611
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]3612 if (debug)
3613 print_version();
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]3614
3615 turbostat_init();
3616
Andy Shevchenko3b4d5c72014-01-23 17:13:15 +0200[diff] [blame]3617 /* dump counters and exit */
3618 if (dump_only)
3619 return get_and_dump_counters();
3620
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]3621 /*
3622 * if any params left, it must be a command to fork
3623 */
3624 if (argc - optind)
3625 return fork_it(argv + optind);
3626 else
3627 turbostat_loop();
3628
3629 return 0;
3630}