blob: fd6d699d42e1a48c58bca4f26203efe172a37f9c [file] [log] [blame]
Jammy Zhoua72ce6f2015-05-22 18:55:07 +08001/*
2 * Copyright 2015 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 */
23
24#ifndef _GPU_SCHEDULER_H_
25#define _GPU_SCHEDULER_H_
26
27#include <linux/kfifo.h>
28
Jammy Zhoua72ce6f2015-05-22 18:55:07 +080029#define AMD_KERNEL_CONTEXT_ID 0
30#define AMD_KERNEL_PROCESS_ID 0
31
32#define AMD_GPU_WAIT_IDLE_TIMEOUT_IN_MS 3000
33
34struct amd_gpu_scheduler;
35struct amd_run_queue;
36
37/**
38 * A scheduler entity is a wrapper around a job queue or a group
39 * of other entities. Entities take turns emitting jobs from their
40 * job queues to corresponding hardware ring based on scheduling
41 * policy.
42*/
43struct amd_sched_entity {
44 struct list_head list;
45 struct amd_run_queue *belongto_rq;
46 struct amd_sched_entity *parent;
47};
48
49/**
50 * Run queue is a set of entities scheduling command submissions for
51 * one specific ring. It implements the scheduling policy that selects
52 * the next entity to emit commands from.
53*/
54struct amd_run_queue {
55 struct mutex lock;
56 atomic_t nr_entity;
57 struct amd_sched_entity head;
58 struct amd_sched_entity *current_entity;
59 /**
60 * Return 0 means this entity can be scheduled
61 * Return -1 means this entity cannot be scheduled for reasons,
62 * i.e, it is the head, or these is no job, etc
63 */
64 int (*check_entity_status)(struct amd_sched_entity *entity);
65};
66
67/**
68 * Context based scheduler entity, there can be multiple entities for
69 * each context, and one entity per ring
70*/
71struct amd_context_entity {
72 struct amd_sched_entity generic_entity;
73 spinlock_t lock;
74 /* the virtual_seq is unique per context per ring */
75 atomic64_t last_queued_v_seq;
76 atomic64_t last_emitted_v_seq;
Jammy Zhoua72ce6f2015-05-22 18:55:07 +080077 pid_t tgid;
78 uint32_t context_id;
79 /* the job_queue maintains the jobs submitted by clients */
80 struct kfifo job_queue;
81 spinlock_t queue_lock;
82 struct amd_gpu_scheduler *scheduler;
83 wait_queue_head_t wait_queue;
84 wait_queue_head_t wait_emit;
85 bool is_pending;
86};
87
88/**
89 * Define the backend operations called by the scheduler,
90 * these functions should be implemented in driver side
91*/
92struct amd_sched_backend_ops {
93 int (*prepare_job)(struct amd_gpu_scheduler *sched,
94 struct amd_context_entity *c_entity,
95 void *job);
96 void (*run_job)(struct amd_gpu_scheduler *sched,
97 struct amd_context_entity *c_entity,
98 void *job);
99 void (*process_job)(struct amd_gpu_scheduler *sched, void *job);
100};
101
102/**
103 * One scheduler is implemented for each hardware ring
104*/
105struct amd_gpu_scheduler {
106 void *device;
107 struct task_struct *thread;
108 struct amd_run_queue sched_rq;
109 struct amd_run_queue kernel_rq;
110 struct kfifo active_hw_rq;
111 struct amd_sched_backend_ops *ops;
112 uint32_t ring_id;
113 uint32_t granularity; /* in ms unit */
114 uint32_t preemption;
Jammy Zhou63ad8d52015-07-31 17:54:29 +0800115 atomic64_t last_handled_seq;
Jammy Zhoua72ce6f2015-05-22 18:55:07 +0800116 wait_queue_head_t wait_queue;
117 struct amd_context_entity *current_entity;
118 struct mutex sched_lock;
119 spinlock_t queue_lock;
120};
121
122
123struct amd_gpu_scheduler *amd_sched_create(void *device,
124 struct amd_sched_backend_ops *ops,
125 uint32_t ring,
126 uint32_t granularity,
Jammy Zhou4afcb302015-07-30 16:44:05 +0800127 uint32_t preemption,
128 uint32_t hw_submission);
Jammy Zhoua72ce6f2015-05-22 18:55:07 +0800129
130int amd_sched_destroy(struct amd_gpu_scheduler *sched);
131
Jammy Zhouea199cc2015-07-31 16:47:28 +0800132uint64_t amd_sched_push_job(struct amd_gpu_scheduler *sched,
Jammy Zhoua72ce6f2015-05-22 18:55:07 +0800133 struct amd_context_entity *c_entity,
134 void *job);
135
Jammy Zhoua72ce6f2015-05-22 18:55:07 +0800136int amd_sched_wait_emit(struct amd_context_entity *c_entity,
137 uint64_t seq,
138 bool intr,
139 long timeout);
140
141void amd_sched_isr(struct amd_gpu_scheduler *sched);
142uint64_t amd_sched_get_handled_seq(struct amd_gpu_scheduler *sched);
143
144int amd_context_entity_fini(struct amd_gpu_scheduler *sched,
145 struct amd_context_entity *entity);
146
147int amd_context_entity_init(struct amd_gpu_scheduler *sched,
148 struct amd_context_entity *entity,
149 struct amd_sched_entity *parent,
150 struct amd_run_queue *rq,
Jammy Zhou1333f722015-07-30 16:36:58 +0800151 uint32_t context_id,
152 uint32_t jobs);
Jammy Zhoua72ce6f2015-05-22 18:55:07 +0800153
Jammy Zhouf95b7e32015-07-31 17:18:15 +0800154void amd_sched_emit(struct amd_context_entity *c_entity, uint64_t seq);
155
Jammy Zhou27f66422015-08-03 10:27:57 +0800156uint64_t amd_sched_next_queued_seq(struct amd_context_entity *c_entity);
157
Jammy Zhoua72ce6f2015-05-22 18:55:07 +0800158#endif