Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 1 | /* |
Mike Frysinger | 26fdc1f | 2008-02-06 01:38:21 -0800 | [diff] [blame] | 2 | * Blackfin On-Chip SPI Driver |
Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 3 | * |
Bryan Wu | 131b17d | 2007-12-04 23:45:12 -0800 | [diff] [blame] | 4 | * Copyright 2004-2007 Analog Devices Inc. |
Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 5 | * |
Mike Frysinger | 26fdc1f | 2008-02-06 01:38:21 -0800 | [diff] [blame] | 6 | * Enter bugs at http://blackfin.uclinux.org/ |
Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 7 | * |
Mike Frysinger | 26fdc1f | 2008-02-06 01:38:21 -0800 | [diff] [blame] | 8 | * Licensed under the GPL-2 or later. |
Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 9 | */ |
| 10 | |
| 11 | #include <linux/init.h> |
| 12 | #include <linux/module.h> |
Bryan Wu | 131b17d | 2007-12-04 23:45:12 -0800 | [diff] [blame] | 13 | #include <linux/delay.h> |
Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 14 | #include <linux/device.h> |
Bryan Wu | 131b17d | 2007-12-04 23:45:12 -0800 | [diff] [blame] | 15 | #include <linux/io.h> |
Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 16 | #include <linux/ioport.h> |
Bryan Wu | 131b17d | 2007-12-04 23:45:12 -0800 | [diff] [blame] | 17 | #include <linux/irq.h> |
Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 18 | #include <linux/errno.h> |
| 19 | #include <linux/interrupt.h> |
| 20 | #include <linux/platform_device.h> |
| 21 | #include <linux/dma-mapping.h> |
| 22 | #include <linux/spi/spi.h> |
| 23 | #include <linux/workqueue.h> |
Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 24 | |
Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 25 | #include <asm/dma.h> |
Bryan Wu | 131b17d | 2007-12-04 23:45:12 -0800 | [diff] [blame] | 26 | #include <asm/portmux.h> |
Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 27 | #include <asm/bfin5xx_spi.h> |
| 28 | |
Bryan Wu | a32c691 | 2007-12-04 23:45:15 -0800 | [diff] [blame] | 29 | #define DRV_NAME "bfin-spi" |
| 30 | #define DRV_AUTHOR "Bryan Wu, Luke Yang" |
Will Newton | 6b1a802 | 2007-12-10 15:49:26 -0800 | [diff] [blame] | 31 | #define DRV_DESC "Blackfin BF5xx on-chip SPI Controller Driver" |
Bryan Wu | a32c691 | 2007-12-04 23:45:15 -0800 | [diff] [blame] | 32 | #define DRV_VERSION "1.0" |
| 33 | |
| 34 | MODULE_AUTHOR(DRV_AUTHOR); |
| 35 | MODULE_DESCRIPTION(DRV_DESC); |
Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 36 | MODULE_LICENSE("GPL"); |
| 37 | |
Bryan Wu | bb90eb0 | 2007-12-04 23:45:18 -0800 | [diff] [blame] | 38 | #define IS_DMA_ALIGNED(x) (((u32)(x)&0x07) == 0) |
Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 39 | |
Bryan Wu | bb90eb0 | 2007-12-04 23:45:18 -0800 | [diff] [blame] | 40 | #define START_STATE ((void *)0) |
| 41 | #define RUNNING_STATE ((void *)1) |
| 42 | #define DONE_STATE ((void *)2) |
| 43 | #define ERROR_STATE ((void *)-1) |
| 44 | #define QUEUE_RUNNING 0 |
| 45 | #define QUEUE_STOPPED 1 |
Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 46 | |
| 47 | struct driver_data { |
| 48 | /* Driver model hookup */ |
| 49 | struct platform_device *pdev; |
| 50 | |
| 51 | /* SPI framework hookup */ |
| 52 | struct spi_master *master; |
| 53 | |
Bryan Wu | bb90eb0 | 2007-12-04 23:45:18 -0800 | [diff] [blame] | 54 | /* Regs base of SPI controller */ |
Bryan Wu | f452126 | 2007-12-04 23:45:22 -0800 | [diff] [blame] | 55 | void __iomem *regs_base; |
Bryan Wu | bb90eb0 | 2007-12-04 23:45:18 -0800 | [diff] [blame] | 56 | |
Bryan Wu | 003d922 | 2007-12-04 23:45:22 -0800 | [diff] [blame] | 57 | /* Pin request list */ |
| 58 | u16 *pin_req; |
| 59 | |
Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 60 | /* BFIN hookup */ |
| 61 | struct bfin5xx_spi_master *master_info; |
| 62 | |
| 63 | /* Driver message queue */ |
| 64 | struct workqueue_struct *workqueue; |
| 65 | struct work_struct pump_messages; |
| 66 | spinlock_t lock; |
| 67 | struct list_head queue; |
| 68 | int busy; |
| 69 | int run; |
| 70 | |
| 71 | /* Message Transfer pump */ |
| 72 | struct tasklet_struct pump_transfers; |
| 73 | |
| 74 | /* Current message transfer state info */ |
| 75 | struct spi_message *cur_msg; |
| 76 | struct spi_transfer *cur_transfer; |
| 77 | struct chip_data *cur_chip; |
| 78 | size_t len_in_bytes; |
| 79 | size_t len; |
| 80 | void *tx; |
| 81 | void *tx_end; |
| 82 | void *rx; |
| 83 | void *rx_end; |
Bryan Wu | bb90eb0 | 2007-12-04 23:45:18 -0800 | [diff] [blame] | 84 | |
| 85 | /* DMA stuffs */ |
| 86 | int dma_channel; |
Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 87 | int dma_mapped; |
Bryan Wu | bb90eb0 | 2007-12-04 23:45:18 -0800 | [diff] [blame] | 88 | int dma_requested; |
Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 89 | dma_addr_t rx_dma; |
| 90 | dma_addr_t tx_dma; |
Bryan Wu | bb90eb0 | 2007-12-04 23:45:18 -0800 | [diff] [blame] | 91 | |
Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 92 | size_t rx_map_len; |
| 93 | size_t tx_map_len; |
| 94 | u8 n_bytes; |
Bryan Wu | fad91c8 | 2007-12-04 23:45:14 -0800 | [diff] [blame] | 95 | int cs_change; |
Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 96 | void (*write) (struct driver_data *); |
| 97 | void (*read) (struct driver_data *); |
| 98 | void (*duplex) (struct driver_data *); |
| 99 | }; |
| 100 | |
| 101 | struct chip_data { |
| 102 | u16 ctl_reg; |
| 103 | u16 baud; |
| 104 | u16 flag; |
| 105 | |
| 106 | u8 chip_select_num; |
| 107 | u8 n_bytes; |
Bryan Wu | 88b4036 | 2007-05-21 18:32:16 +0800 | [diff] [blame] | 108 | u8 width; /* 0 or 1 */ |
Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 109 | u8 enable_dma; |
| 110 | u8 bits_per_word; /* 8 or 16 */ |
| 111 | u8 cs_change_per_word; |
Bryan Wu | 62310e5 | 2007-12-04 23:45:20 -0800 | [diff] [blame] | 112 | u16 cs_chg_udelay; /* Some devices require > 255usec delay */ |
Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 113 | void (*write) (struct driver_data *); |
| 114 | void (*read) (struct driver_data *); |
| 115 | void (*duplex) (struct driver_data *); |
| 116 | }; |
| 117 | |
Bryan Wu | bb90eb0 | 2007-12-04 23:45:18 -0800 | [diff] [blame] | 118 | #define DEFINE_SPI_REG(reg, off) \ |
| 119 | static inline u16 read_##reg(struct driver_data *drv_data) \ |
| 120 | { return bfin_read16(drv_data->regs_base + off); } \ |
| 121 | static inline void write_##reg(struct driver_data *drv_data, u16 v) \ |
| 122 | { bfin_write16(drv_data->regs_base + off, v); } |
| 123 | |
| 124 | DEFINE_SPI_REG(CTRL, 0x00) |
| 125 | DEFINE_SPI_REG(FLAG, 0x04) |
| 126 | DEFINE_SPI_REG(STAT, 0x08) |
| 127 | DEFINE_SPI_REG(TDBR, 0x0C) |
| 128 | DEFINE_SPI_REG(RDBR, 0x10) |
| 129 | DEFINE_SPI_REG(BAUD, 0x14) |
| 130 | DEFINE_SPI_REG(SHAW, 0x18) |
| 131 | |
Bryan Wu | 88b4036 | 2007-05-21 18:32:16 +0800 | [diff] [blame] | 132 | static void bfin_spi_enable(struct driver_data *drv_data) |
Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 133 | { |
| 134 | u16 cr; |
| 135 | |
Bryan Wu | bb90eb0 | 2007-12-04 23:45:18 -0800 | [diff] [blame] | 136 | cr = read_CTRL(drv_data); |
| 137 | write_CTRL(drv_data, (cr | BIT_CTL_ENABLE)); |
Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 138 | } |
| 139 | |
Bryan Wu | 88b4036 | 2007-05-21 18:32:16 +0800 | [diff] [blame] | 140 | static void bfin_spi_disable(struct driver_data *drv_data) |
Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 141 | { |
| 142 | u16 cr; |
| 143 | |
Bryan Wu | bb90eb0 | 2007-12-04 23:45:18 -0800 | [diff] [blame] | 144 | cr = read_CTRL(drv_data); |
| 145 | write_CTRL(drv_data, (cr & (~BIT_CTL_ENABLE))); |
Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 146 | } |
| 147 | |
| 148 | /* Caculate the SPI_BAUD register value based on input HZ */ |
| 149 | static u16 hz_to_spi_baud(u32 speed_hz) |
| 150 | { |
| 151 | u_long sclk = get_sclk(); |
| 152 | u16 spi_baud = (sclk / (2 * speed_hz)); |
| 153 | |
| 154 | if ((sclk % (2 * speed_hz)) > 0) |
| 155 | spi_baud++; |
| 156 | |
Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 157 | return spi_baud; |
| 158 | } |
| 159 | |
| 160 | static int flush(struct driver_data *drv_data) |
| 161 | { |
| 162 | unsigned long limit = loops_per_jiffy << 1; |
| 163 | |
| 164 | /* wait for stop and clear stat */ |
Bryan Wu | bb90eb0 | 2007-12-04 23:45:18 -0800 | [diff] [blame] | 165 | while (!(read_STAT(drv_data) & BIT_STAT_SPIF) && limit--) |
Bryan Wu | d8c0500 | 2007-12-04 23:45:21 -0800 | [diff] [blame] | 166 | cpu_relax(); |
Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 167 | |
Bryan Wu | bb90eb0 | 2007-12-04 23:45:18 -0800 | [diff] [blame] | 168 | write_STAT(drv_data, BIT_STAT_CLR); |
Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 169 | |
| 170 | return limit; |
| 171 | } |
| 172 | |
Bryan Wu | fad91c8 | 2007-12-04 23:45:14 -0800 | [diff] [blame] | 173 | /* Chip select operation functions for cs_change flag */ |
Bryan Wu | bb90eb0 | 2007-12-04 23:45:18 -0800 | [diff] [blame] | 174 | static void cs_active(struct driver_data *drv_data, struct chip_data *chip) |
Bryan Wu | fad91c8 | 2007-12-04 23:45:14 -0800 | [diff] [blame] | 175 | { |
Bryan Wu | bb90eb0 | 2007-12-04 23:45:18 -0800 | [diff] [blame] | 176 | u16 flag = read_FLAG(drv_data); |
Bryan Wu | fad91c8 | 2007-12-04 23:45:14 -0800 | [diff] [blame] | 177 | |
| 178 | flag |= chip->flag; |
| 179 | flag &= ~(chip->flag << 8); |
| 180 | |
Bryan Wu | bb90eb0 | 2007-12-04 23:45:18 -0800 | [diff] [blame] | 181 | write_FLAG(drv_data, flag); |
Bryan Wu | fad91c8 | 2007-12-04 23:45:14 -0800 | [diff] [blame] | 182 | } |
| 183 | |
Bryan Wu | bb90eb0 | 2007-12-04 23:45:18 -0800 | [diff] [blame] | 184 | static void cs_deactive(struct driver_data *drv_data, struct chip_data *chip) |
Bryan Wu | fad91c8 | 2007-12-04 23:45:14 -0800 | [diff] [blame] | 185 | { |
Bryan Wu | bb90eb0 | 2007-12-04 23:45:18 -0800 | [diff] [blame] | 186 | u16 flag = read_FLAG(drv_data); |
Bryan Wu | fad91c8 | 2007-12-04 23:45:14 -0800 | [diff] [blame] | 187 | |
| 188 | flag |= (chip->flag << 8); |
| 189 | |
Bryan Wu | bb90eb0 | 2007-12-04 23:45:18 -0800 | [diff] [blame] | 190 | write_FLAG(drv_data, flag); |
Bryan Wu | 62310e5 | 2007-12-04 23:45:20 -0800 | [diff] [blame] | 191 | |
| 192 | /* Move delay here for consistency */ |
| 193 | if (chip->cs_chg_udelay) |
| 194 | udelay(chip->cs_chg_udelay); |
Bryan Wu | fad91c8 | 2007-12-04 23:45:14 -0800 | [diff] [blame] | 195 | } |
| 196 | |
Sonic Zhang | 7c4ef09 | 2007-12-04 23:45:16 -0800 | [diff] [blame] | 197 | #define MAX_SPI_SSEL 7 |
Bryan Wu | 5fec5b5 | 2007-12-04 23:45:13 -0800 | [diff] [blame] | 198 | |
Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 199 | /* stop controller and re-config current chip*/ |
Bryan Wu | 8d20d0a | 2008-02-06 01:38:17 -0800 | [diff] [blame] | 200 | static void restore_state(struct driver_data *drv_data) |
Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 201 | { |
| 202 | struct chip_data *chip = drv_data->cur_chip; |
| 203 | |
| 204 | /* Clear status and disable clock */ |
Bryan Wu | bb90eb0 | 2007-12-04 23:45:18 -0800 | [diff] [blame] | 205 | write_STAT(drv_data, BIT_STAT_CLR); |
Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 206 | bfin_spi_disable(drv_data); |
Bryan Wu | 88b4036 | 2007-05-21 18:32:16 +0800 | [diff] [blame] | 207 | dev_dbg(&drv_data->pdev->dev, "restoring spi ctl state\n"); |
Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 208 | |
Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 209 | /* Load the registers */ |
Bryan Wu | bb90eb0 | 2007-12-04 23:45:18 -0800 | [diff] [blame] | 210 | write_CTRL(drv_data, chip->ctl_reg); |
Bryan Wu | 092e1fd | 2007-12-04 23:45:23 -0800 | [diff] [blame] | 211 | write_BAUD(drv_data, chip->baud); |
Sonic Zhang | cc487e7 | 2007-12-04 23:45:17 -0800 | [diff] [blame] | 212 | |
| 213 | bfin_spi_enable(drv_data); |
Sonic Zhang | 07612e5 | 2007-12-04 23:45:21 -0800 | [diff] [blame] | 214 | cs_active(drv_data, chip); |
Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 215 | } |
| 216 | |
| 217 | /* used to kick off transfer in rx mode */ |
Bryan Wu | bb90eb0 | 2007-12-04 23:45:18 -0800 | [diff] [blame] | 218 | static unsigned short dummy_read(struct driver_data *drv_data) |
Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 219 | { |
| 220 | unsigned short tmp; |
Bryan Wu | bb90eb0 | 2007-12-04 23:45:18 -0800 | [diff] [blame] | 221 | tmp = read_RDBR(drv_data); |
Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 222 | return tmp; |
| 223 | } |
| 224 | |
| 225 | static void null_writer(struct driver_data *drv_data) |
| 226 | { |
| 227 | u8 n_bytes = drv_data->n_bytes; |
| 228 | |
| 229 | while (drv_data->tx < drv_data->tx_end) { |
Bryan Wu | bb90eb0 | 2007-12-04 23:45:18 -0800 | [diff] [blame] | 230 | write_TDBR(drv_data, 0); |
| 231 | while ((read_STAT(drv_data) & BIT_STAT_TXS)) |
Bryan Wu | d8c0500 | 2007-12-04 23:45:21 -0800 | [diff] [blame] | 232 | cpu_relax(); |
Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 233 | drv_data->tx += n_bytes; |
| 234 | } |
| 235 | } |
| 236 | |
| 237 | static void null_reader(struct driver_data *drv_data) |
| 238 | { |
| 239 | u8 n_bytes = drv_data->n_bytes; |
Bryan Wu | bb90eb0 | 2007-12-04 23:45:18 -0800 | [diff] [blame] | 240 | dummy_read(drv_data); |
Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 241 | |
| 242 | while (drv_data->rx < drv_data->rx_end) { |
Bryan Wu | bb90eb0 | 2007-12-04 23:45:18 -0800 | [diff] [blame] | 243 | while (!(read_STAT(drv_data) & BIT_STAT_RXS)) |
Bryan Wu | d8c0500 | 2007-12-04 23:45:21 -0800 | [diff] [blame] | 244 | cpu_relax(); |
Bryan Wu | bb90eb0 | 2007-12-04 23:45:18 -0800 | [diff] [blame] | 245 | dummy_read(drv_data); |
Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 246 | drv_data->rx += n_bytes; |
| 247 | } |
| 248 | } |
| 249 | |
| 250 | static void u8_writer(struct driver_data *drv_data) |
| 251 | { |
Bryan Wu | 131b17d | 2007-12-04 23:45:12 -0800 | [diff] [blame] | 252 | dev_dbg(&drv_data->pdev->dev, |
Bryan Wu | bb90eb0 | 2007-12-04 23:45:18 -0800 | [diff] [blame] | 253 | "cr8-s is 0x%x\n", read_STAT(drv_data)); |
Sonic Zhang | cc487e7 | 2007-12-04 23:45:17 -0800 | [diff] [blame] | 254 | |
Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 255 | while (drv_data->tx < drv_data->tx_end) { |
Bryan Wu | bb90eb0 | 2007-12-04 23:45:18 -0800 | [diff] [blame] | 256 | write_TDBR(drv_data, (*(u8 *) (drv_data->tx))); |
| 257 | while (read_STAT(drv_data) & BIT_STAT_TXS) |
Bryan Wu | d8c0500 | 2007-12-04 23:45:21 -0800 | [diff] [blame] | 258 | cpu_relax(); |
Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 259 | ++drv_data->tx; |
| 260 | } |
Sonic Zhang | 13f3e64 | 2008-02-06 01:38:20 -0800 | [diff] [blame] | 261 | |
| 262 | /* poll for SPI completion before return */ |
| 263 | while (!(read_STAT(drv_data) & BIT_STAT_SPIF)) |
| 264 | cpu_relax(); |
Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 265 | } |
| 266 | |
| 267 | static void u8_cs_chg_writer(struct driver_data *drv_data) |
| 268 | { |
| 269 | struct chip_data *chip = drv_data->cur_chip; |
| 270 | |
| 271 | while (drv_data->tx < drv_data->tx_end) { |
Bryan Wu | bb90eb0 | 2007-12-04 23:45:18 -0800 | [diff] [blame] | 272 | cs_active(drv_data, chip); |
Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 273 | |
Bryan Wu | bb90eb0 | 2007-12-04 23:45:18 -0800 | [diff] [blame] | 274 | write_TDBR(drv_data, (*(u8 *) (drv_data->tx))); |
| 275 | while (read_STAT(drv_data) & BIT_STAT_TXS) |
Bryan Wu | d8c0500 | 2007-12-04 23:45:21 -0800 | [diff] [blame] | 276 | cpu_relax(); |
Bryan Wu | e26aa01 | 2008-02-06 01:38:18 -0800 | [diff] [blame] | 277 | while (!(read_STAT(drv_data) & BIT_STAT_SPIF)) |
| 278 | cpu_relax(); |
Bryan Wu | 62310e5 | 2007-12-04 23:45:20 -0800 | [diff] [blame] | 279 | |
Bryan Wu | bb90eb0 | 2007-12-04 23:45:18 -0800 | [diff] [blame] | 280 | cs_deactive(drv_data, chip); |
Bryan Wu | 5fec5b5 | 2007-12-04 23:45:13 -0800 | [diff] [blame] | 281 | |
Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 282 | ++drv_data->tx; |
| 283 | } |
Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 284 | } |
| 285 | |
| 286 | static void u8_reader(struct driver_data *drv_data) |
| 287 | { |
Bryan Wu | 131b17d | 2007-12-04 23:45:12 -0800 | [diff] [blame] | 288 | dev_dbg(&drv_data->pdev->dev, |
Bryan Wu | bb90eb0 | 2007-12-04 23:45:18 -0800 | [diff] [blame] | 289 | "cr-8 is 0x%x\n", read_STAT(drv_data)); |
Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 290 | |
Sonic Zhang | 3f479a6 | 2007-12-04 23:45:18 -0800 | [diff] [blame] | 291 | /* poll for SPI completion before start */ |
Bryan Wu | bb90eb0 | 2007-12-04 23:45:18 -0800 | [diff] [blame] | 292 | while (!(read_STAT(drv_data) & BIT_STAT_SPIF)) |
Bryan Wu | d8c0500 | 2007-12-04 23:45:21 -0800 | [diff] [blame] | 293 | cpu_relax(); |
Sonic Zhang | 3f479a6 | 2007-12-04 23:45:18 -0800 | [diff] [blame] | 294 | |
Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 295 | /* clear TDBR buffer before read(else it will be shifted out) */ |
Bryan Wu | bb90eb0 | 2007-12-04 23:45:18 -0800 | [diff] [blame] | 296 | write_TDBR(drv_data, 0xFFFF); |
Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 297 | |
Bryan Wu | bb90eb0 | 2007-12-04 23:45:18 -0800 | [diff] [blame] | 298 | dummy_read(drv_data); |
Sonic Zhang | cc487e7 | 2007-12-04 23:45:17 -0800 | [diff] [blame] | 299 | |
Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 300 | while (drv_data->rx < drv_data->rx_end - 1) { |
Bryan Wu | bb90eb0 | 2007-12-04 23:45:18 -0800 | [diff] [blame] | 301 | while (!(read_STAT(drv_data) & BIT_STAT_RXS)) |
Bryan Wu | d8c0500 | 2007-12-04 23:45:21 -0800 | [diff] [blame] | 302 | cpu_relax(); |
Bryan Wu | bb90eb0 | 2007-12-04 23:45:18 -0800 | [diff] [blame] | 303 | *(u8 *) (drv_data->rx) = read_RDBR(drv_data); |
Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 304 | ++drv_data->rx; |
| 305 | } |
| 306 | |
Bryan Wu | bb90eb0 | 2007-12-04 23:45:18 -0800 | [diff] [blame] | 307 | while (!(read_STAT(drv_data) & BIT_STAT_RXS)) |
Bryan Wu | d8c0500 | 2007-12-04 23:45:21 -0800 | [diff] [blame] | 308 | cpu_relax(); |
Bryan Wu | bb90eb0 | 2007-12-04 23:45:18 -0800 | [diff] [blame] | 309 | *(u8 *) (drv_data->rx) = read_SHAW(drv_data); |
Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 310 | ++drv_data->rx; |
| 311 | } |
| 312 | |
| 313 | static void u8_cs_chg_reader(struct driver_data *drv_data) |
| 314 | { |
| 315 | struct chip_data *chip = drv_data->cur_chip; |
| 316 | |
Bryan Wu | e26aa01 | 2008-02-06 01:38:18 -0800 | [diff] [blame] | 317 | while (drv_data->rx < drv_data->rx_end) { |
| 318 | cs_active(drv_data, chip); |
| 319 | read_RDBR(drv_data); /* kick off */ |
Bryan Wu | 5fec5b5 | 2007-12-04 23:45:13 -0800 | [diff] [blame] | 320 | |
Bryan Wu | bb90eb0 | 2007-12-04 23:45:18 -0800 | [diff] [blame] | 321 | while (!(read_STAT(drv_data) & BIT_STAT_RXS)) |
Bryan Wu | d8c0500 | 2007-12-04 23:45:21 -0800 | [diff] [blame] | 322 | cpu_relax(); |
Bryan Wu | e26aa01 | 2008-02-06 01:38:18 -0800 | [diff] [blame] | 323 | while (!(read_STAT(drv_data) & BIT_STAT_SPIF)) |
| 324 | cpu_relax(); |
| 325 | |
| 326 | *(u8 *) (drv_data->rx) = read_SHAW(drv_data); |
| 327 | cs_deactive(drv_data, chip); |
| 328 | |
Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 329 | ++drv_data->rx; |
| 330 | } |
Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 331 | } |
| 332 | |
| 333 | static void u8_duplex(struct driver_data *drv_data) |
| 334 | { |
| 335 | /* in duplex mode, clk is triggered by writing of TDBR */ |
| 336 | while (drv_data->rx < drv_data->rx_end) { |
Bryan Wu | bb90eb0 | 2007-12-04 23:45:18 -0800 | [diff] [blame] | 337 | write_TDBR(drv_data, (*(u8 *) (drv_data->tx))); |
Bryan Wu | 4fd432d | 2008-02-06 01:38:19 -0800 | [diff] [blame] | 338 | while (!(read_STAT(drv_data) & BIT_STAT_SPIF)) |
Bryan Wu | d8c0500 | 2007-12-04 23:45:21 -0800 | [diff] [blame] | 339 | cpu_relax(); |
Bryan Wu | bb90eb0 | 2007-12-04 23:45:18 -0800 | [diff] [blame] | 340 | while (!(read_STAT(drv_data) & BIT_STAT_RXS)) |
Bryan Wu | d8c0500 | 2007-12-04 23:45:21 -0800 | [diff] [blame] | 341 | cpu_relax(); |
Bryan Wu | bb90eb0 | 2007-12-04 23:45:18 -0800 | [diff] [blame] | 342 | *(u8 *) (drv_data->rx) = read_RDBR(drv_data); |
Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 343 | ++drv_data->rx; |
| 344 | ++drv_data->tx; |
| 345 | } |
| 346 | } |
| 347 | |
| 348 | static void u8_cs_chg_duplex(struct driver_data *drv_data) |
| 349 | { |
| 350 | struct chip_data *chip = drv_data->cur_chip; |
| 351 | |
| 352 | while (drv_data->rx < drv_data->rx_end) { |
Bryan Wu | bb90eb0 | 2007-12-04 23:45:18 -0800 | [diff] [blame] | 353 | cs_active(drv_data, chip); |
Bryan Wu | 5fec5b5 | 2007-12-04 23:45:13 -0800 | [diff] [blame] | 354 | |
Bryan Wu | bb90eb0 | 2007-12-04 23:45:18 -0800 | [diff] [blame] | 355 | write_TDBR(drv_data, (*(u8 *) (drv_data->tx))); |
Bryan Wu | e26aa01 | 2008-02-06 01:38:18 -0800 | [diff] [blame] | 356 | |
| 357 | while (!(read_STAT(drv_data) & BIT_STAT_SPIF)) |
Bryan Wu | d8c0500 | 2007-12-04 23:45:21 -0800 | [diff] [blame] | 358 | cpu_relax(); |
Bryan Wu | bb90eb0 | 2007-12-04 23:45:18 -0800 | [diff] [blame] | 359 | while (!(read_STAT(drv_data) & BIT_STAT_RXS)) |
Bryan Wu | d8c0500 | 2007-12-04 23:45:21 -0800 | [diff] [blame] | 360 | cpu_relax(); |
Bryan Wu | bb90eb0 | 2007-12-04 23:45:18 -0800 | [diff] [blame] | 361 | *(u8 *) (drv_data->rx) = read_RDBR(drv_data); |
Bryan Wu | 62310e5 | 2007-12-04 23:45:20 -0800 | [diff] [blame] | 362 | |
Bryan Wu | bb90eb0 | 2007-12-04 23:45:18 -0800 | [diff] [blame] | 363 | cs_deactive(drv_data, chip); |
Bryan Wu | 5fec5b5 | 2007-12-04 23:45:13 -0800 | [diff] [blame] | 364 | |
Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 365 | ++drv_data->rx; |
| 366 | ++drv_data->tx; |
| 367 | } |
Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 368 | } |
| 369 | |
| 370 | static void u16_writer(struct driver_data *drv_data) |
| 371 | { |
Bryan Wu | 131b17d | 2007-12-04 23:45:12 -0800 | [diff] [blame] | 372 | dev_dbg(&drv_data->pdev->dev, |
Bryan Wu | bb90eb0 | 2007-12-04 23:45:18 -0800 | [diff] [blame] | 373 | "cr16 is 0x%x\n", read_STAT(drv_data)); |
Bryan Wu | 88b4036 | 2007-05-21 18:32:16 +0800 | [diff] [blame] | 374 | |
Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 375 | while (drv_data->tx < drv_data->tx_end) { |
Bryan Wu | bb90eb0 | 2007-12-04 23:45:18 -0800 | [diff] [blame] | 376 | write_TDBR(drv_data, (*(u16 *) (drv_data->tx))); |
| 377 | while ((read_STAT(drv_data) & BIT_STAT_TXS)) |
Bryan Wu | d8c0500 | 2007-12-04 23:45:21 -0800 | [diff] [blame] | 378 | cpu_relax(); |
Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 379 | drv_data->tx += 2; |
| 380 | } |
Sonic Zhang | 13f3e64 | 2008-02-06 01:38:20 -0800 | [diff] [blame] | 381 | |
| 382 | /* poll for SPI completion before return */ |
| 383 | while (!(read_STAT(drv_data) & BIT_STAT_SPIF)) |
| 384 | cpu_relax(); |
Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 385 | } |
| 386 | |
| 387 | static void u16_cs_chg_writer(struct driver_data *drv_data) |
| 388 | { |
| 389 | struct chip_data *chip = drv_data->cur_chip; |
| 390 | |
| 391 | while (drv_data->tx < drv_data->tx_end) { |
Bryan Wu | bb90eb0 | 2007-12-04 23:45:18 -0800 | [diff] [blame] | 392 | cs_active(drv_data, chip); |
Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 393 | |
Bryan Wu | bb90eb0 | 2007-12-04 23:45:18 -0800 | [diff] [blame] | 394 | write_TDBR(drv_data, (*(u16 *) (drv_data->tx))); |
| 395 | while ((read_STAT(drv_data) & BIT_STAT_TXS)) |
Bryan Wu | d8c0500 | 2007-12-04 23:45:21 -0800 | [diff] [blame] | 396 | cpu_relax(); |
Sonic Zhang | 13f3e64 | 2008-02-06 01:38:20 -0800 | [diff] [blame] | 397 | while (!(read_STAT(drv_data) & BIT_STAT_SPIF)) |
| 398 | cpu_relax(); |
Bryan Wu | 62310e5 | 2007-12-04 23:45:20 -0800 | [diff] [blame] | 399 | |
Bryan Wu | bb90eb0 | 2007-12-04 23:45:18 -0800 | [diff] [blame] | 400 | cs_deactive(drv_data, chip); |
Bryan Wu | 5fec5b5 | 2007-12-04 23:45:13 -0800 | [diff] [blame] | 401 | |
Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 402 | drv_data->tx += 2; |
| 403 | } |
Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 404 | } |
| 405 | |
| 406 | static void u16_reader(struct driver_data *drv_data) |
| 407 | { |
Bryan Wu | 88b4036 | 2007-05-21 18:32:16 +0800 | [diff] [blame] | 408 | dev_dbg(&drv_data->pdev->dev, |
Bryan Wu | bb90eb0 | 2007-12-04 23:45:18 -0800 | [diff] [blame] | 409 | "cr-16 is 0x%x\n", read_STAT(drv_data)); |
Sonic Zhang | cc487e7 | 2007-12-04 23:45:17 -0800 | [diff] [blame] | 410 | |
Sonic Zhang | 3f479a6 | 2007-12-04 23:45:18 -0800 | [diff] [blame] | 411 | /* poll for SPI completion before start */ |
Bryan Wu | bb90eb0 | 2007-12-04 23:45:18 -0800 | [diff] [blame] | 412 | while (!(read_STAT(drv_data) & BIT_STAT_SPIF)) |
Bryan Wu | d8c0500 | 2007-12-04 23:45:21 -0800 | [diff] [blame] | 413 | cpu_relax(); |
Sonic Zhang | 3f479a6 | 2007-12-04 23:45:18 -0800 | [diff] [blame] | 414 | |
Sonic Zhang | cc487e7 | 2007-12-04 23:45:17 -0800 | [diff] [blame] | 415 | /* clear TDBR buffer before read(else it will be shifted out) */ |
Bryan Wu | bb90eb0 | 2007-12-04 23:45:18 -0800 | [diff] [blame] | 416 | write_TDBR(drv_data, 0xFFFF); |
Sonic Zhang | cc487e7 | 2007-12-04 23:45:17 -0800 | [diff] [blame] | 417 | |
Bryan Wu | bb90eb0 | 2007-12-04 23:45:18 -0800 | [diff] [blame] | 418 | dummy_read(drv_data); |
Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 419 | |
| 420 | while (drv_data->rx < (drv_data->rx_end - 2)) { |
Bryan Wu | bb90eb0 | 2007-12-04 23:45:18 -0800 | [diff] [blame] | 421 | while (!(read_STAT(drv_data) & BIT_STAT_RXS)) |
Bryan Wu | d8c0500 | 2007-12-04 23:45:21 -0800 | [diff] [blame] | 422 | cpu_relax(); |
Bryan Wu | bb90eb0 | 2007-12-04 23:45:18 -0800 | [diff] [blame] | 423 | *(u16 *) (drv_data->rx) = read_RDBR(drv_data); |
Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 424 | drv_data->rx += 2; |
| 425 | } |
| 426 | |
Bryan Wu | bb90eb0 | 2007-12-04 23:45:18 -0800 | [diff] [blame] | 427 | while (!(read_STAT(drv_data) & BIT_STAT_RXS)) |
Bryan Wu | d8c0500 | 2007-12-04 23:45:21 -0800 | [diff] [blame] | 428 | cpu_relax(); |
Bryan Wu | bb90eb0 | 2007-12-04 23:45:18 -0800 | [diff] [blame] | 429 | *(u16 *) (drv_data->rx) = read_SHAW(drv_data); |
Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 430 | drv_data->rx += 2; |
| 431 | } |
| 432 | |
| 433 | static void u16_cs_chg_reader(struct driver_data *drv_data) |
| 434 | { |
| 435 | struct chip_data *chip = drv_data->cur_chip; |
| 436 | |
Sonic Zhang | 3f479a6 | 2007-12-04 23:45:18 -0800 | [diff] [blame] | 437 | /* poll for SPI completion before start */ |
Bryan Wu | bb90eb0 | 2007-12-04 23:45:18 -0800 | [diff] [blame] | 438 | while (!(read_STAT(drv_data) & BIT_STAT_SPIF)) |
Bryan Wu | d8c0500 | 2007-12-04 23:45:21 -0800 | [diff] [blame] | 439 | cpu_relax(); |
Sonic Zhang | 3f479a6 | 2007-12-04 23:45:18 -0800 | [diff] [blame] | 440 | |
Sonic Zhang | cc487e7 | 2007-12-04 23:45:17 -0800 | [diff] [blame] | 441 | /* clear TDBR buffer before read(else it will be shifted out) */ |
Bryan Wu | bb90eb0 | 2007-12-04 23:45:18 -0800 | [diff] [blame] | 442 | write_TDBR(drv_data, 0xFFFF); |
Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 443 | |
Bryan Wu | bb90eb0 | 2007-12-04 23:45:18 -0800 | [diff] [blame] | 444 | cs_active(drv_data, chip); |
| 445 | dummy_read(drv_data); |
Sonic Zhang | cc487e7 | 2007-12-04 23:45:17 -0800 | [diff] [blame] | 446 | |
Bryan Wu | c3061ab | 2007-12-04 23:45:19 -0800 | [diff] [blame] | 447 | while (drv_data->rx < drv_data->rx_end - 2) { |
Bryan Wu | bb90eb0 | 2007-12-04 23:45:18 -0800 | [diff] [blame] | 448 | cs_deactive(drv_data, chip); |
Bryan Wu | 5fec5b5 | 2007-12-04 23:45:13 -0800 | [diff] [blame] | 449 | |
Bryan Wu | bb90eb0 | 2007-12-04 23:45:18 -0800 | [diff] [blame] | 450 | while (!(read_STAT(drv_data) & BIT_STAT_RXS)) |
Bryan Wu | d8c0500 | 2007-12-04 23:45:21 -0800 | [diff] [blame] | 451 | cpu_relax(); |
Bryan Wu | bb90eb0 | 2007-12-04 23:45:18 -0800 | [diff] [blame] | 452 | cs_active(drv_data, chip); |
| 453 | *(u16 *) (drv_data->rx) = read_RDBR(drv_data); |
Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 454 | drv_data->rx += 2; |
| 455 | } |
Bryan Wu | bb90eb0 | 2007-12-04 23:45:18 -0800 | [diff] [blame] | 456 | cs_deactive(drv_data, chip); |
Sonic Zhang | cc487e7 | 2007-12-04 23:45:17 -0800 | [diff] [blame] | 457 | |
Bryan Wu | bb90eb0 | 2007-12-04 23:45:18 -0800 | [diff] [blame] | 458 | while (!(read_STAT(drv_data) & BIT_STAT_RXS)) |
Bryan Wu | d8c0500 | 2007-12-04 23:45:21 -0800 | [diff] [blame] | 459 | cpu_relax(); |
Bryan Wu | bb90eb0 | 2007-12-04 23:45:18 -0800 | [diff] [blame] | 460 | *(u16 *) (drv_data->rx) = read_SHAW(drv_data); |
Sonic Zhang | cc487e7 | 2007-12-04 23:45:17 -0800 | [diff] [blame] | 461 | drv_data->rx += 2; |
Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 462 | } |
| 463 | |
| 464 | static void u16_duplex(struct driver_data *drv_data) |
| 465 | { |
| 466 | /* in duplex mode, clk is triggered by writing of TDBR */ |
| 467 | while (drv_data->tx < drv_data->tx_end) { |
Bryan Wu | bb90eb0 | 2007-12-04 23:45:18 -0800 | [diff] [blame] | 468 | write_TDBR(drv_data, (*(u16 *) (drv_data->tx))); |
Bryan Wu | 4fd432d | 2008-02-06 01:38:19 -0800 | [diff] [blame] | 469 | while (!(read_STAT(drv_data) & BIT_STAT_SPIF)) |
Bryan Wu | d8c0500 | 2007-12-04 23:45:21 -0800 | [diff] [blame] | 470 | cpu_relax(); |
Bryan Wu | bb90eb0 | 2007-12-04 23:45:18 -0800 | [diff] [blame] | 471 | while (!(read_STAT(drv_data) & BIT_STAT_RXS)) |
Bryan Wu | d8c0500 | 2007-12-04 23:45:21 -0800 | [diff] [blame] | 472 | cpu_relax(); |
Bryan Wu | bb90eb0 | 2007-12-04 23:45:18 -0800 | [diff] [blame] | 473 | *(u16 *) (drv_data->rx) = read_RDBR(drv_data); |
Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 474 | drv_data->rx += 2; |
| 475 | drv_data->tx += 2; |
| 476 | } |
| 477 | } |
| 478 | |
| 479 | static void u16_cs_chg_duplex(struct driver_data *drv_data) |
| 480 | { |
| 481 | struct chip_data *chip = drv_data->cur_chip; |
| 482 | |
| 483 | while (drv_data->tx < drv_data->tx_end) { |
Bryan Wu | bb90eb0 | 2007-12-04 23:45:18 -0800 | [diff] [blame] | 484 | cs_active(drv_data, chip); |
Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 485 | |
Bryan Wu | bb90eb0 | 2007-12-04 23:45:18 -0800 | [diff] [blame] | 486 | write_TDBR(drv_data, (*(u16 *) (drv_data->tx))); |
Bryan Wu | 4fd432d | 2008-02-06 01:38:19 -0800 | [diff] [blame] | 487 | while (!(read_STAT(drv_data) & BIT_STAT_SPIF)) |
Bryan Wu | d8c0500 | 2007-12-04 23:45:21 -0800 | [diff] [blame] | 488 | cpu_relax(); |
Bryan Wu | bb90eb0 | 2007-12-04 23:45:18 -0800 | [diff] [blame] | 489 | while (!(read_STAT(drv_data) & BIT_STAT_RXS)) |
Bryan Wu | d8c0500 | 2007-12-04 23:45:21 -0800 | [diff] [blame] | 490 | cpu_relax(); |
Bryan Wu | bb90eb0 | 2007-12-04 23:45:18 -0800 | [diff] [blame] | 491 | *(u16 *) (drv_data->rx) = read_RDBR(drv_data); |
Bryan Wu | 62310e5 | 2007-12-04 23:45:20 -0800 | [diff] [blame] | 492 | |
Bryan Wu | bb90eb0 | 2007-12-04 23:45:18 -0800 | [diff] [blame] | 493 | cs_deactive(drv_data, chip); |
Bryan Wu | 5fec5b5 | 2007-12-04 23:45:13 -0800 | [diff] [blame] | 494 | |
Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 495 | drv_data->rx += 2; |
| 496 | drv_data->tx += 2; |
| 497 | } |
Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 498 | } |
| 499 | |
| 500 | /* test if ther is more transfer to be done */ |
| 501 | static void *next_transfer(struct driver_data *drv_data) |
| 502 | { |
| 503 | struct spi_message *msg = drv_data->cur_msg; |
| 504 | struct spi_transfer *trans = drv_data->cur_transfer; |
| 505 | |
| 506 | /* Move to next transfer */ |
| 507 | if (trans->transfer_list.next != &msg->transfers) { |
| 508 | drv_data->cur_transfer = |
| 509 | list_entry(trans->transfer_list.next, |
| 510 | struct spi_transfer, transfer_list); |
| 511 | return RUNNING_STATE; |
| 512 | } else |
| 513 | return DONE_STATE; |
| 514 | } |
| 515 | |
| 516 | /* |
| 517 | * caller already set message->status; |
| 518 | * dma and pio irqs are blocked give finished message back |
| 519 | */ |
| 520 | static void giveback(struct driver_data *drv_data) |
| 521 | { |
Bryan Wu | fad91c8 | 2007-12-04 23:45:14 -0800 | [diff] [blame] | 522 | struct chip_data *chip = drv_data->cur_chip; |
Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 523 | struct spi_transfer *last_transfer; |
| 524 | unsigned long flags; |
| 525 | struct spi_message *msg; |
| 526 | |
| 527 | spin_lock_irqsave(&drv_data->lock, flags); |
| 528 | msg = drv_data->cur_msg; |
| 529 | drv_data->cur_msg = NULL; |
| 530 | drv_data->cur_transfer = NULL; |
| 531 | drv_data->cur_chip = NULL; |
| 532 | queue_work(drv_data->workqueue, &drv_data->pump_messages); |
| 533 | spin_unlock_irqrestore(&drv_data->lock, flags); |
| 534 | |
| 535 | last_transfer = list_entry(msg->transfers.prev, |
| 536 | struct spi_transfer, transfer_list); |
| 537 | |
| 538 | msg->state = NULL; |
| 539 | |
| 540 | /* disable chip select signal. And not stop spi in autobuffer mode */ |
| 541 | if (drv_data->tx_dma != 0xFFFF) { |
Bryan Wu | bb90eb0 | 2007-12-04 23:45:18 -0800 | [diff] [blame] | 542 | cs_deactive(drv_data, chip); |
Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 543 | bfin_spi_disable(drv_data); |
| 544 | } |
| 545 | |
Bryan Wu | fad91c8 | 2007-12-04 23:45:14 -0800 | [diff] [blame] | 546 | if (!drv_data->cs_change) |
Bryan Wu | bb90eb0 | 2007-12-04 23:45:18 -0800 | [diff] [blame] | 547 | cs_deactive(drv_data, chip); |
Bryan Wu | fad91c8 | 2007-12-04 23:45:14 -0800 | [diff] [blame] | 548 | |
Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 549 | if (msg->complete) |
| 550 | msg->complete(msg->context); |
| 551 | } |
| 552 | |
Bryan Wu | 88b4036 | 2007-05-21 18:32:16 +0800 | [diff] [blame] | 553 | static irqreturn_t dma_irq_handler(int irq, void *dev_id) |
Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 554 | { |
Jeff Garzik | 15aafa2 | 2008-02-06 01:36:20 -0800 | [diff] [blame] | 555 | struct driver_data *drv_data = dev_id; |
Bryan Wu | fad91c8 | 2007-12-04 23:45:14 -0800 | [diff] [blame] | 556 | struct chip_data *chip = drv_data->cur_chip; |
Bryan Wu | bb90eb0 | 2007-12-04 23:45:18 -0800 | [diff] [blame] | 557 | struct spi_message *msg = drv_data->cur_msg; |
Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 558 | |
Bryan Wu | 88b4036 | 2007-05-21 18:32:16 +0800 | [diff] [blame] | 559 | dev_dbg(&drv_data->pdev->dev, "in dma_irq_handler\n"); |
Bryan Wu | bb90eb0 | 2007-12-04 23:45:18 -0800 | [diff] [blame] | 560 | clear_dma_irqstat(drv_data->dma_channel); |
Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 561 | |
Bryan Wu | d6fe89b | 2007-06-11 17:34:17 +0800 | [diff] [blame] | 562 | /* Wait for DMA to complete */ |
Bryan Wu | bb90eb0 | 2007-12-04 23:45:18 -0800 | [diff] [blame] | 563 | while (get_dma_curr_irqstat(drv_data->dma_channel) & DMA_RUN) |
Bryan Wu | d8c0500 | 2007-12-04 23:45:21 -0800 | [diff] [blame] | 564 | cpu_relax(); |
Bryan Wu | d6fe89b | 2007-06-11 17:34:17 +0800 | [diff] [blame] | 565 | |
Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 566 | /* |
Bryan Wu | d6fe89b | 2007-06-11 17:34:17 +0800 | [diff] [blame] | 567 | * wait for the last transaction shifted out. HRM states: |
| 568 | * at this point there may still be data in the SPI DMA FIFO waiting |
| 569 | * to be transmitted ... software needs to poll TXS in the SPI_STAT |
| 570 | * register until it goes low for 2 successive reads |
Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 571 | */ |
| 572 | if (drv_data->tx != NULL) { |
Bryan Wu | bb90eb0 | 2007-12-04 23:45:18 -0800 | [diff] [blame] | 573 | while ((read_STAT(drv_data) & TXS) || |
| 574 | (read_STAT(drv_data) & TXS)) |
Bryan Wu | d8c0500 | 2007-12-04 23:45:21 -0800 | [diff] [blame] | 575 | cpu_relax(); |
Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 576 | } |
| 577 | |
Bryan Wu | bb90eb0 | 2007-12-04 23:45:18 -0800 | [diff] [blame] | 578 | while (!(read_STAT(drv_data) & SPIF)) |
Bryan Wu | d8c0500 | 2007-12-04 23:45:21 -0800 | [diff] [blame] | 579 | cpu_relax(); |
Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 580 | |
Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 581 | msg->actual_length += drv_data->len_in_bytes; |
| 582 | |
Bryan Wu | fad91c8 | 2007-12-04 23:45:14 -0800 | [diff] [blame] | 583 | if (drv_data->cs_change) |
Bryan Wu | bb90eb0 | 2007-12-04 23:45:18 -0800 | [diff] [blame] | 584 | cs_deactive(drv_data, chip); |
Bryan Wu | fad91c8 | 2007-12-04 23:45:14 -0800 | [diff] [blame] | 585 | |
Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 586 | /* Move to next transfer */ |
| 587 | msg->state = next_transfer(drv_data); |
| 588 | |
| 589 | /* Schedule transfer tasklet */ |
| 590 | tasklet_schedule(&drv_data->pump_transfers); |
| 591 | |
| 592 | /* free the irq handler before next transfer */ |
Bryan Wu | 88b4036 | 2007-05-21 18:32:16 +0800 | [diff] [blame] | 593 | dev_dbg(&drv_data->pdev->dev, |
| 594 | "disable dma channel irq%d\n", |
Bryan Wu | bb90eb0 | 2007-12-04 23:45:18 -0800 | [diff] [blame] | 595 | drv_data->dma_channel); |
| 596 | dma_disable_irq(drv_data->dma_channel); |
Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 597 | |
| 598 | return IRQ_HANDLED; |
| 599 | } |
| 600 | |
| 601 | static void pump_transfers(unsigned long data) |
| 602 | { |
| 603 | struct driver_data *drv_data = (struct driver_data *)data; |
| 604 | struct spi_message *message = NULL; |
| 605 | struct spi_transfer *transfer = NULL; |
| 606 | struct spi_transfer *previous = NULL; |
| 607 | struct chip_data *chip = NULL; |
Bryan Wu | 88b4036 | 2007-05-21 18:32:16 +0800 | [diff] [blame] | 608 | u8 width; |
| 609 | u16 cr, dma_width, dma_config; |
Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 610 | u32 tranf_success = 1; |
| 611 | |
| 612 | /* Get current state information */ |
| 613 | message = drv_data->cur_msg; |
| 614 | transfer = drv_data->cur_transfer; |
| 615 | chip = drv_data->cur_chip; |
Bryan Wu | 092e1fd | 2007-12-04 23:45:23 -0800 | [diff] [blame] | 616 | |
Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 617 | /* |
| 618 | * if msg is error or done, report it back using complete() callback |
| 619 | */ |
| 620 | |
| 621 | /* Handle for abort */ |
| 622 | if (message->state == ERROR_STATE) { |
| 623 | message->status = -EIO; |
| 624 | giveback(drv_data); |
| 625 | return; |
| 626 | } |
| 627 | |
| 628 | /* Handle end of message */ |
| 629 | if (message->state == DONE_STATE) { |
| 630 | message->status = 0; |
| 631 | giveback(drv_data); |
| 632 | return; |
| 633 | } |
| 634 | |
| 635 | /* Delay if requested at end of transfer */ |
| 636 | if (message->state == RUNNING_STATE) { |
| 637 | previous = list_entry(transfer->transfer_list.prev, |
| 638 | struct spi_transfer, transfer_list); |
| 639 | if (previous->delay_usecs) |
| 640 | udelay(previous->delay_usecs); |
| 641 | } |
| 642 | |
| 643 | /* Setup the transfer state based on the type of transfer */ |
| 644 | if (flush(drv_data) == 0) { |
| 645 | dev_err(&drv_data->pdev->dev, "pump_transfers: flush failed\n"); |
| 646 | message->status = -EIO; |
| 647 | giveback(drv_data); |
| 648 | return; |
| 649 | } |
| 650 | |
| 651 | if (transfer->tx_buf != NULL) { |
| 652 | drv_data->tx = (void *)transfer->tx_buf; |
| 653 | drv_data->tx_end = drv_data->tx + transfer->len; |
Bryan Wu | 88b4036 | 2007-05-21 18:32:16 +0800 | [diff] [blame] | 654 | dev_dbg(&drv_data->pdev->dev, "tx_buf is %p, tx_end is %p\n", |
| 655 | transfer->tx_buf, drv_data->tx_end); |
Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 656 | } else { |
| 657 | drv_data->tx = NULL; |
| 658 | } |
| 659 | |
| 660 | if (transfer->rx_buf != NULL) { |
| 661 | drv_data->rx = transfer->rx_buf; |
| 662 | drv_data->rx_end = drv_data->rx + transfer->len; |
Bryan Wu | 88b4036 | 2007-05-21 18:32:16 +0800 | [diff] [blame] | 663 | dev_dbg(&drv_data->pdev->dev, "rx_buf is %p, rx_end is %p\n", |
| 664 | transfer->rx_buf, drv_data->rx_end); |
Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 665 | } else { |
| 666 | drv_data->rx = NULL; |
| 667 | } |
| 668 | |
| 669 | drv_data->rx_dma = transfer->rx_dma; |
| 670 | drv_data->tx_dma = transfer->tx_dma; |
| 671 | drv_data->len_in_bytes = transfer->len; |
Bryan Wu | fad91c8 | 2007-12-04 23:45:14 -0800 | [diff] [blame] | 672 | drv_data->cs_change = transfer->cs_change; |
Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 673 | |
Bryan Wu | 092e1fd | 2007-12-04 23:45:23 -0800 | [diff] [blame] | 674 | /* Bits per word setup */ |
| 675 | switch (transfer->bits_per_word) { |
| 676 | case 8: |
| 677 | drv_data->n_bytes = 1; |
| 678 | width = CFG_SPI_WORDSIZE8; |
| 679 | drv_data->read = chip->cs_change_per_word ? |
| 680 | u8_cs_chg_reader : u8_reader; |
| 681 | drv_data->write = chip->cs_change_per_word ? |
| 682 | u8_cs_chg_writer : u8_writer; |
| 683 | drv_data->duplex = chip->cs_change_per_word ? |
| 684 | u8_cs_chg_duplex : u8_duplex; |
| 685 | break; |
| 686 | |
| 687 | case 16: |
| 688 | drv_data->n_bytes = 2; |
| 689 | width = CFG_SPI_WORDSIZE16; |
| 690 | drv_data->read = chip->cs_change_per_word ? |
| 691 | u16_cs_chg_reader : u16_reader; |
| 692 | drv_data->write = chip->cs_change_per_word ? |
| 693 | u16_cs_chg_writer : u16_writer; |
| 694 | drv_data->duplex = chip->cs_change_per_word ? |
| 695 | u16_cs_chg_duplex : u16_duplex; |
| 696 | break; |
| 697 | |
| 698 | default: |
| 699 | /* No change, the same as default setting */ |
| 700 | drv_data->n_bytes = chip->n_bytes; |
| 701 | width = chip->width; |
| 702 | drv_data->write = drv_data->tx ? chip->write : null_writer; |
| 703 | drv_data->read = drv_data->rx ? chip->read : null_reader; |
| 704 | drv_data->duplex = chip->duplex ? chip->duplex : null_writer; |
| 705 | break; |
| 706 | } |
| 707 | cr = (read_CTRL(drv_data) & (~BIT_CTL_TIMOD)); |
| 708 | cr |= (width << 8); |
| 709 | write_CTRL(drv_data, cr); |
| 710 | |
Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 711 | if (width == CFG_SPI_WORDSIZE16) { |
| 712 | drv_data->len = (transfer->len) >> 1; |
| 713 | } else { |
| 714 | drv_data->len = transfer->len; |
| 715 | } |
Mike Frysinger | 4fb98ef | 2008-04-08 17:41:57 -0700 | [diff] [blame] | 716 | dev_dbg(&drv_data->pdev->dev, |
| 717 | "transfer: drv_data->write is %p, chip->write is %p, null_wr is %p\n", |
Bryan Wu | 131b17d | 2007-12-04 23:45:12 -0800 | [diff] [blame] | 718 | drv_data->write, chip->write, null_writer); |
Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 719 | |
| 720 | /* speed and width has been set on per message */ |
| 721 | message->state = RUNNING_STATE; |
| 722 | dma_config = 0; |
| 723 | |
Bryan Wu | 092e1fd | 2007-12-04 23:45:23 -0800 | [diff] [blame] | 724 | /* Speed setup (surely valid because already checked) */ |
| 725 | if (transfer->speed_hz) |
| 726 | write_BAUD(drv_data, hz_to_spi_baud(transfer->speed_hz)); |
| 727 | else |
| 728 | write_BAUD(drv_data, chip->baud); |
| 729 | |
Bryan Wu | bb90eb0 | 2007-12-04 23:45:18 -0800 | [diff] [blame] | 730 | write_STAT(drv_data, BIT_STAT_CLR); |
| 731 | cr = (read_CTRL(drv_data) & (~BIT_CTL_TIMOD)); |
| 732 | cs_active(drv_data, chip); |
Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 733 | |
Bryan Wu | 88b4036 | 2007-05-21 18:32:16 +0800 | [diff] [blame] | 734 | dev_dbg(&drv_data->pdev->dev, |
| 735 | "now pumping a transfer: width is %d, len is %d\n", |
| 736 | width, transfer->len); |
Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 737 | |
| 738 | /* |
| 739 | * Try to map dma buffer and do a dma transfer if |
| 740 | * successful use different way to r/w according to |
| 741 | * drv_data->cur_chip->enable_dma |
| 742 | */ |
| 743 | if (drv_data->cur_chip->enable_dma && drv_data->len > 6) { |
| 744 | |
Bryan Wu | bb90eb0 | 2007-12-04 23:45:18 -0800 | [diff] [blame] | 745 | disable_dma(drv_data->dma_channel); |
| 746 | clear_dma_irqstat(drv_data->dma_channel); |
Sonic Zhang | 07612e5 | 2007-12-04 23:45:21 -0800 | [diff] [blame] | 747 | bfin_spi_disable(drv_data); |
Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 748 | |
| 749 | /* config dma channel */ |
Bryan Wu | 88b4036 | 2007-05-21 18:32:16 +0800 | [diff] [blame] | 750 | dev_dbg(&drv_data->pdev->dev, "doing dma transfer\n"); |
Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 751 | if (width == CFG_SPI_WORDSIZE16) { |
Bryan Wu | bb90eb0 | 2007-12-04 23:45:18 -0800 | [diff] [blame] | 752 | set_dma_x_count(drv_data->dma_channel, drv_data->len); |
| 753 | set_dma_x_modify(drv_data->dma_channel, 2); |
Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 754 | dma_width = WDSIZE_16; |
| 755 | } else { |
Bryan Wu | bb90eb0 | 2007-12-04 23:45:18 -0800 | [diff] [blame] | 756 | set_dma_x_count(drv_data->dma_channel, drv_data->len); |
| 757 | set_dma_x_modify(drv_data->dma_channel, 1); |
Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 758 | dma_width = WDSIZE_8; |
| 759 | } |
| 760 | |
Sonic Zhang | 3f479a6 | 2007-12-04 23:45:18 -0800 | [diff] [blame] | 761 | /* poll for SPI completion before start */ |
Bryan Wu | bb90eb0 | 2007-12-04 23:45:18 -0800 | [diff] [blame] | 762 | while (!(read_STAT(drv_data) & BIT_STAT_SPIF)) |
Bryan Wu | d8c0500 | 2007-12-04 23:45:21 -0800 | [diff] [blame] | 763 | cpu_relax(); |
Sonic Zhang | 3f479a6 | 2007-12-04 23:45:18 -0800 | [diff] [blame] | 764 | |
Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 765 | /* dirty hack for autobuffer DMA mode */ |
| 766 | if (drv_data->tx_dma == 0xFFFF) { |
Bryan Wu | 88b4036 | 2007-05-21 18:32:16 +0800 | [diff] [blame] | 767 | dev_dbg(&drv_data->pdev->dev, |
| 768 | "doing autobuffer DMA out.\n"); |
Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 769 | |
| 770 | /* no irq in autobuffer mode */ |
| 771 | dma_config = |
| 772 | (DMAFLOW_AUTO | RESTART | dma_width | DI_EN); |
Bryan Wu | bb90eb0 | 2007-12-04 23:45:18 -0800 | [diff] [blame] | 773 | set_dma_config(drv_data->dma_channel, dma_config); |
| 774 | set_dma_start_addr(drv_data->dma_channel, |
Bryan Wu | a32c691 | 2007-12-04 23:45:15 -0800 | [diff] [blame] | 775 | (unsigned long)drv_data->tx); |
Bryan Wu | bb90eb0 | 2007-12-04 23:45:18 -0800 | [diff] [blame] | 776 | enable_dma(drv_data->dma_channel); |
Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 777 | |
Sonic Zhang | 07612e5 | 2007-12-04 23:45:21 -0800 | [diff] [blame] | 778 | /* start SPI transfer */ |
| 779 | write_CTRL(drv_data, |
| 780 | (cr | CFG_SPI_DMAWRITE | BIT_CTL_ENABLE)); |
| 781 | |
| 782 | /* just return here, there can only be one transfer |
| 783 | * in this mode |
| 784 | */ |
Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 785 | message->status = 0; |
| 786 | giveback(drv_data); |
| 787 | return; |
| 788 | } |
| 789 | |
| 790 | /* In dma mode, rx or tx must be NULL in one transfer */ |
| 791 | if (drv_data->rx != NULL) { |
| 792 | /* set transfer mode, and enable SPI */ |
Bryan Wu | 88b4036 | 2007-05-21 18:32:16 +0800 | [diff] [blame] | 793 | dev_dbg(&drv_data->pdev->dev, "doing DMA in.\n"); |
Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 794 | |
Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 795 | /* clear tx reg soformer data is not shifted out */ |
Bryan Wu | bb90eb0 | 2007-12-04 23:45:18 -0800 | [diff] [blame] | 796 | write_TDBR(drv_data, 0xFFFF); |
Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 797 | |
Bryan Wu | bb90eb0 | 2007-12-04 23:45:18 -0800 | [diff] [blame] | 798 | set_dma_x_count(drv_data->dma_channel, drv_data->len); |
Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 799 | |
| 800 | /* start dma */ |
Bryan Wu | bb90eb0 | 2007-12-04 23:45:18 -0800 | [diff] [blame] | 801 | dma_enable_irq(drv_data->dma_channel); |
Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 802 | dma_config = (WNR | RESTART | dma_width | DI_EN); |
Bryan Wu | bb90eb0 | 2007-12-04 23:45:18 -0800 | [diff] [blame] | 803 | set_dma_config(drv_data->dma_channel, dma_config); |
| 804 | set_dma_start_addr(drv_data->dma_channel, |
Bryan Wu | a32c691 | 2007-12-04 23:45:15 -0800 | [diff] [blame] | 805 | (unsigned long)drv_data->rx); |
Bryan Wu | bb90eb0 | 2007-12-04 23:45:18 -0800 | [diff] [blame] | 806 | enable_dma(drv_data->dma_channel); |
Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 807 | |
Sonic Zhang | 07612e5 | 2007-12-04 23:45:21 -0800 | [diff] [blame] | 808 | /* start SPI transfer */ |
| 809 | write_CTRL(drv_data, |
| 810 | (cr | CFG_SPI_DMAREAD | BIT_CTL_ENABLE)); |
| 811 | |
Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 812 | } else if (drv_data->tx != NULL) { |
Bryan Wu | 88b4036 | 2007-05-21 18:32:16 +0800 | [diff] [blame] | 813 | dev_dbg(&drv_data->pdev->dev, "doing DMA out.\n"); |
Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 814 | |
| 815 | /* start dma */ |
Bryan Wu | bb90eb0 | 2007-12-04 23:45:18 -0800 | [diff] [blame] | 816 | dma_enable_irq(drv_data->dma_channel); |
Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 817 | dma_config = (RESTART | dma_width | DI_EN); |
Bryan Wu | bb90eb0 | 2007-12-04 23:45:18 -0800 | [diff] [blame] | 818 | set_dma_config(drv_data->dma_channel, dma_config); |
| 819 | set_dma_start_addr(drv_data->dma_channel, |
Bryan Wu | a32c691 | 2007-12-04 23:45:15 -0800 | [diff] [blame] | 820 | (unsigned long)drv_data->tx); |
Bryan Wu | bb90eb0 | 2007-12-04 23:45:18 -0800 | [diff] [blame] | 821 | enable_dma(drv_data->dma_channel); |
Sonic Zhang | 07612e5 | 2007-12-04 23:45:21 -0800 | [diff] [blame] | 822 | |
| 823 | /* start SPI transfer */ |
| 824 | write_CTRL(drv_data, |
| 825 | (cr | CFG_SPI_DMAWRITE | BIT_CTL_ENABLE)); |
Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 826 | } |
| 827 | } else { |
| 828 | /* IO mode write then read */ |
Bryan Wu | 88b4036 | 2007-05-21 18:32:16 +0800 | [diff] [blame] | 829 | dev_dbg(&drv_data->pdev->dev, "doing IO transfer\n"); |
Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 830 | |
Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 831 | if (drv_data->tx != NULL && drv_data->rx != NULL) { |
| 832 | /* full duplex mode */ |
| 833 | BUG_ON((drv_data->tx_end - drv_data->tx) != |
| 834 | (drv_data->rx_end - drv_data->rx)); |
Bryan Wu | 88b4036 | 2007-05-21 18:32:16 +0800 | [diff] [blame] | 835 | dev_dbg(&drv_data->pdev->dev, |
| 836 | "IO duplex: cr is 0x%x\n", cr); |
Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 837 | |
Sonic Zhang | cc487e7 | 2007-12-04 23:45:17 -0800 | [diff] [blame] | 838 | /* set SPI transfer mode */ |
Bryan Wu | bb90eb0 | 2007-12-04 23:45:18 -0800 | [diff] [blame] | 839 | write_CTRL(drv_data, (cr | CFG_SPI_WRITE)); |
Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 840 | |
| 841 | drv_data->duplex(drv_data); |
| 842 | |
| 843 | if (drv_data->tx != drv_data->tx_end) |
| 844 | tranf_success = 0; |
| 845 | } else if (drv_data->tx != NULL) { |
| 846 | /* write only half duplex */ |
Bryan Wu | 131b17d | 2007-12-04 23:45:12 -0800 | [diff] [blame] | 847 | dev_dbg(&drv_data->pdev->dev, |
Bryan Wu | 88b4036 | 2007-05-21 18:32:16 +0800 | [diff] [blame] | 848 | "IO write: cr is 0x%x\n", cr); |
Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 849 | |
Sonic Zhang | cc487e7 | 2007-12-04 23:45:17 -0800 | [diff] [blame] | 850 | /* set SPI transfer mode */ |
Bryan Wu | bb90eb0 | 2007-12-04 23:45:18 -0800 | [diff] [blame] | 851 | write_CTRL(drv_data, (cr | CFG_SPI_WRITE)); |
Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 852 | |
| 853 | drv_data->write(drv_data); |
| 854 | |
| 855 | if (drv_data->tx != drv_data->tx_end) |
| 856 | tranf_success = 0; |
| 857 | } else if (drv_data->rx != NULL) { |
| 858 | /* read only half duplex */ |
Bryan Wu | 131b17d | 2007-12-04 23:45:12 -0800 | [diff] [blame] | 859 | dev_dbg(&drv_data->pdev->dev, |
Bryan Wu | 88b4036 | 2007-05-21 18:32:16 +0800 | [diff] [blame] | 860 | "IO read: cr is 0x%x\n", cr); |
Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 861 | |
Sonic Zhang | cc487e7 | 2007-12-04 23:45:17 -0800 | [diff] [blame] | 862 | /* set SPI transfer mode */ |
Bryan Wu | bb90eb0 | 2007-12-04 23:45:18 -0800 | [diff] [blame] | 863 | write_CTRL(drv_data, (cr | CFG_SPI_READ)); |
Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 864 | |
| 865 | drv_data->read(drv_data); |
| 866 | if (drv_data->rx != drv_data->rx_end) |
| 867 | tranf_success = 0; |
| 868 | } |
| 869 | |
| 870 | if (!tranf_success) { |
Bryan Wu | 131b17d | 2007-12-04 23:45:12 -0800 | [diff] [blame] | 871 | dev_dbg(&drv_data->pdev->dev, |
Bryan Wu | 88b4036 | 2007-05-21 18:32:16 +0800 | [diff] [blame] | 872 | "IO write error!\n"); |
Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 873 | message->state = ERROR_STATE; |
| 874 | } else { |
| 875 | /* Update total byte transfered */ |
| 876 | message->actual_length += drv_data->len; |
| 877 | |
| 878 | /* Move to next transfer of this msg */ |
| 879 | message->state = next_transfer(drv_data); |
| 880 | } |
| 881 | |
| 882 | /* Schedule next transfer tasklet */ |
| 883 | tasklet_schedule(&drv_data->pump_transfers); |
| 884 | |
| 885 | } |
| 886 | } |
| 887 | |
| 888 | /* pop a msg from queue and kick off real transfer */ |
| 889 | static void pump_messages(struct work_struct *work) |
| 890 | { |
Bryan Wu | 131b17d | 2007-12-04 23:45:12 -0800 | [diff] [blame] | 891 | struct driver_data *drv_data; |
Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 892 | unsigned long flags; |
| 893 | |
Bryan Wu | 131b17d | 2007-12-04 23:45:12 -0800 | [diff] [blame] | 894 | drv_data = container_of(work, struct driver_data, pump_messages); |
| 895 | |
Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 896 | /* Lock queue and check for queue work */ |
| 897 | spin_lock_irqsave(&drv_data->lock, flags); |
| 898 | if (list_empty(&drv_data->queue) || drv_data->run == QUEUE_STOPPED) { |
| 899 | /* pumper kicked off but no work to do */ |
| 900 | drv_data->busy = 0; |
| 901 | spin_unlock_irqrestore(&drv_data->lock, flags); |
| 902 | return; |
| 903 | } |
| 904 | |
| 905 | /* Make sure we are not already running a message */ |
| 906 | if (drv_data->cur_msg) { |
| 907 | spin_unlock_irqrestore(&drv_data->lock, flags); |
| 908 | return; |
| 909 | } |
| 910 | |
| 911 | /* Extract head of queue */ |
| 912 | drv_data->cur_msg = list_entry(drv_data->queue.next, |
| 913 | struct spi_message, queue); |
Bryan Wu | 5fec5b5 | 2007-12-04 23:45:13 -0800 | [diff] [blame] | 914 | |
| 915 | /* Setup the SSP using the per chip configuration */ |
| 916 | drv_data->cur_chip = spi_get_ctldata(drv_data->cur_msg->spi); |
Bryan Wu | 8d20d0a | 2008-02-06 01:38:17 -0800 | [diff] [blame] | 917 | restore_state(drv_data); |
Bryan Wu | 5fec5b5 | 2007-12-04 23:45:13 -0800 | [diff] [blame] | 918 | |
Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 919 | list_del_init(&drv_data->cur_msg->queue); |
| 920 | |
| 921 | /* Initial message state */ |
| 922 | drv_data->cur_msg->state = START_STATE; |
| 923 | drv_data->cur_transfer = list_entry(drv_data->cur_msg->transfers.next, |
| 924 | struct spi_transfer, transfer_list); |
| 925 | |
Bryan Wu | 5fec5b5 | 2007-12-04 23:45:13 -0800 | [diff] [blame] | 926 | dev_dbg(&drv_data->pdev->dev, "got a message to pump, " |
| 927 | "state is set to: baud %d, flag 0x%x, ctl 0x%x\n", |
| 928 | drv_data->cur_chip->baud, drv_data->cur_chip->flag, |
| 929 | drv_data->cur_chip->ctl_reg); |
Bryan Wu | 131b17d | 2007-12-04 23:45:12 -0800 | [diff] [blame] | 930 | |
| 931 | dev_dbg(&drv_data->pdev->dev, |
Bryan Wu | 88b4036 | 2007-05-21 18:32:16 +0800 | [diff] [blame] | 932 | "the first transfer len is %d\n", |
| 933 | drv_data->cur_transfer->len); |
Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 934 | |
| 935 | /* Mark as busy and launch transfers */ |
| 936 | tasklet_schedule(&drv_data->pump_transfers); |
| 937 | |
| 938 | drv_data->busy = 1; |
| 939 | spin_unlock_irqrestore(&drv_data->lock, flags); |
| 940 | } |
| 941 | |
| 942 | /* |
| 943 | * got a msg to transfer, queue it in drv_data->queue. |
| 944 | * And kick off message pumper |
| 945 | */ |
| 946 | static int transfer(struct spi_device *spi, struct spi_message *msg) |
| 947 | { |
| 948 | struct driver_data *drv_data = spi_master_get_devdata(spi->master); |
| 949 | unsigned long flags; |
| 950 | |
| 951 | spin_lock_irqsave(&drv_data->lock, flags); |
| 952 | |
| 953 | if (drv_data->run == QUEUE_STOPPED) { |
| 954 | spin_unlock_irqrestore(&drv_data->lock, flags); |
| 955 | return -ESHUTDOWN; |
| 956 | } |
| 957 | |
| 958 | msg->actual_length = 0; |
| 959 | msg->status = -EINPROGRESS; |
| 960 | msg->state = START_STATE; |
| 961 | |
Bryan Wu | 88b4036 | 2007-05-21 18:32:16 +0800 | [diff] [blame] | 962 | dev_dbg(&spi->dev, "adding an msg in transfer() \n"); |
Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 963 | list_add_tail(&msg->queue, &drv_data->queue); |
| 964 | |
| 965 | if (drv_data->run == QUEUE_RUNNING && !drv_data->busy) |
| 966 | queue_work(drv_data->workqueue, &drv_data->pump_messages); |
| 967 | |
| 968 | spin_unlock_irqrestore(&drv_data->lock, flags); |
| 969 | |
| 970 | return 0; |
| 971 | } |
| 972 | |
Sonic Zhang | 12e17c4 | 2007-12-04 23:45:16 -0800 | [diff] [blame] | 973 | #define MAX_SPI_SSEL 7 |
| 974 | |
| 975 | static u16 ssel[3][MAX_SPI_SSEL] = { |
| 976 | {P_SPI0_SSEL1, P_SPI0_SSEL2, P_SPI0_SSEL3, |
| 977 | P_SPI0_SSEL4, P_SPI0_SSEL5, |
| 978 | P_SPI0_SSEL6, P_SPI0_SSEL7}, |
| 979 | |
| 980 | {P_SPI1_SSEL1, P_SPI1_SSEL2, P_SPI1_SSEL3, |
| 981 | P_SPI1_SSEL4, P_SPI1_SSEL5, |
| 982 | P_SPI1_SSEL6, P_SPI1_SSEL7}, |
| 983 | |
| 984 | {P_SPI2_SSEL1, P_SPI2_SSEL2, P_SPI2_SSEL3, |
| 985 | P_SPI2_SSEL4, P_SPI2_SSEL5, |
| 986 | P_SPI2_SSEL6, P_SPI2_SSEL7}, |
| 987 | }; |
| 988 | |
Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 989 | /* first setup for new devices */ |
| 990 | static int setup(struct spi_device *spi) |
| 991 | { |
| 992 | struct bfin5xx_spi_chip *chip_info = NULL; |
| 993 | struct chip_data *chip; |
| 994 | struct driver_data *drv_data = spi_master_get_devdata(spi->master); |
| 995 | u8 spi_flg; |
| 996 | |
| 997 | /* Abort device setup if requested features are not supported */ |
| 998 | if (spi->mode & ~(SPI_CPOL | SPI_CPHA | SPI_LSB_FIRST)) { |
| 999 | dev_err(&spi->dev, "requested mode not fully supported\n"); |
| 1000 | return -EINVAL; |
| 1001 | } |
| 1002 | |
| 1003 | /* Zero (the default) here means 8 bits */ |
| 1004 | if (!spi->bits_per_word) |
| 1005 | spi->bits_per_word = 8; |
| 1006 | |
| 1007 | if (spi->bits_per_word != 8 && spi->bits_per_word != 16) |
| 1008 | return -EINVAL; |
| 1009 | |
| 1010 | /* Only alloc (or use chip_info) on first setup */ |
| 1011 | chip = spi_get_ctldata(spi); |
| 1012 | if (chip == NULL) { |
| 1013 | chip = kzalloc(sizeof(struct chip_data), GFP_KERNEL); |
| 1014 | if (!chip) |
| 1015 | return -ENOMEM; |
| 1016 | |
| 1017 | chip->enable_dma = 0; |
| 1018 | chip_info = spi->controller_data; |
| 1019 | } |
| 1020 | |
| 1021 | /* chip_info isn't always needed */ |
| 1022 | if (chip_info) { |
Mike Frysinger | 2ed3551 | 2007-12-04 23:45:14 -0800 | [diff] [blame] | 1023 | /* Make sure people stop trying to set fields via ctl_reg |
| 1024 | * when they should actually be using common SPI framework. |
| 1025 | * Currently we let through: WOM EMISO PSSE GM SZ TIMOD. |
| 1026 | * Not sure if a user actually needs/uses any of these, |
| 1027 | * but let's assume (for now) they do. |
| 1028 | */ |
| 1029 | if (chip_info->ctl_reg & (SPE|MSTR|CPOL|CPHA|LSBF|SIZE)) { |
| 1030 | dev_err(&spi->dev, "do not set bits in ctl_reg " |
| 1031 | "that the SPI framework manages\n"); |
| 1032 | return -EINVAL; |
| 1033 | } |
| 1034 | |
Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 1035 | chip->enable_dma = chip_info->enable_dma != 0 |
| 1036 | && drv_data->master_info->enable_dma; |
| 1037 | chip->ctl_reg = chip_info->ctl_reg; |
| 1038 | chip->bits_per_word = chip_info->bits_per_word; |
| 1039 | chip->cs_change_per_word = chip_info->cs_change_per_word; |
| 1040 | chip->cs_chg_udelay = chip_info->cs_chg_udelay; |
| 1041 | } |
| 1042 | |
| 1043 | /* translate common spi framework into our register */ |
| 1044 | if (spi->mode & SPI_CPOL) |
| 1045 | chip->ctl_reg |= CPOL; |
| 1046 | if (spi->mode & SPI_CPHA) |
| 1047 | chip->ctl_reg |= CPHA; |
| 1048 | if (spi->mode & SPI_LSB_FIRST) |
| 1049 | chip->ctl_reg |= LSBF; |
| 1050 | /* we dont support running in slave mode (yet?) */ |
| 1051 | chip->ctl_reg |= MSTR; |
| 1052 | |
| 1053 | /* |
| 1054 | * if any one SPI chip is registered and wants DMA, request the |
| 1055 | * DMA channel for it |
| 1056 | */ |
Bryan Wu | bb90eb0 | 2007-12-04 23:45:18 -0800 | [diff] [blame] | 1057 | if (chip->enable_dma && !drv_data->dma_requested) { |
Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 1058 | /* register dma irq handler */ |
Bryan Wu | bb90eb0 | 2007-12-04 23:45:18 -0800 | [diff] [blame] | 1059 | if (request_dma(drv_data->dma_channel, "BF53x_SPI_DMA") < 0) { |
Bryan Wu | 88b4036 | 2007-05-21 18:32:16 +0800 | [diff] [blame] | 1060 | dev_dbg(&spi->dev, |
| 1061 | "Unable to request BlackFin SPI DMA channel\n"); |
Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 1062 | return -ENODEV; |
| 1063 | } |
Bryan Wu | bb90eb0 | 2007-12-04 23:45:18 -0800 | [diff] [blame] | 1064 | if (set_dma_callback(drv_data->dma_channel, |
| 1065 | (void *)dma_irq_handler, drv_data) < 0) { |
Bryan Wu | 88b4036 | 2007-05-21 18:32:16 +0800 | [diff] [blame] | 1066 | dev_dbg(&spi->dev, "Unable to set dma callback\n"); |
Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 1067 | return -EPERM; |
| 1068 | } |
Bryan Wu | bb90eb0 | 2007-12-04 23:45:18 -0800 | [diff] [blame] | 1069 | dma_disable_irq(drv_data->dma_channel); |
| 1070 | drv_data->dma_requested = 1; |
Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 1071 | } |
| 1072 | |
| 1073 | /* |
| 1074 | * Notice: for blackfin, the speed_hz is the value of register |
| 1075 | * SPI_BAUD, not the real baudrate |
| 1076 | */ |
| 1077 | chip->baud = hz_to_spi_baud(spi->max_speed_hz); |
| 1078 | spi_flg = ~(1 << (spi->chip_select)); |
| 1079 | chip->flag = ((u16) spi_flg << 8) | (1 << (spi->chip_select)); |
| 1080 | chip->chip_select_num = spi->chip_select; |
| 1081 | |
| 1082 | switch (chip->bits_per_word) { |
| 1083 | case 8: |
| 1084 | chip->n_bytes = 1; |
| 1085 | chip->width = CFG_SPI_WORDSIZE8; |
| 1086 | chip->read = chip->cs_change_per_word ? |
| 1087 | u8_cs_chg_reader : u8_reader; |
| 1088 | chip->write = chip->cs_change_per_word ? |
| 1089 | u8_cs_chg_writer : u8_writer; |
| 1090 | chip->duplex = chip->cs_change_per_word ? |
| 1091 | u8_cs_chg_duplex : u8_duplex; |
| 1092 | break; |
| 1093 | |
| 1094 | case 16: |
| 1095 | chip->n_bytes = 2; |
| 1096 | chip->width = CFG_SPI_WORDSIZE16; |
| 1097 | chip->read = chip->cs_change_per_word ? |
| 1098 | u16_cs_chg_reader : u16_reader; |
| 1099 | chip->write = chip->cs_change_per_word ? |
| 1100 | u16_cs_chg_writer : u16_writer; |
| 1101 | chip->duplex = chip->cs_change_per_word ? |
| 1102 | u16_cs_chg_duplex : u16_duplex; |
| 1103 | break; |
| 1104 | |
| 1105 | default: |
| 1106 | dev_err(&spi->dev, "%d bits_per_word is not supported\n", |
| 1107 | chip->bits_per_word); |
| 1108 | kfree(chip); |
| 1109 | return -ENODEV; |
| 1110 | } |
| 1111 | |
Joe Perches | 898eb71 | 2007-10-18 03:06:30 -0700 | [diff] [blame] | 1112 | dev_dbg(&spi->dev, "setup spi chip %s, width is %d, dma is %d\n", |
Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 1113 | spi->modalias, chip->width, chip->enable_dma); |
Bryan Wu | 88b4036 | 2007-05-21 18:32:16 +0800 | [diff] [blame] | 1114 | dev_dbg(&spi->dev, "ctl_reg is 0x%x, flag_reg is 0x%x\n", |
Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 1115 | chip->ctl_reg, chip->flag); |
| 1116 | |
| 1117 | spi_set_ctldata(spi, chip); |
| 1118 | |
Sonic Zhang | 12e17c4 | 2007-12-04 23:45:16 -0800 | [diff] [blame] | 1119 | dev_dbg(&spi->dev, "chip select number is %d\n", chip->chip_select_num); |
| 1120 | if ((chip->chip_select_num > 0) |
| 1121 | && (chip->chip_select_num <= spi->master->num_chipselect)) |
| 1122 | peripheral_request(ssel[spi->master->bus_num] |
Bryan Wu | aab0d83 | 2008-02-06 01:38:17 -0800 | [diff] [blame] | 1123 | [chip->chip_select_num-1], spi->modalias); |
Sonic Zhang | 12e17c4 | 2007-12-04 23:45:16 -0800 | [diff] [blame] | 1124 | |
Sonic Zhang | 07612e5 | 2007-12-04 23:45:21 -0800 | [diff] [blame] | 1125 | cs_deactive(drv_data, chip); |
| 1126 | |
Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 1127 | return 0; |
| 1128 | } |
| 1129 | |
| 1130 | /* |
| 1131 | * callback for spi framework. |
| 1132 | * clean driver specific data |
| 1133 | */ |
Bryan Wu | 88b4036 | 2007-05-21 18:32:16 +0800 | [diff] [blame] | 1134 | static void cleanup(struct spi_device *spi) |
Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 1135 | { |
Mike Frysinger | 27bb9e7 | 2007-06-11 15:31:30 +0800 | [diff] [blame] | 1136 | struct chip_data *chip = spi_get_ctldata(spi); |
Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 1137 | |
Sonic Zhang | 12e17c4 | 2007-12-04 23:45:16 -0800 | [diff] [blame] | 1138 | if ((chip->chip_select_num > 0) |
| 1139 | && (chip->chip_select_num <= spi->master->num_chipselect)) |
| 1140 | peripheral_free(ssel[spi->master->bus_num] |
| 1141 | [chip->chip_select_num-1]); |
| 1142 | |
Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 1143 | kfree(chip); |
| 1144 | } |
| 1145 | |
| 1146 | static inline int init_queue(struct driver_data *drv_data) |
| 1147 | { |
| 1148 | INIT_LIST_HEAD(&drv_data->queue); |
| 1149 | spin_lock_init(&drv_data->lock); |
| 1150 | |
| 1151 | drv_data->run = QUEUE_STOPPED; |
| 1152 | drv_data->busy = 0; |
| 1153 | |
| 1154 | /* init transfer tasklet */ |
| 1155 | tasklet_init(&drv_data->pump_transfers, |
| 1156 | pump_transfers, (unsigned long)drv_data); |
| 1157 | |
| 1158 | /* init messages workqueue */ |
| 1159 | INIT_WORK(&drv_data->pump_messages, pump_messages); |
| 1160 | drv_data->workqueue = |
Tony Jones | 49dce68 | 2007-10-16 01:27:48 -0700 | [diff] [blame] | 1161 | create_singlethread_workqueue(drv_data->master->dev.parent->bus_id); |
Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 1162 | if (drv_data->workqueue == NULL) |
| 1163 | return -EBUSY; |
| 1164 | |
| 1165 | return 0; |
| 1166 | } |
| 1167 | |
| 1168 | static inline int start_queue(struct driver_data *drv_data) |
| 1169 | { |
| 1170 | unsigned long flags; |
| 1171 | |
| 1172 | spin_lock_irqsave(&drv_data->lock, flags); |
| 1173 | |
| 1174 | if (drv_data->run == QUEUE_RUNNING || drv_data->busy) { |
| 1175 | spin_unlock_irqrestore(&drv_data->lock, flags); |
| 1176 | return -EBUSY; |
| 1177 | } |
| 1178 | |
| 1179 | drv_data->run = QUEUE_RUNNING; |
| 1180 | drv_data->cur_msg = NULL; |
| 1181 | drv_data->cur_transfer = NULL; |
| 1182 | drv_data->cur_chip = NULL; |
| 1183 | spin_unlock_irqrestore(&drv_data->lock, flags); |
| 1184 | |
| 1185 | queue_work(drv_data->workqueue, &drv_data->pump_messages); |
| 1186 | |
| 1187 | return 0; |
| 1188 | } |
| 1189 | |
| 1190 | static inline int stop_queue(struct driver_data *drv_data) |
| 1191 | { |
| 1192 | unsigned long flags; |
| 1193 | unsigned limit = 500; |
| 1194 | int status = 0; |
| 1195 | |
| 1196 | spin_lock_irqsave(&drv_data->lock, flags); |
| 1197 | |
| 1198 | /* |
| 1199 | * This is a bit lame, but is optimized for the common execution path. |
| 1200 | * A wait_queue on the drv_data->busy could be used, but then the common |
| 1201 | * execution path (pump_messages) would be required to call wake_up or |
| 1202 | * friends on every SPI message. Do this instead |
| 1203 | */ |
| 1204 | drv_data->run = QUEUE_STOPPED; |
| 1205 | while (!list_empty(&drv_data->queue) && drv_data->busy && limit--) { |
| 1206 | spin_unlock_irqrestore(&drv_data->lock, flags); |
| 1207 | msleep(10); |
| 1208 | spin_lock_irqsave(&drv_data->lock, flags); |
| 1209 | } |
| 1210 | |
| 1211 | if (!list_empty(&drv_data->queue) || drv_data->busy) |
| 1212 | status = -EBUSY; |
| 1213 | |
| 1214 | spin_unlock_irqrestore(&drv_data->lock, flags); |
| 1215 | |
| 1216 | return status; |
| 1217 | } |
| 1218 | |
| 1219 | static inline int destroy_queue(struct driver_data *drv_data) |
| 1220 | { |
| 1221 | int status; |
| 1222 | |
| 1223 | status = stop_queue(drv_data); |
| 1224 | if (status != 0) |
| 1225 | return status; |
| 1226 | |
| 1227 | destroy_workqueue(drv_data->workqueue); |
| 1228 | |
| 1229 | return 0; |
| 1230 | } |
| 1231 | |
| 1232 | static int __init bfin5xx_spi_probe(struct platform_device *pdev) |
| 1233 | { |
| 1234 | struct device *dev = &pdev->dev; |
| 1235 | struct bfin5xx_spi_master *platform_info; |
| 1236 | struct spi_master *master; |
| 1237 | struct driver_data *drv_data = 0; |
Bryan Wu | a32c691 | 2007-12-04 23:45:15 -0800 | [diff] [blame] | 1238 | struct resource *res; |
Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 1239 | int status = 0; |
| 1240 | |
| 1241 | platform_info = dev->platform_data; |
| 1242 | |
| 1243 | /* Allocate master with space for drv_data */ |
| 1244 | master = spi_alloc_master(dev, sizeof(struct driver_data) + 16); |
| 1245 | if (!master) { |
| 1246 | dev_err(&pdev->dev, "can not alloc spi_master\n"); |
| 1247 | return -ENOMEM; |
| 1248 | } |
Bryan Wu | 131b17d | 2007-12-04 23:45:12 -0800 | [diff] [blame] | 1249 | |
Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 1250 | drv_data = spi_master_get_devdata(master); |
| 1251 | drv_data->master = master; |
| 1252 | drv_data->master_info = platform_info; |
| 1253 | drv_data->pdev = pdev; |
Bryan Wu | 003d922 | 2007-12-04 23:45:22 -0800 | [diff] [blame] | 1254 | drv_data->pin_req = platform_info->pin_req; |
Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 1255 | |
| 1256 | master->bus_num = pdev->id; |
| 1257 | master->num_chipselect = platform_info->num_chipselect; |
| 1258 | master->cleanup = cleanup; |
| 1259 | master->setup = setup; |
| 1260 | master->transfer = transfer; |
| 1261 | |
Bryan Wu | a32c691 | 2007-12-04 23:45:15 -0800 | [diff] [blame] | 1262 | /* Find and map our resources */ |
| 1263 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
| 1264 | if (res == NULL) { |
| 1265 | dev_err(dev, "Cannot get IORESOURCE_MEM\n"); |
| 1266 | status = -ENOENT; |
| 1267 | goto out_error_get_res; |
| 1268 | } |
| 1269 | |
Bryan Wu | f452126 | 2007-12-04 23:45:22 -0800 | [diff] [blame] | 1270 | drv_data->regs_base = ioremap(res->start, (res->end - res->start + 1)); |
| 1271 | if (drv_data->regs_base == NULL) { |
Bryan Wu | a32c691 | 2007-12-04 23:45:15 -0800 | [diff] [blame] | 1272 | dev_err(dev, "Cannot map IO\n"); |
| 1273 | status = -ENXIO; |
| 1274 | goto out_error_ioremap; |
| 1275 | } |
| 1276 | |
Bryan Wu | bb90eb0 | 2007-12-04 23:45:18 -0800 | [diff] [blame] | 1277 | drv_data->dma_channel = platform_get_irq(pdev, 0); |
| 1278 | if (drv_data->dma_channel < 0) { |
Bryan Wu | a32c691 | 2007-12-04 23:45:15 -0800 | [diff] [blame] | 1279 | dev_err(dev, "No DMA channel specified\n"); |
| 1280 | status = -ENOENT; |
| 1281 | goto out_error_no_dma_ch; |
| 1282 | } |
| 1283 | |
Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 1284 | /* Initial and start queue */ |
| 1285 | status = init_queue(drv_data); |
| 1286 | if (status != 0) { |
Bryan Wu | a32c691 | 2007-12-04 23:45:15 -0800 | [diff] [blame] | 1287 | dev_err(dev, "problem initializing queue\n"); |
Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 1288 | goto out_error_queue_alloc; |
| 1289 | } |
Bryan Wu | a32c691 | 2007-12-04 23:45:15 -0800 | [diff] [blame] | 1290 | |
Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 1291 | status = start_queue(drv_data); |
| 1292 | if (status != 0) { |
Bryan Wu | a32c691 | 2007-12-04 23:45:15 -0800 | [diff] [blame] | 1293 | dev_err(dev, "problem starting queue\n"); |
Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 1294 | goto out_error_queue_alloc; |
| 1295 | } |
| 1296 | |
Vitja Makarov | f9e522c | 2008-04-08 17:41:57 -0700 | [diff] [blame] | 1297 | status = peripheral_request_list(drv_data->pin_req, DRV_NAME); |
| 1298 | if (status != 0) { |
| 1299 | dev_err(&pdev->dev, ": Requesting Peripherals failed\n"); |
| 1300 | goto out_error_queue_alloc; |
| 1301 | } |
| 1302 | |
Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 1303 | /* Register with the SPI framework */ |
| 1304 | platform_set_drvdata(pdev, drv_data); |
| 1305 | status = spi_register_master(master); |
| 1306 | if (status != 0) { |
Bryan Wu | a32c691 | 2007-12-04 23:45:15 -0800 | [diff] [blame] | 1307 | dev_err(dev, "problem registering spi master\n"); |
Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 1308 | goto out_error_queue_alloc; |
| 1309 | } |
Bryan Wu | a32c691 | 2007-12-04 23:45:15 -0800 | [diff] [blame] | 1310 | |
Bryan Wu | f452126 | 2007-12-04 23:45:22 -0800 | [diff] [blame] | 1311 | dev_info(dev, "%s, Version %s, regs_base@%p, dma channel@%d\n", |
Bryan Wu | bb90eb0 | 2007-12-04 23:45:18 -0800 | [diff] [blame] | 1312 | DRV_DESC, DRV_VERSION, drv_data->regs_base, |
| 1313 | drv_data->dma_channel); |
Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 1314 | return status; |
| 1315 | |
Michael Hennerich | cc2f81a | 2007-12-04 23:45:13 -0800 | [diff] [blame] | 1316 | out_error_queue_alloc: |
Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 1317 | destroy_queue(drv_data); |
Bryan Wu | a32c691 | 2007-12-04 23:45:15 -0800 | [diff] [blame] | 1318 | out_error_no_dma_ch: |
Bryan Wu | bb90eb0 | 2007-12-04 23:45:18 -0800 | [diff] [blame] | 1319 | iounmap((void *) drv_data->regs_base); |
Bryan Wu | a32c691 | 2007-12-04 23:45:15 -0800 | [diff] [blame] | 1320 | out_error_ioremap: |
| 1321 | out_error_get_res: |
Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 1322 | spi_master_put(master); |
Michael Hennerich | cc2f81a | 2007-12-04 23:45:13 -0800 | [diff] [blame] | 1323 | |
Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 1324 | return status; |
| 1325 | } |
| 1326 | |
| 1327 | /* stop hardware and remove the driver */ |
| 1328 | static int __devexit bfin5xx_spi_remove(struct platform_device *pdev) |
| 1329 | { |
| 1330 | struct driver_data *drv_data = platform_get_drvdata(pdev); |
| 1331 | int status = 0; |
| 1332 | |
| 1333 | if (!drv_data) |
| 1334 | return 0; |
| 1335 | |
| 1336 | /* Remove the queue */ |
| 1337 | status = destroy_queue(drv_data); |
| 1338 | if (status != 0) |
| 1339 | return status; |
| 1340 | |
| 1341 | /* Disable the SSP at the peripheral and SOC level */ |
| 1342 | bfin_spi_disable(drv_data); |
| 1343 | |
| 1344 | /* Release DMA */ |
| 1345 | if (drv_data->master_info->enable_dma) { |
Bryan Wu | bb90eb0 | 2007-12-04 23:45:18 -0800 | [diff] [blame] | 1346 | if (dma_channel_active(drv_data->dma_channel)) |
| 1347 | free_dma(drv_data->dma_channel); |
Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 1348 | } |
| 1349 | |
| 1350 | /* Disconnect from the SPI framework */ |
| 1351 | spi_unregister_master(drv_data->master); |
| 1352 | |
Bryan Wu | 003d922 | 2007-12-04 23:45:22 -0800 | [diff] [blame] | 1353 | peripheral_free_list(drv_data->pin_req); |
Michael Hennerich | cc2f81a | 2007-12-04 23:45:13 -0800 | [diff] [blame] | 1354 | |
Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 1355 | /* Prevent double remove */ |
| 1356 | platform_set_drvdata(pdev, NULL); |
| 1357 | |
| 1358 | return 0; |
| 1359 | } |
| 1360 | |
| 1361 | #ifdef CONFIG_PM |
| 1362 | static int bfin5xx_spi_suspend(struct platform_device *pdev, pm_message_t state) |
| 1363 | { |
| 1364 | struct driver_data *drv_data = platform_get_drvdata(pdev); |
| 1365 | int status = 0; |
| 1366 | |
| 1367 | status = stop_queue(drv_data); |
| 1368 | if (status != 0) |
| 1369 | return status; |
| 1370 | |
| 1371 | /* stop hardware */ |
| 1372 | bfin_spi_disable(drv_data); |
| 1373 | |
| 1374 | return 0; |
| 1375 | } |
| 1376 | |
| 1377 | static int bfin5xx_spi_resume(struct platform_device *pdev) |
| 1378 | { |
| 1379 | struct driver_data *drv_data = platform_get_drvdata(pdev); |
| 1380 | int status = 0; |
| 1381 | |
| 1382 | /* Enable the SPI interface */ |
| 1383 | bfin_spi_enable(drv_data); |
| 1384 | |
| 1385 | /* Start the queue running */ |
| 1386 | status = start_queue(drv_data); |
| 1387 | if (status != 0) { |
| 1388 | dev_err(&pdev->dev, "problem starting queue (%d)\n", status); |
| 1389 | return status; |
| 1390 | } |
| 1391 | |
| 1392 | return 0; |
| 1393 | } |
| 1394 | #else |
| 1395 | #define bfin5xx_spi_suspend NULL |
| 1396 | #define bfin5xx_spi_resume NULL |
| 1397 | #endif /* CONFIG_PM */ |
| 1398 | |
Kay Sievers | 7e38c3c | 2008-04-10 21:29:20 -0700 | [diff] [blame] | 1399 | MODULE_ALIAS("platform:bfin-spi"); |
Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 1400 | static struct platform_driver bfin5xx_spi_driver = { |
David Brownell | fc3ba95 | 2007-08-30 23:56:24 -0700 | [diff] [blame] | 1401 | .driver = { |
Bryan Wu | a32c691 | 2007-12-04 23:45:15 -0800 | [diff] [blame] | 1402 | .name = DRV_NAME, |
Bryan Wu | 88b4036 | 2007-05-21 18:32:16 +0800 | [diff] [blame] | 1403 | .owner = THIS_MODULE, |
| 1404 | }, |
| 1405 | .suspend = bfin5xx_spi_suspend, |
| 1406 | .resume = bfin5xx_spi_resume, |
| 1407 | .remove = __devexit_p(bfin5xx_spi_remove), |
Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 1408 | }; |
| 1409 | |
| 1410 | static int __init bfin5xx_spi_init(void) |
| 1411 | { |
Bryan Wu | 88b4036 | 2007-05-21 18:32:16 +0800 | [diff] [blame] | 1412 | return platform_driver_probe(&bfin5xx_spi_driver, bfin5xx_spi_probe); |
Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 1413 | } |
Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 1414 | module_init(bfin5xx_spi_init); |
| 1415 | |
| 1416 | static void __exit bfin5xx_spi_exit(void) |
| 1417 | { |
| 1418 | platform_driver_unregister(&bfin5xx_spi_driver); |
| 1419 | } |
Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 1420 | module_exit(bfin5xx_spi_exit); |