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Len Brown103a8fe2010-10-22 23:53:03 -04001.TH TURBOSTAT 8
2.SH NAME
3turbostat \- Report processor frequency and idle statistics
4.SH SYNOPSIS
5.ft B
6.B turbostat
Len Brown8e180f32012-09-22 01:25:08 -04007.RB [ Options ]
Len Brown103a8fe2010-10-22 23:53:03 -04008.RB command
9.br
10.B turbostat
Len Brown8e180f32012-09-22 01:25:08 -040011.RB [ Options ]
Len Brownd8af6f52015-02-10 01:56:38 -050012.RB [ "\--interval seconds" ]
Len Brown103a8fe2010-10-22 23:53:03 -040013.SH DESCRIPTION
Len Brown889facb2012-11-08 00:48:57 -050014\fBturbostat \fP reports processor topology, frequency,
Len Browna7296172015-01-23 01:33:58 -050015idle power-state statistics, temperature and power on X86 processors.
16There are two ways to invoke turbostat.
17The first method is to supply a
18\fBcommand\fP, which is forked and statistics are printed
19upon its completion.
20The second method is to omit the command,
Len Brownd8af6f52015-02-10 01:56:38 -050021and turbostat displays statistics every 5 seconds.
22The 5-second interval can be changed using the --interval option.
Len Brown1cc21f72015-02-23 00:34:57 -050023.PP
Len Brownd8af6f52015-02-10 01:56:38 -050024Some information is not available on older processors.
Len Brown103a8fe2010-10-22 23:53:03 -040025.SS Options
Len Brown1cc21f72015-02-23 00:34:57 -050026Options can be specified with a single or double '-', and only as much of the option
27name as necessary to disambiguate it from others is necessary. Note that options are case-sensitive.
Len Brownd8af6f52015-02-10 01:56:38 -050028\fB--Counter MSR#\fP shows the delta of the specified 64-bit MSR counter.
Len Brownc98d5d92012-06-04 00:56:40 -040029.PP
Len Brownd8af6f52015-02-10 01:56:38 -050030\fB--counter MSR#\fP shows the delta of the specified 32-bit MSR counter.
Len Brownc98d5d92012-06-04 00:56:40 -040031.PP
Len Brownd8af6f52015-02-10 01:56:38 -050032\fB--Dump\fP displays the raw counter values.
Len Browne23da032012-02-06 18:37:16 -050033.PP
Len Brownd8af6f52015-02-10 01:56:38 -050034\fB--debug\fP displays additional system configuration information. Invoking this parameter
35more than once may also enable internal turbostat debug information.
Len Brown103a8fe2010-10-22 23:53:03 -040036.PP
Len Brown2a0609c2016-02-12 22:44:48 -050037\fB--interval seconds\fP overrides the default 5.0 second measurement interval.
Len Brownf9240812012-10-06 15:26:31 -040038.PP
Len Brownd8af6f52015-02-10 01:56:38 -050039\fB--help\fP displays usage for the most common parameters.
Len Brown8e180f32012-09-22 01:25:08 -040040.PP
Len Brownd8af6f52015-02-10 01:56:38 -050041\fB--Joules\fP displays energy in Joules, rather than dividing Joules by time to print power in Watts.
Len Brown8e180f32012-09-22 01:25:08 -040042.PP
Len Brownd8af6f52015-02-10 01:56:38 -050043\fB--MSR MSR#\fP shows the specified 64-bit MSR value.
Len Brown103a8fe2010-10-22 23:53:03 -040044.PP
Len Brownd8af6f52015-02-10 01:56:38 -050045\fB--msr MSR#\fP shows the specified 32-bit MSR value.
Len Brown103a8fe2010-10-22 23:53:03 -040046.PP
Len Brownd8af6f52015-02-10 01:56:38 -050047\fB--Package\fP limits output to the system summary plus the 1st thread in each Package.
48.PP
49\fB--processor\fP limits output to the system summary plus the 1st thread in each processor of each package. Ie. it skips hyper-threaded siblings.
50.PP
51\fB--Summary\fP limits output to a 1-line System Summary for each interval.
52.PP
53\fB--TCC temperature\fP sets the Thermal Control Circuit temperature for systems which do not export that value. This is used for making sense of the Digital Thermal Sensor outputs, as they return degrees Celsius below the TCC activation temperature.
54.PP
55\fB--version\fP displays the version.
56.PP
57The \fBcommand\fP parameter forks \fBcommand\fP, and upon its exit,
Len Brown103a8fe2010-10-22 23:53:03 -040058displays the statistics gathered since it was forked.
59.PP
Len Brown1cc21f72015-02-23 00:34:57 -050060.SH DEFAULT FIELD DESCRIPTIONS
Len Brown103a8fe2010-10-22 23:53:03 -040061.nf
Len Brown1cc21f72015-02-23 00:34:57 -050062\fBCPU\fP Linux CPU (logical processor) number. Yes, it is okay that on many systems the CPUs are not listed in numerical order -- for efficiency reasons, turbostat runs in topology order, so HT siblings appear together.
Len Brownfc04cc62014-02-06 00:55:19 -050063\fBAVG_MHz\fP number of cycles executed divided by time elapsed.
Len Brownd8af6f52015-02-10 01:56:38 -050064\fB%Busy\fP percent of the interval that the CPU retired instructions, aka. % of time in "C0" state.
Len Brownfc04cc62014-02-06 00:55:19 -050065\fBBzy_MHz\fP average clock rate while the CPU was busy (in "c0" state).
66\fBTSC_MHz\fP average MHz that the TSC ran during the entire interval.
Len Brown1cc21f72015-02-23 00:34:57 -050067.fi
68.PP
69.SH DEBUG FIELD DESCRIPTIONS
70.nf
71\fBPackage\fP processor package number.
72\fBCore\fP processor core number.
73Note that multiple CPUs per core indicate support for Intel(R) Hyper-Threading Technology (HT).
Len Brownfc04cc62014-02-06 00:55:19 -050074\fBCPU%c1, CPU%c3, CPU%c6, CPU%c7\fP show the percentage residency in hardware core idle states.
75\fBCoreTmp\fP Degrees Celsius reported by the per-core Digital Thermal Sensor.
76\fBPkgTtmp\fP Degrees Celsius reported by the per-package Package Thermal Monitor.
77\fBPkg%pc2, Pkg%pc3, Pkg%pc6, Pkg%pc7\fP percentage residency in hardware package idle states.
78\fBPkgWatt\fP Watts consumed by the whole package.
79\fBCorWatt\fP Watts consumed by the core part of the package.
80\fBGFXWatt\fP Watts consumed by the Graphics part of the package -- available only on client processors.
81\fBRAMWatt\fP Watts consumed by the DRAM DIMMS -- available only on server processors.
Len Brown889facb2012-11-08 00:48:57 -050082\fBPKG_%\fP percent of the interval that RAPL throttling was active on the Package.
83\fBRAM_%\fP percent of the interval that RAPL throttling was active on DRAM.
Len Brown103a8fe2010-10-22 23:53:03 -040084.fi
85.PP
86.SH EXAMPLE
Len Brownd8af6f52015-02-10 01:56:38 -050087Without any parameters, turbostat displays statistics ever 5 seconds.
Len Brown103a8fe2010-10-22 23:53:03 -040088(override interval with "-i sec" option, or specify a command
89for turbostat to fork).
Len Brown1cc21f72015-02-23 00:34:57 -050090.nf
91[root@hsw]# ./turbostat
92 CPU Avg_MHz %Busy Bzy_MHz TSC_MHz
93 - 488 12.51 3898 3498
94 0 0 0.01 3885 3498
95 4 3897 99.99 3898 3498
96 1 0 0.00 3861 3498
97 5 0 0.00 3882 3498
98 2 1 0.02 3894 3498
99 6 2 0.06 3898 3498
100 3 0 0.00 3849 3498
101 7 0 0.00 3877 3498
102
103.fi
104.SH DEBUG EXAMPLE
105The "--debug" option prints additional system information before measurements:
Len Brown103a8fe2010-10-22 23:53:03 -0400106
Len Browne23da032012-02-06 18:37:16 -0500107The first row of statistics is a summary for the entire system.
Len Brown889facb2012-11-08 00:48:57 -0500108For residency % columns, the summary is a weighted average.
109For Temperature columns, the summary is the column maximum.
110For Watts columns, the summary is a system total.
Len Brown103a8fe2010-10-22 23:53:03 -0400111Subsequent rows show per-CPU statistics.
Len Brown103a8fe2010-10-22 23:53:03 -0400112.nf
Len Brown1cc21f72015-02-23 00:34:57 -0500113turbostat version 4.1 10-Feb, 2015 - Len Brown <lenb@kernel.org>
114CPUID(0): GenuineIntel 13 CPUID levels; family:model:stepping 0x6:3c:3 (6:60:3)
Len Brown889facb2012-11-08 00:48:57 -0500115CPUID(6): APERF, DTS, PTM, EPB
Len Brown1cc21f72015-02-23 00:34:57 -0500116RAPL: 3121 sec. Joule Counter Range, at 84 Watts
117cpu0: MSR_NHM_PLATFORM_INFO: 0x80838f3012300
1188 * 100 = 800 MHz max efficiency
Len Brown889facb2012-11-08 00:48:57 -050011935 * 100 = 3500 MHz TSC frequency
Len Brown1cc21f72015-02-23 00:34:57 -0500120cpu0: MSR_IA32_POWER_CTL: 0x0004005d (C1E auto-promotion: DISabled)
121cpu0: MSR_NHM_SNB_PKG_CST_CFG_CTL: 0x1e000400 (UNdemote-C3, UNdemote-C1, demote-C3, demote-C1, UNlocked: pkg-cstate-limit=0: pc0)
Len Brown889facb2012-11-08 00:48:57 -0500122cpu0: MSR_NHM_TURBO_RATIO_LIMIT: 0x25262727
12337 * 100 = 3700 MHz max turbo 4 active cores
12438 * 100 = 3800 MHz max turbo 3 active cores
12539 * 100 = 3900 MHz max turbo 2 active cores
12639 * 100 = 3900 MHz max turbo 1 active cores
127cpu0: MSR_IA32_ENERGY_PERF_BIAS: 0x00000006 (balanced)
Len Brown1cc21f72015-02-23 00:34:57 -0500128cpu0: MSR_CORE_PERF_LIMIT_REASONS, 0x31200000 (Active: ) (Logged: Auto-HWP, Amps, MultiCoreTurbo, Transitions, )
129cpu0: MSR_GFX_PERF_LIMIT_REASONS, 0x00000000 (Active: ) (Logged: )
130cpu0: MSR_RING_PERF_LIMIT_REASONS, 0x0d000000 (Active: ) (Logged: Amps, PkgPwrL1, PkgPwrL2, )
131cpu0: MSR_RAPL_POWER_UNIT: 0x000a0e03 (0.125000 Watts, 0.000061 Joules, 0.000977 sec.)
132cpu0: MSR_PKG_POWER_INFO: 0x000002a0 (84 W TDP, RAPL 0 - 0 W, 0.000000 sec.)
133cpu0: MSR_PKG_POWER_LIMIT: 0x428348001a82a0 (UNlocked)
134cpu0: PKG Limit #1: ENabled (84.000000 Watts, 8.000000 sec, clamp DISabled)
135cpu0: PKG Limit #2: ENabled (105.000000 Watts, 0.002441* sec, clamp DISabled)
Len Brown889facb2012-11-08 00:48:57 -0500136cpu0: MSR_PP0_POLICY: 0
137cpu0: MSR_PP0_POWER_LIMIT: 0x00000000 (UNlocked)
138cpu0: Cores Limit: DISabled (0.000000 Watts, 0.000977 sec, clamp DISabled)
139cpu0: MSR_PP1_POLICY: 0
140cpu0: MSR_PP1_POWER_LIMIT: 0x00000000 (UNlocked)
141cpu0: GFX Limit: DISabled (0.000000 Watts, 0.000977 sec, clamp DISabled)
Len Brown1cc21f72015-02-23 00:34:57 -0500142cpu0: MSR_IA32_TEMPERATURE_TARGET: 0x00641400 (100 C)
143cpu0: MSR_IA32_PACKAGE_THERM_STATUS: 0x88340800 (48 C)
144cpu0: MSR_IA32_THERM_STATUS: 0x88340000 (48 C +/- 1)
145cpu1: MSR_IA32_THERM_STATUS: 0x88440000 (32 C +/- 1)
146cpu2: MSR_IA32_THERM_STATUS: 0x88450000 (31 C +/- 1)
147cpu3: MSR_IA32_THERM_STATUS: 0x88490000 (27 C +/- 1)
148 Core CPU Avg_MHz %Busy Bzy_MHz TSC_MHz SMI CPU%c1 CPU%c3 CPU%c6 CPU%c7 CoreTmp PkgTmp PkgWatt CorWatt GFXWatt
149 - - 493 12.64 3898 3498 0 12.64 0.00 0.00 74.72 47 47 21.62 13.74 0.00
150 0 0 4 0.11 3894 3498 0 99.89 0.00 0.00 0.00 47 47 21.62 13.74 0.00
151 0 4 3897 99.98 3898 3498 0 0.02
152 1 1 7 0.17 3887 3498 0 0.04 0.00 0.00 99.79 32
153 1 5 0 0.00 3885 3498 0 0.21
154 2 2 29 0.76 3895 3498 0 0.10 0.01 0.01 99.13 32
155 2 6 2 0.06 3896 3498 0 0.80
156 3 3 1 0.02 3832 3498 0 0.03 0.00 0.00 99.95 28
157 3 7 0 0.00 3879 3498 0 0.04
158^C
159
Len Brown103a8fe2010-10-22 23:53:03 -0400160.fi
161The \fBmax efficiency\fP frequency, a.k.a. Low Frequency Mode, is the frequency
Len Browna7296172015-01-23 01:33:58 -0500162available at the minimum package voltage. The \fBTSC frequency\fP is the base
163frequency of the processor -- this should match the brand string
164in /proc/cpuinfo. This base frequency
Len Brown103a8fe2010-10-22 23:53:03 -0400165should be sustainable on all CPUs indefinitely, given nominal power and cooling.
166The remaining rows show what maximum turbo frequency is possible
Len Browna7296172015-01-23 01:33:58 -0500167depending on the number of idle cores. Note that not all information is
168available on all processors.
Len Brown1cc21f72015-02-23 00:34:57 -0500169.PP
170The --debug option adds additional columns to the measurement ouput, including CPU idle power-state residency processor temperature sensor readinds.
171See the field definitions above.
Len Brown103a8fe2010-10-22 23:53:03 -0400172.SH FORK EXAMPLE
173If turbostat is invoked with a command, it will fork that command
174and output the statistics gathered when the command exits.
175eg. Here a cycle soaker is run on 1 CPU (see %c0) for a few seconds
176until ^C while the other CPUs are mostly idle:
177
178.nf
Len Brown1cc21f72015-02-23 00:34:57 -0500179root@hsw: turbostat cat /dev/zero > /dev/null
Len Browne23da032012-02-06 18:37:16 -0500180^C
Len Brown1cc21f72015-02-23 00:34:57 -0500181 CPU Avg_MHz %Busy Bzy_MHz TSC_MHz
182 - 482 12.51 3854 3498
183 0 0 0.01 1960 3498
184 4 0 0.00 2128 3498
185 1 0 0.00 3003 3498
186 5 3854 99.98 3855 3498
187 2 0 0.01 3504 3498
188 6 3 0.08 3884 3498
189 3 0 0.00 2553 3498
190 7 0 0.00 2126 3498
19110.783983 sec
Len Brownfc04cc62014-02-06 00:55:19 -0500192
Len Brown103a8fe2010-10-22 23:53:03 -0400193.fi
Len Brown1cc21f72015-02-23 00:34:57 -0500194Above the cycle soaker drives cpu5 up its 3.9 GHz turbo limit.
195The first row shows the average MHz and %Busy across all the processors in the system.
Len Brown103a8fe2010-10-22 23:53:03 -0400196
Len Brownfc04cc62014-02-06 00:55:19 -0500197Note that the Avg_MHz column reflects the total number of cycles executed
198divided by the measurement interval. If the %Busy column is 100%,
199then the processor was running at that speed the entire interval.
200The Avg_MHz multiplied by the %Busy results in the Bzy_MHz --
201which is the average frequency while the processor was executing --
202not including any non-busy idle time.
203
Len Brown103a8fe2010-10-22 23:53:03 -0400204.SH NOTES
205
206.B "turbostat "
207must be run as root.
Len Browna7296172015-01-23 01:33:58 -0500208Alternatively, non-root users can be enabled to run turbostat this way:
209
210# setcap cap_sys_rawio=ep ./turbostat
211
212# chmod +r /dev/cpu/*/msr
Len Brown103a8fe2010-10-22 23:53:03 -0400213
214.B "turbostat "
215reads hardware counters, but doesn't write them.
216So it will not interfere with the OS or other programs, including
217multiple invocations of itself.
218
219\fBturbostat \fP
220may work poorly on Linux-2.6.20 through 2.6.29,
Len Browna7296172015-01-23 01:33:58 -0500221as \fBacpi-cpufreq \fPperiodically cleared the APERF and MPERF MSRs
Len Brown103a8fe2010-10-22 23:53:03 -0400222in those kernels.
223
Len Browna7296172015-01-23 01:33:58 -0500224AVG_MHz = APERF_delta/measurement_interval. This is the actual
225number of elapsed cycles divided by the entire sample interval --
Len Brownd8af6f52015-02-10 01:56:38 -0500226including idle time. Note that this calculation is resilient
Len Browna7296172015-01-23 01:33:58 -0500227to systems lacking a non-stop TSC.
228
229TSC_MHz = TSC_delta/measurement_interval.
230On a system with an invariant TSC, this value will be constant
231and will closely match the base frequency value shown
232in the brand string in /proc/cpuinfo. On a system where
233the TSC stops in idle, TSC_MHz will drop
234below the processor's base frequency.
235
236%Busy = MPERF_delta/TSC_delta
237
238Bzy_MHz = TSC_delta/APERF_delta/MPERF_delta/measurement_interval
239
240Note that these calculations depend on TSC_delta, so they
241are not reliable during intervals when TSC_MHz is not running at the base frequency.
242
243Turbostat data collection is not atomic.
244Extremely short measurement intervals (much less than 1 second),
245or system activity that prevents turbostat from being able
246to run on all CPUS to quickly collect data, will result in
247inconsistent results.
Len Brown2f32edf2012-09-21 23:45:46 -0400248
Len Brown103a8fe2010-10-22 23:53:03 -0400249The APERF, MPERF MSRs are defined to count non-halted cycles.
250Although it is not guaranteed by the architecture, turbostat assumes
251that they count at TSC rate, which is true on all processors tested to date.
252
253.SH REFERENCES
Len Brown103a8fe2010-10-22 23:53:03 -0400254Volume 3B: System Programming Guide"
255http://www.intel.com/products/processor/manuals/
256
257.SH FILES
258.ta
259.nf
260/dev/cpu/*/msr
261.fi
262
263.SH "SEE ALSO"
264msr(4), vmstat(8)
265.PP
Len Browne23da032012-02-06 18:37:16 -0500266.SH AUTHOR
Len Brown103a8fe2010-10-22 23:53:03 -0400267.nf
268Written by Len Brown <len.brown@intel.com>