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gerrit-public.fairphone.software / kernel / msm-5.4 / 2a171788ba7bb61995e98e8163204fc7880f63b2 / . / drivers / net / wireless / realtek / rtlwifi / rtl8188ee / trx.h
blob: f902d6769aa85df9d6eeb9c676f23ffe30e0d9ac [file] [log] [blame]
Larry Fingerf0eb8562013-03-24 22:06:42 -0500[diff] [blame]1/******************************************************************************
2 *
3 * Copyright(c) 2009-2013 Realtek Corporation.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
Larry Fingerf0eb8562013-03-24 22:06:42 -0500[diff] [blame]14 * The full GNU General Public License is included in this distribution in the
15 * file called LICENSE.
16 *
17 * Contact Information:
18 * wlanfae <wlanfae@realtek.com>
19 * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
20 * Hsinchu 300, Taiwan.
21 *
22 * Larry Finger <Larry.Finger@lwfinger.net>
23 *
24 *****************************************************************************/
25
26#ifndef __RTL92CE_TRX_H__
27#define __RTL92CE_TRX_H__
28
Larry Fingerc151aed2014-09-22 09:39:25 -0500[diff] [blame]29#define TX_DESC_SIZE 64
Larry Fingerf0eb8562013-03-24 22:06:42 -0500[diff] [blame]30#define TX_DESC_AGGR_SUBFRAME_SIZE 32
31
Larry Fingerc151aed2014-09-22 09:39:25 -0500[diff] [blame]32#define RX_DESC_SIZE 32
Larry Fingerf0eb8562013-03-24 22:06:42 -0500[diff] [blame]33#define RX_DRV_INFO_SIZE_UNIT 8
34
35#define TX_DESC_NEXT_DESC_OFFSET 40
36#define USB_HWDESC_HEADER_LEN 32
Larry Fingerc151aed2014-09-22 09:39:25 -0500[diff] [blame]37#define CRCLENGTH 4
Larry Fingerf0eb8562013-03-24 22:06:42 -0500[diff] [blame]38
39#define SET_TX_DESC_PKT_SIZE(__pdesc, __val) \
40 SET_BITS_TO_LE_4BYTE(__pdesc, 0, 16, __val)
Larry Fingerc151aed2014-09-22 09:39:25 -0500[diff] [blame]41#define SET_TX_DESC_OFFSET(__pdesc, __val) \
Larry Fingerf0eb8562013-03-24 22:06:42 -0500[diff] [blame]42 SET_BITS_TO_LE_4BYTE(__pdesc, 16, 8, __val)
Larry Fingerc151aed2014-09-22 09:39:25 -0500[diff] [blame]43#define SET_TX_DESC_BMC(__pdesc, __val) \
Larry Fingerf0eb8562013-03-24 22:06:42 -0500[diff] [blame]44 SET_BITS_TO_LE_4BYTE(__pdesc, 24, 1, __val)
Larry Fingerc151aed2014-09-22 09:39:25 -0500[diff] [blame]45#define SET_TX_DESC_HTC(__pdesc, __val) \
Larry Fingerf0eb8562013-03-24 22:06:42 -0500[diff] [blame]46 SET_BITS_TO_LE_4BYTE(__pdesc, 25, 1, __val)
47#define SET_TX_DESC_LAST_SEG(__pdesc, __val) \
48 SET_BITS_TO_LE_4BYTE(__pdesc, 26, 1, __val)
49#define SET_TX_DESC_FIRST_SEG(__pdesc, __val) \
50 SET_BITS_TO_LE_4BYTE(__pdesc, 27, 1, __val)
Larry Fingerc151aed2014-09-22 09:39:25 -0500[diff] [blame]51#define SET_TX_DESC_LINIP(__pdesc, __val) \
Larry Fingerf0eb8562013-03-24 22:06:42 -0500[diff] [blame]52 SET_BITS_TO_LE_4BYTE(__pdesc, 28, 1, __val)
Larry Fingerc151aed2014-09-22 09:39:25 -0500[diff] [blame]53#define SET_TX_DESC_NO_ACM(__pdesc, __val) \
Larry Fingerf0eb8562013-03-24 22:06:42 -0500[diff] [blame]54 SET_BITS_TO_LE_4BYTE(__pdesc, 29, 1, __val)
Larry Fingerc151aed2014-09-22 09:39:25 -0500[diff] [blame]55#define SET_TX_DESC_GF(__pdesc, __val) \
Larry Fingerf0eb8562013-03-24 22:06:42 -0500[diff] [blame]56 SET_BITS_TO_LE_4BYTE(__pdesc, 30, 1, __val)
Larry Fingerc151aed2014-09-22 09:39:25 -0500[diff] [blame]57#define SET_TX_DESC_OWN(__pdesc, __val) \
Larry Fingerf0eb8562013-03-24 22:06:42 -0500[diff] [blame]58 SET_BITS_TO_LE_4BYTE(__pdesc, 31, 1, __val)
59
Larry Fingerc151aed2014-09-22 09:39:25 -0500[diff] [blame]60#define GET_TX_DESC_PKT_SIZE(__pdesc) \
Larry Fingerf0eb8562013-03-24 22:06:42 -0500[diff] [blame]61 LE_BITS_TO_4BYTE(__pdesc, 0, 16)
Larry Fingerc151aed2014-09-22 09:39:25 -0500[diff] [blame]62#define GET_TX_DESC_OFFSET(__pdesc) \
Larry Fingerf0eb8562013-03-24 22:06:42 -0500[diff] [blame]63 LE_BITS_TO_4BYTE(__pdesc, 16, 8)
Larry Fingerc151aed2014-09-22 09:39:25 -0500[diff] [blame]64#define GET_TX_DESC_BMC(__pdesc) \
Larry Fingerf0eb8562013-03-24 22:06:42 -0500[diff] [blame]65 LE_BITS_TO_4BYTE(__pdesc, 24, 1)
Larry Fingerc151aed2014-09-22 09:39:25 -0500[diff] [blame]66#define GET_TX_DESC_HTC(__pdesc) \
Larry Fingerf0eb8562013-03-24 22:06:42 -0500[diff] [blame]67 LE_BITS_TO_4BYTE(__pdesc, 25, 1)
Larry Fingerc151aed2014-09-22 09:39:25 -0500[diff] [blame]68#define GET_TX_DESC_LAST_SEG(__pdesc) \
Larry Fingerf0eb8562013-03-24 22:06:42 -0500[diff] [blame]69 LE_BITS_TO_4BYTE(__pdesc, 26, 1)
Larry Fingerc151aed2014-09-22 09:39:25 -0500[diff] [blame]70#define GET_TX_DESC_FIRST_SEG(__pdesc) \
Larry Fingerf0eb8562013-03-24 22:06:42 -0500[diff] [blame]71 LE_BITS_TO_4BYTE(__pdesc, 27, 1)
Larry Fingerc151aed2014-09-22 09:39:25 -0500[diff] [blame]72#define GET_TX_DESC_LINIP(__pdesc) \
Larry Fingerf0eb8562013-03-24 22:06:42 -0500[diff] [blame]73 LE_BITS_TO_4BYTE(__pdesc, 28, 1)
Larry Fingerc151aed2014-09-22 09:39:25 -0500[diff] [blame]74#define GET_TX_DESC_NO_ACM(__pdesc) \
Larry Fingerf0eb8562013-03-24 22:06:42 -0500[diff] [blame]75 LE_BITS_TO_4BYTE(__pdesc, 29, 1)
Larry Fingerc151aed2014-09-22 09:39:25 -0500[diff] [blame]76#define GET_TX_DESC_GF(__pdesc) \
Larry Fingerf0eb8562013-03-24 22:06:42 -0500[diff] [blame]77 LE_BITS_TO_4BYTE(__pdesc, 30, 1)
Larry Fingerc151aed2014-09-22 09:39:25 -0500[diff] [blame]78#define GET_TX_DESC_OWN(__pdesc) \
Larry Fingerf0eb8562013-03-24 22:06:42 -0500[diff] [blame]79 LE_BITS_TO_4BYTE(__pdesc, 31, 1)
80
Larry Fingerc151aed2014-09-22 09:39:25 -0500[diff] [blame]81#define SET_TX_DESC_MACID(__pdesc, __val) \
Larry Fingerf0eb8562013-03-24 22:06:42 -0500[diff] [blame]82 SET_BITS_TO_LE_4BYTE(__pdesc+4, 0, 6, __val)
83#define SET_TX_DESC_QUEUE_SEL(__pdesc, __val) \
84 SET_BITS_TO_LE_4BYTE(__pdesc+4, 8, 5, __val)
85#define SET_TX_DESC_RDG_NAV_EXT(__pdesc, __val) \
86 SET_BITS_TO_LE_4BYTE(__pdesc+4, 13, 1, __val)
87#define SET_TX_DESC_LSIG_TXOP_EN(__pdesc, __val) \
88 SET_BITS_TO_LE_4BYTE(__pdesc+4, 14, 1, __val)
Larry Fingerc151aed2014-09-22 09:39:25 -0500[diff] [blame]89#define SET_TX_DESC_PIFS(__pdesc, __val) \
Larry Fingerf0eb8562013-03-24 22:06:42 -0500[diff] [blame]90 SET_BITS_TO_LE_4BYTE(__pdesc+4, 15, 1, __val)
91#define SET_TX_DESC_RATE_ID(__pdesc, __val) \
92 SET_BITS_TO_LE_4BYTE(__pdesc+4, 16, 4, __val)
Larry Fingerc151aed2014-09-22 09:39:25 -0500[diff] [blame]93#define SET_TX_DESC_NAV_USE_HDR(__pdesc, __val) \
Larry Fingerf0eb8562013-03-24 22:06:42 -0500[diff] [blame]94 SET_BITS_TO_LE_4BYTE(__pdesc+4, 20, 1, __val)
95#define SET_TX_DESC_EN_DESC_ID(__pdesc, __val) \
96 SET_BITS_TO_LE_4BYTE(__pdesc+4, 21, 1, __val)
97#define SET_TX_DESC_SEC_TYPE(__pdesc, __val) \
98 SET_BITS_TO_LE_4BYTE(__pdesc+4, 22, 2, __val)
99#define SET_TX_DESC_PKT_OFFSET(__pdesc, __val) \
100 SET_BITS_TO_LE_4BYTE(__pdesc+4, 26, 5, __val)
Larry Fingerc151aed2014-09-22 09:39:25 -0500[diff] [blame]101#define SET_TX_DESC_PADDING_LEN(__pdesc, __val) \
Larry Fingerf0eb8562013-03-24 22:06:42 -0500[diff] [blame]102 SET_BITS_TO_LE_4BYTE(__pdesc+4, 24, 8, __val)
103
Larry Fingerc151aed2014-09-22 09:39:25 -0500[diff] [blame]104#define GET_TX_DESC_MACID(__pdesc) \
Larry Fingerf0eb8562013-03-24 22:06:42 -0500[diff] [blame]105 LE_BITS_TO_4BYTE(__pdesc+4, 0, 5)
106#define GET_TX_DESC_AGG_ENABLE(__pdesc) \
107 LE_BITS_TO_4BYTE(__pdesc+4, 5, 1)
108#define GET_TX_DESC_AGG_BREAK(__pdesc) \
109 LE_BITS_TO_4BYTE(__pdesc+4, 6, 1)
110#define GET_TX_DESC_RDG_ENABLE(__pdesc) \
111 LE_BITS_TO_4BYTE(__pdesc+4, 7, 1)
112#define GET_TX_DESC_QUEUE_SEL(__pdesc) \
113 LE_BITS_TO_4BYTE(__pdesc+4, 8, 5)
114#define GET_TX_DESC_RDG_NAV_EXT(__pdesc) \
115 LE_BITS_TO_4BYTE(__pdesc+4, 13, 1)
116#define GET_TX_DESC_LSIG_TXOP_EN(__pdesc) \
117 LE_BITS_TO_4BYTE(__pdesc+4, 14, 1)
Larry Fingerc151aed2014-09-22 09:39:25 -0500[diff] [blame]118#define GET_TX_DESC_PIFS(__pdesc) \
Larry Fingerf0eb8562013-03-24 22:06:42 -0500[diff] [blame]119 LE_BITS_TO_4BYTE(__pdesc+4, 15, 1)
120#define GET_TX_DESC_RATE_ID(__pdesc) \
121 LE_BITS_TO_4BYTE(__pdesc+4, 16, 4)
122#define GET_TX_DESC_NAV_USE_HDR(__pdesc) \
123 LE_BITS_TO_4BYTE(__pdesc+4, 20, 1)
124#define GET_TX_DESC_EN_DESC_ID(__pdesc) \
125 LE_BITS_TO_4BYTE(__pdesc+4, 21, 1)
126#define GET_TX_DESC_SEC_TYPE(__pdesc) \
127 LE_BITS_TO_4BYTE(__pdesc+4, 22, 2)
128#define GET_TX_DESC_PKT_OFFSET(__pdesc) \
129 LE_BITS_TO_4BYTE(__pdesc+4, 24, 8)
130
131#define SET_TX_DESC_RTS_RC(__pdesc, __val) \
132 SET_BITS_TO_LE_4BYTE(__pdesc+8, 0, 6, __val)
133#define SET_TX_DESC_DATA_RC(__pdesc, __val) \
134 SET_BITS_TO_LE_4BYTE(__pdesc+8, 6, 6, __val)
135#define SET_TX_DESC_AGG_ENABLE(__pdesc, __val) \
136 SET_BITS_TO_LE_4BYTE(__pdesc+8, 12, 1, __val)
137#define SET_TX_DESC_RDG_ENABLE(__pdesc, __val) \
138 SET_BITS_TO_LE_4BYTE(__pdesc+8, 13, 1, __val)
139#define SET_TX_DESC_BAR_RTY_TH(__pdesc, __val) \
140 SET_BITS_TO_LE_4BYTE(__pdesc+8, 14, 2, __val)
141#define SET_TX_DESC_AGG_BREAK(__pdesc, __val) \
142 SET_BITS_TO_LE_4BYTE(__pdesc+8, 16, 1, __val)
143#define SET_TX_DESC_MORE_FRAG(__pdesc, __val) \
144 SET_BITS_TO_LE_4BYTE(__pdesc+8, 17, 1, __val)
145#define SET_TX_DESC_RAW(__pdesc, __val) \
146 SET_BITS_TO_LE_4BYTE(__pdesc+8, 18, 1, __val)
147#define SET_TX_DESC_CCX(__pdesc, __val) \
148 SET_BITS_TO_LE_4BYTE(__pdesc+8, 19, 1, __val)
149#define SET_TX_DESC_AMPDU_DENSITY(__pdesc, __val) \
150 SET_BITS_TO_LE_4BYTE(__pdesc+8, 20, 3, __val)
151#define SET_TX_DESC_BT_INT(__pdesc, __val) \
152 SET_BITS_TO_LE_4BYTE(__pdesc+8, 23, 1, __val)
153#define SET_TX_DESC_ANTSEL_A(__pdesc, __val) \
154 SET_BITS_TO_LE_4BYTE(__pdesc+8, 24, 1, __val)
155#define SET_TX_DESC_ANTSEL_B(__pdesc, __val) \
156 SET_BITS_TO_LE_4BYTE(__pdesc+8, 25, 1, __val)
157#define SET_TX_DESC_TX_ANT_CCK(__pdesc, __val) \
158 SET_BITS_TO_LE_4BYTE(__pdesc+8, 26, 2, __val)
159#define SET_TX_DESC_TX_ANTL(__pdesc, __val) \
160 SET_BITS_TO_LE_4BYTE(__pdesc+8, 28, 2, __val)
161#define SET_TX_DESC_TX_ANT_HT(__pdesc, __val) \
162 SET_BITS_TO_LE_4BYTE(__pdesc+8, 30, 2, __val)
163
164#define GET_TX_DESC_RTS_RC(__pdesc) \
165 LE_BITS_TO_4BYTE(__pdesc+8, 0, 6)
166#define GET_TX_DESC_DATA_RC(__pdesc) \
167 LE_BITS_TO_4BYTE(__pdesc+8, 6, 6)
168#define GET_TX_DESC_BAR_RTY_TH(__pdesc) \
169 LE_BITS_TO_4BYTE(__pdesc+8, 14, 2)
170#define GET_TX_DESC_MORE_FRAG(__pdesc) \
171 LE_BITS_TO_4BYTE(__pdesc+8, 17, 1)
172#define GET_TX_DESC_RAW(__pdesc) \
173 LE_BITS_TO_4BYTE(__pdesc+8, 18, 1)
174#define GET_TX_DESC_CCX(__pdesc) \
175 LE_BITS_TO_4BYTE(__pdesc+8, 19, 1)
176#define GET_TX_DESC_AMPDU_DENSITY(__pdesc) \
177 LE_BITS_TO_4BYTE(__pdesc+8, 20, 3)
178#define GET_TX_DESC_ANTSEL_A(__pdesc) \
179 LE_BITS_TO_4BYTE(__pdesc+8, 24, 1)
180#define GET_TX_DESC_ANTSEL_B(__pdesc) \
181 LE_BITS_TO_4BYTE(__pdesc+8, 25, 1)
182#define GET_TX_DESC_TX_ANT_CCK(__pdesc) \
183 LE_BITS_TO_4BYTE(__pdesc+8, 26, 2)
184#define GET_TX_DESC_TX_ANTL(__pdesc) \
185 LE_BITS_TO_4BYTE(__pdesc+8, 28, 2)
186#define GET_TX_DESC_TX_ANT_HT(__pdesc) \
187 LE_BITS_TO_4BYTE(__pdesc+8, 30, 2)
188
189#define SET_TX_DESC_NEXT_HEAP_PAGE(__pdesc, __val) \
190 SET_BITS_TO_LE_4BYTE(__pdesc+12, 0, 8, __val)
191#define SET_TX_DESC_TAIL_PAGE(__pdesc, __val) \
192 SET_BITS_TO_LE_4BYTE(__pdesc+12, 8, 8, __val)
193#define SET_TX_DESC_SEQ(__pdesc, __val) \
194 SET_BITS_TO_LE_4BYTE(__pdesc+12, 16, 12, __val)
195#define SET_TX_DESC_CPU_HANDLE(__pdesc, __val) \
196 SET_BITS_TO_LE_4BYTE(__pdesc+12, 28, 1, __val)
197#define SET_TX_DESC_TAG1(__pdesc, __val) \
198 SET_BITS_TO_LE_4BYTE(__pdesc+12, 29, 1, __val)
199#define SET_TX_DESC_TRIGGER_INT(__pdesc, __val) \
200 SET_BITS_TO_LE_4BYTE(__pdesc+12, 30, 1, __val)
201#define SET_TX_DESC_HWSEQ_EN(__pdesc, __val) \
202 SET_BITS_TO_LE_4BYTE(__pdesc+12, 31, 1, __val)
203
Larry Fingerf0eb8562013-03-24 22:06:42 -0500[diff] [blame]204#define GET_TX_DESC_NEXT_HEAP_PAGE(__pdesc) \
205 LE_BITS_TO_4BYTE(__pdesc+12, 0, 8)
206#define GET_TX_DESC_TAIL_PAGE(__pdesc) \
207 LE_BITS_TO_4BYTE(__pdesc+12, 8, 8)
208#define GET_TX_DESC_SEQ(__pdesc) \
209 LE_BITS_TO_4BYTE(__pdesc+12, 16, 12)
210
Larry Fingerf0eb8562013-03-24 22:06:42 -0500[diff] [blame]211#define SET_TX_DESC_RTS_RATE(__pdesc, __val) \
212 SET_BITS_TO_LE_4BYTE(__pdesc+16, 0, 5, __val)
213#define SET_TX_DESC_AP_DCFE(__pdesc, __val) \
214 SET_BITS_TO_LE_4BYTE(__pdesc+16, 5, 1, __val)
215#define SET_TX_DESC_QOS(__pdesc, __val) \
216 SET_BITS_TO_LE_4BYTE(__pdesc+16, 6, 1, __val)
217#define SET_TX_DESC_HWSEQ_SSN(__pdesc, __val) \
218 SET_BITS_TO_LE_4BYTE(__pdesc+16, 7, 1, __val)
219#define SET_TX_DESC_USE_RATE(__pdesc, __val) \
220 SET_BITS_TO_LE_4BYTE(__pdesc+16, 8, 1, __val)
221#define SET_TX_DESC_DISABLE_RTS_FB(__pdesc, __val) \
222 SET_BITS_TO_LE_4BYTE(__pdesc+16, 9, 1, __val)
223#define SET_TX_DESC_DISABLE_FB(__pdesc, __val) \
224 SET_BITS_TO_LE_4BYTE(__pdesc+16, 10, 1, __val)
225#define SET_TX_DESC_CTS2SELF(__pdesc, __val) \
226 SET_BITS_TO_LE_4BYTE(__pdesc+16, 11, 1, __val)
227#define SET_TX_DESC_RTS_ENABLE(__pdesc, __val) \
228 SET_BITS_TO_LE_4BYTE(__pdesc+16, 12, 1, __val)
229#define SET_TX_DESC_HW_RTS_ENABLE(__pdesc, __val) \
230 SET_BITS_TO_LE_4BYTE(__pdesc+16, 13, 1, __val)
231#define SET_TX_DESC_PORT_ID(__pdesc, __val) \
232 SET_BITS_TO_LE_4BYTE(__pdesc+16, 14, 1, __val)
233#define SET_TX_DESC_PWR_STATUS(__pdesc, __val) \
234 SET_BITS_TO_LE_4BYTE(__pdesc+16, 15, 3, __val)
235#define SET_TX_DESC_WAIT_DCTS(__pdesc, __val) \
236 SET_BITS_TO_LE_4BYTE(__pdesc+16, 18, 1, __val)
237#define SET_TX_DESC_CTS2AP_EN(__pdesc, __val) \
238 SET_BITS_TO_LE_4BYTE(__pdesc+16, 19, 1, __val)
239#define SET_TX_DESC_TX_SUB_CARRIER(__pdesc, __val) \
240 SET_BITS_TO_LE_4BYTE(__pdesc+16, 20, 2, __val)
241#define SET_TX_DESC_TX_STBC(__pdesc, __val) \
242 SET_BITS_TO_LE_4BYTE(__pdesc+16, 22, 2, __val)
243#define SET_TX_DESC_DATA_SHORT(__pdesc, __val) \
244 SET_BITS_TO_LE_4BYTE(__pdesc+16, 24, 1, __val)
245#define SET_TX_DESC_DATA_BW(__pdesc, __val) \
246 SET_BITS_TO_LE_4BYTE(__pdesc+16, 25, 1, __val)
247#define SET_TX_DESC_RTS_SHORT(__pdesc, __val) \
248 SET_BITS_TO_LE_4BYTE(__pdesc+16, 26, 1, __val)
249#define SET_TX_DESC_RTS_BW(__pdesc, __val) \
250 SET_BITS_TO_LE_4BYTE(__pdesc+16, 27, 1, __val)
251#define SET_TX_DESC_RTS_SC(__pdesc, __val) \
252 SET_BITS_TO_LE_4BYTE(__pdesc+16, 28, 2, __val)
253#define SET_TX_DESC_RTS_STBC(__pdesc, __val) \
254 SET_BITS_TO_LE_4BYTE(__pdesc+16, 30, 2, __val)
255
256#define GET_TX_DESC_RTS_RATE(__pdesc) \
257 LE_BITS_TO_4BYTE(__pdesc+16, 0, 5)
258#define GET_TX_DESC_AP_DCFE(__pdesc) \
259 LE_BITS_TO_4BYTE(__pdesc+16, 5, 1)
260#define GET_TX_DESC_QOS(__pdesc) \
261 LE_BITS_TO_4BYTE(__pdesc+16, 6, 1)
262#define GET_TX_DESC_HWSEQ_EN(__pdesc) \
263 LE_BITS_TO_4BYTE(__pdesc+16, 7, 1)
264#define GET_TX_DESC_USE_RATE(__pdesc) \
265 LE_BITS_TO_4BYTE(__pdesc+16, 8, 1)
266#define GET_TX_DESC_DISABLE_RTS_FB(__pdesc) \
267 LE_BITS_TO_4BYTE(__pdesc+16, 9, 1)
268#define GET_TX_DESC_DISABLE_FB(__pdesc) \
269 LE_BITS_TO_4BYTE(__pdesc+16, 10, 1)
270#define GET_TX_DESC_CTS2SELF(__pdesc) \
271 LE_BITS_TO_4BYTE(__pdesc+16, 11, 1)
272#define GET_TX_DESC_RTS_ENABLE(__pdesc) \
273 LE_BITS_TO_4BYTE(__pdesc+16, 12, 1)
274#define GET_TX_DESC_HW_RTS_ENABLE(__pdesc) \
275 LE_BITS_TO_4BYTE(__pdesc+16, 13, 1)
276#define GET_TX_DESC_PORT_ID(__pdesc) \
277 LE_BITS_TO_4BYTE(__pdesc+16, 14, 1)
278#define GET_TX_DESC_WAIT_DCTS(__pdesc) \
279 LE_BITS_TO_4BYTE(__pdesc+16, 18, 1)
280#define GET_TX_DESC_CTS2AP_EN(__pdesc) \
281 LE_BITS_TO_4BYTE(__pdesc+16, 19, 1)
282#define GET_TX_DESC_TX_SUB_CARRIER(__pdesc) \
283 LE_BITS_TO_4BYTE(__pdesc+16, 20, 2)
284#define GET_TX_DESC_TX_STBC(__pdesc) \
285 LE_BITS_TO_4BYTE(__pdesc+16, 22, 2)
286#define GET_TX_DESC_DATA_SHORT(__pdesc) \
287 LE_BITS_TO_4BYTE(__pdesc+16, 24, 1)
288#define GET_TX_DESC_DATA_BW(__pdesc) \
289 LE_BITS_TO_4BYTE(__pdesc+16, 25, 1)
290#define GET_TX_DESC_RTS_SHORT(__pdesc) \
291 LE_BITS_TO_4BYTE(__pdesc+16, 26, 1)
292#define GET_TX_DESC_RTS_BW(__pdesc) \
293 LE_BITS_TO_4BYTE(__pdesc+16, 27, 1)
294#define GET_TX_DESC_RTS_SC(__pdesc) \
295 LE_BITS_TO_4BYTE(__pdesc+16, 28, 2)
296#define GET_TX_DESC_RTS_STBC(__pdesc) \
297 LE_BITS_TO_4BYTE(__pdesc+16, 30, 2)
298
299#define SET_TX_DESC_TX_RATE(__pdesc, __val) \
300 SET_BITS_TO_LE_4BYTE(__pdesc+20, 0, 6, __val)
301#define SET_TX_DESC_DATA_SHORTGI(__pdesc, __val) \
302 SET_BITS_TO_LE_4BYTE(__pdesc+20, 6, 1, __val)
303#define SET_TX_DESC_CCX_TAG(__pdesc, __val) \
304 SET_BITS_TO_LE_4BYTE(__pdesc+20, 7, 1, __val)
305#define SET_TX_DESC_DATA_RATE_FB_LIMIT(__pdesc, __val) \
306 SET_BITS_TO_LE_4BYTE(__pdesc+20, 8, 5, __val)
307#define SET_TX_DESC_RTS_RATE_FB_LIMIT(__pdesc, __val) \
308 SET_BITS_TO_LE_4BYTE(__pdesc+20, 13, 4, __val)
309#define SET_TX_DESC_RETRY_LIMIT_ENABLE(__pdesc, __val) \
310 SET_BITS_TO_LE_4BYTE(__pdesc+20, 17, 1, __val)
311#define SET_TX_DESC_DATA_RETRY_LIMIT(__pdesc, __val) \
312 SET_BITS_TO_LE_4BYTE(__pdesc+20, 18, 6, __val)
313#define SET_TX_DESC_USB_TXAGG_NUM(__pdesc, __val) \
314 SET_BITS_TO_LE_4BYTE(__pdesc+20, 24, 8, __val)
315
316#define GET_TX_DESC_TX_RATE(__pdesc) \
317 LE_BITS_TO_4BYTE(__pdesc+20, 0, 6)
318#define GET_TX_DESC_DATA_SHORTGI(__pdesc) \
319 LE_BITS_TO_4BYTE(__pdesc+20, 6, 1)
320#define GET_TX_DESC_CCX_TAG(__pdesc) \
321 LE_BITS_TO_4BYTE(__pdesc+20, 7, 1)
322#define GET_TX_DESC_DATA_RATE_FB_LIMIT(__pdesc) \
323 LE_BITS_TO_4BYTE(__pdesc+20, 8, 5)
324#define GET_TX_DESC_RTS_RATE_FB_LIMIT(__pdesc) \
325 LE_BITS_TO_4BYTE(__pdesc+20, 13, 4)
326#define GET_TX_DESC_RETRY_LIMIT_ENABLE(__pdesc) \
327 LE_BITS_TO_4BYTE(__pdesc+20, 17, 1)
328#define GET_TX_DESC_DATA_RETRY_LIMIT(__pdesc) \
329 LE_BITS_TO_4BYTE(__pdesc+20, 18, 6)
330#define GET_TX_DESC_USB_TXAGG_NUM(__pdesc) \
331 LE_BITS_TO_4BYTE(__pdesc+20, 24, 8)
332
333#define SET_TX_DESC_TXAGC_A(__pdesc, __val) \
334 SET_BITS_TO_LE_4BYTE(__pdesc+24, 0, 5, __val)
335#define SET_TX_DESC_TXAGC_B(__pdesc, __val) \
336 SET_BITS_TO_LE_4BYTE(__pdesc+24, 5, 5, __val)
337#define SET_TX_DESC_USE_MAX_LEN(__pdesc, __val) \
338 SET_BITS_TO_LE_4BYTE(__pdesc+24, 10, 1, __val)
339#define SET_TX_DESC_MAX_AGG_NUM(__pdesc, __val) \
340 SET_BITS_TO_LE_4BYTE(__pdesc+24, 11, 5, __val)
341#define SET_TX_DESC_MCSG1_MAX_LEN(__pdesc, __val) \
342 SET_BITS_TO_LE_4BYTE(__pdesc+24, 16, 4, __val)
343#define SET_TX_DESC_MCSG2_MAX_LEN(__pdesc, __val) \
344 SET_BITS_TO_LE_4BYTE(__pdesc+24, 20, 4, __val)
345#define SET_TX_DESC_MCSG3_MAX_LEN(__pdesc, __val) \
346 SET_BITS_TO_LE_4BYTE(__pdesc+24, 24, 4, __val)
347#define SET_TX_DESC_MCS7_SGI_MAX_LEN(__pdesc, __val) \
348 SET_BITS_TO_LE_4BYTE(__pdesc+24, 28, 4, __val)
349
350#define GET_TX_DESC_TXAGC_A(__pdesc) \
351 LE_BITS_TO_4BYTE(__pdesc+24, 0, 5)
352#define GET_TX_DESC_TXAGC_B(__pdesc) \
353 LE_BITS_TO_4BYTE(__pdesc+24, 5, 5)
354#define GET_TX_DESC_USE_MAX_LEN(__pdesc) \
355 LE_BITS_TO_4BYTE(__pdesc+24, 10, 1)
356#define GET_TX_DESC_MAX_AGG_NUM(__pdesc) \
357 LE_BITS_TO_4BYTE(__pdesc+24, 11, 5)
358#define GET_TX_DESC_MCSG1_MAX_LEN(__pdesc) \
359 LE_BITS_TO_4BYTE(__pdesc+24, 16, 4)
360#define GET_TX_DESC_MCSG2_MAX_LEN(__pdesc) \
361 LE_BITS_TO_4BYTE(__pdesc+24, 20, 4)
362#define GET_TX_DESC_MCSG3_MAX_LEN(__pdesc) \
363 LE_BITS_TO_4BYTE(__pdesc+24, 24, 4)
364#define GET_TX_DESC_MCS7_SGI_MAX_LEN(__pdesc) \
365 LE_BITS_TO_4BYTE(__pdesc+24, 28, 4)
366
367#define SET_TX_DESC_TX_BUFFER_SIZE(__pdesc, __val) \
368 SET_BITS_TO_LE_4BYTE(__pdesc+28, 0, 16, __val)
369#define SET_TX_DESC_SW_OFFSET30(__pdesc, __val) \
370 SET_BITS_TO_LE_4BYTE(__pdesc+28, 16, 8, __val)
371#define SET_TX_DESC_SW_OFFSET31(__pdesc, __val) \
372 SET_BITS_TO_LE_4BYTE(__pdesc+28, 24, 4, __val)
373#define SET_TX_DESC_ANTSEL_C(__pdesc, __val) \
374 SET_BITS_TO_LE_4BYTE(__pdesc+28, 29, 1, __val)
375#define SET_TX_DESC_NULL_0(__pdesc, __val) \
376 SET_BITS_TO_LE_4BYTE(__pdesc+28, 30, 1, __val)
377#define SET_TX_DESC_NULL_1(__pdesc, __val) \
378 SET_BITS_TO_LE_4BYTE(__pdesc+28, 30, 1, __val)
379
380#define GET_TX_DESC_TX_BUFFER_SIZE(__pdesc) \
381 LE_BITS_TO_4BYTE(__pdesc+28, 0, 16)
382
Larry Fingerf0eb8562013-03-24 22:06:42 -0500[diff] [blame]383#define SET_TX_DESC_TX_BUFFER_ADDRESS(__pdesc, __val) \
384 SET_BITS_TO_LE_4BYTE(__pdesc+32, 0, 32, __val)
385#define SET_TX_DESC_TX_BUFFER_ADDRESS64(__pdesc, __val) \
386 SET_BITS_TO_LE_4BYTE(__pdesc+36, 0, 32, __val)
387
388#define GET_TX_DESC_TX_BUFFER_ADDRESS(__pdesc) \
389 LE_BITS_TO_4BYTE(__pdesc+32, 0, 32)
390#define GET_TX_DESC_TX_BUFFER_ADDRESS64(__pdesc) \
391 LE_BITS_TO_4BYTE(__pdesc+36, 0, 32)
392
393#define SET_TX_DESC_NEXT_DESC_ADDRESS(__pdesc, __val) \
394 SET_BITS_TO_LE_4BYTE(__pdesc+40, 0, 32, __val)
395#define SET_TX_DESC_NEXT_DESC_ADDRESS64(__pdesc, __val) \
396 SET_BITS_TO_LE_4BYTE(__pdesc+44, 0, 32, __val)
397
398#define GET_TX_DESC_NEXT_DESC_ADDRESS(__pdesc) \
399 LE_BITS_TO_4BYTE(__pdesc+40, 0, 32)
400#define GET_TX_DESC_NEXT_DESC_ADDRESS64(__pdesc) \
401 LE_BITS_TO_4BYTE(__pdesc+44, 0, 32)
402
403#define GET_RX_DESC_PKT_LEN(__pdesc) \
404 LE_BITS_TO_4BYTE(__pdesc, 0, 14)
405#define GET_RX_DESC_CRC32(__pdesc) \
406 LE_BITS_TO_4BYTE(__pdesc, 14, 1)
407#define GET_RX_DESC_ICV(__pdesc) \
408 LE_BITS_TO_4BYTE(__pdesc, 15, 1)
409#define GET_RX_DESC_DRV_INFO_SIZE(__pdesc) \
410 LE_BITS_TO_4BYTE(__pdesc, 16, 4)
411#define GET_RX_DESC_SECURITY(__pdesc) \
412 LE_BITS_TO_4BYTE(__pdesc, 20, 3)
413#define GET_RX_DESC_QOS(__pdesc) \
414 LE_BITS_TO_4BYTE(__pdesc, 23, 1)
415#define GET_RX_DESC_SHIFT(__pdesc) \
416 LE_BITS_TO_4BYTE(__pdesc, 24, 2)
417#define GET_RX_DESC_PHYST(__pdesc) \
418 LE_BITS_TO_4BYTE(__pdesc, 26, 1)
419#define GET_RX_DESC_SWDEC(__pdesc) \
420 LE_BITS_TO_4BYTE(__pdesc, 27, 1)
421#define GET_RX_DESC_LS(__pdesc) \
422 LE_BITS_TO_4BYTE(__pdesc, 28, 1)
423#define GET_RX_DESC_FS(__pdesc) \
424 LE_BITS_TO_4BYTE(__pdesc, 29, 1)
425#define GET_RX_DESC_EOR(__pdesc) \
426 LE_BITS_TO_4BYTE(__pdesc, 30, 1)
427#define GET_RX_DESC_OWN(__pdesc) \
428 LE_BITS_TO_4BYTE(__pdesc, 31, 1)
429
430#define SET_RX_DESC_PKT_LEN(__pdesc, __val) \
431 SET_BITS_TO_LE_4BYTE(__pdesc, 0, 14, __val)
432#define SET_RX_DESC_EOR(__pdesc, __val) \
433 SET_BITS_TO_LE_4BYTE(__pdesc, 30, 1, __val)
434#define SET_RX_DESC_OWN(__pdesc, __val) \
435 SET_BITS_TO_LE_4BYTE(__pdesc, 31, 1, __val)
436
437#define GET_RX_DESC_MACID(__pdesc) \
438 LE_BITS_TO_4BYTE(__pdesc+4, 0, 6)
439#define GET_RX_DESC_PAGGR(__pdesc) \
440 LE_BITS_TO_4BYTE(__pdesc+4, 14, 1)
441#define GET_RX_DESC_FAGGR(__pdesc) \
442 LE_BITS_TO_4BYTE(__pdesc+4, 15, 1)
443#define GET_RX_DESC_A1_FIT(__pdesc) \
444 LE_BITS_TO_4BYTE(__pdesc+4, 16, 4)
445#define GET_RX_DESC_A2_FIT(__pdesc) \
446 LE_BITS_TO_4BYTE(__pdesc+4, 20, 4)
447#define GET_RX_DESC_PAM(__pdesc) \
448 LE_BITS_TO_4BYTE(__pdesc+4, 24, 1)
449#define GET_RX_DESC_PWR(__pdesc) \
450 LE_BITS_TO_4BYTE(__pdesc+4, 25, 1)
451#define GET_RX_DESC_MD(__pdesc) \
452 LE_BITS_TO_4BYTE(__pdesc+4, 26, 1)
453#define GET_RX_DESC_MF(__pdesc) \
454 LE_BITS_TO_4BYTE(__pdesc+4, 27, 1)
455#define GET_RX_DESC_TYPE(__pdesc) \
456 LE_BITS_TO_4BYTE(__pdesc+4, 28, 2)
457#define GET_RX_DESC_MC(__pdesc) \
458 LE_BITS_TO_4BYTE(__pdesc+4, 30, 1)
459#define GET_RX_DESC_BC(__pdesc) \
460 LE_BITS_TO_4BYTE(__pdesc+4, 31, 1)
461#define GET_RX_DESC_SEQ(__pdesc) \
462 LE_BITS_TO_4BYTE(__pdesc+8, 0, 12)
463#define GET_RX_DESC_FRAG(__pdesc) \
464 LE_BITS_TO_4BYTE(__pdesc+8, 12, 4)
465
466#define GET_RX_DESC_RXMCS(__pdesc) \
467 LE_BITS_TO_4BYTE(__pdesc+12, 0, 6)
468#define GET_RX_DESC_RXHT(__pdesc) \
469 LE_BITS_TO_4BYTE(__pdesc+12, 6, 1)
470#define GET_RX_STATUS_DESC_RX_GF(__pdesc) \
471 LE_BITS_TO_4BYTE(__pdesc+12, 7, 1)
472#define GET_RX_DESC_SPLCP(__pdesc) \
473 LE_BITS_TO_4BYTE(__pdesc+12, 8, 1)
474#define GET_RX_DESC_BW(__pdesc) \
475 LE_BITS_TO_4BYTE(__pdesc+12, 9, 1)
476#define GET_RX_DESC_HTC(__pdesc) \
477 LE_BITS_TO_4BYTE(__pdesc+12, 10, 1)
478#define GET_RX_STATUS_DESC_EOSP(__pdesc) \
479 LE_BITS_TO_4BYTE(__pdesc+12, 11, 1)
480#define GET_RX_STATUS_DESC_BSSID_FIT(__pdesc) \
481 LE_BITS_TO_4BYTE(__pdesc+12, 12, 2)
482#define GET_RX_STATUS_DESC_RPT_SEL(__pdesc) \
483 LE_BITS_TO_4BYTE(__pdesc+12, 14, 2)
484
485#define GET_RX_STATUS_DESC_PATTERN_MATCH(__pdesc) \
486 LE_BITS_TO_4BYTE(__pdesc+12, 29, 1)
487#define GET_RX_STATUS_DESC_UNICAST_MATCH(__pdesc) \
488 LE_BITS_TO_4BYTE(__pdesc+12, 30, 1)
489#define GET_RX_STATUS_DESC_MAGIC_MATCH(__pdesc) \
490 LE_BITS_TO_4BYTE(__pdesc+12, 31, 1)
491
492#define GET_RX_DESC_IV1(__pdesc) \
493 LE_BITS_TO_4BYTE(__pdesc+16, 0, 32)
494#define GET_RX_DESC_TSFL(__pdesc) \
495 LE_BITS_TO_4BYTE(__pdesc+20, 0, 32)
496
497#define GET_RX_DESC_BUFF_ADDR(__pdesc) \
498 LE_BITS_TO_4BYTE(__pdesc+24, 0, 32)
499#define GET_RX_DESC_BUFF_ADDR64(__pdesc) \
500 LE_BITS_TO_4BYTE(__pdesc+28, 0, 32)
501
502#define SET_RX_DESC_BUFF_ADDR(__pdesc, __val) \
503 SET_BITS_TO_LE_4BYTE(__pdesc+24, 0, 32, __val)
504#define SET_RX_DESC_BUFF_ADDR64(__pdesc, __val) \
505 SET_BITS_TO_LE_4BYTE(__pdesc+28, 0, 32, __val)
506
507/* TX report 2 format in Rx desc*/
508
509#define GET_RX_RPT2_DESC_PKT_LEN(__status) \
510 LE_BITS_TO_4BYTE(__status, 0, 9)
511#define GET_RX_RPT2_DESC_MACID_VALID_1(__status) \
512 LE_BITS_TO_4BYTE(__status+16, 0, 32)
513#define GET_RX_RPT2_DESC_MACID_VALID_2(__status) \
514 LE_BITS_TO_4BYTE(__status+20, 0, 32)
515
516#define SET_EARLYMODE_PKTNUM(__paddr, __value) \
517 SET_BITS_TO_LE_4BYTE(__paddr, 0, 4, __value)
518#define SET_EARLYMODE_LEN0(__paddr, __value) \
519 SET_BITS_TO_LE_4BYTE(__paddr, 4, 12, __value)
520#define SET_EARLYMODE_LEN1(__paddr, __value) \
521 SET_BITS_TO_LE_4BYTE(__paddr, 16, 12, __value)
522#define SET_EARLYMODE_LEN2_1(__paddr, __value) \
523 SET_BITS_TO_LE_4BYTE(__paddr, 28, 4, __value)
524#define SET_EARLYMODE_LEN2_2(__paddr, __value) \
525 SET_BITS_TO_LE_4BYTE(__paddr+4, 0, 8, __value)
526#define SET_EARLYMODE_LEN3(__paddr, __value) \
527 SET_BITS_TO_LE_4BYTE(__paddr+4, 8, 12, __value)
528#define SET_EARLYMODE_LEN4(__paddr, __value) \
529 SET_BITS_TO_LE_4BYTE(__paddr+4, 20, 12, __value)
530
531#define CLEAR_PCI_TX_DESC_CONTENT(__pdesc, _size) \
532do { \
533 if (_size > TX_DESC_NEXT_DESC_OFFSET) \
534 memset(__pdesc, 0, TX_DESC_NEXT_DESC_OFFSET); \
535 else \
536 memset(__pdesc, 0, _size); \
537} while (0)
538
539#define RTL8188_RX_HAL_IS_CCK_RATE(rxmcs)\
540 (rxmcs == DESC92C_RATE1M ||\
541 rxmcs == DESC92C_RATE2M ||\
542 rxmcs == DESC92C_RATE5_5M ||\
543 rxmcs == DESC92C_RATE11M)
544
Larry Fingerc151aed2014-09-22 09:39:25 -0500[diff] [blame]545#define IS_LITTLE_ENDIAN 1
546
Larry Fingerf0eb8562013-03-24 22:06:42 -0500[diff] [blame]547struct phy_rx_agc_info_t {
Larry Fingerc151aed2014-09-22 09:39:25 -0500[diff] [blame]548 #if IS_LITTLE_ENDIAN
Larry Fingerf0eb8562013-03-24 22:06:42 -0500[diff] [blame]549 u8 gain:7, trsw:1;
550 #else
551 u8 trsw:1, gain:7;
552 #endif
553};
554struct phy_status_rpt {
555 struct phy_rx_agc_info_t path_agc[2];
556 u8 ch_corr[2];
557 u8 cck_sig_qual_ofdm_pwdb_all;
558 u8 cck_agc_rpt_ofdm_cfosho_a;
559 u8 cck_rpt_b_ofdm_cfosho_b;
Larry Fingerc151aed2014-09-22 09:39:25 -0500[diff] [blame]560 u8 rsvd_1;/* ch_corr_msb; */
Larry Fingerf0eb8562013-03-24 22:06:42 -0500[diff] [blame]561 u8 noise_power_db_msb;
562 u8 path_cfotail[2];
563 u8 pcts_mask[2];
564 u8 stream_rxevm[2];
565 u8 path_rxsnr[2];
566 u8 noise_power_db_lsb;
567 u8 rsvd_2[3];
568 u8 stream_csi[2];
569 u8 stream_target_csi[2];
570 u8 sig_evm;
571 u8 rsvd_3;
Larry Fingerc151aed2014-09-22 09:39:25 -0500[diff] [blame]572#if IS_LITTLE_ENDIAN
Larry Fingerf0eb8562013-03-24 22:06:42 -0500[diff] [blame]573 u8 antsel_rx_keep_2:1; /*ex_intf_flg:1;*/
574 u8 sgi_en:1;
575 u8 rxsc:2;
576 u8 idle_long:1;
577 u8 r_ant_train_en:1;
578 u8 ant_sel_b:1;
579 u8 ant_sel:1;
580#else /* _BIG_ENDIAN_ */
581 u8 ant_sel:1;
582 u8 ant_sel_b:1;
583 u8 r_ant_train_en:1;
584 u8 idle_long:1;
585 u8 rxsc:2;
586 u8 sgi_en:1;
587 u8 antsel_rx_keep_2:1; /*ex_intf_flg:1;*/
588#endif
589} __packed;
590
591struct rx_fwinfo_88e {
592 u8 gain_trsw[4];
593 u8 pwdb_all;
594 u8 cfosho[4];
595 u8 cfotail[4];
Arnd Bergmann08aba422016-06-15 23:30:43 +0200[diff] [blame]596 s8 rxevm[2];
597 s8 rxsnr[4];
Larry Fingerf0eb8562013-03-24 22:06:42 -0500[diff] [blame]598 u8 pdsnr[2];
599 u8 csi_current[2];
600 u8 csi_target[2];
601 u8 sigevm;
602 u8 max_ex_pwr;
603 u8 ex_intf_flag:1;
604 u8 sgi_en:1;
605 u8 rxsc:2;
606 u8 reserve:4;
607} __packed;
608
609struct tx_desc_88e {
610 u32 pktsize:16;
611 u32 offset:8;
612 u32 bmc:1;
613 u32 htc:1;
614 u32 lastseg:1;
615 u32 firstseg:1;
616 u32 linip:1;
617 u32 noacm:1;
618 u32 gf:1;
619 u32 own:1;
620
621 u32 macid:6;
622 u32 rsvd0:2;
623 u32 queuesel:5;
624 u32 rd_nav_ext:1;
625 u32 lsig_txop_en:1;
626 u32 pifs:1;
627 u32 rateid:4;
628 u32 nav_usehdr:1;
629 u32 en_descid:1;
630 u32 sectype:2;
631 u32 pktoffset:8;
632
633 u32 rts_rc:6;
634 u32 data_rc:6;
635 u32 agg_en:1;
636 u32 rdg_en:1;
637 u32 bar_retryht:2;
638 u32 agg_break:1;
639 u32 morefrag:1;
640 u32 raw:1;
641 u32 ccx:1;
642 u32 ampdudensity:3;
643 u32 bt_int:1;
644 u32 ant_sela:1;
645 u32 ant_selb:1;
646 u32 txant_cck:2;
647 u32 txant_l:2;
648 u32 txant_ht:2;
649
650 u32 nextheadpage:8;
651 u32 tailpage:8;
652 u32 seq:12;
653 u32 cpu_handle:1;
654 u32 tag1:1;
655 u32 trigger_int:1;
656 u32 hwseq_en:1;
657
658 u32 rtsrate:5;
659 u32 apdcfe:1;
660 u32 qos:1;
661 u32 hwseq_ssn:1;
662 u32 userrate:1;
663 u32 dis_rtsfb:1;
664 u32 dis_datafb:1;
665 u32 cts2self:1;
666 u32 rts_en:1;
667 u32 hwrts_en:1;
668 u32 portid:1;
669 u32 pwr_status:3;
670 u32 waitdcts:1;
671 u32 cts2ap_en:1;
672 u32 txsc:2;
673 u32 stbc:2;
674 u32 txshort:1;
675 u32 txbw:1;
676 u32 rtsshort:1;
677 u32 rtsbw:1;
678 u32 rtssc:2;
679 u32 rtsstbc:2;
680
681 u32 txrate:6;
682 u32 shortgi:1;
683 u32 ccxt:1;
684 u32 txrate_fb_lmt:5;
685 u32 rtsrate_fb_lmt:4;
686 u32 retrylmt_en:1;
687 u32 txretrylmt:6;
688 u32 usb_txaggnum:8;
689
690 u32 txagca:5;
691 u32 txagcb:5;
692 u32 usemaxlen:1;
693 u32 maxaggnum:5;
694 u32 mcsg1maxlen:4;
695 u32 mcsg2maxlen:4;
696 u32 mcsg3maxlen:4;
697 u32 mcs7sgimaxlen:4;
698
699 u32 txbuffersize:16;
700 u32 sw_offset30:8;
701 u32 sw_offset31:4;
702 u32 rsvd1:1;
703 u32 antsel_c:1;
704 u32 null_0:1;
705 u32 null_1:1;
706
707 u32 txbuffaddr;
708 u32 txbufferaddr64;
709 u32 nextdescaddress;
710 u32 nextdescaddress64;
711
712 u32 reserve_pass_pcie_mm_limit[4];
713} __packed;
714
715struct rx_desc_88e {
716 u32 length:14;
717 u32 crc32:1;
718 u32 icverror:1;
719 u32 drv_infosize:4;
720 u32 security:3;
721 u32 qos:1;
722 u32 shift:2;
723 u32 phystatus:1;
724 u32 swdec:1;
725 u32 lastseg:1;
726 u32 firstseg:1;
727 u32 eor:1;
728 u32 own:1;
729
730 u32 macid:6;
731 u32 tid:4;
732 u32 hwrsvd:5;
733 u32 paggr:1;
734 u32 faggr:1;
735 u32 a1_fit:4;
736 u32 a2_fit:4;
737 u32 pam:1;
738 u32 pwr:1;
739 u32 moredata:1;
740 u32 morefrag:1;
741 u32 type:2;
742 u32 mc:1;
743 u32 bc:1;
744
745 u32 seq:12;
746 u32 frag:4;
747 u32 nextpktlen:14;
748 u32 nextind:1;
749 u32 rsvd:1;
750
751 u32 rxmcs:6;
752 u32 rxht:1;
753 u32 amsdu:1;
754 u32 splcp:1;
755 u32 bandwidth:1;
756 u32 htc:1;
757 u32 tcpchk_rpt:1;
758 u32 ipcchk_rpt:1;
759 u32 tcpchk_valid:1;
760 u32 hwpcerr:1;
761 u32 hwpcind:1;
762 u32 iv0:16;
763
764 u32 iv1;
765
766 u32 tsfl;
767
768 u32 bufferaddress;
769 u32 bufferaddress64;
770
771} __packed;
772
773void rtl88ee_tx_fill_desc(struct ieee80211_hw *hw,
774 struct ieee80211_hdr *hdr, u8 *pdesc_tx,
Larry Fingerc151aed2014-09-22 09:39:25 -0500[diff] [blame]775 u8 *txbd, struct ieee80211_tx_info *info,
776 struct ieee80211_sta *sta,
777 struct sk_buff *skb,
Larry Fingerf0eb8562013-03-24 22:06:42 -0500[diff] [blame]778 u8 hw_queue, struct rtl_tcb_desc *ptcb_desc);
779bool rtl88ee_rx_query_desc(struct ieee80211_hw *hw,
780 struct rtl_stats *status,
781 struct ieee80211_rx_status *rx_status,
782 u8 *pdesc, struct sk_buff *skb);
Larry Fingerc151aed2014-09-22 09:39:25 -0500[diff] [blame]783void rtl88ee_set_desc(struct ieee80211_hw *hw, u8 *pdesc,
784 bool istx, u8 desc_name, u8 *val);
Ping-Ke Shih0c07bd72017-09-29 14:47:53 -0500[diff] [blame]785u64 rtl88ee_get_desc(struct ieee80211_hw *hw,
786 u8 *pdesc, bool istx, u8 desc_name);
Larry Fingerc151aed2014-09-22 09:39:25 -0500[diff] [blame]787bool rtl88ee_is_tx_desc_closed(struct ieee80211_hw *hw,
788 u8 hw_queue, u16 index);
Larry Fingerf0eb8562013-03-24 22:06:42 -0500[diff] [blame]789void rtl88ee_tx_polling(struct ieee80211_hw *hw, u8 hw_queue);
790void rtl88ee_tx_fill_cmddesc(struct ieee80211_hw *hw, u8 *pdesc,
Larry Fingerc151aed2014-09-22 09:39:25 -0500[diff] [blame]791 bool firstseg, bool lastseg,
Larry Fingerf0eb8562013-03-24 22:06:42 -0500[diff] [blame]792 struct sk_buff *skb);
Larry Fingerc151aed2014-09-22 09:39:25 -0500[diff] [blame]793u32 rtl88ee_rx_command_packet(struct ieee80211_hw *hw,
Colin Ian Kingce254242016-02-22 11:35:46 +0000[diff] [blame]794 const struct rtl_stats *status,
Larry Fingerc151aed2014-09-22 09:39:25 -0500[diff] [blame]795 struct sk_buff *skb);
Larry Fingerf0eb8562013-03-24 22:06:42 -0500[diff] [blame]796
797#endif