blob: bc908453ffb3550f91cf7febbf315ca2c4059fd1 [file] [log] [blame]
Benjamin Gaignarde2842572017-12-06 12:29:47 +01001// SPDX-License-Identifier: GPL-2.0
Benjamin Gaignard96006a72014-12-11 13:34:42 +01002/*
3 * Copyright (C) STMicroelectronics SA 2014
4 * Authors: Vincent Abriou <vincent.abriou@st.com>
5 * Fabien Dessenne <fabien.dessenne@st.com>
6 * for STMicroelectronics.
Benjamin Gaignard96006a72014-12-11 13:34:42 +01007 */
Benjamin Gaignard96006a72014-12-11 13:34:42 +01008
Arnd Bergmann0f3e1562016-05-09 23:51:28 +02009#include <linux/seq_file.h>
10
Vincent Abrioudd86dc22016-02-10 10:48:20 +010011#include <drm/drm_atomic.h>
Vincent Abriou29d1dc62015-08-03 14:22:16 +020012#include <drm/drm_fb_cma_helper.h>
13#include <drm/drm_gem_cma_helper.h>
Vincent Abriou29d1dc62015-08-03 14:22:16 +020014
15#include "sti_compositor.h"
Benjamin Gaignard96006a72014-12-11 13:34:42 +010016#include "sti_cursor.h"
Vincent Abriou9e1f05b2015-07-31 11:32:34 +020017#include "sti_plane.h"
Benjamin Gaignard96006a72014-12-11 13:34:42 +010018#include "sti_vtg.h"
19
20/* Registers */
21#define CUR_CTL 0x00
22#define CUR_VPO 0x0C
23#define CUR_PML 0x14
24#define CUR_PMP 0x18
25#define CUR_SIZE 0x1C
26#define CUR_CML 0x20
27#define CUR_AWS 0x28
28#define CUR_AWE 0x2C
29
30#define CUR_CTL_CLUT_UPDATE BIT(1)
31
32#define STI_CURS_MIN_SIZE 1
33#define STI_CURS_MAX_SIZE 128
34
35/*
Markus Elfringe1a22f92017-05-05 15:30:44 +020036 * pixmap dma buffer structure
Benjamin Gaignard96006a72014-12-11 13:34:42 +010037 *
38 * @paddr: physical address
39 * @size: buffer size
40 * @base: virtual address
41 */
42struct dma_pixmap {
43 dma_addr_t paddr;
44 size_t size;
45 void *base;
46};
47
48/**
49 * STI Cursor structure
50 *
Vincent Abriou29d1dc62015-08-03 14:22:16 +020051 * @sti_plane: sti_plane structure
52 * @dev: driver device
53 * @regs: cursor registers
54 * @width: cursor width
55 * @height: cursor height
56 * @clut: color look up table
57 * @clut_paddr: color look up table physical address
58 * @pixmap: pixmap dma buffer (clut8-format cursor)
Benjamin Gaignard96006a72014-12-11 13:34:42 +010059 */
60struct sti_cursor {
Vincent Abriou871bcdf2015-07-31 11:32:13 +020061 struct sti_plane plane;
62 struct device *dev;
63 void __iomem *regs;
Benjamin Gaignard96006a72014-12-11 13:34:42 +010064 unsigned int width;
65 unsigned int height;
66 unsigned short *clut;
67 dma_addr_t clut_paddr;
68 struct dma_pixmap pixmap;
69};
70
71static const uint32_t cursor_supported_formats[] = {
72 DRM_FORMAT_ARGB8888,
73};
74
Vincent Abriou871bcdf2015-07-31 11:32:13 +020075#define to_sti_cursor(x) container_of(x, struct sti_cursor, plane)
Benjamin Gaignard96006a72014-12-11 13:34:42 +010076
Vincent Abriouf46f3be2016-02-04 16:35:45 +010077#define DBGFS_DUMP(reg) seq_printf(s, "\n %-25s 0x%08X", #reg, \
78 readl(cursor->regs + reg))
79
80static void cursor_dbg_vpo(struct seq_file *s, u32 val)
81{
82 seq_printf(s, "\txdo:%4d\tydo:%4d", val & 0x0FFF, (val >> 16) & 0x0FFF);
83}
84
85static void cursor_dbg_size(struct seq_file *s, u32 val)
86{
87 seq_printf(s, "\t%d x %d", val & 0x07FF, (val >> 16) & 0x07FF);
88}
89
90static void cursor_dbg_pml(struct seq_file *s,
91 struct sti_cursor *cursor, u32 val)
92{
93 if (cursor->pixmap.paddr == val)
94 seq_printf(s, "\tVirt @: %p", cursor->pixmap.base);
95}
96
97static void cursor_dbg_cml(struct seq_file *s,
98 struct sti_cursor *cursor, u32 val)
99{
100 if (cursor->clut_paddr == val)
101 seq_printf(s, "\tVirt @: %p", cursor->clut);
102}
103
104static int cursor_dbg_show(struct seq_file *s, void *data)
105{
106 struct drm_info_node *node = s->private;
107 struct sti_cursor *cursor = (struct sti_cursor *)node->info_ent->data;
Vincent Abriouf46f3be2016-02-04 16:35:45 +0100108
109 seq_printf(s, "%s: (vaddr = 0x%p)",
110 sti_plane_to_str(&cursor->plane), cursor->regs);
111
112 DBGFS_DUMP(CUR_CTL);
113 DBGFS_DUMP(CUR_VPO);
114 cursor_dbg_vpo(s, readl(cursor->regs + CUR_VPO));
115 DBGFS_DUMP(CUR_PML);
116 cursor_dbg_pml(s, cursor, readl(cursor->regs + CUR_PML));
117 DBGFS_DUMP(CUR_PMP);
118 DBGFS_DUMP(CUR_SIZE);
119 cursor_dbg_size(s, readl(cursor->regs + CUR_SIZE));
120 DBGFS_DUMP(CUR_CML);
121 cursor_dbg_cml(s, cursor, readl(cursor->regs + CUR_CML));
122 DBGFS_DUMP(CUR_AWS);
123 DBGFS_DUMP(CUR_AWE);
Markus Elfringe9635132017-05-05 15:00:46 +0200124 seq_putc(s, '\n');
Vincent Abriouf46f3be2016-02-04 16:35:45 +0100125 return 0;
126}
127
128static struct drm_info_list cursor_debugfs_files[] = {
129 { "cursor", cursor_dbg_show, 0, NULL },
130};
131
132static int cursor_debugfs_init(struct sti_cursor *cursor,
133 struct drm_minor *minor)
134{
135 unsigned int i;
136
137 for (i = 0; i < ARRAY_SIZE(cursor_debugfs_files); i++)
138 cursor_debugfs_files[i].data = cursor;
139
140 return drm_debugfs_create_files(cursor_debugfs_files,
141 ARRAY_SIZE(cursor_debugfs_files),
142 minor->debugfs_root, minor);
143}
144
Vincent Abriou29d1dc62015-08-03 14:22:16 +0200145static void sti_cursor_argb8888_to_clut8(struct sti_cursor *cursor, u32 *src)
Benjamin Gaignard96006a72014-12-11 13:34:42 +0100146{
Benjamin Gaignard96006a72014-12-11 13:34:42 +0100147 u8 *dst = cursor->pixmap.base;
148 unsigned int i, j;
149 u32 a, r, g, b;
150
151 for (i = 0; i < cursor->height; i++) {
152 for (j = 0; j < cursor->width; j++) {
153 /* Pick the 2 higher bits of each component */
154 a = (*src >> 30) & 3;
155 r = (*src >> 22) & 3;
156 g = (*src >> 14) & 3;
157 b = (*src >> 6) & 3;
158 *dst = a << 6 | r << 4 | g << 2 | b;
159 src++;
160 dst++;
161 }
162 }
163}
164
Vincent Abriou29d1dc62015-08-03 14:22:16 +0200165static void sti_cursor_init(struct sti_cursor *cursor)
Benjamin Gaignard96006a72014-12-11 13:34:42 +0100166{
Vincent Abriou29d1dc62015-08-03 14:22:16 +0200167 unsigned short *base = cursor->clut;
168 unsigned int a, r, g, b;
169
170 /* Assign CLUT values, ARGB444 format */
171 for (a = 0; a < 4; a++)
172 for (r = 0; r < 4; r++)
173 for (g = 0; g < 4; g++)
174 for (b = 0; b < 4; b++)
175 *base++ = (a * 5) << 12 |
176 (r * 5) << 8 |
177 (g * 5) << 4 |
178 (b * 5);
179}
180
Vincent Abrioudd86dc22016-02-10 10:48:20 +0100181static int sti_cursor_atomic_check(struct drm_plane *drm_plane,
182 struct drm_plane_state *state)
Vincent Abriou29d1dc62015-08-03 14:22:16 +0200183{
Vincent Abriou29d1dc62015-08-03 14:22:16 +0200184 struct sti_plane *plane = to_sti_plane(drm_plane);
Vincent Abriou871bcdf2015-07-31 11:32:13 +0200185 struct sti_cursor *cursor = to_sti_cursor(plane);
Vincent Abriou29d1dc62015-08-03 14:22:16 +0200186 struct drm_crtc *crtc = state->crtc;
Vincent Abriou29d1dc62015-08-03 14:22:16 +0200187 struct drm_framebuffer *fb = state->fb;
Vincent Abrioudd86dc22016-02-10 10:48:20 +0100188 struct drm_crtc_state *crtc_state;
189 struct drm_display_mode *mode;
190 int dst_x, dst_y, dst_w, dst_h;
191 int src_w, src_h;
192
193 /* no need for further checks if the plane is being disabled */
194 if (!crtc || !fb)
195 return 0;
196
197 crtc_state = drm_atomic_get_crtc_state(state->state, crtc);
198 mode = &crtc_state->mode;
199 dst_x = state->crtc_x;
200 dst_y = state->crtc_y;
201 dst_w = clamp_val(state->crtc_w, 0, mode->crtc_hdisplay - dst_x);
202 dst_h = clamp_val(state->crtc_h, 0, mode->crtc_vdisplay - dst_y);
Vincent Abriou29d1dc62015-08-03 14:22:16 +0200203 /* src_x are in 16.16 format */
Vincent Abrioudd86dc22016-02-10 10:48:20 +0100204 src_w = state->src_w >> 16;
205 src_h = state->src_h >> 16;
Benjamin Gaignard96006a72014-12-11 13:34:42 +0100206
Vincent Abriou29d1dc62015-08-03 14:22:16 +0200207 if (src_w < STI_CURS_MIN_SIZE ||
208 src_h < STI_CURS_MIN_SIZE ||
209 src_w > STI_CURS_MAX_SIZE ||
210 src_h > STI_CURS_MAX_SIZE) {
Benjamin Gaignard96006a72014-12-11 13:34:42 +0100211 DRM_ERROR("Invalid cursor size (%dx%d)\n",
Vincent Abriou29d1dc62015-08-03 14:22:16 +0200212 src_w, src_h);
Vincent Abrioudd86dc22016-02-10 10:48:20 +0100213 return -EINVAL;
Benjamin Gaignard96006a72014-12-11 13:34:42 +0100214 }
215
216 /* If the cursor size has changed, re-allocated the pixmap */
217 if (!cursor->pixmap.base ||
Vincent Abriou29d1dc62015-08-03 14:22:16 +0200218 (cursor->width != src_w) ||
219 (cursor->height != src_h)) {
220 cursor->width = src_w;
221 cursor->height = src_h;
Benjamin Gaignard96006a72014-12-11 13:34:42 +0100222
223 if (cursor->pixmap.base)
Luis R. Rodriguezf6e45662016-01-22 18:34:22 -0800224 dma_free_wc(cursor->dev, cursor->pixmap.size,
225 cursor->pixmap.base, cursor->pixmap.paddr);
Benjamin Gaignard96006a72014-12-11 13:34:42 +0100226
227 cursor->pixmap.size = cursor->width * cursor->height;
228
Luis R. Rodriguezf6e45662016-01-22 18:34:22 -0800229 cursor->pixmap.base = dma_alloc_wc(cursor->dev,
230 cursor->pixmap.size,
231 &cursor->pixmap.paddr,
232 GFP_KERNEL | GFP_DMA);
Benjamin Gaignard96006a72014-12-11 13:34:42 +0100233 if (!cursor->pixmap.base) {
234 DRM_ERROR("Failed to allocate memory for pixmap\n");
Vincent Abrioudd86dc22016-02-10 10:48:20 +0100235 return -EINVAL;
Benjamin Gaignard96006a72014-12-11 13:34:42 +0100236 }
237 }
238
Vincent Abrioudd86dc22016-02-10 10:48:20 +0100239 if (!drm_fb_cma_get_gem_obj(fb, 0)) {
Vincent Abriou29d1dc62015-08-03 14:22:16 +0200240 DRM_ERROR("Can't get CMA GEM object for fb\n");
Vincent Abrioudd86dc22016-02-10 10:48:20 +0100241 return -EINVAL;
Vincent Abriou29d1dc62015-08-03 14:22:16 +0200242 }
243
Vincent Abrioudd86dc22016-02-10 10:48:20 +0100244 DRM_DEBUG_KMS("CRTC:%d (%s) drm plane:%d (%s)\n",
245 crtc->base.id, sti_mixer_to_str(to_sti_mixer(crtc)),
246 drm_plane->base.id, sti_plane_to_str(plane));
247 DRM_DEBUG_KMS("(%dx%d)@(%d,%d)\n", dst_w, dst_h, dst_x, dst_y);
248
249 return 0;
250}
251
252static void sti_cursor_atomic_update(struct drm_plane *drm_plane,
253 struct drm_plane_state *oldstate)
254{
255 struct drm_plane_state *state = drm_plane->state;
256 struct sti_plane *plane = to_sti_plane(drm_plane);
257 struct sti_cursor *cursor = to_sti_cursor(plane);
258 struct drm_crtc *crtc = state->crtc;
259 struct drm_framebuffer *fb = state->fb;
260 struct drm_display_mode *mode;
261 int dst_x, dst_y;
262 struct drm_gem_cma_object *cma_obj;
263 u32 y, x;
264 u32 val;
265
266 if (!crtc || !fb)
267 return;
268
269 mode = &crtc->mode;
270 dst_x = state->crtc_x;
271 dst_y = state->crtc_y;
272
273 cma_obj = drm_fb_cma_get_gem_obj(fb, 0);
274
Benjamin Gaignard96006a72014-12-11 13:34:42 +0100275 /* Convert ARGB8888 to CLUT8 */
Vincent Abriou29d1dc62015-08-03 14:22:16 +0200276 sti_cursor_argb8888_to_clut8(cursor, (u32 *)cma_obj->vaddr);
Benjamin Gaignard96006a72014-12-11 13:34:42 +0100277
278 /* AWS and AWE depend on the mode */
279 y = sti_vtg_get_line_number(*mode, 0);
280 x = sti_vtg_get_pixel_number(*mode, 0);
281 val = y << 16 | x;
Vincent Abriou871bcdf2015-07-31 11:32:13 +0200282 writel(val, cursor->regs + CUR_AWS);
Benjamin Gaignard96006a72014-12-11 13:34:42 +0100283 y = sti_vtg_get_line_number(*mode, mode->vdisplay - 1);
284 x = sti_vtg_get_pixel_number(*mode, mode->hdisplay - 1);
285 val = y << 16 | x;
Vincent Abriou871bcdf2015-07-31 11:32:13 +0200286 writel(val, cursor->regs + CUR_AWE);
Benjamin Gaignard96006a72014-12-11 13:34:42 +0100287
Benjamin Gaignard96006a72014-12-11 13:34:42 +0100288 /* Set memory location, size, and position */
Vincent Abriou871bcdf2015-07-31 11:32:13 +0200289 writel(cursor->pixmap.paddr, cursor->regs + CUR_PML);
290 writel(cursor->width, cursor->regs + CUR_PMP);
291 writel(cursor->height << 16 | cursor->width, cursor->regs + CUR_SIZE);
Benjamin Gaignard96006a72014-12-11 13:34:42 +0100292
Vincent Abriou29d1dc62015-08-03 14:22:16 +0200293 y = sti_vtg_get_line_number(*mode, dst_y);
benjamin.gaignard@linaro.orgb83a8b52016-01-07 14:51:06 +0100294 x = sti_vtg_get_pixel_number(*mode, dst_x);
Vincent Abriou29d1dc62015-08-03 14:22:16 +0200295 writel((y << 16) | x, cursor->regs + CUR_VPO);
Benjamin Gaignard96006a72014-12-11 13:34:42 +0100296
Fabien Dessenne0b9d0412016-01-25 17:58:48 +0100297 /* Set and fetch CLUT */
298 writel(cursor->clut_paddr, cursor->regs + CUR_CML);
299 writel(CUR_CTL_CLUT_UPDATE, cursor->regs + CUR_CTL);
300
Vincent Abrioubf8f9e42016-02-08 11:34:31 +0100301 sti_plane_update_fps(plane, true, false);
302
Vincent Abriou29d1dc62015-08-03 14:22:16 +0200303 plane->status = STI_PLANE_UPDATED;
Benjamin Gaignard96006a72014-12-11 13:34:42 +0100304}
305
Vincent Abriou29d1dc62015-08-03 14:22:16 +0200306static void sti_cursor_atomic_disable(struct drm_plane *drm_plane,
307 struct drm_plane_state *oldstate)
Benjamin Gaignard96006a72014-12-11 13:34:42 +0100308{
Vincent Abriou29d1dc62015-08-03 14:22:16 +0200309 struct sti_plane *plane = to_sti_plane(drm_plane);
Vincent Abriou29d1dc62015-08-03 14:22:16 +0200310
Fabien Dessenne5552aad2016-09-06 09:41:48 +0200311 if (!oldstate->crtc) {
Vincent Abriou29d1dc62015-08-03 14:22:16 +0200312 DRM_DEBUG_DRIVER("drm plane:%d not enabled\n",
313 drm_plane->base.id);
314 return;
315 }
316
317 DRM_DEBUG_DRIVER("CRTC:%d (%s) drm plane:%d (%s)\n",
Fabien Dessenne5552aad2016-09-06 09:41:48 +0200318 oldstate->crtc->base.id,
319 sti_mixer_to_str(to_sti_mixer(oldstate->crtc)),
Vincent Abriou29d1dc62015-08-03 14:22:16 +0200320 drm_plane->base.id, sti_plane_to_str(plane));
321
322 plane->status = STI_PLANE_DISABLING;
Benjamin Gaignard96006a72014-12-11 13:34:42 +0100323}
324
Vincent Abriou29d1dc62015-08-03 14:22:16 +0200325static const struct drm_plane_helper_funcs sti_cursor_helpers_funcs = {
Vincent Abrioudd86dc22016-02-10 10:48:20 +0100326 .atomic_check = sti_cursor_atomic_check,
Vincent Abriou29d1dc62015-08-03 14:22:16 +0200327 .atomic_update = sti_cursor_atomic_update,
328 .atomic_disable = sti_cursor_atomic_disable,
Benjamin Gaignard96006a72014-12-11 13:34:42 +0100329};
330
Benjamin Gaignard83af0a42016-06-21 15:09:39 +0200331static void sti_cursor_destroy(struct drm_plane *drm_plane)
332{
333 DRM_DEBUG_DRIVER("\n");
334
Benjamin Gaignard83af0a42016-06-21 15:09:39 +0200335 drm_plane_cleanup(drm_plane);
336}
337
338static int sti_cursor_late_register(struct drm_plane *drm_plane)
339{
340 struct sti_plane *plane = to_sti_plane(drm_plane);
341 struct sti_cursor *cursor = to_sti_cursor(plane);
342
343 return cursor_debugfs_init(cursor, drm_plane->dev->primary);
344}
345
Ville Syrjäläbdfd36e2016-09-19 16:33:53 +0300346static const struct drm_plane_funcs sti_cursor_plane_helpers_funcs = {
Benjamin Gaignard83af0a42016-06-21 15:09:39 +0200347 .update_plane = drm_atomic_helper_update_plane,
348 .disable_plane = drm_atomic_helper_disable_plane,
349 .destroy = sti_cursor_destroy,
Benjamin Gaignardbbd1e3a2016-03-24 17:18:20 +0100350 .reset = sti_plane_reset,
Benjamin Gaignard83af0a42016-06-21 15:09:39 +0200351 .atomic_duplicate_state = drm_atomic_helper_plane_duplicate_state,
352 .atomic_destroy_state = drm_atomic_helper_plane_destroy_state,
353 .late_register = sti_cursor_late_register,
354};
355
Vincent Abriou29d1dc62015-08-03 14:22:16 +0200356struct drm_plane *sti_cursor_create(struct drm_device *drm_dev,
357 struct device *dev, int desc,
358 void __iomem *baseaddr,
359 unsigned int possible_crtcs)
Benjamin Gaignard96006a72014-12-11 13:34:42 +0100360{
361 struct sti_cursor *cursor;
Vincent Abriou29d1dc62015-08-03 14:22:16 +0200362 size_t size;
363 int res;
Benjamin Gaignard96006a72014-12-11 13:34:42 +0100364
365 cursor = devm_kzalloc(dev, sizeof(*cursor), GFP_KERNEL);
366 if (!cursor) {
367 DRM_ERROR("Failed to allocate memory for cursor\n");
368 return NULL;
369 }
370
371 /* Allocate clut buffer */
Vincent Abriou29d1dc62015-08-03 14:22:16 +0200372 size = 0x100 * sizeof(unsigned short);
Luis R. Rodriguezf6e45662016-01-22 18:34:22 -0800373 cursor->clut = dma_alloc_wc(dev, size, &cursor->clut_paddr,
374 GFP_KERNEL | GFP_DMA);
Benjamin Gaignard96006a72014-12-11 13:34:42 +0100375
376 if (!cursor->clut) {
377 DRM_ERROR("Failed to allocate memory for cursor clut\n");
Vincent Abriou29d1dc62015-08-03 14:22:16 +0200378 goto err_clut;
Benjamin Gaignard96006a72014-12-11 13:34:42 +0100379 }
380
Vincent Abriou871bcdf2015-07-31 11:32:13 +0200381 cursor->dev = dev;
382 cursor->regs = baseaddr;
383 cursor->plane.desc = desc;
Vincent Abriou29d1dc62015-08-03 14:22:16 +0200384 cursor->plane.status = STI_PLANE_DISABLED;
Benjamin Gaignard96006a72014-12-11 13:34:42 +0100385
Vincent Abriou871bcdf2015-07-31 11:32:13 +0200386 sti_cursor_init(cursor);
387
Vincent Abriou29d1dc62015-08-03 14:22:16 +0200388 res = drm_universal_plane_init(drm_dev, &cursor->plane.drm_plane,
389 possible_crtcs,
Benjamin Gaignard83af0a42016-06-21 15:09:39 +0200390 &sti_cursor_plane_helpers_funcs,
Vincent Abriou29d1dc62015-08-03 14:22:16 +0200391 cursor_supported_formats,
392 ARRAY_SIZE(cursor_supported_formats),
Ben Widawskye6fc3b62017-07-23 20:46:38 -0700393 NULL, DRM_PLANE_TYPE_CURSOR, NULL);
Vincent Abriou29d1dc62015-08-03 14:22:16 +0200394 if (res) {
395 DRM_ERROR("Failed to initialize universal plane\n");
396 goto err_plane;
397 }
398
399 drm_plane_helper_add(&cursor->plane.drm_plane,
400 &sti_cursor_helpers_funcs);
401
402 sti_plane_init_property(&cursor->plane, DRM_PLANE_TYPE_CURSOR);
403
404 return &cursor->plane.drm_plane;
405
406err_plane:
Luis R. Rodriguezf6e45662016-01-22 18:34:22 -0800407 dma_free_wc(dev, size, cursor->clut, cursor->clut_paddr);
Vincent Abriou29d1dc62015-08-03 14:22:16 +0200408err_clut:
409 devm_kfree(dev, cursor);
410 return NULL;
Benjamin Gaignard96006a72014-12-11 13:34:42 +0100411}