Manivannan Sadhasivam | a833877 | 2018-03-26 23:08:59 +0530 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
| 2 | // |
| 3 | // OWL mux clock driver |
| 4 | // |
| 5 | // Copyright (c) 2014 Actions Semi Inc. |
| 6 | // Author: David Liu <liuwei@actions-semi.com> |
| 7 | // |
| 8 | // Copyright (c) 2018 Linaro Ltd. |
| 9 | // Author: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> |
| 10 | |
| 11 | #ifndef _OWL_MUX_H_ |
| 12 | #define _OWL_MUX_H_ |
| 13 | |
| 14 | #include "owl-common.h" |
| 15 | |
| 16 | struct owl_mux_hw { |
| 17 | u32 reg; |
| 18 | u8 shift; |
| 19 | u8 width; |
| 20 | }; |
| 21 | |
| 22 | struct owl_mux { |
| 23 | struct owl_mux_hw mux_hw; |
| 24 | struct owl_clk_common common; |
| 25 | }; |
| 26 | |
| 27 | #define OWL_MUX_HW(_reg, _shift, _width) \ |
| 28 | { \ |
| 29 | .reg = _reg, \ |
| 30 | .shift = _shift, \ |
| 31 | .width = _width, \ |
| 32 | } |
| 33 | |
| 34 | #define OWL_MUX(_struct, _name, _parents, _reg, \ |
| 35 | _shift, _width, _flags) \ |
| 36 | struct owl_mux _struct = { \ |
| 37 | .mux_hw = OWL_MUX_HW(_reg, _shift, _width), \ |
| 38 | .common = { \ |
| 39 | .regmap = NULL, \ |
| 40 | .hw.init = CLK_HW_INIT_PARENTS(_name, \ |
| 41 | _parents, \ |
| 42 | &owl_mux_ops, \ |
| 43 | _flags), \ |
| 44 | }, \ |
| 45 | } |
| 46 | |
| 47 | static inline struct owl_mux *hw_to_owl_mux(const struct clk_hw *hw) |
| 48 | { |
| 49 | struct owl_clk_common *common = hw_to_owl_clk_common(hw); |
| 50 | |
| 51 | return container_of(common, struct owl_mux, common); |
| 52 | } |
| 53 | |
| 54 | u8 owl_mux_helper_get_parent(const struct owl_clk_common *common, |
| 55 | const struct owl_mux_hw *mux_hw); |
| 56 | int owl_mux_helper_set_parent(const struct owl_clk_common *common, |
| 57 | struct owl_mux_hw *mux_hw, u8 index); |
| 58 | |
| 59 | extern const struct clk_ops owl_mux_ops; |
| 60 | |
| 61 | #endif /* _OWL_MUX_H_ */ |