oulijun | 9a44353 | 2016-07-21 19:06:38 +0800 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2016 Hisilicon Limited. |
| 3 | * Copyright (c) 2007, 2008 Mellanox Technologies. All rights reserved. |
| 4 | * |
| 5 | * This software is available to you under a choice of one of two |
| 6 | * licenses. You may choose to be licensed under the terms of the GNU |
| 7 | * General Public License (GPL) Version 2, available from the file |
| 8 | * COPYING in the main directory of this source tree, or the |
| 9 | * OpenIB.org BSD license below: |
| 10 | * |
| 11 | * Redistribution and use in source and binary forms, with or |
| 12 | * without modification, are permitted provided that the following |
| 13 | * conditions are met: |
| 14 | * |
| 15 | * - Redistributions of source code must retain the above |
| 16 | * copyright notice, this list of conditions and the following |
| 17 | * disclaimer. |
| 18 | * |
| 19 | * - Redistributions in binary form must reproduce the above |
| 20 | * copyright notice, this list of conditions and the following |
| 21 | * disclaimer in the documentation and/or other materials |
| 22 | * provided with the distribution. |
| 23 | * |
| 24 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, |
| 25 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF |
| 26 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND |
| 27 | * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS |
| 28 | * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN |
| 29 | * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN |
| 30 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE |
| 31 | * SOFTWARE. |
| 32 | */ |
Salil | 528f1de | 2016-08-24 04:44:50 +0800 | [diff] [blame] | 33 | #include <linux/acpi.h> |
oulijun | 9a44353 | 2016-07-21 19:06:38 +0800 | [diff] [blame] | 34 | #include <linux/of_platform.h> |
| 35 | #include <rdma/ib_addr.h> |
| 36 | #include <rdma/ib_smi.h> |
| 37 | #include <rdma/ib_user_verbs.h> |
| 38 | #include "hns_roce_common.h" |
| 39 | #include "hns_roce_device.h" |
| 40 | #include "hns_roce_user.h" |
| 41 | #include "hns_roce_hem.h" |
| 42 | |
| 43 | /** |
| 44 | * hns_roce_addrconf_ifid_eui48 - Get default gid. |
| 45 | * @eui: eui. |
| 46 | * @vlan_id: gid |
| 47 | * @dev: net device |
| 48 | * Description: |
| 49 | * MAC convert to GID |
| 50 | * gid[0..7] = fe80 0000 0000 0000 |
| 51 | * gid[8] = mac[0] ^ 2 |
| 52 | * gid[9] = mac[1] |
| 53 | * gid[10] = mac[2] |
| 54 | * gid[11] = ff (VLAN ID high byte (4 MS bits)) |
| 55 | * gid[12] = fe (VLAN ID low byte) |
| 56 | * gid[13] = mac[3] |
| 57 | * gid[14] = mac[4] |
| 58 | * gid[15] = mac[5] |
| 59 | */ |
| 60 | static void hns_roce_addrconf_ifid_eui48(u8 *eui, u16 vlan_id, |
| 61 | struct net_device *dev) |
| 62 | { |
| 63 | memcpy(eui, dev->dev_addr, 3); |
| 64 | memcpy(eui + 5, dev->dev_addr + 3, 3); |
| 65 | if (vlan_id < 0x1000) { |
| 66 | eui[3] = vlan_id >> 8; |
| 67 | eui[4] = vlan_id & 0xff; |
| 68 | } else { |
| 69 | eui[3] = 0xff; |
| 70 | eui[4] = 0xfe; |
| 71 | } |
| 72 | eui[0] ^= 2; |
| 73 | } |
| 74 | |
| 75 | static void hns_roce_make_default_gid(struct net_device *dev, union ib_gid *gid) |
| 76 | { |
| 77 | memset(gid, 0, sizeof(*gid)); |
| 78 | gid->raw[0] = 0xFE; |
| 79 | gid->raw[1] = 0x80; |
| 80 | hns_roce_addrconf_ifid_eui48(&gid->raw[8], 0xffff, dev); |
| 81 | } |
| 82 | |
| 83 | /** |
| 84 | * hns_get_gid_index - Get gid index. |
| 85 | * @hr_dev: pointer to structure hns_roce_dev. |
| 86 | * @port: port, value range: 0 ~ MAX |
| 87 | * @gid_index: gid_index, value range: 0 ~ MAX |
| 88 | * Description: |
| 89 | * N ports shared gids, allocation method as follow: |
| 90 | * GID[0][0], GID[1][0],.....GID[N - 1][0], |
| 91 | * GID[0][0], GID[1][0],.....GID[N - 1][0], |
| 92 | * And so on |
| 93 | */ |
| 94 | int hns_get_gid_index(struct hns_roce_dev *hr_dev, u8 port, int gid_index) |
| 95 | { |
| 96 | return gid_index * hr_dev->caps.num_ports + port; |
| 97 | } |
| 98 | |
| 99 | static int hns_roce_set_gid(struct hns_roce_dev *hr_dev, u8 port, int gid_index, |
| 100 | union ib_gid *gid) |
| 101 | { |
| 102 | struct device *dev = &hr_dev->pdev->dev; |
| 103 | u8 gid_idx = 0; |
| 104 | |
| 105 | if (gid_index >= hr_dev->caps.gid_table_len[port]) { |
| 106 | dev_err(dev, "gid_index %d illegal, port %d gid range: 0~%d\n", |
| 107 | gid_index, port, hr_dev->caps.gid_table_len[port] - 1); |
| 108 | return -EINVAL; |
| 109 | } |
| 110 | |
| 111 | gid_idx = hns_get_gid_index(hr_dev, port, gid_index); |
| 112 | |
| 113 | if (!memcmp(gid, &hr_dev->iboe.gid_table[gid_idx], sizeof(*gid))) |
| 114 | return -EINVAL; |
| 115 | |
| 116 | memcpy(&hr_dev->iboe.gid_table[gid_idx], gid, sizeof(*gid)); |
| 117 | |
| 118 | hr_dev->hw->set_gid(hr_dev, port, gid_index, gid); |
| 119 | |
| 120 | return 0; |
| 121 | } |
| 122 | |
| 123 | static void hns_roce_set_mac(struct hns_roce_dev *hr_dev, u8 port, u8 *addr) |
| 124 | { |
| 125 | u8 phy_port; |
| 126 | u32 i = 0; |
| 127 | |
| 128 | if (!memcmp(hr_dev->dev_addr[port], addr, MAC_ADDR_OCTET_NUM)) |
| 129 | return; |
| 130 | |
| 131 | for (i = 0; i < MAC_ADDR_OCTET_NUM; i++) |
| 132 | hr_dev->dev_addr[port][i] = addr[i]; |
| 133 | |
| 134 | phy_port = hr_dev->iboe.phy_port[port]; |
| 135 | hr_dev->hw->set_mac(hr_dev, phy_port, addr); |
| 136 | } |
| 137 | |
| 138 | static void hns_roce_set_mtu(struct hns_roce_dev *hr_dev, u8 port, int mtu) |
| 139 | { |
| 140 | u8 phy_port = hr_dev->iboe.phy_port[port]; |
| 141 | enum ib_mtu tmp; |
| 142 | |
| 143 | tmp = iboe_get_mtu(mtu); |
| 144 | if (!tmp) |
| 145 | tmp = IB_MTU_256; |
| 146 | |
| 147 | hr_dev->hw->set_mtu(hr_dev, phy_port, tmp); |
| 148 | } |
| 149 | |
| 150 | static void hns_roce_update_gids(struct hns_roce_dev *hr_dev, int port) |
| 151 | { |
| 152 | struct ib_event event; |
| 153 | |
| 154 | /* Refresh gid in ib_cache */ |
| 155 | event.device = &hr_dev->ib_dev; |
| 156 | event.element.port_num = port + 1; |
| 157 | event.event = IB_EVENT_GID_CHANGE; |
| 158 | ib_dispatch_event(&event); |
| 159 | } |
| 160 | |
| 161 | static int handle_en_event(struct hns_roce_dev *hr_dev, u8 port, |
| 162 | unsigned long event) |
| 163 | { |
| 164 | struct device *dev = &hr_dev->pdev->dev; |
| 165 | struct net_device *netdev; |
| 166 | unsigned long flags; |
| 167 | union ib_gid gid; |
| 168 | int ret = 0; |
| 169 | |
| 170 | netdev = hr_dev->iboe.netdevs[port]; |
| 171 | if (!netdev) { |
| 172 | dev_err(dev, "port(%d) can't find netdev\n", port); |
| 173 | return -ENODEV; |
| 174 | } |
| 175 | |
| 176 | spin_lock_irqsave(&hr_dev->iboe.lock, flags); |
| 177 | |
| 178 | switch (event) { |
| 179 | case NETDEV_UP: |
| 180 | case NETDEV_CHANGE: |
| 181 | case NETDEV_REGISTER: |
| 182 | case NETDEV_CHANGEADDR: |
| 183 | hns_roce_set_mac(hr_dev, port, netdev->dev_addr); |
| 184 | hns_roce_make_default_gid(netdev, &gid); |
| 185 | ret = hns_roce_set_gid(hr_dev, port, 0, &gid); |
| 186 | if (!ret) |
| 187 | hns_roce_update_gids(hr_dev, port); |
| 188 | break; |
| 189 | case NETDEV_DOWN: |
| 190 | /* |
| 191 | * In v1 engine, only support all ports closed together. |
| 192 | */ |
| 193 | break; |
| 194 | default: |
| 195 | dev_dbg(dev, "NETDEV event = 0x%x!\n", (u32)(event)); |
| 196 | break; |
| 197 | } |
| 198 | |
| 199 | spin_unlock_irqrestore(&hr_dev->iboe.lock, flags); |
| 200 | return ret; |
| 201 | } |
| 202 | |
| 203 | static int hns_roce_netdev_event(struct notifier_block *self, |
| 204 | unsigned long event, void *ptr) |
| 205 | { |
| 206 | struct net_device *dev = netdev_notifier_info_to_dev(ptr); |
| 207 | struct hns_roce_ib_iboe *iboe = NULL; |
| 208 | struct hns_roce_dev *hr_dev = NULL; |
| 209 | u8 port = 0; |
| 210 | int ret = 0; |
| 211 | |
| 212 | hr_dev = container_of(self, struct hns_roce_dev, iboe.nb); |
| 213 | iboe = &hr_dev->iboe; |
| 214 | |
| 215 | for (port = 0; port < hr_dev->caps.num_ports; port++) { |
| 216 | if (dev == iboe->netdevs[port]) { |
| 217 | ret = handle_en_event(hr_dev, port, event); |
| 218 | if (ret) |
| 219 | return NOTIFY_DONE; |
| 220 | break; |
| 221 | } |
| 222 | } |
| 223 | |
| 224 | return NOTIFY_DONE; |
| 225 | } |
| 226 | |
| 227 | static void hns_roce_addr_event(int event, struct net_device *event_netdev, |
| 228 | struct hns_roce_dev *hr_dev, union ib_gid *gid) |
| 229 | { |
| 230 | struct hns_roce_ib_iboe *iboe = NULL; |
| 231 | int gid_table_len = 0; |
| 232 | unsigned long flags; |
| 233 | union ib_gid zgid; |
| 234 | u8 gid_idx = 0; |
| 235 | u8 port = 0; |
| 236 | int i = 0; |
| 237 | int free; |
| 238 | struct net_device *real_dev = rdma_vlan_dev_real_dev(event_netdev) ? |
| 239 | rdma_vlan_dev_real_dev(event_netdev) : |
| 240 | event_netdev; |
| 241 | |
| 242 | if (event != NETDEV_UP && event != NETDEV_DOWN) |
| 243 | return; |
| 244 | |
| 245 | iboe = &hr_dev->iboe; |
| 246 | while (port < hr_dev->caps.num_ports) { |
| 247 | if (real_dev == iboe->netdevs[port]) |
| 248 | break; |
| 249 | port++; |
| 250 | } |
| 251 | |
| 252 | if (port >= hr_dev->caps.num_ports) { |
| 253 | dev_dbg(&hr_dev->pdev->dev, "can't find netdev\n"); |
| 254 | return; |
| 255 | } |
| 256 | |
| 257 | memset(zgid.raw, 0, sizeof(zgid.raw)); |
| 258 | free = -1; |
| 259 | gid_table_len = hr_dev->caps.gid_table_len[port]; |
| 260 | |
| 261 | spin_lock_irqsave(&hr_dev->iboe.lock, flags); |
| 262 | |
| 263 | for (i = 0; i < gid_table_len; i++) { |
| 264 | gid_idx = hns_get_gid_index(hr_dev, port, i); |
| 265 | if (!memcmp(gid->raw, iboe->gid_table[gid_idx].raw, |
| 266 | sizeof(gid->raw))) |
| 267 | break; |
| 268 | if (free < 0 && !memcmp(zgid.raw, |
| 269 | iboe->gid_table[gid_idx].raw, sizeof(zgid.raw))) |
| 270 | free = i; |
| 271 | } |
| 272 | |
| 273 | if (i >= gid_table_len) { |
| 274 | if (free < 0) { |
| 275 | spin_unlock_irqrestore(&hr_dev->iboe.lock, flags); |
| 276 | dev_dbg(&hr_dev->pdev->dev, |
| 277 | "gid_index overflow, port(%d)\n", port); |
| 278 | return; |
| 279 | } |
| 280 | if (!hns_roce_set_gid(hr_dev, port, free, gid)) |
| 281 | hns_roce_update_gids(hr_dev, port); |
| 282 | } else if (event == NETDEV_DOWN) { |
| 283 | if (!hns_roce_set_gid(hr_dev, port, i, &zgid)) |
| 284 | hns_roce_update_gids(hr_dev, port); |
| 285 | } |
| 286 | |
| 287 | spin_unlock_irqrestore(&hr_dev->iboe.lock, flags); |
| 288 | } |
| 289 | |
| 290 | static int hns_roce_inet_event(struct notifier_block *self, unsigned long event, |
| 291 | void *ptr) |
| 292 | { |
| 293 | struct in_ifaddr *ifa = ptr; |
| 294 | struct hns_roce_dev *hr_dev; |
| 295 | struct net_device *dev = ifa->ifa_dev->dev; |
| 296 | union ib_gid gid; |
| 297 | |
| 298 | ipv6_addr_set_v4mapped(ifa->ifa_address, (struct in6_addr *)&gid); |
| 299 | |
| 300 | hr_dev = container_of(self, struct hns_roce_dev, iboe.nb_inet); |
| 301 | |
| 302 | hns_roce_addr_event(event, dev, hr_dev, &gid); |
| 303 | |
| 304 | return NOTIFY_DONE; |
| 305 | } |
| 306 | |
| 307 | static int hns_roce_setup_mtu_gids(struct hns_roce_dev *hr_dev) |
| 308 | { |
| 309 | struct in_ifaddr *ifa_list = NULL; |
| 310 | union ib_gid gid = {{0} }; |
| 311 | u32 ipaddr = 0; |
| 312 | int index = 0; |
| 313 | int ret = 0; |
| 314 | u8 i = 0; |
| 315 | |
| 316 | for (i = 0; i < hr_dev->caps.num_ports; i++) { |
| 317 | hns_roce_set_mtu(hr_dev, i, |
| 318 | ib_mtu_enum_to_int(hr_dev->caps.max_mtu)); |
| 319 | hns_roce_set_mac(hr_dev, i, hr_dev->iboe.netdevs[i]->dev_addr); |
| 320 | |
| 321 | if (hr_dev->iboe.netdevs[i]->ip_ptr) { |
| 322 | ifa_list = hr_dev->iboe.netdevs[i]->ip_ptr->ifa_list; |
| 323 | index = 1; |
| 324 | while (ifa_list) { |
| 325 | ipaddr = ifa_list->ifa_address; |
| 326 | ipv6_addr_set_v4mapped(ipaddr, |
| 327 | (struct in6_addr *)&gid); |
| 328 | ret = hns_roce_set_gid(hr_dev, i, index, &gid); |
| 329 | if (ret) |
| 330 | break; |
| 331 | index++; |
| 332 | ifa_list = ifa_list->ifa_next; |
| 333 | } |
| 334 | hns_roce_update_gids(hr_dev, i); |
| 335 | } |
| 336 | } |
| 337 | |
| 338 | return ret; |
| 339 | } |
| 340 | |
| 341 | static int hns_roce_query_device(struct ib_device *ib_dev, |
| 342 | struct ib_device_attr *props, |
| 343 | struct ib_udata *uhw) |
| 344 | { |
| 345 | struct hns_roce_dev *hr_dev = to_hr_dev(ib_dev); |
| 346 | |
| 347 | memset(props, 0, sizeof(*props)); |
| 348 | |
| 349 | props->sys_image_guid = hr_dev->sys_image_guid; |
| 350 | props->max_mr_size = (u64)(~(0ULL)); |
| 351 | props->page_size_cap = hr_dev->caps.page_size_cap; |
| 352 | props->vendor_id = hr_dev->vendor_id; |
| 353 | props->vendor_part_id = hr_dev->vendor_part_id; |
| 354 | props->hw_ver = hr_dev->hw_rev; |
| 355 | props->max_qp = hr_dev->caps.num_qps; |
| 356 | props->max_qp_wr = hr_dev->caps.max_wqes; |
| 357 | props->device_cap_flags = IB_DEVICE_PORT_ACTIVE_EVENT | |
| 358 | IB_DEVICE_RC_RNR_NAK_GEN | |
| 359 | IB_DEVICE_LOCAL_DMA_LKEY; |
| 360 | props->max_sge = hr_dev->caps.max_sq_sg; |
| 361 | props->max_sge_rd = 1; |
| 362 | props->max_cq = hr_dev->caps.num_cqs; |
| 363 | props->max_cqe = hr_dev->caps.max_cqes; |
| 364 | props->max_mr = hr_dev->caps.num_mtpts; |
| 365 | props->max_pd = hr_dev->caps.num_pds; |
| 366 | props->max_qp_rd_atom = hr_dev->caps.max_qp_dest_rdma; |
| 367 | props->max_qp_init_rd_atom = hr_dev->caps.max_qp_init_rdma; |
| 368 | props->atomic_cap = IB_ATOMIC_NONE; |
| 369 | props->max_pkeys = 1; |
| 370 | props->local_ca_ack_delay = hr_dev->caps.local_ca_ack_delay; |
| 371 | |
| 372 | return 0; |
| 373 | } |
| 374 | |
Lijun Ou | 2eefca2 | 2016-09-15 23:48:06 +0100 | [diff] [blame] | 375 | static struct net_device *hns_roce_get_netdev(struct ib_device *ib_dev, |
| 376 | u8 port_num) |
| 377 | { |
| 378 | struct hns_roce_dev *hr_dev = to_hr_dev(ib_dev); |
| 379 | struct net_device *ndev; |
| 380 | |
| 381 | if (port_num < 1 || port_num > hr_dev->caps.num_ports) |
| 382 | return NULL; |
| 383 | |
| 384 | rcu_read_lock(); |
| 385 | |
| 386 | ndev = hr_dev->iboe.netdevs[port_num - 1]; |
| 387 | if (ndev) |
| 388 | dev_hold(ndev); |
| 389 | |
| 390 | rcu_read_unlock(); |
| 391 | return ndev; |
| 392 | } |
| 393 | |
oulijun | 9a44353 | 2016-07-21 19:06:38 +0800 | [diff] [blame] | 394 | static int hns_roce_query_port(struct ib_device *ib_dev, u8 port_num, |
| 395 | struct ib_port_attr *props) |
| 396 | { |
| 397 | struct hns_roce_dev *hr_dev = to_hr_dev(ib_dev); |
| 398 | struct device *dev = &hr_dev->pdev->dev; |
| 399 | struct net_device *net_dev; |
| 400 | unsigned long flags; |
| 401 | enum ib_mtu mtu; |
| 402 | u8 port; |
| 403 | |
| 404 | assert(port_num > 0); |
| 405 | port = port_num - 1; |
| 406 | |
| 407 | memset(props, 0, sizeof(*props)); |
| 408 | |
| 409 | props->max_mtu = hr_dev->caps.max_mtu; |
| 410 | props->gid_tbl_len = hr_dev->caps.gid_table_len[port]; |
| 411 | props->port_cap_flags = IB_PORT_CM_SUP | IB_PORT_REINIT_SUP | |
| 412 | IB_PORT_VENDOR_CLASS_SUP | |
| 413 | IB_PORT_BOOT_MGMT_SUP; |
| 414 | props->max_msg_sz = HNS_ROCE_MAX_MSG_LEN; |
| 415 | props->pkey_tbl_len = 1; |
| 416 | props->active_width = IB_WIDTH_4X; |
| 417 | props->active_speed = 1; |
| 418 | |
| 419 | spin_lock_irqsave(&hr_dev->iboe.lock, flags); |
| 420 | |
| 421 | net_dev = hr_dev->iboe.netdevs[port]; |
| 422 | if (!net_dev) { |
| 423 | spin_unlock_irqrestore(&hr_dev->iboe.lock, flags); |
| 424 | dev_err(dev, "find netdev %d failed!\r\n", port); |
| 425 | return -EINVAL; |
| 426 | } |
| 427 | |
| 428 | mtu = iboe_get_mtu(net_dev->mtu); |
| 429 | props->active_mtu = mtu ? min(props->max_mtu, mtu) : IB_MTU_256; |
| 430 | props->state = (netif_running(net_dev) && netif_carrier_ok(net_dev)) ? |
| 431 | IB_PORT_ACTIVE : IB_PORT_DOWN; |
| 432 | props->phys_state = (props->state == IB_PORT_ACTIVE) ? 5 : 3; |
| 433 | |
| 434 | spin_unlock_irqrestore(&hr_dev->iboe.lock, flags); |
| 435 | |
| 436 | return 0; |
| 437 | } |
| 438 | |
| 439 | static enum rdma_link_layer hns_roce_get_link_layer(struct ib_device *device, |
| 440 | u8 port_num) |
| 441 | { |
| 442 | return IB_LINK_LAYER_ETHERNET; |
| 443 | } |
| 444 | |
| 445 | static int hns_roce_query_gid(struct ib_device *ib_dev, u8 port_num, int index, |
| 446 | union ib_gid *gid) |
| 447 | { |
| 448 | struct hns_roce_dev *hr_dev = to_hr_dev(ib_dev); |
| 449 | struct device *dev = &hr_dev->pdev->dev; |
| 450 | u8 gid_idx = 0; |
| 451 | u8 port; |
| 452 | |
| 453 | if (port_num < 1 || port_num > hr_dev->caps.num_ports || |
| 454 | index >= hr_dev->caps.gid_table_len[port_num - 1]) { |
| 455 | dev_err(dev, |
| 456 | "port_num %d index %d illegal! correct range: port_num 1~%d index 0~%d!\n", |
| 457 | port_num, index, hr_dev->caps.num_ports, |
| 458 | hr_dev->caps.gid_table_len[port_num - 1] - 1); |
| 459 | return -EINVAL; |
| 460 | } |
| 461 | |
| 462 | port = port_num - 1; |
| 463 | gid_idx = hns_get_gid_index(hr_dev, port, index); |
| 464 | if (gid_idx >= HNS_ROCE_MAX_GID_NUM) { |
| 465 | dev_err(dev, "port_num %d index %d illegal! total gid num %d!\n", |
| 466 | port_num, index, HNS_ROCE_MAX_GID_NUM); |
| 467 | return -EINVAL; |
| 468 | } |
| 469 | |
| 470 | memcpy(gid->raw, hr_dev->iboe.gid_table[gid_idx].raw, |
| 471 | HNS_ROCE_GID_SIZE); |
| 472 | |
| 473 | return 0; |
| 474 | } |
| 475 | |
| 476 | static int hns_roce_query_pkey(struct ib_device *ib_dev, u8 port, u16 index, |
| 477 | u16 *pkey) |
| 478 | { |
| 479 | *pkey = PKEY_ID; |
| 480 | |
| 481 | return 0; |
| 482 | } |
| 483 | |
| 484 | static int hns_roce_modify_device(struct ib_device *ib_dev, int mask, |
| 485 | struct ib_device_modify *props) |
| 486 | { |
| 487 | unsigned long flags; |
| 488 | |
| 489 | if (mask & ~IB_DEVICE_MODIFY_NODE_DESC) |
| 490 | return -EOPNOTSUPP; |
| 491 | |
| 492 | if (mask & IB_DEVICE_MODIFY_NODE_DESC) { |
| 493 | spin_lock_irqsave(&to_hr_dev(ib_dev)->sm_lock, flags); |
| 494 | memcpy(ib_dev->node_desc, props->node_desc, NODE_DESC_SIZE); |
| 495 | spin_unlock_irqrestore(&to_hr_dev(ib_dev)->sm_lock, flags); |
| 496 | } |
| 497 | |
| 498 | return 0; |
| 499 | } |
| 500 | |
| 501 | static int hns_roce_modify_port(struct ib_device *ib_dev, u8 port_num, int mask, |
| 502 | struct ib_port_modify *props) |
| 503 | { |
| 504 | return 0; |
| 505 | } |
| 506 | |
| 507 | static struct ib_ucontext *hns_roce_alloc_ucontext(struct ib_device *ib_dev, |
| 508 | struct ib_udata *udata) |
| 509 | { |
| 510 | int ret = 0; |
| 511 | struct hns_roce_ucontext *context; |
| 512 | struct hns_roce_ib_alloc_ucontext_resp resp; |
| 513 | struct hns_roce_dev *hr_dev = to_hr_dev(ib_dev); |
| 514 | |
| 515 | resp.qp_tab_size = hr_dev->caps.num_qps; |
| 516 | |
| 517 | context = kmalloc(sizeof(*context), GFP_KERNEL); |
| 518 | if (!context) |
| 519 | return ERR_PTR(-ENOMEM); |
| 520 | |
| 521 | ret = hns_roce_uar_alloc(hr_dev, &context->uar); |
| 522 | if (ret) |
| 523 | goto error_fail_uar_alloc; |
| 524 | |
| 525 | ret = ib_copy_to_udata(udata, &resp, sizeof(resp)); |
| 526 | if (ret) |
| 527 | goto error_fail_copy_to_udata; |
| 528 | |
| 529 | return &context->ibucontext; |
| 530 | |
| 531 | error_fail_copy_to_udata: |
| 532 | hns_roce_uar_free(hr_dev, &context->uar); |
| 533 | |
| 534 | error_fail_uar_alloc: |
| 535 | kfree(context); |
| 536 | |
| 537 | return ERR_PTR(ret); |
| 538 | } |
| 539 | |
| 540 | static int hns_roce_dealloc_ucontext(struct ib_ucontext *ibcontext) |
| 541 | { |
| 542 | struct hns_roce_ucontext *context = to_hr_ucontext(ibcontext); |
| 543 | |
| 544 | hns_roce_uar_free(to_hr_dev(ibcontext->device), &context->uar); |
| 545 | kfree(context); |
| 546 | |
| 547 | return 0; |
| 548 | } |
| 549 | |
| 550 | static int hns_roce_mmap(struct ib_ucontext *context, |
| 551 | struct vm_area_struct *vma) |
| 552 | { |
| 553 | if (((vma->vm_end - vma->vm_start) % PAGE_SIZE) != 0) |
| 554 | return -EINVAL; |
| 555 | |
| 556 | if (vma->vm_pgoff == 0) { |
| 557 | vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot); |
| 558 | if (io_remap_pfn_range(vma, vma->vm_start, |
| 559 | to_hr_ucontext(context)->uar.pfn, |
| 560 | PAGE_SIZE, vma->vm_page_prot)) |
| 561 | return -EAGAIN; |
| 562 | |
| 563 | } else { |
| 564 | return -EINVAL; |
| 565 | } |
| 566 | |
| 567 | return 0; |
| 568 | } |
| 569 | |
| 570 | static int hns_roce_port_immutable(struct ib_device *ib_dev, u8 port_num, |
| 571 | struct ib_port_immutable *immutable) |
| 572 | { |
| 573 | struct ib_port_attr attr; |
| 574 | int ret; |
| 575 | |
| 576 | ret = hns_roce_query_port(ib_dev, port_num, &attr); |
| 577 | if (ret) |
| 578 | return ret; |
| 579 | |
| 580 | immutable->pkey_tbl_len = attr.pkey_tbl_len; |
| 581 | immutable->gid_tbl_len = attr.gid_tbl_len; |
| 582 | |
| 583 | immutable->core_cap_flags = RDMA_CORE_PORT_IBA_ROCE; |
| 584 | immutable->max_mad_size = IB_MGMT_MAD_SIZE; |
| 585 | |
| 586 | return 0; |
| 587 | } |
| 588 | |
| 589 | static void hns_roce_unregister_device(struct hns_roce_dev *hr_dev) |
| 590 | { |
| 591 | struct hns_roce_ib_iboe *iboe = &hr_dev->iboe; |
| 592 | |
| 593 | unregister_inetaddr_notifier(&iboe->nb_inet); |
| 594 | unregister_netdevice_notifier(&iboe->nb); |
| 595 | ib_unregister_device(&hr_dev->ib_dev); |
| 596 | } |
| 597 | |
| 598 | static int hns_roce_register_device(struct hns_roce_dev *hr_dev) |
| 599 | { |
| 600 | int ret; |
| 601 | struct hns_roce_ib_iboe *iboe = NULL; |
| 602 | struct ib_device *ib_dev = NULL; |
| 603 | struct device *dev = &hr_dev->pdev->dev; |
| 604 | |
| 605 | iboe = &hr_dev->iboe; |
| 606 | |
| 607 | ib_dev = &hr_dev->ib_dev; |
| 608 | strlcpy(ib_dev->name, "hisi_%d", IB_DEVICE_NAME_MAX); |
| 609 | |
| 610 | ib_dev->owner = THIS_MODULE; |
| 611 | ib_dev->node_type = RDMA_NODE_IB_CA; |
| 612 | ib_dev->dma_device = dev; |
| 613 | |
| 614 | ib_dev->phys_port_cnt = hr_dev->caps.num_ports; |
| 615 | ib_dev->local_dma_lkey = hr_dev->caps.reserved_lkey; |
| 616 | ib_dev->num_comp_vectors = hr_dev->caps.num_comp_vectors; |
| 617 | ib_dev->uverbs_abi_ver = 1; |
| 618 | ib_dev->uverbs_cmd_mask = |
| 619 | (1ULL << IB_USER_VERBS_CMD_GET_CONTEXT) | |
| 620 | (1ULL << IB_USER_VERBS_CMD_QUERY_DEVICE) | |
| 621 | (1ULL << IB_USER_VERBS_CMD_QUERY_PORT) | |
| 622 | (1ULL << IB_USER_VERBS_CMD_ALLOC_PD) | |
| 623 | (1ULL << IB_USER_VERBS_CMD_DEALLOC_PD) | |
| 624 | (1ULL << IB_USER_VERBS_CMD_REG_MR) | |
| 625 | (1ULL << IB_USER_VERBS_CMD_DEREG_MR) | |
| 626 | (1ULL << IB_USER_VERBS_CMD_CREATE_COMP_CHANNEL) | |
| 627 | (1ULL << IB_USER_VERBS_CMD_CREATE_CQ) | |
| 628 | (1ULL << IB_USER_VERBS_CMD_DESTROY_CQ) | |
| 629 | (1ULL << IB_USER_VERBS_CMD_CREATE_QP) | |
| 630 | (1ULL << IB_USER_VERBS_CMD_MODIFY_QP) | |
| 631 | (1ULL << IB_USER_VERBS_CMD_QUERY_QP) | |
| 632 | (1ULL << IB_USER_VERBS_CMD_DESTROY_QP); |
| 633 | |
| 634 | /* HCA||device||port */ |
| 635 | ib_dev->modify_device = hns_roce_modify_device; |
| 636 | ib_dev->query_device = hns_roce_query_device; |
| 637 | ib_dev->query_port = hns_roce_query_port; |
| 638 | ib_dev->modify_port = hns_roce_modify_port; |
| 639 | ib_dev->get_link_layer = hns_roce_get_link_layer; |
Lijun Ou | 2eefca2 | 2016-09-15 23:48:06 +0100 | [diff] [blame] | 640 | ib_dev->get_netdev = hns_roce_get_netdev; |
oulijun | 9a44353 | 2016-07-21 19:06:38 +0800 | [diff] [blame] | 641 | ib_dev->query_gid = hns_roce_query_gid; |
| 642 | ib_dev->query_pkey = hns_roce_query_pkey; |
| 643 | ib_dev->alloc_ucontext = hns_roce_alloc_ucontext; |
| 644 | ib_dev->dealloc_ucontext = hns_roce_dealloc_ucontext; |
| 645 | ib_dev->mmap = hns_roce_mmap; |
| 646 | |
| 647 | /* PD */ |
| 648 | ib_dev->alloc_pd = hns_roce_alloc_pd; |
| 649 | ib_dev->dealloc_pd = hns_roce_dealloc_pd; |
| 650 | |
| 651 | /* AH */ |
| 652 | ib_dev->create_ah = hns_roce_create_ah; |
| 653 | ib_dev->query_ah = hns_roce_query_ah; |
| 654 | ib_dev->destroy_ah = hns_roce_destroy_ah; |
| 655 | |
| 656 | /* QP */ |
| 657 | ib_dev->create_qp = hns_roce_create_qp; |
| 658 | ib_dev->modify_qp = hns_roce_modify_qp; |
| 659 | ib_dev->query_qp = hr_dev->hw->query_qp; |
| 660 | ib_dev->destroy_qp = hr_dev->hw->destroy_qp; |
| 661 | ib_dev->post_send = hr_dev->hw->post_send; |
| 662 | ib_dev->post_recv = hr_dev->hw->post_recv; |
| 663 | |
| 664 | /* CQ */ |
| 665 | ib_dev->create_cq = hns_roce_ib_create_cq; |
| 666 | ib_dev->destroy_cq = hns_roce_ib_destroy_cq; |
| 667 | ib_dev->req_notify_cq = hr_dev->hw->req_notify_cq; |
| 668 | ib_dev->poll_cq = hr_dev->hw->poll_cq; |
| 669 | |
| 670 | /* MR */ |
| 671 | ib_dev->get_dma_mr = hns_roce_get_dma_mr; |
| 672 | ib_dev->reg_user_mr = hns_roce_reg_user_mr; |
| 673 | ib_dev->dereg_mr = hns_roce_dereg_mr; |
| 674 | |
| 675 | /* OTHERS */ |
| 676 | ib_dev->get_port_immutable = hns_roce_port_immutable; |
| 677 | |
| 678 | ret = ib_register_device(ib_dev, NULL); |
| 679 | if (ret) { |
| 680 | dev_err(dev, "ib_register_device failed!\n"); |
| 681 | return ret; |
| 682 | } |
| 683 | |
| 684 | ret = hns_roce_setup_mtu_gids(hr_dev); |
| 685 | if (ret) { |
| 686 | dev_err(dev, "roce_setup_mtu_gids failed!\n"); |
| 687 | goto error_failed_setup_mtu_gids; |
| 688 | } |
| 689 | |
| 690 | spin_lock_init(&iboe->lock); |
| 691 | |
| 692 | iboe->nb.notifier_call = hns_roce_netdev_event; |
| 693 | ret = register_netdevice_notifier(&iboe->nb); |
| 694 | if (ret) { |
| 695 | dev_err(dev, "register_netdevice_notifier failed!\n"); |
| 696 | goto error_failed_setup_mtu_gids; |
| 697 | } |
| 698 | |
| 699 | iboe->nb_inet.notifier_call = hns_roce_inet_event; |
| 700 | ret = register_inetaddr_notifier(&iboe->nb_inet); |
| 701 | if (ret) { |
| 702 | dev_err(dev, "register inet addr notifier failed!\n"); |
| 703 | goto error_failed_register_inetaddr_notifier; |
| 704 | } |
| 705 | |
| 706 | return 0; |
| 707 | |
| 708 | error_failed_register_inetaddr_notifier: |
| 709 | unregister_netdevice_notifier(&iboe->nb); |
| 710 | |
| 711 | error_failed_setup_mtu_gids: |
| 712 | ib_unregister_device(ib_dev); |
| 713 | |
| 714 | return ret; |
| 715 | } |
| 716 | |
Salil | 528f1de | 2016-08-24 04:44:50 +0800 | [diff] [blame] | 717 | static const struct of_device_id hns_roce_of_match[] = { |
| 718 | { .compatible = "hisilicon,hns-roce-v1", .data = &hns_roce_hw_v1, }, |
| 719 | {}, |
| 720 | }; |
| 721 | MODULE_DEVICE_TABLE(of, hns_roce_of_match); |
| 722 | |
| 723 | static const struct acpi_device_id hns_roce_acpi_match[] = { |
| 724 | { "HISI00D1", (kernel_ulong_t)&hns_roce_hw_v1 }, |
| 725 | {}, |
| 726 | }; |
| 727 | MODULE_DEVICE_TABLE(acpi, hns_roce_acpi_match); |
| 728 | |
| 729 | static int hns_roce_node_match(struct device *dev, void *fwnode) |
| 730 | { |
| 731 | return dev->fwnode == fwnode; |
| 732 | } |
| 733 | |
| 734 | static struct |
| 735 | platform_device *hns_roce_find_pdev(struct fwnode_handle *fwnode) |
| 736 | { |
| 737 | struct device *dev; |
| 738 | |
| 739 | /* get the 'device'corresponding to matching 'fwnode' */ |
| 740 | dev = bus_find_device(&platform_bus_type, NULL, |
| 741 | fwnode, hns_roce_node_match); |
| 742 | /* get the platform device */ |
| 743 | return dev ? to_platform_device(dev) : NULL; |
| 744 | } |
| 745 | |
oulijun | 9a44353 | 2016-07-21 19:06:38 +0800 | [diff] [blame] | 746 | static int hns_roce_get_cfg(struct hns_roce_dev *hr_dev) |
| 747 | { |
| 748 | int i; |
Salil | 528f1de | 2016-08-24 04:44:50 +0800 | [diff] [blame] | 749 | int ret; |
oulijun | 9a44353 | 2016-07-21 19:06:38 +0800 | [diff] [blame] | 750 | u8 phy_port; |
| 751 | int port_cnt = 0; |
| 752 | struct device *dev = &hr_dev->pdev->dev; |
oulijun | 9a44353 | 2016-07-21 19:06:38 +0800 | [diff] [blame] | 753 | struct device_node *net_node; |
| 754 | struct net_device *netdev = NULL; |
| 755 | struct platform_device *pdev = NULL; |
| 756 | struct resource *res; |
| 757 | |
Salil | 528f1de | 2016-08-24 04:44:50 +0800 | [diff] [blame] | 758 | /* check if we are compatible with the underlying SoC */ |
| 759 | if (dev_of_node(dev)) { |
| 760 | const struct of_device_id *of_id; |
| 761 | |
| 762 | of_id = of_match_node(hns_roce_of_match, dev->of_node); |
| 763 | if (!of_id) { |
| 764 | dev_err(dev, "device is not compatible!\n"); |
| 765 | return -ENXIO; |
| 766 | } |
| 767 | hr_dev->hw = (struct hns_roce_hw *)of_id->data; |
| 768 | if (!hr_dev->hw) { |
| 769 | dev_err(dev, "couldn't get H/W specific DT data!\n"); |
| 770 | return -ENXIO; |
| 771 | } |
| 772 | } else if (is_acpi_device_node(dev->fwnode)) { |
| 773 | const struct acpi_device_id *acpi_id; |
| 774 | |
| 775 | acpi_id = acpi_match_device(hns_roce_acpi_match, dev); |
| 776 | if (!acpi_id) { |
| 777 | dev_err(dev, "device is not compatible!\n"); |
| 778 | return -ENXIO; |
| 779 | } |
| 780 | hr_dev->hw = (struct hns_roce_hw *) acpi_id->driver_data; |
| 781 | if (!hr_dev->hw) { |
| 782 | dev_err(dev, "couldn't get H/W specific ACPI data!\n"); |
| 783 | return -ENXIO; |
| 784 | } |
oulijun | 9a44353 | 2016-07-21 19:06:38 +0800 | [diff] [blame] | 785 | } else { |
Salil | 528f1de | 2016-08-24 04:44:50 +0800 | [diff] [blame] | 786 | dev_err(dev, "can't read compatibility data from DT or ACPI\n"); |
| 787 | return -ENXIO; |
oulijun | 9a44353 | 2016-07-21 19:06:38 +0800 | [diff] [blame] | 788 | } |
| 789 | |
Salil | 528f1de | 2016-08-24 04:44:50 +0800 | [diff] [blame] | 790 | /* get the mapped register base address */ |
oulijun | 9a44353 | 2016-07-21 19:06:38 +0800 | [diff] [blame] | 791 | res = platform_get_resource(hr_dev->pdev, IORESOURCE_MEM, 0); |
Salil | 528f1de | 2016-08-24 04:44:50 +0800 | [diff] [blame] | 792 | if (!res) { |
| 793 | dev_err(dev, "memory resource not found!\n"); |
| 794 | return -EINVAL; |
| 795 | } |
oulijun | 9a44353 | 2016-07-21 19:06:38 +0800 | [diff] [blame] | 796 | hr_dev->reg_base = devm_ioremap_resource(dev, res); |
Wei Yongjun | 204f69b | 2016-08-06 01:01:24 +0000 | [diff] [blame] | 797 | if (IS_ERR(hr_dev->reg_base)) |
| 798 | return PTR_ERR(hr_dev->reg_base); |
oulijun | 9a44353 | 2016-07-21 19:06:38 +0800 | [diff] [blame] | 799 | |
Lijun Ou | 3164466 | 2016-09-15 23:48:07 +0100 | [diff] [blame^] | 800 | /* read the node_guid of IB device from the DT or ACPI */ |
| 801 | ret = device_property_read_u8_array(dev, "node-guid", |
| 802 | (u8 *)&hr_dev->ib_dev.node_guid, |
| 803 | GUID_LEN); |
| 804 | if (ret) { |
| 805 | dev_err(dev, "couldn't get node_guid from DT or ACPI!\n"); |
| 806 | return ret; |
| 807 | } |
| 808 | |
Salil | 528f1de | 2016-08-24 04:44:50 +0800 | [diff] [blame] | 809 | /* get the RoCE associated ethernet ports or netdevices */ |
oulijun | 9a44353 | 2016-07-21 19:06:38 +0800 | [diff] [blame] | 810 | for (i = 0; i < HNS_ROCE_MAX_PORTS; i++) { |
Salil | 528f1de | 2016-08-24 04:44:50 +0800 | [diff] [blame] | 811 | if (dev_of_node(dev)) { |
| 812 | net_node = of_parse_phandle(dev->of_node, "eth-handle", |
| 813 | i); |
| 814 | if (!net_node) |
| 815 | continue; |
oulijun | 9a44353 | 2016-07-21 19:06:38 +0800 | [diff] [blame] | 816 | pdev = of_find_device_by_node(net_node); |
Salil | 528f1de | 2016-08-24 04:44:50 +0800 | [diff] [blame] | 817 | } else if (is_acpi_device_node(dev->fwnode)) { |
| 818 | struct acpi_reference_args args; |
| 819 | struct fwnode_handle *fwnode; |
| 820 | |
| 821 | ret = acpi_node_get_property_reference(dev->fwnode, |
| 822 | "eth-handle", |
| 823 | i, &args); |
| 824 | if (ret) |
| 825 | continue; |
| 826 | fwnode = acpi_fwnode_handle(args.adev); |
| 827 | pdev = hns_roce_find_pdev(fwnode); |
| 828 | } else { |
| 829 | dev_err(dev, "cannot read data from DT or ACPI\n"); |
| 830 | return -ENXIO; |
| 831 | } |
| 832 | |
| 833 | if (pdev) { |
oulijun | 9a44353 | 2016-07-21 19:06:38 +0800 | [diff] [blame] | 834 | netdev = platform_get_drvdata(pdev); |
| 835 | phy_port = (u8)i; |
| 836 | if (netdev) { |
| 837 | hr_dev->iboe.netdevs[port_cnt] = netdev; |
| 838 | hr_dev->iboe.phy_port[port_cnt] = phy_port; |
| 839 | } else { |
Salil | 528f1de | 2016-08-24 04:44:50 +0800 | [diff] [blame] | 840 | dev_err(dev, "no netdev found with pdev %s\n", |
| 841 | pdev->name); |
oulijun | 9a44353 | 2016-07-21 19:06:38 +0800 | [diff] [blame] | 842 | return -ENODEV; |
| 843 | } |
| 844 | port_cnt++; |
| 845 | } |
| 846 | } |
| 847 | |
| 848 | if (port_cnt == 0) { |
Salil | 528f1de | 2016-08-24 04:44:50 +0800 | [diff] [blame] | 849 | dev_err(dev, "unable to get eth-handle for available ports!\n"); |
oulijun | 9a44353 | 2016-07-21 19:06:38 +0800 | [diff] [blame] | 850 | return -EINVAL; |
| 851 | } |
| 852 | |
| 853 | hr_dev->caps.num_ports = port_cnt; |
| 854 | |
Salil | 528f1de | 2016-08-24 04:44:50 +0800 | [diff] [blame] | 855 | /* cmd issue mode: 0 is poll, 1 is event */ |
oulijun | 9a44353 | 2016-07-21 19:06:38 +0800 | [diff] [blame] | 856 | hr_dev->cmd_mod = 1; |
| 857 | hr_dev->loop_idc = 0; |
| 858 | |
Salil | 528f1de | 2016-08-24 04:44:50 +0800 | [diff] [blame] | 859 | /* read the interrupt names from the DT or ACPI */ |
| 860 | ret = device_property_read_string_array(dev, "interrupt-names", |
| 861 | hr_dev->irq_names, |
| 862 | HNS_ROCE_MAX_IRQ_NUM); |
| 863 | if (ret < 0) { |
| 864 | dev_err(dev, "couldn't get interrupt names from DT or ACPI!\n"); |
| 865 | return ret; |
| 866 | } |
| 867 | |
| 868 | /* fetch the interrupt numbers */ |
oulijun | 9a44353 | 2016-07-21 19:06:38 +0800 | [diff] [blame] | 869 | for (i = 0; i < HNS_ROCE_MAX_IRQ_NUM; i++) { |
| 870 | hr_dev->irq[i] = platform_get_irq(hr_dev->pdev, i); |
| 871 | if (hr_dev->irq[i] <= 0) { |
Salil | 528f1de | 2016-08-24 04:44:50 +0800 | [diff] [blame] | 872 | dev_err(dev, "platform get of irq[=%d] failed!\n", i); |
oulijun | 9a44353 | 2016-07-21 19:06:38 +0800 | [diff] [blame] | 873 | return -EINVAL; |
| 874 | } |
oulijun | 9a44353 | 2016-07-21 19:06:38 +0800 | [diff] [blame] | 875 | } |
| 876 | |
| 877 | return 0; |
| 878 | } |
| 879 | |
| 880 | static int hns_roce_init_hem(struct hns_roce_dev *hr_dev) |
| 881 | { |
| 882 | int ret; |
| 883 | struct device *dev = &hr_dev->pdev->dev; |
| 884 | |
| 885 | ret = hns_roce_init_hem_table(hr_dev, &hr_dev->mr_table.mtt_table, |
| 886 | HEM_TYPE_MTT, hr_dev->caps.mtt_entry_sz, |
| 887 | hr_dev->caps.num_mtt_segs, 1); |
| 888 | if (ret) { |
| 889 | dev_err(dev, "Failed to init MTT context memory, aborting.\n"); |
| 890 | return ret; |
| 891 | } |
| 892 | |
| 893 | ret = hns_roce_init_hem_table(hr_dev, &hr_dev->mr_table.mtpt_table, |
| 894 | HEM_TYPE_MTPT, hr_dev->caps.mtpt_entry_sz, |
| 895 | hr_dev->caps.num_mtpts, 1); |
| 896 | if (ret) { |
| 897 | dev_err(dev, "Failed to init MTPT context memory, aborting.\n"); |
| 898 | goto err_unmap_mtt; |
| 899 | } |
| 900 | |
| 901 | ret = hns_roce_init_hem_table(hr_dev, &hr_dev->qp_table.qp_table, |
| 902 | HEM_TYPE_QPC, hr_dev->caps.qpc_entry_sz, |
| 903 | hr_dev->caps.num_qps, 1); |
| 904 | if (ret) { |
| 905 | dev_err(dev, "Failed to init QP context memory, aborting.\n"); |
| 906 | goto err_unmap_dmpt; |
| 907 | } |
| 908 | |
| 909 | ret = hns_roce_init_hem_table(hr_dev, &hr_dev->qp_table.irrl_table, |
| 910 | HEM_TYPE_IRRL, |
| 911 | hr_dev->caps.irrl_entry_sz * |
| 912 | hr_dev->caps.max_qp_init_rdma, |
| 913 | hr_dev->caps.num_qps, 1); |
| 914 | if (ret) { |
| 915 | dev_err(dev, "Failed to init irrl_table memory, aborting.\n"); |
| 916 | goto err_unmap_qp; |
| 917 | } |
| 918 | |
| 919 | ret = hns_roce_init_hem_table(hr_dev, &hr_dev->cq_table.table, |
| 920 | HEM_TYPE_CQC, hr_dev->caps.cqc_entry_sz, |
| 921 | hr_dev->caps.num_cqs, 1); |
| 922 | if (ret) { |
| 923 | dev_err(dev, "Failed to init CQ context memory, aborting.\n"); |
| 924 | goto err_unmap_irrl; |
| 925 | } |
| 926 | |
| 927 | return 0; |
| 928 | |
| 929 | err_unmap_irrl: |
| 930 | hns_roce_cleanup_hem_table(hr_dev, &hr_dev->qp_table.irrl_table); |
| 931 | |
| 932 | err_unmap_qp: |
| 933 | hns_roce_cleanup_hem_table(hr_dev, &hr_dev->qp_table.qp_table); |
| 934 | |
| 935 | err_unmap_dmpt: |
| 936 | hns_roce_cleanup_hem_table(hr_dev, &hr_dev->mr_table.mtpt_table); |
| 937 | |
| 938 | err_unmap_mtt: |
| 939 | hns_roce_cleanup_hem_table(hr_dev, &hr_dev->mr_table.mtt_table); |
| 940 | |
| 941 | return ret; |
| 942 | } |
| 943 | |
| 944 | /** |
| 945 | * hns_roce_setup_hca - setup host channel adapter |
| 946 | * @hr_dev: pointer to hns roce device |
| 947 | * Return : int |
| 948 | */ |
| 949 | static int hns_roce_setup_hca(struct hns_roce_dev *hr_dev) |
| 950 | { |
| 951 | int ret; |
| 952 | struct device *dev = &hr_dev->pdev->dev; |
| 953 | |
| 954 | spin_lock_init(&hr_dev->sm_lock); |
| 955 | spin_lock_init(&hr_dev->cq_db_lock); |
| 956 | spin_lock_init(&hr_dev->bt_cmd_lock); |
| 957 | |
| 958 | ret = hns_roce_init_uar_table(hr_dev); |
| 959 | if (ret) { |
| 960 | dev_err(dev, "Failed to initialize uar table. aborting\n"); |
| 961 | return ret; |
| 962 | } |
| 963 | |
| 964 | ret = hns_roce_uar_alloc(hr_dev, &hr_dev->priv_uar); |
| 965 | if (ret) { |
| 966 | dev_err(dev, "Failed to allocate priv_uar.\n"); |
| 967 | goto err_uar_table_free; |
| 968 | } |
| 969 | |
| 970 | ret = hns_roce_init_pd_table(hr_dev); |
| 971 | if (ret) { |
| 972 | dev_err(dev, "Failed to init protected domain table.\n"); |
| 973 | goto err_uar_alloc_free; |
| 974 | } |
| 975 | |
| 976 | ret = hns_roce_init_mr_table(hr_dev); |
| 977 | if (ret) { |
| 978 | dev_err(dev, "Failed to init memory region table.\n"); |
| 979 | goto err_pd_table_free; |
| 980 | } |
| 981 | |
| 982 | ret = hns_roce_init_cq_table(hr_dev); |
| 983 | if (ret) { |
| 984 | dev_err(dev, "Failed to init completion queue table.\n"); |
| 985 | goto err_mr_table_free; |
| 986 | } |
| 987 | |
| 988 | ret = hns_roce_init_qp_table(hr_dev); |
| 989 | if (ret) { |
| 990 | dev_err(dev, "Failed to init queue pair table.\n"); |
| 991 | goto err_cq_table_free; |
| 992 | } |
| 993 | |
| 994 | return 0; |
| 995 | |
| 996 | err_cq_table_free: |
| 997 | hns_roce_cleanup_cq_table(hr_dev); |
| 998 | |
| 999 | err_mr_table_free: |
| 1000 | hns_roce_cleanup_mr_table(hr_dev); |
| 1001 | |
| 1002 | err_pd_table_free: |
| 1003 | hns_roce_cleanup_pd_table(hr_dev); |
| 1004 | |
| 1005 | err_uar_alloc_free: |
| 1006 | hns_roce_uar_free(hr_dev, &hr_dev->priv_uar); |
| 1007 | |
| 1008 | err_uar_table_free: |
| 1009 | hns_roce_cleanup_uar_table(hr_dev); |
| 1010 | return ret; |
| 1011 | } |
| 1012 | |
| 1013 | /** |
| 1014 | * hns_roce_probe - RoCE driver entrance |
| 1015 | * @pdev: pointer to platform device |
| 1016 | * Return : int |
| 1017 | * |
| 1018 | */ |
| 1019 | static int hns_roce_probe(struct platform_device *pdev) |
| 1020 | { |
| 1021 | int ret; |
| 1022 | struct hns_roce_dev *hr_dev; |
| 1023 | struct device *dev = &pdev->dev; |
| 1024 | |
| 1025 | hr_dev = (struct hns_roce_dev *)ib_alloc_device(sizeof(*hr_dev)); |
| 1026 | if (!hr_dev) |
| 1027 | return -ENOMEM; |
| 1028 | |
| 1029 | memset((u8 *)hr_dev + sizeof(struct ib_device), 0, |
| 1030 | sizeof(struct hns_roce_dev) - sizeof(struct ib_device)); |
| 1031 | |
| 1032 | hr_dev->pdev = pdev; |
| 1033 | platform_set_drvdata(pdev, hr_dev); |
| 1034 | |
| 1035 | if (dma_set_mask_and_coherent(dev, DMA_BIT_MASK(64ULL)) && |
| 1036 | dma_set_mask_and_coherent(dev, DMA_BIT_MASK(32ULL))) { |
Salil | 528f1de | 2016-08-24 04:44:50 +0800 | [diff] [blame] | 1037 | dev_err(dev, "Not usable DMA addressing mode\n"); |
oulijun | 9a44353 | 2016-07-21 19:06:38 +0800 | [diff] [blame] | 1038 | ret = -EIO; |
| 1039 | goto error_failed_get_cfg; |
| 1040 | } |
| 1041 | |
| 1042 | ret = hns_roce_get_cfg(hr_dev); |
| 1043 | if (ret) { |
| 1044 | dev_err(dev, "Get Configuration failed!\n"); |
| 1045 | goto error_failed_get_cfg; |
| 1046 | } |
| 1047 | |
| 1048 | ret = hr_dev->hw->reset(hr_dev, true); |
| 1049 | if (ret) { |
| 1050 | dev_err(dev, "Reset RoCE engine failed!\n"); |
| 1051 | goto error_failed_get_cfg; |
| 1052 | } |
| 1053 | |
| 1054 | hr_dev->hw->hw_profile(hr_dev); |
| 1055 | |
| 1056 | ret = hns_roce_cmd_init(hr_dev); |
| 1057 | if (ret) { |
| 1058 | dev_err(dev, "cmd init failed!\n"); |
| 1059 | goto error_failed_cmd_init; |
| 1060 | } |
| 1061 | |
| 1062 | ret = hns_roce_init_eq_table(hr_dev); |
| 1063 | if (ret) { |
| 1064 | dev_err(dev, "eq init failed!\n"); |
| 1065 | goto error_failed_eq_table; |
| 1066 | } |
| 1067 | |
| 1068 | if (hr_dev->cmd_mod) { |
| 1069 | ret = hns_roce_cmd_use_events(hr_dev); |
| 1070 | if (ret) { |
| 1071 | dev_err(dev, "Switch to event-driven cmd failed!\n"); |
| 1072 | goto error_failed_use_event; |
| 1073 | } |
| 1074 | } |
| 1075 | |
| 1076 | ret = hns_roce_init_hem(hr_dev); |
| 1077 | if (ret) { |
| 1078 | dev_err(dev, "init HEM(Hardware Entry Memory) failed!\n"); |
| 1079 | goto error_failed_init_hem; |
| 1080 | } |
| 1081 | |
| 1082 | ret = hns_roce_setup_hca(hr_dev); |
| 1083 | if (ret) { |
| 1084 | dev_err(dev, "setup hca failed!\n"); |
| 1085 | goto error_failed_setup_hca; |
| 1086 | } |
| 1087 | |
| 1088 | ret = hr_dev->hw->hw_init(hr_dev); |
| 1089 | if (ret) { |
| 1090 | dev_err(dev, "hw_init failed!\n"); |
| 1091 | goto error_failed_engine_init; |
| 1092 | } |
| 1093 | |
| 1094 | ret = hns_roce_register_device(hr_dev); |
| 1095 | if (ret) |
| 1096 | goto error_failed_register_device; |
| 1097 | |
| 1098 | return 0; |
| 1099 | |
| 1100 | error_failed_register_device: |
| 1101 | hr_dev->hw->hw_exit(hr_dev); |
| 1102 | |
| 1103 | error_failed_engine_init: |
| 1104 | hns_roce_cleanup_bitmap(hr_dev); |
| 1105 | |
| 1106 | error_failed_setup_hca: |
| 1107 | hns_roce_cleanup_hem(hr_dev); |
| 1108 | |
| 1109 | error_failed_init_hem: |
| 1110 | if (hr_dev->cmd_mod) |
| 1111 | hns_roce_cmd_use_polling(hr_dev); |
| 1112 | |
| 1113 | error_failed_use_event: |
| 1114 | hns_roce_cleanup_eq_table(hr_dev); |
| 1115 | |
| 1116 | error_failed_eq_table: |
| 1117 | hns_roce_cmd_cleanup(hr_dev); |
| 1118 | |
| 1119 | error_failed_cmd_init: |
| 1120 | ret = hr_dev->hw->reset(hr_dev, false); |
| 1121 | if (ret) |
| 1122 | dev_err(&hr_dev->pdev->dev, "roce_engine reset fail\n"); |
| 1123 | |
| 1124 | error_failed_get_cfg: |
| 1125 | ib_dealloc_device(&hr_dev->ib_dev); |
| 1126 | |
| 1127 | return ret; |
| 1128 | } |
| 1129 | |
| 1130 | /** |
| 1131 | * hns_roce_remove - remove RoCE device |
| 1132 | * @pdev: pointer to platform device |
| 1133 | */ |
| 1134 | static int hns_roce_remove(struct platform_device *pdev) |
| 1135 | { |
| 1136 | struct hns_roce_dev *hr_dev = platform_get_drvdata(pdev); |
| 1137 | |
| 1138 | hns_roce_unregister_device(hr_dev); |
| 1139 | hr_dev->hw->hw_exit(hr_dev); |
| 1140 | hns_roce_cleanup_bitmap(hr_dev); |
| 1141 | hns_roce_cleanup_hem(hr_dev); |
| 1142 | |
| 1143 | if (hr_dev->cmd_mod) |
| 1144 | hns_roce_cmd_use_polling(hr_dev); |
| 1145 | |
| 1146 | hns_roce_cleanup_eq_table(hr_dev); |
| 1147 | hns_roce_cmd_cleanup(hr_dev); |
| 1148 | hr_dev->hw->reset(hr_dev, false); |
| 1149 | |
| 1150 | ib_dealloc_device(&hr_dev->ib_dev); |
| 1151 | |
| 1152 | return 0; |
| 1153 | } |
| 1154 | |
oulijun | 9a44353 | 2016-07-21 19:06:38 +0800 | [diff] [blame] | 1155 | static struct platform_driver hns_roce_driver = { |
| 1156 | .probe = hns_roce_probe, |
| 1157 | .remove = hns_roce_remove, |
| 1158 | .driver = { |
| 1159 | .name = DRV_NAME, |
| 1160 | .of_match_table = hns_roce_of_match, |
Salil | 528f1de | 2016-08-24 04:44:50 +0800 | [diff] [blame] | 1161 | .acpi_match_table = ACPI_PTR(hns_roce_acpi_match), |
oulijun | 9a44353 | 2016-07-21 19:06:38 +0800 | [diff] [blame] | 1162 | }, |
| 1163 | }; |
| 1164 | |
| 1165 | module_platform_driver(hns_roce_driver); |
| 1166 | |
| 1167 | MODULE_LICENSE("Dual BSD/GPL"); |
| 1168 | MODULE_AUTHOR("Wei Hu <xavier.huwei@huawei.com>"); |
| 1169 | MODULE_AUTHOR("Nenglong Zhao <zhaonenglong@hisilicon.com>"); |
| 1170 | MODULE_AUTHOR("Lijun Ou <oulijun@huawei.com>"); |
| 1171 | MODULE_DESCRIPTION("HNS RoCE Driver"); |