Arto Merilainen | de2ba66 | 2013-03-22 16:34:08 +0200 | [diff] [blame] | 1 | /* |
| 2 | * NVIDIA Tegra DRM GEM helper functions |
| 3 | * |
| 4 | * Copyright (C) 2012 Sascha Hauer, Pengutronix |
Arto Merilainen | 7ecada3 | 2016-11-08 19:51:34 +0200 | [diff] [blame] | 5 | * Copyright (C) 2013-2015 NVIDIA CORPORATION, All rights reserved. |
Arto Merilainen | de2ba66 | 2013-03-22 16:34:08 +0200 | [diff] [blame] | 6 | * |
| 7 | * Based on the GEM/CMA helpers |
| 8 | * |
| 9 | * Copyright (c) 2011 Samsung Electronics Co., Ltd. |
| 10 | * |
Thierry Reding | 9a2ac2d | 2014-02-11 15:52:01 +0100 | [diff] [blame] | 11 | * This program is free software; you can redistribute it and/or modify |
| 12 | * it under the terms of the GNU General Public License version 2 as |
| 13 | * published by the Free Software Foundation. |
Arto Merilainen | de2ba66 | 2013-03-22 16:34:08 +0200 | [diff] [blame] | 14 | */ |
| 15 | |
Thierry Reding | 3800391 | 2013-12-12 10:00:43 +0100 | [diff] [blame] | 16 | #include <linux/dma-buf.h> |
Thierry Reding | df06b75 | 2014-06-26 21:41:53 +0200 | [diff] [blame] | 17 | #include <linux/iommu.h> |
Thierry Reding | 773af77 | 2013-10-04 22:34:01 +0200 | [diff] [blame] | 18 | #include <drm/tegra_drm.h> |
| 19 | |
Thierry Reding | d1f3e1e | 2014-07-11 08:29:14 +0200 | [diff] [blame] | 20 | #include "drm.h" |
Arto Merilainen | de2ba66 | 2013-03-22 16:34:08 +0200 | [diff] [blame] | 21 | #include "gem.h" |
| 22 | |
Thierry Reding | 3be8274 | 2013-09-24 16:34:05 +0200 | [diff] [blame] | 23 | static inline struct tegra_bo *host1x_to_tegra_bo(struct host1x_bo *bo) |
Arto Merilainen | de2ba66 | 2013-03-22 16:34:08 +0200 | [diff] [blame] | 24 | { |
| 25 | return container_of(bo, struct tegra_bo, base); |
| 26 | } |
| 27 | |
| 28 | static void tegra_bo_put(struct host1x_bo *bo) |
| 29 | { |
Thierry Reding | 3be8274 | 2013-09-24 16:34:05 +0200 | [diff] [blame] | 30 | struct tegra_bo *obj = host1x_to_tegra_bo(bo); |
Arto Merilainen | de2ba66 | 2013-03-22 16:34:08 +0200 | [diff] [blame] | 31 | |
Daniel Vetter | a07cdfe | 2015-11-23 10:32:48 +0100 | [diff] [blame] | 32 | drm_gem_object_unreference_unlocked(&obj->gem); |
Arto Merilainen | de2ba66 | 2013-03-22 16:34:08 +0200 | [diff] [blame] | 33 | } |
| 34 | |
| 35 | static dma_addr_t tegra_bo_pin(struct host1x_bo *bo, struct sg_table **sgt) |
| 36 | { |
Thierry Reding | 3be8274 | 2013-09-24 16:34:05 +0200 | [diff] [blame] | 37 | struct tegra_bo *obj = host1x_to_tegra_bo(bo); |
Arto Merilainen | de2ba66 | 2013-03-22 16:34:08 +0200 | [diff] [blame] | 38 | |
Mikko Perttunen | 585ee0f | 2016-11-08 19:51:35 +0200 | [diff] [blame] | 39 | *sgt = obj->sgt; |
| 40 | |
Arto Merilainen | de2ba66 | 2013-03-22 16:34:08 +0200 | [diff] [blame] | 41 | return obj->paddr; |
| 42 | } |
| 43 | |
| 44 | static void tegra_bo_unpin(struct host1x_bo *bo, struct sg_table *sgt) |
| 45 | { |
| 46 | } |
| 47 | |
| 48 | static void *tegra_bo_mmap(struct host1x_bo *bo) |
| 49 | { |
Thierry Reding | 3be8274 | 2013-09-24 16:34:05 +0200 | [diff] [blame] | 50 | struct tegra_bo *obj = host1x_to_tegra_bo(bo); |
Arto Merilainen | de2ba66 | 2013-03-22 16:34:08 +0200 | [diff] [blame] | 51 | |
Arto Merilainen | 7ecada3 | 2016-11-08 19:51:34 +0200 | [diff] [blame] | 52 | if (obj->vaddr) |
| 53 | return obj->vaddr; |
| 54 | else if (obj->gem.import_attach) |
| 55 | return dma_buf_vmap(obj->gem.import_attach->dmabuf); |
| 56 | else |
| 57 | return vmap(obj->pages, obj->num_pages, VM_MAP, |
| 58 | pgprot_writecombine(PAGE_KERNEL)); |
Arto Merilainen | de2ba66 | 2013-03-22 16:34:08 +0200 | [diff] [blame] | 59 | } |
| 60 | |
| 61 | static void tegra_bo_munmap(struct host1x_bo *bo, void *addr) |
| 62 | { |
Arto Merilainen | 7ecada3 | 2016-11-08 19:51:34 +0200 | [diff] [blame] | 63 | struct tegra_bo *obj = host1x_to_tegra_bo(bo); |
| 64 | |
| 65 | if (obj->vaddr) |
| 66 | return; |
| 67 | else if (obj->gem.import_attach) |
| 68 | dma_buf_vunmap(obj->gem.import_attach->dmabuf, addr); |
| 69 | else |
| 70 | vunmap(addr); |
Arto Merilainen | de2ba66 | 2013-03-22 16:34:08 +0200 | [diff] [blame] | 71 | } |
| 72 | |
| 73 | static void *tegra_bo_kmap(struct host1x_bo *bo, unsigned int page) |
| 74 | { |
Thierry Reding | 3be8274 | 2013-09-24 16:34:05 +0200 | [diff] [blame] | 75 | struct tegra_bo *obj = host1x_to_tegra_bo(bo); |
Arto Merilainen | de2ba66 | 2013-03-22 16:34:08 +0200 | [diff] [blame] | 76 | |
Arto Merilainen | 7ecada3 | 2016-11-08 19:51:34 +0200 | [diff] [blame] | 77 | if (obj->vaddr) |
| 78 | return obj->vaddr + page * PAGE_SIZE; |
| 79 | else if (obj->gem.import_attach) |
| 80 | return dma_buf_kmap(obj->gem.import_attach->dmabuf, page); |
| 81 | else |
| 82 | return vmap(obj->pages + page, 1, VM_MAP, |
| 83 | pgprot_writecombine(PAGE_KERNEL)); |
Arto Merilainen | de2ba66 | 2013-03-22 16:34:08 +0200 | [diff] [blame] | 84 | } |
| 85 | |
| 86 | static void tegra_bo_kunmap(struct host1x_bo *bo, unsigned int page, |
| 87 | void *addr) |
| 88 | { |
Arto Merilainen | 7ecada3 | 2016-11-08 19:51:34 +0200 | [diff] [blame] | 89 | struct tegra_bo *obj = host1x_to_tegra_bo(bo); |
| 90 | |
| 91 | if (obj->vaddr) |
| 92 | return; |
| 93 | else if (obj->gem.import_attach) |
| 94 | dma_buf_kunmap(obj->gem.import_attach->dmabuf, page, addr); |
| 95 | else |
| 96 | vunmap(addr); |
Arto Merilainen | de2ba66 | 2013-03-22 16:34:08 +0200 | [diff] [blame] | 97 | } |
| 98 | |
| 99 | static struct host1x_bo *tegra_bo_get(struct host1x_bo *bo) |
| 100 | { |
Thierry Reding | 3be8274 | 2013-09-24 16:34:05 +0200 | [diff] [blame] | 101 | struct tegra_bo *obj = host1x_to_tegra_bo(bo); |
Arto Merilainen | de2ba66 | 2013-03-22 16:34:08 +0200 | [diff] [blame] | 102 | |
Arto Merilainen | de2ba66 | 2013-03-22 16:34:08 +0200 | [diff] [blame] | 103 | drm_gem_object_reference(&obj->gem); |
Arto Merilainen | de2ba66 | 2013-03-22 16:34:08 +0200 | [diff] [blame] | 104 | |
| 105 | return bo; |
| 106 | } |
| 107 | |
Thierry Reding | 425c0fd | 2013-12-12 10:10:46 +0100 | [diff] [blame] | 108 | static const struct host1x_bo_ops tegra_bo_ops = { |
Arto Merilainen | de2ba66 | 2013-03-22 16:34:08 +0200 | [diff] [blame] | 109 | .get = tegra_bo_get, |
| 110 | .put = tegra_bo_put, |
| 111 | .pin = tegra_bo_pin, |
| 112 | .unpin = tegra_bo_unpin, |
| 113 | .mmap = tegra_bo_mmap, |
| 114 | .munmap = tegra_bo_munmap, |
| 115 | .kmap = tegra_bo_kmap, |
| 116 | .kunmap = tegra_bo_kunmap, |
| 117 | }; |
| 118 | |
Thierry Reding | df06b75 | 2014-06-26 21:41:53 +0200 | [diff] [blame] | 119 | static int tegra_bo_iommu_map(struct tegra_drm *tegra, struct tegra_bo *bo) |
| 120 | { |
| 121 | int prot = IOMMU_READ | IOMMU_WRITE; |
| 122 | ssize_t err; |
| 123 | |
| 124 | if (bo->mm) |
| 125 | return -EBUSY; |
| 126 | |
| 127 | bo->mm = kzalloc(sizeof(*bo->mm), GFP_KERNEL); |
| 128 | if (!bo->mm) |
| 129 | return -ENOMEM; |
| 130 | |
Thierry Reding | 347ad49d | 2017-03-09 20:04:56 +0100 | [diff] [blame^] | 131 | mutex_lock(&tegra->mm_lock); |
| 132 | |
Chris Wilson | 4e64e55 | 2017-02-02 21:04:38 +0000 | [diff] [blame] | 133 | err = drm_mm_insert_node_generic(&tegra->mm, |
| 134 | bo->mm, bo->gem.size, PAGE_SIZE, 0, 0); |
Thierry Reding | df06b75 | 2014-06-26 21:41:53 +0200 | [diff] [blame] | 135 | if (err < 0) { |
| 136 | dev_err(tegra->drm->dev, "out of I/O virtual memory: %zd\n", |
| 137 | err); |
Thierry Reding | 347ad49d | 2017-03-09 20:04:56 +0100 | [diff] [blame^] | 138 | goto unlock; |
Thierry Reding | df06b75 | 2014-06-26 21:41:53 +0200 | [diff] [blame] | 139 | } |
| 140 | |
| 141 | bo->paddr = bo->mm->start; |
| 142 | |
Thierry Reding | 8c8cb58 | 2014-12-17 16:46:37 +0100 | [diff] [blame] | 143 | err = iommu_map_sg(tegra->domain, bo->paddr, bo->sgt->sgl, |
| 144 | bo->sgt->nents, prot); |
Thierry Reding | df06b75 | 2014-06-26 21:41:53 +0200 | [diff] [blame] | 145 | if (err < 0) { |
| 146 | dev_err(tegra->drm->dev, "failed to map buffer: %zd\n", err); |
| 147 | goto remove; |
| 148 | } |
| 149 | |
| 150 | bo->size = err; |
| 151 | |
Thierry Reding | 347ad49d | 2017-03-09 20:04:56 +0100 | [diff] [blame^] | 152 | mutex_unlock(&tegra->mm_lock); |
| 153 | |
Thierry Reding | df06b75 | 2014-06-26 21:41:53 +0200 | [diff] [blame] | 154 | return 0; |
| 155 | |
| 156 | remove: |
| 157 | drm_mm_remove_node(bo->mm); |
Thierry Reding | 347ad49d | 2017-03-09 20:04:56 +0100 | [diff] [blame^] | 158 | unlock: |
| 159 | mutex_unlock(&tegra->mm_lock); |
Thierry Reding | df06b75 | 2014-06-26 21:41:53 +0200 | [diff] [blame] | 160 | kfree(bo->mm); |
| 161 | return err; |
| 162 | } |
| 163 | |
| 164 | static int tegra_bo_iommu_unmap(struct tegra_drm *tegra, struct tegra_bo *bo) |
| 165 | { |
| 166 | if (!bo->mm) |
| 167 | return 0; |
| 168 | |
Thierry Reding | 347ad49d | 2017-03-09 20:04:56 +0100 | [diff] [blame^] | 169 | mutex_lock(&tegra->mm_lock); |
Thierry Reding | df06b75 | 2014-06-26 21:41:53 +0200 | [diff] [blame] | 170 | iommu_unmap(tegra->domain, bo->paddr, bo->size); |
| 171 | drm_mm_remove_node(bo->mm); |
Thierry Reding | 347ad49d | 2017-03-09 20:04:56 +0100 | [diff] [blame^] | 172 | mutex_unlock(&tegra->mm_lock); |
| 173 | |
Thierry Reding | df06b75 | 2014-06-26 21:41:53 +0200 | [diff] [blame] | 174 | kfree(bo->mm); |
| 175 | |
| 176 | return 0; |
| 177 | } |
| 178 | |
Thierry Reding | c28d4a3 | 2014-10-16 14:18:50 +0200 | [diff] [blame] | 179 | static struct tegra_bo *tegra_bo_alloc_object(struct drm_device *drm, |
| 180 | size_t size) |
Arto Merilainen | de2ba66 | 2013-03-22 16:34:08 +0200 | [diff] [blame] | 181 | { |
| 182 | struct tegra_bo *bo; |
| 183 | int err; |
| 184 | |
| 185 | bo = kzalloc(sizeof(*bo), GFP_KERNEL); |
| 186 | if (!bo) |
| 187 | return ERR_PTR(-ENOMEM); |
| 188 | |
| 189 | host1x_bo_init(&bo->base, &tegra_bo_ops); |
| 190 | size = round_up(size, PAGE_SIZE); |
| 191 | |
Thierry Reding | c28d4a3 | 2014-10-16 14:18:50 +0200 | [diff] [blame] | 192 | err = drm_gem_object_init(drm, &bo->gem, size); |
| 193 | if (err < 0) |
| 194 | goto free; |
| 195 | |
| 196 | err = drm_gem_create_mmap_offset(&bo->gem); |
| 197 | if (err < 0) |
| 198 | goto release; |
| 199 | |
| 200 | return bo; |
| 201 | |
| 202 | release: |
| 203 | drm_gem_object_release(&bo->gem); |
| 204 | free: |
| 205 | kfree(bo); |
| 206 | return ERR_PTR(err); |
| 207 | } |
| 208 | |
Thierry Reding | df06b75 | 2014-06-26 21:41:53 +0200 | [diff] [blame] | 209 | static void tegra_bo_free(struct drm_device *drm, struct tegra_bo *bo) |
Thierry Reding | c28d4a3 | 2014-10-16 14:18:50 +0200 | [diff] [blame] | 210 | { |
Thierry Reding | df06b75 | 2014-06-26 21:41:53 +0200 | [diff] [blame] | 211 | if (bo->pages) { |
| 212 | drm_gem_put_pages(&bo->gem, bo->pages, true, true); |
| 213 | sg_free_table(bo->sgt); |
| 214 | kfree(bo->sgt); |
Thierry Reding | 7e0180e | 2014-11-06 14:41:31 +0100 | [diff] [blame] | 215 | } else if (bo->vaddr) { |
Luis R. Rodriguez | f6e4566 | 2016-01-22 18:34:22 -0800 | [diff] [blame] | 216 | dma_free_wc(drm->dev, bo->gem.size, bo->vaddr, bo->paddr); |
Thierry Reding | df06b75 | 2014-06-26 21:41:53 +0200 | [diff] [blame] | 217 | } |
| 218 | } |
| 219 | |
Thierry Reding | 73c42c7 | 2014-12-16 16:41:47 +0100 | [diff] [blame] | 220 | static int tegra_bo_get_pages(struct drm_device *drm, struct tegra_bo *bo) |
Thierry Reding | df06b75 | 2014-06-26 21:41:53 +0200 | [diff] [blame] | 221 | { |
Thierry Reding | a04251f | 2014-12-16 16:35:26 +0100 | [diff] [blame] | 222 | struct scatterlist *s; |
Thierry Reding | a04251f | 2014-12-16 16:35:26 +0100 | [diff] [blame] | 223 | unsigned int i; |
| 224 | |
Thierry Reding | df06b75 | 2014-06-26 21:41:53 +0200 | [diff] [blame] | 225 | bo->pages = drm_gem_get_pages(&bo->gem); |
| 226 | if (IS_ERR(bo->pages)) |
| 227 | return PTR_ERR(bo->pages); |
| 228 | |
Thierry Reding | 73c42c7 | 2014-12-16 16:41:47 +0100 | [diff] [blame] | 229 | bo->num_pages = bo->gem.size >> PAGE_SHIFT; |
Thierry Reding | df06b75 | 2014-06-26 21:41:53 +0200 | [diff] [blame] | 230 | |
Thierry Reding | fd73caa | 2015-04-14 12:52:36 +0200 | [diff] [blame] | 231 | bo->sgt = drm_prime_pages_to_sg(bo->pages, bo->num_pages); |
| 232 | if (IS_ERR(bo->sgt)) |
Thierry Reding | a04251f | 2014-12-16 16:35:26 +0100 | [diff] [blame] | 233 | goto put_pages; |
| 234 | |
| 235 | /* |
Thierry Reding | fd73caa | 2015-04-14 12:52:36 +0200 | [diff] [blame] | 236 | * Fake up the SG table so that dma_sync_sg_for_device() can be used |
| 237 | * to flush the pages associated with it. |
Thierry Reding | a04251f | 2014-12-16 16:35:26 +0100 | [diff] [blame] | 238 | * |
| 239 | * TODO: Replace this by drm_clflash_sg() once it can be implemented |
| 240 | * without relying on symbols that are not exported. |
| 241 | */ |
Thierry Reding | fd73caa | 2015-04-14 12:52:36 +0200 | [diff] [blame] | 242 | for_each_sg(bo->sgt->sgl, s, bo->sgt->nents, i) |
Thierry Reding | a04251f | 2014-12-16 16:35:26 +0100 | [diff] [blame] | 243 | sg_dma_address(s) = sg_phys(s); |
| 244 | |
Thierry Reding | fd73caa | 2015-04-14 12:52:36 +0200 | [diff] [blame] | 245 | dma_sync_sg_for_device(drm->dev, bo->sgt->sgl, bo->sgt->nents, |
| 246 | DMA_TO_DEVICE); |
Thierry Reding | a04251f | 2014-12-16 16:35:26 +0100 | [diff] [blame] | 247 | |
Thierry Reding | df06b75 | 2014-06-26 21:41:53 +0200 | [diff] [blame] | 248 | return 0; |
Thierry Reding | a04251f | 2014-12-16 16:35:26 +0100 | [diff] [blame] | 249 | |
Thierry Reding | a04251f | 2014-12-16 16:35:26 +0100 | [diff] [blame] | 250 | put_pages: |
| 251 | drm_gem_put_pages(&bo->gem, bo->pages, false, false); |
Thierry Reding | fd73caa | 2015-04-14 12:52:36 +0200 | [diff] [blame] | 252 | return PTR_ERR(bo->sgt); |
Thierry Reding | df06b75 | 2014-06-26 21:41:53 +0200 | [diff] [blame] | 253 | } |
| 254 | |
Thierry Reding | 73c42c7 | 2014-12-16 16:41:47 +0100 | [diff] [blame] | 255 | static int tegra_bo_alloc(struct drm_device *drm, struct tegra_bo *bo) |
Thierry Reding | df06b75 | 2014-06-26 21:41:53 +0200 | [diff] [blame] | 256 | { |
| 257 | struct tegra_drm *tegra = drm->dev_private; |
| 258 | int err; |
| 259 | |
| 260 | if (tegra->domain) { |
Thierry Reding | 73c42c7 | 2014-12-16 16:41:47 +0100 | [diff] [blame] | 261 | err = tegra_bo_get_pages(drm, bo); |
Thierry Reding | df06b75 | 2014-06-26 21:41:53 +0200 | [diff] [blame] | 262 | if (err < 0) |
| 263 | return err; |
| 264 | |
| 265 | err = tegra_bo_iommu_map(tegra, bo); |
| 266 | if (err < 0) { |
| 267 | tegra_bo_free(drm, bo); |
| 268 | return err; |
| 269 | } |
| 270 | } else { |
Thierry Reding | 73c42c7 | 2014-12-16 16:41:47 +0100 | [diff] [blame] | 271 | size_t size = bo->gem.size; |
| 272 | |
Luis R. Rodriguez | f6e4566 | 2016-01-22 18:34:22 -0800 | [diff] [blame] | 273 | bo->vaddr = dma_alloc_wc(drm->dev, size, &bo->paddr, |
| 274 | GFP_KERNEL | __GFP_NOWARN); |
Thierry Reding | df06b75 | 2014-06-26 21:41:53 +0200 | [diff] [blame] | 275 | if (!bo->vaddr) { |
| 276 | dev_err(drm->dev, |
| 277 | "failed to allocate buffer of size %zu\n", |
| 278 | size); |
| 279 | return -ENOMEM; |
| 280 | } |
| 281 | } |
| 282 | |
| 283 | return 0; |
Thierry Reding | c28d4a3 | 2014-10-16 14:18:50 +0200 | [diff] [blame] | 284 | } |
| 285 | |
Thierry Reding | 71c3862 | 2014-11-03 13:23:02 +0100 | [diff] [blame] | 286 | struct tegra_bo *tegra_bo_create(struct drm_device *drm, size_t size, |
Thierry Reding | c28d4a3 | 2014-10-16 14:18:50 +0200 | [diff] [blame] | 287 | unsigned long flags) |
| 288 | { |
| 289 | struct tegra_bo *bo; |
| 290 | int err; |
| 291 | |
| 292 | bo = tegra_bo_alloc_object(drm, size); |
| 293 | if (IS_ERR(bo)) |
| 294 | return bo; |
| 295 | |
Thierry Reding | 73c42c7 | 2014-12-16 16:41:47 +0100 | [diff] [blame] | 296 | err = tegra_bo_alloc(drm, bo); |
Thierry Reding | df06b75 | 2014-06-26 21:41:53 +0200 | [diff] [blame] | 297 | if (err < 0) |
| 298 | goto release; |
Arto Merilainen | de2ba66 | 2013-03-22 16:34:08 +0200 | [diff] [blame] | 299 | |
Thierry Reding | 773af77 | 2013-10-04 22:34:01 +0200 | [diff] [blame] | 300 | if (flags & DRM_TEGRA_GEM_CREATE_TILED) |
Thierry Reding | c134f01 | 2014-06-03 14:48:12 +0200 | [diff] [blame] | 301 | bo->tiling.mode = TEGRA_BO_TILING_MODE_TILED; |
Thierry Reding | 773af77 | 2013-10-04 22:34:01 +0200 | [diff] [blame] | 302 | |
Thierry Reding | db7fbdf | 2013-10-07 09:47:58 +0200 | [diff] [blame] | 303 | if (flags & DRM_TEGRA_GEM_CREATE_BOTTOM_UP) |
| 304 | bo->flags |= TEGRA_BO_BOTTOM_UP; |
| 305 | |
Arto Merilainen | de2ba66 | 2013-03-22 16:34:08 +0200 | [diff] [blame] | 306 | return bo; |
| 307 | |
Thierry Reding | df06b75 | 2014-06-26 21:41:53 +0200 | [diff] [blame] | 308 | release: |
| 309 | drm_gem_object_release(&bo->gem); |
Arto Merilainen | de2ba66 | 2013-03-22 16:34:08 +0200 | [diff] [blame] | 310 | kfree(bo); |
Arto Merilainen | de2ba66 | 2013-03-22 16:34:08 +0200 | [diff] [blame] | 311 | return ERR_PTR(err); |
Arto Merilainen | de2ba66 | 2013-03-22 16:34:08 +0200 | [diff] [blame] | 312 | } |
| 313 | |
| 314 | struct tegra_bo *tegra_bo_create_with_handle(struct drm_file *file, |
Thierry Reding | 3be8274 | 2013-09-24 16:34:05 +0200 | [diff] [blame] | 315 | struct drm_device *drm, |
Thierry Reding | 71c3862 | 2014-11-03 13:23:02 +0100 | [diff] [blame] | 316 | size_t size, |
Thierry Reding | 773af77 | 2013-10-04 22:34:01 +0200 | [diff] [blame] | 317 | unsigned long flags, |
Thierry Reding | 71c3862 | 2014-11-03 13:23:02 +0100 | [diff] [blame] | 318 | u32 *handle) |
Arto Merilainen | de2ba66 | 2013-03-22 16:34:08 +0200 | [diff] [blame] | 319 | { |
| 320 | struct tegra_bo *bo; |
Thierry Reding | a8b48df | 2014-10-16 14:22:50 +0200 | [diff] [blame] | 321 | int err; |
Arto Merilainen | de2ba66 | 2013-03-22 16:34:08 +0200 | [diff] [blame] | 322 | |
Thierry Reding | 773af77 | 2013-10-04 22:34:01 +0200 | [diff] [blame] | 323 | bo = tegra_bo_create(drm, size, flags); |
Arto Merilainen | de2ba66 | 2013-03-22 16:34:08 +0200 | [diff] [blame] | 324 | if (IS_ERR(bo)) |
| 325 | return bo; |
| 326 | |
Thierry Reding | a8b48df | 2014-10-16 14:22:50 +0200 | [diff] [blame] | 327 | err = drm_gem_handle_create(file, &bo->gem, handle); |
| 328 | if (err) { |
| 329 | tegra_bo_free_object(&bo->gem); |
| 330 | return ERR_PTR(err); |
| 331 | } |
Arto Merilainen | de2ba66 | 2013-03-22 16:34:08 +0200 | [diff] [blame] | 332 | |
| 333 | drm_gem_object_unreference_unlocked(&bo->gem); |
| 334 | |
| 335 | return bo; |
Arto Merilainen | de2ba66 | 2013-03-22 16:34:08 +0200 | [diff] [blame] | 336 | } |
| 337 | |
Thierry Reding | 540457c | 2014-05-13 16:46:11 +0200 | [diff] [blame] | 338 | static struct tegra_bo *tegra_bo_import(struct drm_device *drm, |
| 339 | struct dma_buf *buf) |
Thierry Reding | 3800391 | 2013-12-12 10:00:43 +0100 | [diff] [blame] | 340 | { |
Thierry Reding | df06b75 | 2014-06-26 21:41:53 +0200 | [diff] [blame] | 341 | struct tegra_drm *tegra = drm->dev_private; |
Thierry Reding | 3800391 | 2013-12-12 10:00:43 +0100 | [diff] [blame] | 342 | struct dma_buf_attachment *attach; |
| 343 | struct tegra_bo *bo; |
Thierry Reding | 3800391 | 2013-12-12 10:00:43 +0100 | [diff] [blame] | 344 | int err; |
| 345 | |
Thierry Reding | c28d4a3 | 2014-10-16 14:18:50 +0200 | [diff] [blame] | 346 | bo = tegra_bo_alloc_object(drm, buf->size); |
| 347 | if (IS_ERR(bo)) |
| 348 | return bo; |
Thierry Reding | 3800391 | 2013-12-12 10:00:43 +0100 | [diff] [blame] | 349 | |
| 350 | attach = dma_buf_attach(buf, drm->dev); |
| 351 | if (IS_ERR(attach)) { |
| 352 | err = PTR_ERR(attach); |
Thierry Reding | c28d4a3 | 2014-10-16 14:18:50 +0200 | [diff] [blame] | 353 | goto free; |
Thierry Reding | 3800391 | 2013-12-12 10:00:43 +0100 | [diff] [blame] | 354 | } |
| 355 | |
| 356 | get_dma_buf(buf); |
| 357 | |
| 358 | bo->sgt = dma_buf_map_attachment(attach, DMA_TO_DEVICE); |
Thierry Reding | 3800391 | 2013-12-12 10:00:43 +0100 | [diff] [blame] | 359 | if (IS_ERR(bo->sgt)) { |
| 360 | err = PTR_ERR(bo->sgt); |
| 361 | goto detach; |
| 362 | } |
| 363 | |
Thierry Reding | df06b75 | 2014-06-26 21:41:53 +0200 | [diff] [blame] | 364 | if (tegra->domain) { |
| 365 | err = tegra_bo_iommu_map(tegra, bo); |
| 366 | if (err < 0) |
| 367 | goto detach; |
| 368 | } else { |
| 369 | if (bo->sgt->nents > 1) { |
| 370 | err = -EINVAL; |
| 371 | goto detach; |
| 372 | } |
| 373 | |
| 374 | bo->paddr = sg_dma_address(bo->sgt->sgl); |
Thierry Reding | 3800391 | 2013-12-12 10:00:43 +0100 | [diff] [blame] | 375 | } |
| 376 | |
Thierry Reding | 3800391 | 2013-12-12 10:00:43 +0100 | [diff] [blame] | 377 | bo->gem.import_attach = attach; |
| 378 | |
| 379 | return bo; |
| 380 | |
| 381 | detach: |
| 382 | if (!IS_ERR_OR_NULL(bo->sgt)) |
| 383 | dma_buf_unmap_attachment(attach, bo->sgt, DMA_TO_DEVICE); |
| 384 | |
| 385 | dma_buf_detach(buf, attach); |
| 386 | dma_buf_put(buf); |
Thierry Reding | 3800391 | 2013-12-12 10:00:43 +0100 | [diff] [blame] | 387 | free: |
Thierry Reding | c28d4a3 | 2014-10-16 14:18:50 +0200 | [diff] [blame] | 388 | drm_gem_object_release(&bo->gem); |
Thierry Reding | 3800391 | 2013-12-12 10:00:43 +0100 | [diff] [blame] | 389 | kfree(bo); |
Thierry Reding | 3800391 | 2013-12-12 10:00:43 +0100 | [diff] [blame] | 390 | return ERR_PTR(err); |
| 391 | } |
| 392 | |
Arto Merilainen | de2ba66 | 2013-03-22 16:34:08 +0200 | [diff] [blame] | 393 | void tegra_bo_free_object(struct drm_gem_object *gem) |
| 394 | { |
Thierry Reding | df06b75 | 2014-06-26 21:41:53 +0200 | [diff] [blame] | 395 | struct tegra_drm *tegra = gem->dev->dev_private; |
Arto Merilainen | de2ba66 | 2013-03-22 16:34:08 +0200 | [diff] [blame] | 396 | struct tegra_bo *bo = to_tegra_bo(gem); |
| 397 | |
Thierry Reding | df06b75 | 2014-06-26 21:41:53 +0200 | [diff] [blame] | 398 | if (tegra->domain) |
| 399 | tegra_bo_iommu_unmap(tegra, bo); |
| 400 | |
Thierry Reding | 3800391 | 2013-12-12 10:00:43 +0100 | [diff] [blame] | 401 | if (gem->import_attach) { |
| 402 | dma_buf_unmap_attachment(gem->import_attach, bo->sgt, |
| 403 | DMA_TO_DEVICE); |
| 404 | drm_prime_gem_destroy(gem, NULL); |
| 405 | } else { |
Thierry Reding | df06b75 | 2014-06-26 21:41:53 +0200 | [diff] [blame] | 406 | tegra_bo_free(gem->dev, bo); |
Thierry Reding | 3800391 | 2013-12-12 10:00:43 +0100 | [diff] [blame] | 407 | } |
| 408 | |
Arto Merilainen | de2ba66 | 2013-03-22 16:34:08 +0200 | [diff] [blame] | 409 | drm_gem_object_release(gem); |
Arto Merilainen | de2ba66 | 2013-03-22 16:34:08 +0200 | [diff] [blame] | 410 | kfree(bo); |
| 411 | } |
| 412 | |
| 413 | int tegra_bo_dumb_create(struct drm_file *file, struct drm_device *drm, |
| 414 | struct drm_mode_create_dumb *args) |
| 415 | { |
Thierry Reding | dc6057e | 2014-10-30 15:32:56 +0100 | [diff] [blame] | 416 | unsigned int min_pitch = DIV_ROUND_UP(args->width * args->bpp, 8); |
Thierry Reding | d1f3e1e | 2014-07-11 08:29:14 +0200 | [diff] [blame] | 417 | struct tegra_drm *tegra = drm->dev_private; |
Arto Merilainen | de2ba66 | 2013-03-22 16:34:08 +0200 | [diff] [blame] | 418 | struct tegra_bo *bo; |
| 419 | |
Thierry Reding | dc6057e | 2014-10-30 15:32:56 +0100 | [diff] [blame] | 420 | args->pitch = round_up(min_pitch, tegra->pitch_align); |
| 421 | args->size = args->pitch * args->height; |
Arto Merilainen | de2ba66 | 2013-03-22 16:34:08 +0200 | [diff] [blame] | 422 | |
Thierry Reding | 773af77 | 2013-10-04 22:34:01 +0200 | [diff] [blame] | 423 | bo = tegra_bo_create_with_handle(file, drm, args->size, 0, |
Thierry Reding | 3be8274 | 2013-09-24 16:34:05 +0200 | [diff] [blame] | 424 | &args->handle); |
Arto Merilainen | de2ba66 | 2013-03-22 16:34:08 +0200 | [diff] [blame] | 425 | if (IS_ERR(bo)) |
| 426 | return PTR_ERR(bo); |
| 427 | |
| 428 | return 0; |
| 429 | } |
| 430 | |
| 431 | int tegra_bo_dumb_map_offset(struct drm_file *file, struct drm_device *drm, |
Thierry Reding | 71c3862 | 2014-11-03 13:23:02 +0100 | [diff] [blame] | 432 | u32 handle, u64 *offset) |
Arto Merilainen | de2ba66 | 2013-03-22 16:34:08 +0200 | [diff] [blame] | 433 | { |
| 434 | struct drm_gem_object *gem; |
| 435 | struct tegra_bo *bo; |
| 436 | |
Chris Wilson | a8ad0bd | 2016-05-09 11:04:54 +0100 | [diff] [blame] | 437 | gem = drm_gem_object_lookup(file, handle); |
Arto Merilainen | de2ba66 | 2013-03-22 16:34:08 +0200 | [diff] [blame] | 438 | if (!gem) { |
| 439 | dev_err(drm->dev, "failed to lookup GEM object\n"); |
Arto Merilainen | de2ba66 | 2013-03-22 16:34:08 +0200 | [diff] [blame] | 440 | return -EINVAL; |
| 441 | } |
| 442 | |
| 443 | bo = to_tegra_bo(gem); |
| 444 | |
David Herrmann | 2bc7b0c | 2013-08-13 14:19:58 +0200 | [diff] [blame] | 445 | *offset = drm_vma_node_offset_addr(&bo->gem.vma_node); |
Arto Merilainen | de2ba66 | 2013-03-22 16:34:08 +0200 | [diff] [blame] | 446 | |
Daniel Vetter | d849c82 | 2015-11-23 10:32:47 +0100 | [diff] [blame] | 447 | drm_gem_object_unreference_unlocked(gem); |
Arto Merilainen | de2ba66 | 2013-03-22 16:34:08 +0200 | [diff] [blame] | 448 | |
| 449 | return 0; |
| 450 | } |
| 451 | |
Dave Jiang | 11bac80 | 2017-02-24 14:56:41 -0800 | [diff] [blame] | 452 | static int tegra_bo_fault(struct vm_fault *vmf) |
Thierry Reding | df06b75 | 2014-06-26 21:41:53 +0200 | [diff] [blame] | 453 | { |
Dave Jiang | 11bac80 | 2017-02-24 14:56:41 -0800 | [diff] [blame] | 454 | struct vm_area_struct *vma = vmf->vma; |
Thierry Reding | df06b75 | 2014-06-26 21:41:53 +0200 | [diff] [blame] | 455 | struct drm_gem_object *gem = vma->vm_private_data; |
| 456 | struct tegra_bo *bo = to_tegra_bo(gem); |
| 457 | struct page *page; |
| 458 | pgoff_t offset; |
| 459 | int err; |
| 460 | |
| 461 | if (!bo->pages) |
| 462 | return VM_FAULT_SIGBUS; |
| 463 | |
Jan Kara | 1a29d85 | 2016-12-14 15:07:01 -0800 | [diff] [blame] | 464 | offset = (vmf->address - vma->vm_start) >> PAGE_SHIFT; |
Thierry Reding | df06b75 | 2014-06-26 21:41:53 +0200 | [diff] [blame] | 465 | page = bo->pages[offset]; |
| 466 | |
Jan Kara | 1a29d85 | 2016-12-14 15:07:01 -0800 | [diff] [blame] | 467 | err = vm_insert_page(vma, vmf->address, page); |
Thierry Reding | df06b75 | 2014-06-26 21:41:53 +0200 | [diff] [blame] | 468 | switch (err) { |
| 469 | case -EAGAIN: |
| 470 | case 0: |
| 471 | case -ERESTARTSYS: |
| 472 | case -EINTR: |
| 473 | case -EBUSY: |
| 474 | return VM_FAULT_NOPAGE; |
| 475 | |
| 476 | case -ENOMEM: |
| 477 | return VM_FAULT_OOM; |
| 478 | } |
| 479 | |
| 480 | return VM_FAULT_SIGBUS; |
| 481 | } |
| 482 | |
Arto Merilainen | de2ba66 | 2013-03-22 16:34:08 +0200 | [diff] [blame] | 483 | const struct vm_operations_struct tegra_bo_vm_ops = { |
Thierry Reding | df06b75 | 2014-06-26 21:41:53 +0200 | [diff] [blame] | 484 | .fault = tegra_bo_fault, |
Arto Merilainen | de2ba66 | 2013-03-22 16:34:08 +0200 | [diff] [blame] | 485 | .open = drm_gem_vm_open, |
| 486 | .close = drm_gem_vm_close, |
| 487 | }; |
| 488 | |
| 489 | int tegra_drm_mmap(struct file *file, struct vm_area_struct *vma) |
| 490 | { |
| 491 | struct drm_gem_object *gem; |
| 492 | struct tegra_bo *bo; |
| 493 | int ret; |
| 494 | |
| 495 | ret = drm_gem_mmap(file, vma); |
| 496 | if (ret) |
| 497 | return ret; |
| 498 | |
| 499 | gem = vma->vm_private_data; |
| 500 | bo = to_tegra_bo(gem); |
| 501 | |
Thierry Reding | df06b75 | 2014-06-26 21:41:53 +0200 | [diff] [blame] | 502 | if (!bo->pages) { |
| 503 | unsigned long vm_pgoff = vma->vm_pgoff; |
Arto Merilainen | de2ba66 | 2013-03-22 16:34:08 +0200 | [diff] [blame] | 504 | |
Thierry Reding | df06b75 | 2014-06-26 21:41:53 +0200 | [diff] [blame] | 505 | vma->vm_flags &= ~VM_PFNMAP; |
| 506 | vma->vm_pgoff = 0; |
| 507 | |
Luis R. Rodriguez | f6e4566 | 2016-01-22 18:34:22 -0800 | [diff] [blame] | 508 | ret = dma_mmap_wc(gem->dev->dev, vma, bo->vaddr, bo->paddr, |
| 509 | gem->size); |
Thierry Reding | df06b75 | 2014-06-26 21:41:53 +0200 | [diff] [blame] | 510 | if (ret) { |
| 511 | drm_gem_vm_close(vma); |
| 512 | return ret; |
| 513 | } |
| 514 | |
| 515 | vma->vm_pgoff = vm_pgoff; |
| 516 | } else { |
| 517 | pgprot_t prot = vm_get_page_prot(vma->vm_flags); |
| 518 | |
| 519 | vma->vm_flags |= VM_MIXEDMAP; |
| 520 | vma->vm_flags &= ~VM_PFNMAP; |
| 521 | |
| 522 | vma->vm_page_prot = pgprot_writecombine(prot); |
Thierry Reding | 53ea721 | 2014-09-24 16:14:04 +0200 | [diff] [blame] | 523 | } |
| 524 | |
Thierry Reding | 53ea721 | 2014-09-24 16:14:04 +0200 | [diff] [blame] | 525 | return 0; |
Arto Merilainen | de2ba66 | 2013-03-22 16:34:08 +0200 | [diff] [blame] | 526 | } |
Thierry Reding | 3800391 | 2013-12-12 10:00:43 +0100 | [diff] [blame] | 527 | |
| 528 | static struct sg_table * |
| 529 | tegra_gem_prime_map_dma_buf(struct dma_buf_attachment *attach, |
| 530 | enum dma_data_direction dir) |
| 531 | { |
| 532 | struct drm_gem_object *gem = attach->dmabuf->priv; |
| 533 | struct tegra_bo *bo = to_tegra_bo(gem); |
| 534 | struct sg_table *sgt; |
| 535 | |
| 536 | sgt = kmalloc(sizeof(*sgt), GFP_KERNEL); |
| 537 | if (!sgt) |
| 538 | return NULL; |
| 539 | |
Thierry Reding | df06b75 | 2014-06-26 21:41:53 +0200 | [diff] [blame] | 540 | if (bo->pages) { |
| 541 | struct scatterlist *sg; |
| 542 | unsigned int i; |
| 543 | |
| 544 | if (sg_alloc_table(sgt, bo->num_pages, GFP_KERNEL)) |
| 545 | goto free; |
| 546 | |
| 547 | for_each_sg(sgt->sgl, sg, bo->num_pages, i) |
| 548 | sg_set_page(sg, bo->pages[i], PAGE_SIZE, 0); |
| 549 | |
| 550 | if (dma_map_sg(attach->dev, sgt->sgl, sgt->nents, dir) == 0) |
| 551 | goto free; |
| 552 | } else { |
| 553 | if (sg_alloc_table(sgt, 1, GFP_KERNEL)) |
| 554 | goto free; |
| 555 | |
| 556 | sg_dma_address(sgt->sgl) = bo->paddr; |
| 557 | sg_dma_len(sgt->sgl) = gem->size; |
Thierry Reding | 3800391 | 2013-12-12 10:00:43 +0100 | [diff] [blame] | 558 | } |
| 559 | |
Thierry Reding | 3800391 | 2013-12-12 10:00:43 +0100 | [diff] [blame] | 560 | return sgt; |
Thierry Reding | df06b75 | 2014-06-26 21:41:53 +0200 | [diff] [blame] | 561 | |
| 562 | free: |
| 563 | sg_free_table(sgt); |
| 564 | kfree(sgt); |
| 565 | return NULL; |
Thierry Reding | 3800391 | 2013-12-12 10:00:43 +0100 | [diff] [blame] | 566 | } |
| 567 | |
| 568 | static void tegra_gem_prime_unmap_dma_buf(struct dma_buf_attachment *attach, |
| 569 | struct sg_table *sgt, |
| 570 | enum dma_data_direction dir) |
| 571 | { |
Thierry Reding | df06b75 | 2014-06-26 21:41:53 +0200 | [diff] [blame] | 572 | struct drm_gem_object *gem = attach->dmabuf->priv; |
| 573 | struct tegra_bo *bo = to_tegra_bo(gem); |
| 574 | |
| 575 | if (bo->pages) |
| 576 | dma_unmap_sg(attach->dev, sgt->sgl, sgt->nents, dir); |
| 577 | |
Thierry Reding | 3800391 | 2013-12-12 10:00:43 +0100 | [diff] [blame] | 578 | sg_free_table(sgt); |
| 579 | kfree(sgt); |
| 580 | } |
| 581 | |
| 582 | static void tegra_gem_prime_release(struct dma_buf *buf) |
| 583 | { |
| 584 | drm_gem_dmabuf_release(buf); |
| 585 | } |
| 586 | |
| 587 | static void *tegra_gem_prime_kmap_atomic(struct dma_buf *buf, |
| 588 | unsigned long page) |
| 589 | { |
| 590 | return NULL; |
| 591 | } |
| 592 | |
| 593 | static void tegra_gem_prime_kunmap_atomic(struct dma_buf *buf, |
| 594 | unsigned long page, |
| 595 | void *addr) |
| 596 | { |
| 597 | } |
| 598 | |
| 599 | static void *tegra_gem_prime_kmap(struct dma_buf *buf, unsigned long page) |
| 600 | { |
| 601 | return NULL; |
| 602 | } |
| 603 | |
| 604 | static void tegra_gem_prime_kunmap(struct dma_buf *buf, unsigned long page, |
| 605 | void *addr) |
| 606 | { |
| 607 | } |
| 608 | |
| 609 | static int tegra_gem_prime_mmap(struct dma_buf *buf, struct vm_area_struct *vma) |
| 610 | { |
| 611 | return -EINVAL; |
| 612 | } |
| 613 | |
Thierry Reding | d40326f | 2014-01-29 20:32:33 +0100 | [diff] [blame] | 614 | static void *tegra_gem_prime_vmap(struct dma_buf *buf) |
| 615 | { |
| 616 | struct drm_gem_object *gem = buf->priv; |
| 617 | struct tegra_bo *bo = to_tegra_bo(gem); |
| 618 | |
| 619 | return bo->vaddr; |
| 620 | } |
| 621 | |
| 622 | static void tegra_gem_prime_vunmap(struct dma_buf *buf, void *vaddr) |
| 623 | { |
| 624 | } |
| 625 | |
Thierry Reding | 3800391 | 2013-12-12 10:00:43 +0100 | [diff] [blame] | 626 | static const struct dma_buf_ops tegra_gem_prime_dmabuf_ops = { |
| 627 | .map_dma_buf = tegra_gem_prime_map_dma_buf, |
| 628 | .unmap_dma_buf = tegra_gem_prime_unmap_dma_buf, |
| 629 | .release = tegra_gem_prime_release, |
| 630 | .kmap_atomic = tegra_gem_prime_kmap_atomic, |
| 631 | .kunmap_atomic = tegra_gem_prime_kunmap_atomic, |
| 632 | .kmap = tegra_gem_prime_kmap, |
| 633 | .kunmap = tegra_gem_prime_kunmap, |
| 634 | .mmap = tegra_gem_prime_mmap, |
Thierry Reding | d40326f | 2014-01-29 20:32:33 +0100 | [diff] [blame] | 635 | .vmap = tegra_gem_prime_vmap, |
| 636 | .vunmap = tegra_gem_prime_vunmap, |
Thierry Reding | 3800391 | 2013-12-12 10:00:43 +0100 | [diff] [blame] | 637 | }; |
| 638 | |
| 639 | struct dma_buf *tegra_gem_prime_export(struct drm_device *drm, |
| 640 | struct drm_gem_object *gem, |
| 641 | int flags) |
| 642 | { |
Sumit Semwal | d8fbe34 | 2015-01-23 12:53:43 +0530 | [diff] [blame] | 643 | DEFINE_DMA_BUF_EXPORT_INFO(exp_info); |
| 644 | |
| 645 | exp_info.ops = &tegra_gem_prime_dmabuf_ops; |
| 646 | exp_info.size = gem->size; |
| 647 | exp_info.flags = flags; |
| 648 | exp_info.priv = gem; |
| 649 | |
Chris Wilson | a4fce9c | 2016-10-05 13:21:44 +0100 | [diff] [blame] | 650 | return drm_gem_dmabuf_export(drm, &exp_info); |
Thierry Reding | 3800391 | 2013-12-12 10:00:43 +0100 | [diff] [blame] | 651 | } |
| 652 | |
| 653 | struct drm_gem_object *tegra_gem_prime_import(struct drm_device *drm, |
| 654 | struct dma_buf *buf) |
| 655 | { |
| 656 | struct tegra_bo *bo; |
| 657 | |
| 658 | if (buf->ops == &tegra_gem_prime_dmabuf_ops) { |
| 659 | struct drm_gem_object *gem = buf->priv; |
| 660 | |
| 661 | if (gem->dev == drm) { |
| 662 | drm_gem_object_reference(gem); |
| 663 | return gem; |
| 664 | } |
| 665 | } |
| 666 | |
| 667 | bo = tegra_bo_import(drm, buf); |
| 668 | if (IS_ERR(bo)) |
| 669 | return ERR_CAST(bo); |
| 670 | |
| 671 | return &bo->gem; |
| 672 | } |