Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | #ifndef __ASM_ARM_DMA_H |
| 2 | #define __ASM_ARM_DMA_H |
| 3 | |
| 4 | typedef unsigned int dmach_t; |
| 5 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 6 | #include <linux/spinlock.h> |
| 7 | #include <asm/system.h> |
| 8 | #include <asm/scatterlist.h> |
| 9 | #include <asm/arch/dma.h> |
| 10 | |
| 11 | /* |
Russell King | d4c6fc9 | 2006-01-04 15:30:48 +0000 | [diff] [blame] | 12 | * This is the maximum virtual address which can be DMA'd from. |
| 13 | */ |
| 14 | #ifndef MAX_DMA_ADDRESS |
| 15 | #define MAX_DMA_ADDRESS 0xffffffff |
| 16 | #endif |
| 17 | |
| 18 | /* |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 19 | * DMA modes |
| 20 | */ |
| 21 | typedef unsigned int dmamode_t; |
| 22 | |
| 23 | #define DMA_MODE_MASK 3 |
| 24 | |
| 25 | #define DMA_MODE_READ 0 |
| 26 | #define DMA_MODE_WRITE 1 |
| 27 | #define DMA_MODE_CASCADE 2 |
| 28 | #define DMA_AUTOINIT 4 |
| 29 | |
| 30 | extern spinlock_t dma_spin_lock; |
| 31 | |
| 32 | static inline unsigned long claim_dma_lock(void) |
| 33 | { |
| 34 | unsigned long flags; |
| 35 | spin_lock_irqsave(&dma_spin_lock, flags); |
| 36 | return flags; |
| 37 | } |
| 38 | |
| 39 | static inline void release_dma_lock(unsigned long flags) |
| 40 | { |
| 41 | spin_unlock_irqrestore(&dma_spin_lock, flags); |
| 42 | } |
| 43 | |
| 44 | /* Clear the 'DMA Pointer Flip Flop'. |
| 45 | * Write 0 for LSB/MSB, 1 for MSB/LSB access. |
| 46 | */ |
| 47 | #define clear_dma_ff(channel) |
| 48 | |
| 49 | /* Set only the page register bits of the transfer address. |
| 50 | * |
| 51 | * NOTE: This is an architecture specific function, and should |
| 52 | * be hidden from the drivers |
| 53 | */ |
| 54 | extern void set_dma_page(dmach_t channel, char pagenr); |
| 55 | |
| 56 | /* Request a DMA channel |
| 57 | * |
| 58 | * Some architectures may need to do allocate an interrupt |
| 59 | */ |
| 60 | extern int request_dma(dmach_t channel, const char * device_id); |
| 61 | |
| 62 | /* Free a DMA channel |
| 63 | * |
| 64 | * Some architectures may need to do free an interrupt |
| 65 | */ |
| 66 | extern void free_dma(dmach_t channel); |
| 67 | |
| 68 | /* Enable DMA for this channel |
| 69 | * |
| 70 | * On some architectures, this may have other side effects like |
| 71 | * enabling an interrupt and setting the DMA registers. |
| 72 | */ |
| 73 | extern void enable_dma(dmach_t channel); |
| 74 | |
| 75 | /* Disable DMA for this channel |
| 76 | * |
| 77 | * On some architectures, this may have other side effects like |
| 78 | * disabling an interrupt or whatever. |
| 79 | */ |
| 80 | extern void disable_dma(dmach_t channel); |
| 81 | |
| 82 | /* Test whether the specified channel has an active DMA transfer |
| 83 | */ |
| 84 | extern int dma_channel_active(dmach_t channel); |
| 85 | |
| 86 | /* Set the DMA scatter gather list for this channel |
| 87 | * |
| 88 | * This should not be called if a DMA channel is enabled, |
| 89 | * especially since some DMA architectures don't update the |
| 90 | * DMA address immediately, but defer it to the enable_dma(). |
| 91 | */ |
| 92 | extern void set_dma_sg(dmach_t channel, struct scatterlist *sg, int nr_sg); |
| 93 | |
| 94 | /* Set the DMA address for this channel |
| 95 | * |
| 96 | * This should not be called if a DMA channel is enabled, |
| 97 | * especially since some DMA architectures don't update the |
| 98 | * DMA address immediately, but defer it to the enable_dma(). |
| 99 | */ |
Russell King | 333c962 | 2006-01-04 14:41:29 +0000 | [diff] [blame] | 100 | extern void __set_dma_addr(dmach_t channel, void *addr); |
| 101 | #define set_dma_addr(channel, addr) \ |
| 102 | __set_dma_addr(channel, bus_to_virt(addr)) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 103 | |
| 104 | /* Set the DMA byte count for this channel |
| 105 | * |
| 106 | * This should not be called if a DMA channel is enabled, |
| 107 | * especially since some DMA architectures don't update the |
| 108 | * DMA count immediately, but defer it to the enable_dma(). |
| 109 | */ |
| 110 | extern void set_dma_count(dmach_t channel, unsigned long count); |
| 111 | |
| 112 | /* Set the transfer direction for this channel |
| 113 | * |
| 114 | * This should not be called if a DMA channel is enabled, |
| 115 | * especially since some DMA architectures don't update the |
| 116 | * DMA transfer direction immediately, but defer it to the |
| 117 | * enable_dma(). |
| 118 | */ |
| 119 | extern void set_dma_mode(dmach_t channel, dmamode_t mode); |
| 120 | |
| 121 | /* Set the transfer speed for this channel |
| 122 | */ |
| 123 | extern void set_dma_speed(dmach_t channel, int cycle_ns); |
| 124 | |
| 125 | /* Get DMA residue count. After a DMA transfer, this |
| 126 | * should return zero. Reading this while a DMA transfer is |
| 127 | * still in progress will return unpredictable results. |
| 128 | * If called before the channel has been used, it may return 1. |
| 129 | * Otherwise, it returns the number of _bytes_ left to transfer. |
| 130 | */ |
| 131 | extern int get_dma_residue(dmach_t channel); |
| 132 | |
| 133 | #ifndef NO_DMA |
| 134 | #define NO_DMA 255 |
| 135 | #endif |
| 136 | |
| 137 | #ifdef CONFIG_PCI |
| 138 | extern int isa_dma_bridge_buggy; |
| 139 | #else |
| 140 | #define isa_dma_bridge_buggy (0) |
| 141 | #endif |
| 142 | |
| 143 | #endif /* _ARM_DMA_H */ |