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Wei Ni9a10eb22008-09-26 13:45:46 +08001/*
2 * Universal Interface for Intel High Definition Audio Codec
3 *
4 * HD audio interface patch for NVIDIA HDMI codecs
5 *
6 * Copyright (c) 2008 NVIDIA Corp. All rights reserved.
7 * Copyright (c) 2008 Wei Ni <wni@nvidia.com>
8 *
9 *
10 * This driver is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
14 *
15 * This driver is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
23 */
24
25#include <linux/init.h>
26#include <linux/delay.h>
27#include <linux/slab.h>
28#include <sound/core.h>
29#include "hda_codec.h"
30#include "hda_local.h"
31
Takashi Iwaif0613d52009-10-09 17:44:08 +020032/* define below to restrict the supported rates and formats */
Takashi Iwai491dc042009-10-13 16:07:59 +020033/* #define LIMITED_RATE_FMT_SUPPORT */
Takashi Iwaif0613d52009-10-09 17:44:08 +020034
Wei Ni9a10eb22008-09-26 13:45:46 +080035struct nvhdmi_spec {
36 struct hda_multi_out multiout;
37
38 struct hda_pcm pcm_rec;
39};
40
Wei Nia3d6ab92009-06-01 16:37:28 +080041#define Nv_VERB_SET_Channel_Allocation 0xF79
42#define Nv_VERB_SET_Info_Frame_Checksum 0xF7A
43#define Nv_VERB_SET_Audio_Protection_On 0xF98
44#define Nv_VERB_SET_Audio_Protection_Off 0xF99
45
46#define Nv_Master_Convert_nid 0x04
47#define Nv_Master_Pin_nid 0x05
48
49static hda_nid_t nvhdmi_convert_nids[4] = {
50 /*front, rear, clfe, rear_surr */
51 0x6, 0x8, 0xa, 0xc,
52};
53
Wei Ni9a10eb22008-09-26 13:45:46 +080054static struct hda_verb nvhdmi_basic_init[] = {
Wei Nia3d6ab92009-06-01 16:37:28 +080055 /* set audio protect on */
56 { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
Wei Ni9a10eb22008-09-26 13:45:46 +080057 /* enable digital output on pin widget */
Wei Nia3d6ab92009-06-01 16:37:28 +080058 { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
59 { 0x7, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
60 { 0x9, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
61 { 0xb, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
62 { 0xd, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
Wei Ni9a10eb22008-09-26 13:45:46 +080063 {} /* terminator */
64};
65
Takashi Iwaif0613d52009-10-09 17:44:08 +020066#ifdef LIMITED_RATE_FMT_SUPPORT
67/* support only the safe format and rate */
68#define SUPPORTED_RATES SNDRV_PCM_RATE_48000
69#define SUPPORTED_MAXBPS 16
70#define SUPPORTED_FORMATS SNDRV_PCM_FMTBIT_S16_LE
71#else
72/* support all rates and formats */
73#define SUPPORTED_RATES \
74 (SNDRV_PCM_RATE_22050 | SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |\
75 SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 |\
76 SNDRV_PCM_RATE_192000)
77#define SUPPORTED_MAXBPS 24
78#define SUPPORTED_FORMATS \
79 (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE)
80#endif
81
Wei Ni9a10eb22008-09-26 13:45:46 +080082/*
83 * Controls
84 */
85static int nvhdmi_build_controls(struct hda_codec *codec)
86{
87 struct nvhdmi_spec *spec = codec->spec;
88 int err;
89
90 err = snd_hda_create_spdif_out_ctls(codec, spec->multiout.dig_out_nid);
91 if (err < 0)
92 return err;
93
94 return 0;
95}
96
97static int nvhdmi_init(struct hda_codec *codec)
98{
99 snd_hda_sequence_write(codec, nvhdmi_basic_init);
100 return 0;
101}
102
103/*
104 * Digital out
105 */
106static int nvhdmi_dig_playback_pcm_open(struct hda_pcm_stream *hinfo,
Wei Nia3d6ab92009-06-01 16:37:28 +0800107 struct hda_codec *codec,
108 struct snd_pcm_substream *substream)
Wei Ni9a10eb22008-09-26 13:45:46 +0800109{
110 struct nvhdmi_spec *spec = codec->spec;
111 return snd_hda_multi_out_dig_open(codec, &spec->multiout);
112}
113
Wei Nia3d6ab92009-06-01 16:37:28 +0800114static int nvhdmi_dig_playback_pcm_close_8ch(struct hda_pcm_stream *hinfo,
115 struct hda_codec *codec,
116 struct snd_pcm_substream *substream)
117{
118 struct nvhdmi_spec *spec = codec->spec;
119 int i;
120
121 snd_hda_codec_write(codec, Nv_Master_Convert_nid,
122 0, AC_VERB_SET_CHANNEL_STREAMID, 0);
123 for (i = 0; i < 4; i++) {
124 /* set the stream id */
125 snd_hda_codec_write(codec, nvhdmi_convert_nids[i], 0,
126 AC_VERB_SET_CHANNEL_STREAMID, 0);
127 /* set the stream format */
128 snd_hda_codec_write(codec, nvhdmi_convert_nids[i], 0,
129 AC_VERB_SET_STREAM_FORMAT, 0);
130 }
131
132 return snd_hda_multi_out_dig_close(codec, &spec->multiout);
133}
134
135static int nvhdmi_dig_playback_pcm_close_2ch(struct hda_pcm_stream *hinfo,
136 struct hda_codec *codec,
137 struct snd_pcm_substream *substream)
Wei Ni9a10eb22008-09-26 13:45:46 +0800138{
139 struct nvhdmi_spec *spec = codec->spec;
140 return snd_hda_multi_out_dig_close(codec, &spec->multiout);
141}
142
Wei Nia3d6ab92009-06-01 16:37:28 +0800143static int nvhdmi_dig_playback_pcm_prepare_8ch(struct hda_pcm_stream *hinfo,
144 struct hda_codec *codec,
145 unsigned int stream_tag,
146 unsigned int format,
147 struct snd_pcm_substream *substream)
148{
149 int chs;
150 unsigned int dataDCC1, dataDCC2, chan, chanmask, channel_id;
151 int i;
152
153 mutex_lock(&codec->spdif_mutex);
154
155 chs = substream->runtime->channels;
156 chan = chs ? (chs - 1) : 1;
157
158 switch (chs) {
159 default:
160 case 0:
161 case 2:
162 chanmask = 0x00;
163 break;
164 case 4:
165 chanmask = 0x08;
166 break;
167 case 6:
168 chanmask = 0x0b;
169 break;
170 case 8:
171 chanmask = 0x13;
172 break;
173 }
174 dataDCC1 = AC_DIG1_ENABLE | AC_DIG1_COPYRIGHT;
175 dataDCC2 = 0x2;
176
177 /* set the Audio InforFrame Channel Allocation */
178 snd_hda_codec_write(codec, 0x1, 0,
179 Nv_VERB_SET_Channel_Allocation, chanmask);
180
181 /* turn off SPDIF once; otherwise the IEC958 bits won't be updated */
182 if (codec->spdif_status_reset && (codec->spdif_ctls & AC_DIG1_ENABLE))
183 snd_hda_codec_write(codec,
184 Nv_Master_Convert_nid,
185 0,
186 AC_VERB_SET_DIGI_CONVERT_1,
187 codec->spdif_ctls & ~AC_DIG1_ENABLE & 0xff);
188
189 /* set the stream id */
190 snd_hda_codec_write(codec, Nv_Master_Convert_nid, 0,
191 AC_VERB_SET_CHANNEL_STREAMID, (stream_tag << 4) | 0x0);
192
193 /* set the stream format */
194 snd_hda_codec_write(codec, Nv_Master_Convert_nid, 0,
195 AC_VERB_SET_STREAM_FORMAT, format);
196
197 /* turn on again (if needed) */
198 /* enable and set the channel status audio/data flag */
199 if (codec->spdif_status_reset && (codec->spdif_ctls & AC_DIG1_ENABLE)) {
200 snd_hda_codec_write(codec,
201 Nv_Master_Convert_nid,
202 0,
203 AC_VERB_SET_DIGI_CONVERT_1,
204 codec->spdif_ctls & 0xff);
205 snd_hda_codec_write(codec,
206 Nv_Master_Convert_nid,
207 0,
208 AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
209 }
210
211 for (i = 0; i < 4; i++) {
212 if (chs == 2)
213 channel_id = 0;
214 else
215 channel_id = i * 2;
216
217 /* turn off SPDIF once;
218 *otherwise the IEC958 bits won't be updated
219 */
220 if (codec->spdif_status_reset &&
221 (codec->spdif_ctls & AC_DIG1_ENABLE))
222 snd_hda_codec_write(codec,
223 nvhdmi_convert_nids[i],
224 0,
225 AC_VERB_SET_DIGI_CONVERT_1,
226 codec->spdif_ctls & ~AC_DIG1_ENABLE & 0xff);
227 /* set the stream id */
228 snd_hda_codec_write(codec,
229 nvhdmi_convert_nids[i],
230 0,
231 AC_VERB_SET_CHANNEL_STREAMID,
232 (stream_tag << 4) | channel_id);
233 /* set the stream format */
234 snd_hda_codec_write(codec,
235 nvhdmi_convert_nids[i],
236 0,
237 AC_VERB_SET_STREAM_FORMAT,
238 format);
239 /* turn on again (if needed) */
240 /* enable and set the channel status audio/data flag */
241 if (codec->spdif_status_reset &&
242 (codec->spdif_ctls & AC_DIG1_ENABLE)) {
243 snd_hda_codec_write(codec,
244 nvhdmi_convert_nids[i],
245 0,
246 AC_VERB_SET_DIGI_CONVERT_1,
247 codec->spdif_ctls & 0xff);
248 snd_hda_codec_write(codec,
249 nvhdmi_convert_nids[i],
250 0,
251 AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
252 }
253 }
254
255 /* set the Audio Info Frame Checksum */
256 snd_hda_codec_write(codec, 0x1, 0,
257 Nv_VERB_SET_Info_Frame_Checksum,
258 (0x71 - chan - chanmask));
259
260 mutex_unlock(&codec->spdif_mutex);
261 return 0;
262}
263
264static int nvhdmi_dig_playback_pcm_prepare_2ch(struct hda_pcm_stream *hinfo,
265 struct hda_codec *codec,
266 unsigned int stream_tag,
267 unsigned int format,
268 struct snd_pcm_substream *substream)
Wei Ni9a10eb22008-09-26 13:45:46 +0800269{
270 struct nvhdmi_spec *spec = codec->spec;
271 return snd_hda_multi_out_dig_prepare(codec, &spec->multiout, stream_tag,
Wei Nia3d6ab92009-06-01 16:37:28 +0800272 format, substream);
Wei Ni9a10eb22008-09-26 13:45:46 +0800273}
274
Wei Nia3d6ab92009-06-01 16:37:28 +0800275static struct hda_pcm_stream nvhdmi_pcm_digital_playback_8ch = {
Wei Ni9a10eb22008-09-26 13:45:46 +0800276 .substreams = 1,
277 .channels_min = 2,
Wei Nia3d6ab92009-06-01 16:37:28 +0800278 .channels_max = 8,
279 .nid = Nv_Master_Convert_nid,
Takashi Iwaif0613d52009-10-09 17:44:08 +0200280 .rates = SUPPORTED_RATES,
281 .maxbps = SUPPORTED_MAXBPS,
282 .formats = SUPPORTED_FORMATS,
Wei Ni9a10eb22008-09-26 13:45:46 +0800283 .ops = {
284 .open = nvhdmi_dig_playback_pcm_open,
Wei Nia3d6ab92009-06-01 16:37:28 +0800285 .close = nvhdmi_dig_playback_pcm_close_8ch,
286 .prepare = nvhdmi_dig_playback_pcm_prepare_8ch
Wei Ni9a10eb22008-09-26 13:45:46 +0800287 },
288};
289
Wei Nia3d6ab92009-06-01 16:37:28 +0800290static struct hda_pcm_stream nvhdmi_pcm_digital_playback_2ch = {
291 .substreams = 1,
292 .channels_min = 2,
293 .channels_max = 2,
294 .nid = Nv_Master_Convert_nid,
Takashi Iwaif0613d52009-10-09 17:44:08 +0200295 .rates = SUPPORTED_RATES,
296 .maxbps = SUPPORTED_MAXBPS,
297 .formats = SUPPORTED_FORMATS,
Wei Nia3d6ab92009-06-01 16:37:28 +0800298 .ops = {
299 .open = nvhdmi_dig_playback_pcm_open,
300 .close = nvhdmi_dig_playback_pcm_close_2ch,
301 .prepare = nvhdmi_dig_playback_pcm_prepare_2ch
302 },
303};
304
305static int nvhdmi_build_pcms_8ch(struct hda_codec *codec)
Wei Ni9a10eb22008-09-26 13:45:46 +0800306{
307 struct nvhdmi_spec *spec = codec->spec;
308 struct hda_pcm *info = &spec->pcm_rec;
309
310 codec->num_pcms = 1;
311 codec->pcm_info = info;
312
313 info->name = "NVIDIA HDMI";
Takashi Iwaiec4e86b2008-10-16 08:02:41 +0200314 info->pcm_type = HDA_PCM_TYPE_HDMI;
Wei Nia3d6ab92009-06-01 16:37:28 +0800315 info->stream[SNDRV_PCM_STREAM_PLAYBACK]
316 = nvhdmi_pcm_digital_playback_8ch;
317
318 return 0;
319}
320
321static int nvhdmi_build_pcms_2ch(struct hda_codec *codec)
322{
323 struct nvhdmi_spec *spec = codec->spec;
324 struct hda_pcm *info = &spec->pcm_rec;
325
326 codec->num_pcms = 1;
327 codec->pcm_info = info;
328
329 info->name = "NVIDIA HDMI";
330 info->pcm_type = HDA_PCM_TYPE_HDMI;
331 info->stream[SNDRV_PCM_STREAM_PLAYBACK]
332 = nvhdmi_pcm_digital_playback_2ch;
Wei Ni9a10eb22008-09-26 13:45:46 +0800333
334 return 0;
335}
336
337static void nvhdmi_free(struct hda_codec *codec)
338{
339 kfree(codec->spec);
340}
341
Wei Nia3d6ab92009-06-01 16:37:28 +0800342static struct hda_codec_ops nvhdmi_patch_ops_8ch = {
Wei Ni9a10eb22008-09-26 13:45:46 +0800343 .build_controls = nvhdmi_build_controls,
Wei Nia3d6ab92009-06-01 16:37:28 +0800344 .build_pcms = nvhdmi_build_pcms_8ch,
Wei Ni9a10eb22008-09-26 13:45:46 +0800345 .init = nvhdmi_init,
346 .free = nvhdmi_free,
347};
348
Wei Nia3d6ab92009-06-01 16:37:28 +0800349static struct hda_codec_ops nvhdmi_patch_ops_2ch = {
350 .build_controls = nvhdmi_build_controls,
351 .build_pcms = nvhdmi_build_pcms_2ch,
352 .init = nvhdmi_init,
353 .free = nvhdmi_free,
354};
355
356static int patch_nvhdmi_8ch(struct hda_codec *codec)
Wei Ni9a10eb22008-09-26 13:45:46 +0800357{
358 struct nvhdmi_spec *spec;
359
360 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
361 if (spec == NULL)
362 return -ENOMEM;
363
364 codec->spec = spec;
365
Wei Nia3d6ab92009-06-01 16:37:28 +0800366 spec->multiout.num_dacs = 0; /* no analog */
367 spec->multiout.max_channels = 8;
368 spec->multiout.dig_out_nid = Nv_Master_Convert_nid;
Wei Ni9a10eb22008-09-26 13:45:46 +0800369
Wei Nia3d6ab92009-06-01 16:37:28 +0800370 codec->patch_ops = nvhdmi_patch_ops_8ch;
371
372 return 0;
373}
374
375static int patch_nvhdmi_2ch(struct hda_codec *codec)
376{
377 struct nvhdmi_spec *spec;
378
379 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
380 if (spec == NULL)
381 return -ENOMEM;
382
383 codec->spec = spec;
384
385 spec->multiout.num_dacs = 0; /* no analog */
386 spec->multiout.max_channels = 2;
387 spec->multiout.dig_out_nid = Nv_Master_Convert_nid;
388
389 codec->patch_ops = nvhdmi_patch_ops_2ch;
Wei Ni9a10eb22008-09-26 13:45:46 +0800390
391 return 0;
392}
393
394/*
395 * patch entries
396 */
Takashi Iwai1289e9e2008-11-27 15:47:11 +0100397static struct hda_codec_preset snd_hda_preset_nvhdmi[] = {
Wei Nia3d6ab92009-06-01 16:37:28 +0800398 { .id = 0x10de0002, .name = "MCP78 HDMI", .patch = patch_nvhdmi_8ch },
Takashi Iwaif8ff0352009-09-01 08:53:19 +0200399 { .id = 0x10de0003, .name = "MCP78 HDMI", .patch = patch_nvhdmi_8ch },
Takashi Iwaie2e527a2009-11-13 08:28:03 +0100400 { .id = 0x10de0005, .name = "MCP78 HDMI", .patch = patch_nvhdmi_8ch },
Wei Nia3d6ab92009-06-01 16:37:28 +0800401 { .id = 0x10de0006, .name = "MCP78 HDMI", .patch = patch_nvhdmi_8ch },
402 { .id = 0x10de0007, .name = "MCP7A HDMI", .patch = patch_nvhdmi_8ch },
403 { .id = 0x10de0067, .name = "MCP67 HDMI", .patch = patch_nvhdmi_2ch },
404 { .id = 0x10de8001, .name = "MCP73 HDMI", .patch = patch_nvhdmi_2ch },
Wei Ni9a10eb22008-09-26 13:45:46 +0800405 {} /* terminator */
406};
Takashi Iwai1289e9e2008-11-27 15:47:11 +0100407
408MODULE_ALIAS("snd-hda-codec-id:10de0002");
Takashi Iwaif8ff0352009-09-01 08:53:19 +0200409MODULE_ALIAS("snd-hda-codec-id:10de0003");
Takashi Iwaie2e527a2009-11-13 08:28:03 +0100410MODULE_ALIAS("snd-hda-codec-id:10de0005");
Takashi Iwaif84e3e92009-01-13 12:32:21 +0100411MODULE_ALIAS("snd-hda-codec-id:10de0006");
Takashi Iwai1289e9e2008-11-27 15:47:11 +0100412MODULE_ALIAS("snd-hda-codec-id:10de0007");
Takashi Iwai4151d152008-12-04 07:49:15 +0100413MODULE_ALIAS("snd-hda-codec-id:10de0067");
Brian Hinze3d6ce62009-01-07 11:49:56 +0100414MODULE_ALIAS("snd-hda-codec-id:10de8001");
Takashi Iwai1289e9e2008-11-27 15:47:11 +0100415
416MODULE_LICENSE("GPL");
417MODULE_DESCRIPTION("Nvidia HDMI HD-audio codec");
418
419static struct hda_codec_preset_list nvhdmi_list = {
420 .preset = snd_hda_preset_nvhdmi,
421 .owner = THIS_MODULE,
422};
423
424static int __init patch_nvhdmi_init(void)
425{
426 return snd_hda_add_codec_preset(&nvhdmi_list);
427}
428
429static void __exit patch_nvhdmi_exit(void)
430{
431 snd_hda_delete_codec_preset(&nvhdmi_list);
432}
433
434module_init(patch_nvhdmi_init)
435module_exit(patch_nvhdmi_exit)