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Michael Bueschef1a6282008-08-27 18:53:02 +02001#ifndef LINUX_B43_PHY_COMMON_H_
2#define LINUX_B43_PHY_COMMON_H_
3
Johannes Bergf41f3f32009-06-07 12:30:34 -05004#include <linux/types.h>
Michael Bueschef1a6282008-08-27 18:53:02 +02005
6struct b43_wldev;
7
8
9/* PHY register routing bits */
10#define B43_PHYROUTE 0x0C00 /* PHY register routing bits mask */
11#define B43_PHYROUTE_BASE 0x0000 /* Base registers */
12#define B43_PHYROUTE_OFDM_GPHY 0x0400 /* OFDM register routing for G-PHYs */
13#define B43_PHYROUTE_EXT_GPHY 0x0800 /* Extended G-PHY registers */
14#define B43_PHYROUTE_N_BMODE 0x0C00 /* N-PHY BMODE registers */
15
16/* CCK (B-PHY) registers. */
17#define B43_PHY_CCK(reg) ((reg) | B43_PHYROUTE_BASE)
18/* N-PHY registers. */
19#define B43_PHY_N(reg) ((reg) | B43_PHYROUTE_BASE)
20/* N-PHY BMODE registers. */
21#define B43_PHY_N_BMODE(reg) ((reg) | B43_PHYROUTE_N_BMODE)
22/* OFDM (A-PHY) registers. */
23#define B43_PHY_OFDM(reg) ((reg) | B43_PHYROUTE_OFDM_GPHY)
24/* Extended G-PHY registers. */
25#define B43_PHY_EXTG(reg) ((reg) | B43_PHYROUTE_EXT_GPHY)
26
27
28/* Masks for the PHY versioning registers. */
29#define B43_PHYVER_ANALOG 0xF000
30#define B43_PHYVER_ANALOG_SHIFT 12
31#define B43_PHYVER_TYPE 0x0F00
32#define B43_PHYVER_TYPE_SHIFT 8
33#define B43_PHYVER_VERSION 0x00FF
34
35/**
36 * enum b43_interference_mitigation - Interference Mitigation mode
37 *
38 * @B43_INTERFMODE_NONE: Disabled
39 * @B43_INTERFMODE_NONWLAN: Non-WLAN Interference Mitigation
40 * @B43_INTERFMODE_MANUALWLAN: WLAN Interference Mitigation
41 * @B43_INTERFMODE_AUTOWLAN: Automatic WLAN Interference Mitigation
42 */
43enum b43_interference_mitigation {
44 B43_INTERFMODE_NONE,
45 B43_INTERFMODE_NONWLAN,
46 B43_INTERFMODE_MANUALWLAN,
47 B43_INTERFMODE_AUTOWLAN,
48};
49
50/* Antenna identifiers */
51enum {
Gábor Stefanik64e368b2009-08-27 22:49:49 +020052 B43_ANTENNA0 = 0, /* Antenna 0 */
53 B43_ANTENNA1 = 1, /* Antenna 1 */
54 B43_ANTENNA_AUTO0 = 2, /* Automatic, starting with antenna 0 */
55 B43_ANTENNA_AUTO1 = 3, /* Automatic, starting with antenna 1 */
56 B43_ANTENNA2 = 4,
Michael Bueschef1a6282008-08-27 18:53:02 +020057 B43_ANTENNA3 = 8,
58
59 B43_ANTENNA_AUTO = B43_ANTENNA_AUTO0,
60 B43_ANTENNA_DEFAULT = B43_ANTENNA_AUTO,
61};
62
63/**
Michael Buesch18c8ade2008-08-28 19:33:40 +020064 * enum b43_txpwr_result - Return value for the recalc_txpower PHY op.
65 *
66 * @B43_TXPWR_RES_NEED_ADJUST: Values changed. Hardware adjustment is needed.
67 * @B43_TXPWR_RES_DONE: No more work to do. Everything is done.
68 */
69enum b43_txpwr_result {
70 B43_TXPWR_RES_NEED_ADJUST,
71 B43_TXPWR_RES_DONE,
72};
73
74/**
Michael Bueschef1a6282008-08-27 18:53:02 +020075 * struct b43_phy_operations - Function pointers for PHY ops.
76 *
Michael Bueschfb111372008-09-02 13:00:34 +020077 * @allocate: Allocate and initialise the PHY data structures.
78 * Must not be NULL.
79 * @free: Destroy and free the PHY data structures.
80 * Must not be NULL.
81 *
82 * @prepare_structs: Prepare the PHY data structures.
83 * The data structures allocated in @allocate are
84 * initialized here.
85 * Must not be NULL.
86 * @prepare_hardware: Prepare the PHY. This is called before b43_chip_init to
87 * do some early early PHY hardware init.
Michael Bueschef1a6282008-08-27 18:53:02 +020088 * Can be NULL, if not required.
89 * @init: Initialize the PHY.
90 * Must not be NULL.
Michael Bueschfb111372008-09-02 13:00:34 +020091 * @exit: Shutdown the PHY.
Michael Bueschef1a6282008-08-27 18:53:02 +020092 * Can be NULL, if not required.
93 *
94 * @phy_read: Read from a PHY register.
95 * Must not be NULL.
96 * @phy_write: Write to a PHY register.
97 * Must not be NULL.
Gábor Stefanik68ec5322009-08-26 20:51:25 +020098 * @phy_maskset: Maskset a PHY register, taking shortcuts.
99 * If it is NULL, a generic algorithm is used.
Michael Bueschef1a6282008-08-27 18:53:02 +0200100 * @radio_read: Read from a Radio register.
101 * Must not be NULL.
102 * @radio_write: Write to a Radio register.
103 * Must not be NULL.
104 *
105 * @supports_hwpctl: Returns a boolean whether Hardware Power Control
106 * is supported or not.
107 * If NULL, hwpctl is assumed to be never supported.
108 * @software_rfkill: Turn the radio ON or OFF.
109 * Possible state values are
110 * RFKILL_STATE_SOFT_BLOCKED or
111 * RFKILL_STATE_UNBLOCKED
112 * Must not be NULL.
Michael Bueschcb24f572008-09-03 12:12:20 +0200113 * @switch_analog: Turn the Analog on/off.
114 * Must not be NULL.
Michael Bueschef1a6282008-08-27 18:53:02 +0200115 * @switch_channel: Switch the radio to another channel.
116 * Must not be NULL.
117 * @get_default_chan: Just returns the default channel number.
118 * Must not be NULL.
119 * @set_rx_antenna: Set the antenna used for RX.
120 * Can be NULL, if not supported.
121 * @interf_mitigation: Switch the Interference Mitigation mode.
122 * Can be NULL, if not supported.
123 *
Michael Buesch18c8ade2008-08-28 19:33:40 +0200124 * @recalc_txpower: Recalculate the transmission power parameters.
125 * This callback has to recalculate the TX power settings,
126 * but does not need to write them to the hardware, yet.
127 * Returns enum b43_txpwr_result to indicate whether the hardware
128 * needs to be adjusted.
129 * If B43_TXPWR_NEED_ADJUST is returned, @adjust_txpower
130 * will be called later.
131 * If the parameter "ignore_tssi" is true, the TSSI values should
132 * be ignored and a recalculation of the power settings should be
133 * done even if the TSSI values did not change.
Michael Buesch36dbd952009-09-04 22:51:29 +0200134 * This function may sleep, but should not.
Michael Bueschef1a6282008-08-27 18:53:02 +0200135 * Must not be NULL.
Michael Buesch18c8ade2008-08-28 19:33:40 +0200136 * @adjust_txpower: Write the previously calculated TX power settings
137 * (from @recalc_txpower) to the hardware.
138 * This function may sleep.
139 * Can be NULL, if (and ONLY if) @recalc_txpower _always_
140 * returns B43_TXPWR_RES_DONE.
Michael Bueschef1a6282008-08-27 18:53:02 +0200141 *
142 * @pwork_15sec: Periodic work. Called every 15 seconds.
143 * Can be NULL, if not required.
144 * @pwork_60sec: Periodic work. Called every 60 seconds.
145 * Can be NULL, if not required.
146 */
147struct b43_phy_operations {
148 /* Initialisation */
149 int (*allocate)(struct b43_wldev *dev);
Michael Bueschfb111372008-09-02 13:00:34 +0200150 void (*free)(struct b43_wldev *dev);
151 void (*prepare_structs)(struct b43_wldev *dev);
152 int (*prepare_hardware)(struct b43_wldev *dev);
Michael Bueschef1a6282008-08-27 18:53:02 +0200153 int (*init)(struct b43_wldev *dev);
154 void (*exit)(struct b43_wldev *dev);
155
156 /* Register access */
157 u16 (*phy_read)(struct b43_wldev *dev, u16 reg);
158 void (*phy_write)(struct b43_wldev *dev, u16 reg, u16 value);
Gábor Stefanik68ec5322009-08-26 20:51:25 +0200159 void (*phy_maskset)(struct b43_wldev *dev, u16 reg, u16 mask, u16 set);
Michael Bueschef1a6282008-08-27 18:53:02 +0200160 u16 (*radio_read)(struct b43_wldev *dev, u16 reg);
161 void (*radio_write)(struct b43_wldev *dev, u16 reg, u16 value);
162
163 /* Radio */
164 bool (*supports_hwpctl)(struct b43_wldev *dev);
Johannes Berg19d337d2009-06-02 13:01:37 +0200165 void (*software_rfkill)(struct b43_wldev *dev, bool blocked);
Michael Bueschcb24f572008-09-03 12:12:20 +0200166 void (*switch_analog)(struct b43_wldev *dev, bool on);
Michael Bueschef1a6282008-08-27 18:53:02 +0200167 int (*switch_channel)(struct b43_wldev *dev, unsigned int new_channel);
168 unsigned int (*get_default_chan)(struct b43_wldev *dev);
169 void (*set_rx_antenna)(struct b43_wldev *dev, int antenna);
170 int (*interf_mitigation)(struct b43_wldev *dev,
171 enum b43_interference_mitigation new_mode);
172
173 /* Transmission power adjustment */
Michael Buesch18c8ade2008-08-28 19:33:40 +0200174 enum b43_txpwr_result (*recalc_txpower)(struct b43_wldev *dev,
175 bool ignore_tssi);
176 void (*adjust_txpower)(struct b43_wldev *dev);
Michael Bueschef1a6282008-08-27 18:53:02 +0200177
178 /* Misc */
179 void (*pwork_15sec)(struct b43_wldev *dev);
180 void (*pwork_60sec)(struct b43_wldev *dev);
181};
182
183struct b43_phy_a;
184struct b43_phy_g;
185struct b43_phy_n;
Michael Buesche63e4362008-08-30 10:55:48 +0200186struct b43_phy_lp;
Michael Bueschef1a6282008-08-27 18:53:02 +0200187
188struct b43_phy {
189 /* Hardware operation callbacks. */
190 const struct b43_phy_operations *ops;
191
192 /* Most hardware context information is stored in the standard-
193 * specific data structures pointed to by the pointers below.
194 * Only one of them is valid (the currently enabled PHY). */
195#ifdef CONFIG_B43_DEBUG
196 /* No union for debug build to force NULL derefs in buggy code. */
197 struct {
198#else
199 union {
200#endif
201 /* A-PHY specific information */
202 struct b43_phy_a *a;
203 /* G-PHY specific information */
204 struct b43_phy_g *g;
205 /* N-PHY specific information */
206 struct b43_phy_n *n;
Michael Buesche63e4362008-08-30 10:55:48 +0200207 /* LP-PHY specific information */
208 struct b43_phy_lp *lp;
Michael Bueschef1a6282008-08-27 18:53:02 +0200209 };
210
211 /* Band support flags. */
212 bool supports_2ghz;
213 bool supports_5ghz;
214
215 /* GMODE bit enabled? */
216 bool gmode;
217
218 /* Analog Type */
219 u8 analog;
220 /* B43_PHYTYPE_ */
221 u8 type;
222 /* PHY revision number. */
223 u8 rev;
224
225 /* Radio versioning */
226 u16 radio_manuf; /* Radio manufacturer */
227 u16 radio_ver; /* Radio version */
228 u8 radio_rev; /* Radio revision */
229
230 /* Software state of the radio */
231 bool radio_on;
232
233 /* Desired TX power level (in dBm).
234 * This is set by the user and adjusted in b43_phy_xmitpower(). */
Michael Buesch18c8ade2008-08-28 19:33:40 +0200235 int desired_txpower;
Michael Bueschef1a6282008-08-27 18:53:02 +0200236
237 /* Hardware Power Control enabled? */
238 bool hardware_power_control;
239
Michael Buesch18c8ade2008-08-28 19:33:40 +0200240 /* The time (in absolute jiffies) when the next TX power output
241 * check is needed. */
242 unsigned long next_txpwr_check_time;
243
Michael Bueschef1a6282008-08-27 18:53:02 +0200244 /* current channel */
245 unsigned int channel;
246
247 /* PHY TX errors counter. */
248 atomic_t txerr_cnt;
249
250#ifdef CONFIG_B43_DEBUG
Michael Buesch591f3dc2009-03-31 12:27:32 +0200251 /* PHY registers locked (w.r.t. firmware) */
Michael Bueschef1a6282008-08-27 18:53:02 +0200252 bool phy_locked;
Michael Buesch591f3dc2009-03-31 12:27:32 +0200253 /* Radio registers locked (w.r.t. firmware) */
254 bool radio_locked;
Michael Bueschef1a6282008-08-27 18:53:02 +0200255#endif /* B43_DEBUG */
256};
257
258
259/**
Michael Bueschfb111372008-09-02 13:00:34 +0200260 * b43_phy_allocate - Allocate PHY structs
261 * Allocate the PHY data structures, based on the current dev->phy.type
Michael Bueschef1a6282008-08-27 18:53:02 +0200262 */
Michael Bueschfb111372008-09-02 13:00:34 +0200263int b43_phy_allocate(struct b43_wldev *dev);
264
265/**
266 * b43_phy_free - Free PHY structs
267 */
268void b43_phy_free(struct b43_wldev *dev);
Michael Bueschef1a6282008-08-27 18:53:02 +0200269
270/**
271 * b43_phy_init - Initialise the PHY
272 */
273int b43_phy_init(struct b43_wldev *dev);
274
275/**
276 * b43_phy_exit - Cleanup PHY
277 */
278void b43_phy_exit(struct b43_wldev *dev);
279
280/**
281 * b43_has_hardware_pctl - Hardware Power Control supported?
282 * Returns a boolean, whether hardware power control is supported.
283 */
284bool b43_has_hardware_pctl(struct b43_wldev *dev);
285
286/**
287 * b43_phy_read - 16bit PHY register read access
288 */
289u16 b43_phy_read(struct b43_wldev *dev, u16 reg);
290
291/**
292 * b43_phy_write - 16bit PHY register write access
293 */
294void b43_phy_write(struct b43_wldev *dev, u16 reg, u16 value);
295
296/**
Gábor Stefanik738f0f42009-08-03 01:28:12 +0200297 * b43_phy_copy - copy contents of 16bit PHY register to another
298 */
299void b43_phy_copy(struct b43_wldev *dev, u16 destreg, u16 srcreg);
300
301/**
Michael Bueschef1a6282008-08-27 18:53:02 +0200302 * b43_phy_mask - Mask a PHY register with a mask
303 */
304void b43_phy_mask(struct b43_wldev *dev, u16 offset, u16 mask);
305
306/**
307 * b43_phy_set - OR a PHY register with a bitmap
308 */
309void b43_phy_set(struct b43_wldev *dev, u16 offset, u16 set);
310
311/**
312 * b43_phy_maskset - Mask and OR a PHY register with a mask and bitmap
313 */
314void b43_phy_maskset(struct b43_wldev *dev, u16 offset, u16 mask, u16 set);
315
316/**
317 * b43_radio_read - 16bit Radio register read access
318 */
319u16 b43_radio_read(struct b43_wldev *dev, u16 reg);
320#define b43_radio_read16 b43_radio_read /* DEPRECATED */
321
322/**
323 * b43_radio_write - 16bit Radio register write access
324 */
325void b43_radio_write(struct b43_wldev *dev, u16 reg, u16 value);
326#define b43_radio_write16 b43_radio_write /* DEPRECATED */
327
328/**
329 * b43_radio_mask - Mask a 16bit radio register with a mask
330 */
331void b43_radio_mask(struct b43_wldev *dev, u16 offset, u16 mask);
332
333/**
334 * b43_radio_set - OR a 16bit radio register with a bitmap
335 */
336void b43_radio_set(struct b43_wldev *dev, u16 offset, u16 set);
337
338/**
339 * b43_radio_maskset - Mask and OR a radio register with a mask and bitmap
340 */
341void b43_radio_maskset(struct b43_wldev *dev, u16 offset, u16 mask, u16 set);
342
343/**
344 * b43_radio_lock - Lock firmware radio register access
345 */
346void b43_radio_lock(struct b43_wldev *dev);
347
348/**
349 * b43_radio_unlock - Unlock firmware radio register access
350 */
351void b43_radio_unlock(struct b43_wldev *dev);
352
353/**
354 * b43_phy_lock - Lock firmware PHY register access
355 */
356void b43_phy_lock(struct b43_wldev *dev);
357
358/**
359 * b43_phy_unlock - Unlock firmware PHY register access
360 */
361void b43_phy_unlock(struct b43_wldev *dev);
362
363/**
364 * b43_switch_channel - Switch to another channel
365 */
366int b43_switch_channel(struct b43_wldev *dev, unsigned int new_channel);
367/**
368 * B43_DEFAULT_CHANNEL - Switch to the default channel.
369 */
370#define B43_DEFAULT_CHANNEL UINT_MAX
371
372/**
373 * b43_software_rfkill - Turn the radio ON or OFF in software.
374 */
Johannes Berg19d337d2009-06-02 13:01:37 +0200375void b43_software_rfkill(struct b43_wldev *dev, bool blocked);
Michael Bueschef1a6282008-08-27 18:53:02 +0200376
Michael Buesch18c8ade2008-08-28 19:33:40 +0200377/**
378 * b43_phy_txpower_check - Check TX power output.
379 *
380 * Compare the current TX power output to the desired power emission
381 * and schedule an adjustment in case it mismatches.
Michael Buesch18c8ade2008-08-28 19:33:40 +0200382 *
383 * @flags: OR'ed enum b43_phy_txpower_check_flags flags.
384 * See the docs below.
385 */
386void b43_phy_txpower_check(struct b43_wldev *dev, unsigned int flags);
387/**
388 * enum b43_phy_txpower_check_flags - Flags for b43_phy_txpower_check()
389 *
390 * @B43_TXPWR_IGNORE_TIME: Ignore the schedule time and force-redo
391 * the check now.
392 * @B43_TXPWR_IGNORE_TSSI: Redo the recalculation, even if the average
393 * TSSI did not change.
394 */
395enum b43_phy_txpower_check_flags {
396 B43_TXPWR_IGNORE_TIME = (1 << 0),
397 B43_TXPWR_IGNORE_TSSI = (1 << 1),
398};
399
400struct work_struct;
401void b43_phy_txpower_adjust_work(struct work_struct *work);
402
403/**
404 * b43_phy_shm_tssi_read - Read the average of the last 4 TSSI from SHM.
405 *
406 * @shm_offset: The SHM address to read the values from.
407 *
408 * Returns the average of the 4 TSSI values, or a negative error code.
409 */
410int b43_phy_shm_tssi_read(struct b43_wldev *dev, u16 shm_offset);
411
Michael Bueschcb24f572008-09-03 12:12:20 +0200412/**
413 * b43_phy_switch_analog_generic - Generic PHY operation for switching the Analog.
414 *
415 * It does the switching based on the PHY0 core register.
416 * Do _not_ call this directly. Only use it as a switch_analog callback
417 * for struct b43_phy_operations.
418 */
419void b43_phyop_switch_analog_generic(struct b43_wldev *dev, bool on);
420
Michael Buesch18c8ade2008-08-28 19:33:40 +0200421
Michael Bueschef1a6282008-08-27 18:53:02 +0200422#endif /* LINUX_B43_PHY_COMMON_H_ */