blob: f830fe1e4adcd1427c49371bad06356fdf30606a [file] [log] [blame]
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001/*
2 * Copyright (c) 2008 Atheros Communications Inc.
3 *
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
7 *
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15 */
16
17/* mac80211 and PCI callbacks */
18
19#include <linux/nl80211.h>
20#include "core.h"
21
22#define ATH_PCI_VERSION "0.1"
23
Luis R. Rodriguezf078f202008-08-04 00:16:41 -070024static char *dev_info = "ath9k";
25
26MODULE_AUTHOR("Atheros Communications");
27MODULE_DESCRIPTION("Support for Atheros 802.11n wireless LAN cards.");
28MODULE_SUPPORTED_DEVICE("Atheros 802.11n WLAN cards");
29MODULE_LICENSE("Dual BSD/GPL");
30
31static struct pci_device_id ath_pci_id_table[] __devinitdata = {
32 { PCI_VDEVICE(ATHEROS, 0x0023) }, /* PCI */
33 { PCI_VDEVICE(ATHEROS, 0x0024) }, /* PCI-E */
34 { PCI_VDEVICE(ATHEROS, 0x0027) }, /* PCI */
35 { PCI_VDEVICE(ATHEROS, 0x0029) }, /* PCI */
36 { PCI_VDEVICE(ATHEROS, 0x002A) }, /* PCI-E */
37 { 0 }
38};
39
Sujith9757d552008-11-04 18:25:27 +053040static void ath_detach(struct ath_softc *sc);
41
Luis R. Rodriguezf078f202008-08-04 00:16:41 -070042static int ath_get_channel(struct ath_softc *sc,
43 struct ieee80211_channel *chan)
44{
45 int i;
46
47 for (i = 0; i < sc->sc_ah->ah_nchan; i++) {
48 if (sc->sc_ah->ah_channels[i].channel == chan->center_freq)
49 return i;
50 }
51
52 return -1;
53}
54
55static u32 ath_get_extchanmode(struct ath_softc *sc,
56 struct ieee80211_channel *chan)
57{
58 u32 chanmode = 0;
59 u8 ext_chan_offset = sc->sc_ht_info.ext_chan_offset;
60 enum ath9k_ht_macmode tx_chan_width = sc->sc_ht_info.tx_chan_width;
61
62 switch (chan->band) {
63 case IEEE80211_BAND_2GHZ:
Johannes Bergd9fe60d2008-10-09 12:13:49 +020064 if ((ext_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_NONE) &&
Luis R. Rodriguezf078f202008-08-04 00:16:41 -070065 (tx_chan_width == ATH9K_HT_MACMODE_20))
66 chanmode = CHANNEL_G_HT20;
Johannes Bergd9fe60d2008-10-09 12:13:49 +020067 if ((ext_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_ABOVE) &&
Luis R. Rodriguezf078f202008-08-04 00:16:41 -070068 (tx_chan_width == ATH9K_HT_MACMODE_2040))
69 chanmode = CHANNEL_G_HT40PLUS;
Johannes Bergd9fe60d2008-10-09 12:13:49 +020070 if ((ext_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_BELOW) &&
Luis R. Rodriguezf078f202008-08-04 00:16:41 -070071 (tx_chan_width == ATH9K_HT_MACMODE_2040))
72 chanmode = CHANNEL_G_HT40MINUS;
73 break;
74 case IEEE80211_BAND_5GHZ:
Johannes Bergd9fe60d2008-10-09 12:13:49 +020075 if ((ext_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_NONE) &&
Luis R. Rodriguezf078f202008-08-04 00:16:41 -070076 (tx_chan_width == ATH9K_HT_MACMODE_20))
77 chanmode = CHANNEL_A_HT20;
Johannes Bergd9fe60d2008-10-09 12:13:49 +020078 if ((ext_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_ABOVE) &&
Luis R. Rodriguezf078f202008-08-04 00:16:41 -070079 (tx_chan_width == ATH9K_HT_MACMODE_2040))
80 chanmode = CHANNEL_A_HT40PLUS;
Johannes Bergd9fe60d2008-10-09 12:13:49 +020081 if ((ext_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_BELOW) &&
Luis R. Rodriguezf078f202008-08-04 00:16:41 -070082 (tx_chan_width == ATH9K_HT_MACMODE_2040))
83 chanmode = CHANNEL_A_HT40MINUS;
84 break;
85 default:
86 break;
87 }
88
89 return chanmode;
90}
91
92
93static int ath_setkey_tkip(struct ath_softc *sc,
94 struct ieee80211_key_conf *key,
95 struct ath9k_keyval *hk,
96 const u8 *addr)
97{
98 u8 *key_rxmic = NULL;
99 u8 *key_txmic = NULL;
100
101 key_txmic = key->key + NL80211_TKIP_DATA_OFFSET_TX_MIC_KEY;
102 key_rxmic = key->key + NL80211_TKIP_DATA_OFFSET_RX_MIC_KEY;
103
104 if (addr == NULL) {
105 /* Group key installation */
106 memcpy(hk->kv_mic, key_rxmic, sizeof(hk->kv_mic));
107 return ath_keyset(sc, key->keyidx, hk, addr);
108 }
109 if (!sc->sc_splitmic) {
110 /*
111 * data key goes at first index,
112 * the hal handles the MIC keys at index+64.
113 */
114 memcpy(hk->kv_mic, key_rxmic, sizeof(hk->kv_mic));
115 memcpy(hk->kv_txmic, key_txmic, sizeof(hk->kv_txmic));
116 return ath_keyset(sc, key->keyidx, hk, addr);
117 }
118 /*
119 * TX key goes at first index, RX key at +32.
120 * The hal handles the MIC keys at index+64.
121 */
122 memcpy(hk->kv_mic, key_txmic, sizeof(hk->kv_mic));
123 if (!ath_keyset(sc, key->keyidx, hk, NULL)) {
124 /* Txmic entry failed. No need to proceed further */
125 DPRINTF(sc, ATH_DBG_KEYCACHE,
126 "%s Setting TX MIC Key Failed\n", __func__);
127 return 0;
128 }
129
130 memcpy(hk->kv_mic, key_rxmic, sizeof(hk->kv_mic));
131 /* XXX delete tx key on failure? */
132 return ath_keyset(sc, key->keyidx+32, hk, addr);
133}
134
135static int ath_key_config(struct ath_softc *sc,
136 const u8 *addr,
137 struct ieee80211_key_conf *key)
138{
139 struct ieee80211_vif *vif;
140 struct ath9k_keyval hk;
141 const u8 *mac = NULL;
142 int ret = 0;
Johannes Berg05c914f2008-09-11 00:01:58 +0200143 enum nl80211_iftype opmode;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700144
145 memset(&hk, 0, sizeof(hk));
146
147 switch (key->alg) {
148 case ALG_WEP:
149 hk.kv_type = ATH9K_CIPHER_WEP;
150 break;
151 case ALG_TKIP:
152 hk.kv_type = ATH9K_CIPHER_TKIP;
153 break;
154 case ALG_CCMP:
155 hk.kv_type = ATH9K_CIPHER_AES_CCM;
156 break;
157 default:
158 return -EINVAL;
159 }
160
161 hk.kv_len = key->keylen;
162 memcpy(hk.kv_val, key->key, key->keylen);
163
164 if (!sc->sc_vaps[0])
165 return -EIO;
166
Sujith5640b082008-10-29 10:16:06 +0530167 vif = sc->sc_vaps[0];
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700168 opmode = vif->type;
169
170 /*
171 * Strategy:
172 * For _M_STA mc tx, we will not setup a key at all since we never
173 * tx mc.
174 * _M_STA mc rx, we will use the keyID.
175 * for _M_IBSS mc tx, we will use the keyID, and no macaddr.
176 * for _M_IBSS mc rx, we will alloc a slot and plumb the mac of the
177 * peer node. BUT we will plumb a cleartext key so that we can do
178 * perSta default key table lookup in software.
179 */
180 if (is_broadcast_ether_addr(addr)) {
181 switch (opmode) {
Johannes Berg05c914f2008-09-11 00:01:58 +0200182 case NL80211_IFTYPE_STATION:
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700183 /* default key: could be group WPA key
184 * or could be static WEP key */
185 mac = NULL;
186 break;
Johannes Berg05c914f2008-09-11 00:01:58 +0200187 case NL80211_IFTYPE_ADHOC:
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700188 break;
Johannes Berg05c914f2008-09-11 00:01:58 +0200189 case NL80211_IFTYPE_AP:
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700190 break;
191 default:
192 ASSERT(0);
193 break;
194 }
195 } else {
196 mac = addr;
197 }
198
199 if (key->alg == ALG_TKIP)
200 ret = ath_setkey_tkip(sc, key, &hk, mac);
201 else
202 ret = ath_keyset(sc, key->keyidx, &hk, mac);
203
204 if (!ret)
205 return -EIO;
206
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700207 return 0;
208}
209
210static void ath_key_delete(struct ath_softc *sc, struct ieee80211_key_conf *key)
211{
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700212 int freeslot;
213
Sujithff9b6622008-08-14 13:27:16 +0530214 freeslot = (key->keyidx >= 4) ? 1 : 0;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700215 ath_key_reset(sc, key->keyidx, freeslot);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700216}
217
Johannes Bergd9fe60d2008-10-09 12:13:49 +0200218static void setup_ht_cap(struct ieee80211_sta_ht_cap *ht_info)
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700219{
Sujith60653672008-08-14 13:28:02 +0530220#define ATH9K_HT_CAP_MAXRXAMPDU_65536 0x3 /* 2 ^ 16 */
221#define ATH9K_HT_CAP_MPDUDENSITY_8 0x6 /* 8 usec */
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700222
Johannes Bergd9fe60d2008-10-09 12:13:49 +0200223 ht_info->ht_supported = true;
224 ht_info->cap = IEEE80211_HT_CAP_SUP_WIDTH_20_40 |
225 IEEE80211_HT_CAP_SM_PS |
226 IEEE80211_HT_CAP_SGI_40 |
227 IEEE80211_HT_CAP_DSSSCCK40;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700228
Sujith60653672008-08-14 13:28:02 +0530229 ht_info->ampdu_factor = ATH9K_HT_CAP_MAXRXAMPDU_65536;
230 ht_info->ampdu_density = ATH9K_HT_CAP_MPDUDENSITY_8;
Johannes Bergd9fe60d2008-10-09 12:13:49 +0200231 /* set up supported mcs set */
232 memset(&ht_info->mcs, 0, sizeof(ht_info->mcs));
233 ht_info->mcs.rx_mask[0] = 0xff;
234 ht_info->mcs.rx_mask[1] = 0xff;
235 ht_info->mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700236}
237
238static int ath_rate2idx(struct ath_softc *sc, int rate)
239{
240 int i = 0, cur_band, n_rates;
241 struct ieee80211_hw *hw = sc->hw;
242
243 cur_band = hw->conf.channel->band;
244 n_rates = sc->sbands[cur_band].n_bitrates;
245
246 for (i = 0; i < n_rates; i++) {
247 if (sc->sbands[cur_band].bitrates[i].bitrate == rate)
248 break;
249 }
250
251 /*
252 * NB:mac80211 validates rx rate index against the supported legacy rate
253 * index only (should be done against ht rates also), return the highest
254 * legacy rate index for rx rate which does not match any one of the
255 * supported basic and extended rates to make mac80211 happy.
256 * The following hack will be cleaned up once the issue with
257 * the rx rate index validation in mac80211 is fixed.
258 */
259 if (i == n_rates)
260 return n_rates - 1;
261 return i;
262}
263
264static void ath9k_rx_prepare(struct ath_softc *sc,
265 struct sk_buff *skb,
266 struct ath_recv_status *status,
267 struct ieee80211_rx_status *rx_status)
268{
269 struct ieee80211_hw *hw = sc->hw;
270 struct ieee80211_channel *curchan = hw->conf.channel;
271
272 memset(rx_status, 0, sizeof(struct ieee80211_rx_status));
273
274 rx_status->mactime = status->tsf;
275 rx_status->band = curchan->band;
276 rx_status->freq = curchan->center_freq;
Luis R. Rodriguez6f255422008-10-03 15:45:27 -0700277 rx_status->noise = sc->sc_ani.sc_noise_floor;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700278 rx_status->signal = rx_status->noise + status->rssi;
279 rx_status->rate_idx = ath_rate2idx(sc, (status->rateKbps / 100));
280 rx_status->antenna = status->antenna;
Luis R. Rodriguez6f255422008-10-03 15:45:27 -0700281
Luis R. Rodriguezc49d1542008-10-13 14:08:09 -0700282 /* at 45 you will be able to use MCS 15 reliably. A more elaborate
283 * scheme can be used here but it requires tables of SNR/throughput for
284 * each possible mode used. */
285 rx_status->qual = status->rssi * 100 / 45;
286
287 /* rssi can be more than 45 though, anything above that
288 * should be considered at 100% */
289 if (rx_status->qual > 100)
290 rx_status->qual = 100;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700291
292 if (status->flags & ATH_RX_MIC_ERROR)
293 rx_status->flag |= RX_FLAG_MMIC_ERROR;
294 if (status->flags & ATH_RX_FCS_ERROR)
295 rx_status->flag |= RX_FLAG_FAILED_FCS_CRC;
296
297 rx_status->flag |= RX_FLAG_TSFT;
298}
299
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530300static void ath9k_ht_conf(struct ath_softc *sc,
301 struct ieee80211_bss_conf *bss_conf)
302{
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530303 struct ath_ht_info *ht_info = &sc->sc_ht_info;
304
Johannes Bergae5eb022008-10-14 16:58:37 +0200305 if (sc->hw->conf.ht.enabled) {
306 ht_info->ext_chan_offset = bss_conf->ht.secondary_channel_offset;
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530307
Johannes Bergae5eb022008-10-14 16:58:37 +0200308 if (bss_conf->ht.width_40_ok)
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530309 ht_info->tx_chan_width = ATH9K_HT_MACMODE_2040;
310 else
311 ht_info->tx_chan_width = ATH9K_HT_MACMODE_20;
312
313 ath9k_hw_set11nmac2040(sc->sc_ah, ht_info->tx_chan_width);
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530314 }
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530315}
316
317static void ath9k_bss_assoc_info(struct ath_softc *sc,
Sujith5640b082008-10-29 10:16:06 +0530318 struct ieee80211_vif *vif,
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530319 struct ieee80211_bss_conf *bss_conf)
320{
321 struct ieee80211_hw *hw = sc->hw;
322 struct ieee80211_channel *curchan = hw->conf.channel;
Sujith5640b082008-10-29 10:16:06 +0530323 struct ath_vap *avp = (void *)vif->drv_priv;
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530324 int pos;
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530325
326 if (bss_conf->assoc) {
327 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Bss Info ASSOC %d\n",
328 __func__,
329 bss_conf->aid);
330
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530331 /* New association, store aid */
332 if (avp->av_opmode == ATH9K_M_STA) {
333 sc->sc_curaid = bss_conf->aid;
334 ath9k_hw_write_associd(sc->sc_ah, sc->sc_curbssid,
335 sc->sc_curaid);
336 }
337
338 /* Configure the beacon */
339 ath_beacon_config(sc, 0);
340 sc->sc_flags |= SC_OP_BEACONS;
341
342 /* Reset rssi stats */
343 sc->sc_halstats.ns_avgbrssi = ATH_RSSI_DUMMY_MARKER;
344 sc->sc_halstats.ns_avgrssi = ATH_RSSI_DUMMY_MARKER;
345 sc->sc_halstats.ns_avgtxrssi = ATH_RSSI_DUMMY_MARKER;
346 sc->sc_halstats.ns_avgtxrate = ATH_RATE_DUMMY_MARKER;
347
348 /* Update chainmask */
Johannes Bergae5eb022008-10-14 16:58:37 +0200349 ath_update_chainmask(sc, hw->conf.ht.enabled);
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530350
351 DPRINTF(sc, ATH_DBG_CONFIG,
Johannes Berge1749612008-10-27 15:59:26 -0700352 "%s: bssid %pM aid 0x%x\n",
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530353 __func__,
Johannes Berge1749612008-10-27 15:59:26 -0700354 sc->sc_curbssid, sc->sc_curaid);
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530355
356 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Set channel: %d MHz\n",
357 __func__,
358 curchan->center_freq);
359
360 pos = ath_get_channel(sc, curchan);
361 if (pos == -1) {
362 DPRINTF(sc, ATH_DBG_FATAL,
363 "%s: Invalid channel\n", __func__);
364 return;
365 }
366
Johannes Bergae5eb022008-10-14 16:58:37 +0200367 if (hw->conf.ht.enabled)
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530368 sc->sc_ah->ah_channels[pos].chanmode =
369 ath_get_extchanmode(sc, curchan);
370 else
371 sc->sc_ah->ah_channels[pos].chanmode =
372 (curchan->band == IEEE80211_BAND_2GHZ) ?
373 CHANNEL_G : CHANNEL_A;
374
375 /* set h/w channel */
376 if (ath_set_channel(sc, &sc->sc_ah->ah_channels[pos]) < 0)
377 DPRINTF(sc, ATH_DBG_FATAL,
378 "%s: Unable to set channel\n",
379 __func__);
380
381 ath_rate_newstate(sc, avp);
382 /* Update ratectrl about the new state */
383 ath_rc_node_update(hw, avp->rc_node);
Luis R. Rodriguez6f255422008-10-03 15:45:27 -0700384
385 /* Start ANI */
386 mod_timer(&sc->sc_ani.timer,
387 jiffies + msecs_to_jiffies(ATH_ANI_POLLINTERVAL));
388
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530389 } else {
390 DPRINTF(sc, ATH_DBG_CONFIG,
391 "%s: Bss Info DISSOC\n", __func__);
392 sc->sc_curaid = 0;
393 }
394}
395
396void ath_get_beaconconfig(struct ath_softc *sc,
397 int if_id,
398 struct ath_beacon_config *conf)
399{
400 struct ieee80211_hw *hw = sc->hw;
401
402 /* fill in beacon config data */
403
404 conf->beacon_interval = hw->conf.beacon_int;
405 conf->listen_interval = 100;
406 conf->dtim_count = 1;
407 conf->bmiss_timeout = ATH_DEFAULT_BMISS_LIMIT * conf->listen_interval;
408}
409
410void ath_tx_complete(struct ath_softc *sc, struct sk_buff *skb,
Sujith528f0c62008-10-29 10:14:26 +0530411 struct ath_xmit_status *tx_status)
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530412{
413 struct ieee80211_hw *hw = sc->hw;
414 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
415
416 DPRINTF(sc, ATH_DBG_XMIT,
417 "%s: TX complete: skb: %p\n", __func__, skb);
418
Johannes Berge6a98542008-10-21 12:40:02 +0200419 ieee80211_tx_info_clear_status(tx_info);
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530420 if (tx_info->flags & IEEE80211_TX_CTL_NO_ACK ||
421 tx_info->flags & IEEE80211_TX_STAT_TX_FILTERED) {
Johannes Berge6a98542008-10-21 12:40:02 +0200422 /* free driver's private data area of tx_info, XXX: HACK! */
423 if (tx_info->control.vif != NULL)
424 kfree(tx_info->control.vif);
425 tx_info->control.vif = NULL;
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530426 }
427
428 if (tx_status->flags & ATH_TX_BAR) {
429 tx_info->flags |= IEEE80211_TX_STAT_AMPDU_NO_BACK;
430 tx_status->flags &= ~ATH_TX_BAR;
431 }
432
Johannes Berge6a98542008-10-21 12:40:02 +0200433 if (!(tx_status->flags & (ATH_TX_ERROR | ATH_TX_XRETRY))) {
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530434 /* Frame was ACKed */
435 tx_info->flags |= IEEE80211_TX_STAT_ACK;
436 }
437
Johannes Berge6a98542008-10-21 12:40:02 +0200438 tx_info->status.rates[0].count = tx_status->retries + 1;
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530439
440 ieee80211_tx_status(hw, skb);
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530441}
442
443int _ath_rx_indicate(struct ath_softc *sc,
444 struct sk_buff *skb,
445 struct ath_recv_status *status,
446 u16 keyix)
447{
448 struct ieee80211_hw *hw = sc->hw;
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530449 struct ieee80211_rx_status rx_status;
450 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
451 int hdrlen = ieee80211_get_hdrlen_from_skb(skb);
452 int padsize;
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530453
454 /* see if any padding is done by the hw and remove it */
455 if (hdrlen & 3) {
456 padsize = hdrlen % 4;
457 memmove(skb->data + padsize, skb->data, hdrlen);
458 skb_pull(skb, padsize);
459 }
460
461 /* Prepare rx status */
462 ath9k_rx_prepare(sc, skb, status, &rx_status);
463
464 if (!(keyix == ATH9K_RXKEYIX_INVALID) &&
465 !(status->flags & ATH_RX_DECRYPT_ERROR)) {
466 rx_status.flag |= RX_FLAG_DECRYPTED;
467 } else if ((le16_to_cpu(hdr->frame_control) & IEEE80211_FCTL_PROTECTED)
468 && !(status->flags & ATH_RX_DECRYPT_ERROR)
469 && skb->len >= hdrlen + 4) {
470 keyix = skb->data[hdrlen + 3] >> 6;
471
472 if (test_bit(keyix, sc->sc_keymap))
473 rx_status.flag |= RX_FLAG_DECRYPTED;
474 }
475
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530476 __ieee80211_rx(hw, skb, &rx_status);
477
478 return 0;
479}
480
481/********************************/
482/* LED functions */
483/********************************/
484
485static void ath_led_brightness(struct led_classdev *led_cdev,
486 enum led_brightness brightness)
487{
488 struct ath_led *led = container_of(led_cdev, struct ath_led, led_cdev);
489 struct ath_softc *sc = led->sc;
490
491 switch (brightness) {
492 case LED_OFF:
493 if (led->led_type == ATH_LED_ASSOC ||
494 led->led_type == ATH_LED_RADIO)
495 sc->sc_flags &= ~SC_OP_LED_ASSOCIATED;
496 ath9k_hw_set_gpio(sc->sc_ah, ATH_LED_PIN,
497 (led->led_type == ATH_LED_RADIO) ? 1 :
498 !!(sc->sc_flags & SC_OP_LED_ASSOCIATED));
499 break;
500 case LED_FULL:
501 if (led->led_type == ATH_LED_ASSOC)
502 sc->sc_flags |= SC_OP_LED_ASSOCIATED;
503 ath9k_hw_set_gpio(sc->sc_ah, ATH_LED_PIN, 0);
504 break;
505 default:
506 break;
507 }
508}
509
510static int ath_register_led(struct ath_softc *sc, struct ath_led *led,
511 char *trigger)
512{
513 int ret;
514
515 led->sc = sc;
516 led->led_cdev.name = led->name;
517 led->led_cdev.default_trigger = trigger;
518 led->led_cdev.brightness_set = ath_led_brightness;
519
520 ret = led_classdev_register(wiphy_dev(sc->hw->wiphy), &led->led_cdev);
521 if (ret)
522 DPRINTF(sc, ATH_DBG_FATAL,
523 "Failed to register led:%s", led->name);
524 else
525 led->registered = 1;
526 return ret;
527}
528
529static void ath_unregister_led(struct ath_led *led)
530{
531 if (led->registered) {
532 led_classdev_unregister(&led->led_cdev);
533 led->registered = 0;
534 }
535}
536
537static void ath_deinit_leds(struct ath_softc *sc)
538{
539 ath_unregister_led(&sc->assoc_led);
540 sc->sc_flags &= ~SC_OP_LED_ASSOCIATED;
541 ath_unregister_led(&sc->tx_led);
542 ath_unregister_led(&sc->rx_led);
543 ath_unregister_led(&sc->radio_led);
544 ath9k_hw_set_gpio(sc->sc_ah, ATH_LED_PIN, 1);
545}
546
547static void ath_init_leds(struct ath_softc *sc)
548{
549 char *trigger;
550 int ret;
551
552 /* Configure gpio 1 for output */
553 ath9k_hw_cfg_output(sc->sc_ah, ATH_LED_PIN,
554 AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
555 /* LED off, active low */
556 ath9k_hw_set_gpio(sc->sc_ah, ATH_LED_PIN, 1);
557
558 trigger = ieee80211_get_radio_led_name(sc->hw);
559 snprintf(sc->radio_led.name, sizeof(sc->radio_led.name),
560 "ath9k-%s:radio", wiphy_name(sc->hw->wiphy));
561 ret = ath_register_led(sc, &sc->radio_led, trigger);
562 sc->radio_led.led_type = ATH_LED_RADIO;
563 if (ret)
564 goto fail;
565
566 trigger = ieee80211_get_assoc_led_name(sc->hw);
567 snprintf(sc->assoc_led.name, sizeof(sc->assoc_led.name),
568 "ath9k-%s:assoc", wiphy_name(sc->hw->wiphy));
569 ret = ath_register_led(sc, &sc->assoc_led, trigger);
570 sc->assoc_led.led_type = ATH_LED_ASSOC;
571 if (ret)
572 goto fail;
573
574 trigger = ieee80211_get_tx_led_name(sc->hw);
575 snprintf(sc->tx_led.name, sizeof(sc->tx_led.name),
576 "ath9k-%s:tx", wiphy_name(sc->hw->wiphy));
577 ret = ath_register_led(sc, &sc->tx_led, trigger);
578 sc->tx_led.led_type = ATH_LED_TX;
579 if (ret)
580 goto fail;
581
582 trigger = ieee80211_get_rx_led_name(sc->hw);
583 snprintf(sc->rx_led.name, sizeof(sc->rx_led.name),
584 "ath9k-%s:rx", wiphy_name(sc->hw->wiphy));
585 ret = ath_register_led(sc, &sc->rx_led, trigger);
586 sc->rx_led.led_type = ATH_LED_RX;
587 if (ret)
588 goto fail;
589
590 return;
591
592fail:
593 ath_deinit_leds(sc);
594}
595
Vasanthakumar Thiagarajan500c0642008-09-10 18:50:17 +0530596#ifdef CONFIG_RFKILL
Sujith9c84b792008-10-29 10:17:13 +0530597
Vasanthakumar Thiagarajan500c0642008-09-10 18:50:17 +0530598/*******************/
599/* Rfkill */
600/*******************/
601
602static void ath_radio_enable(struct ath_softc *sc)
603{
604 struct ath_hal *ah = sc->sc_ah;
605 int status;
606
607 spin_lock_bh(&sc->sc_resetlock);
608 if (!ath9k_hw_reset(ah, ah->ah_curchan,
609 sc->sc_ht_info.tx_chan_width,
610 sc->sc_tx_chainmask,
611 sc->sc_rx_chainmask,
612 sc->sc_ht_extprotspacing,
613 false, &status)) {
614 DPRINTF(sc, ATH_DBG_FATAL,
615 "%s: unable to reset channel %u (%uMhz) "
616 "flags 0x%x hal status %u\n", __func__,
617 ath9k_hw_mhz2ieee(ah,
618 ah->ah_curchan->channel,
619 ah->ah_curchan->channelFlags),
620 ah->ah_curchan->channel,
621 ah->ah_curchan->channelFlags, status);
622 }
623 spin_unlock_bh(&sc->sc_resetlock);
624
625 ath_update_txpow(sc);
626 if (ath_startrecv(sc) != 0) {
627 DPRINTF(sc, ATH_DBG_FATAL,
628 "%s: unable to restart recv logic\n", __func__);
629 return;
630 }
631
632 if (sc->sc_flags & SC_OP_BEACONS)
633 ath_beacon_config(sc, ATH_IF_ID_ANY); /* restart beacons */
634
635 /* Re-Enable interrupts */
636 ath9k_hw_set_interrupts(ah, sc->sc_imask);
637
638 /* Enable LED */
639 ath9k_hw_cfg_output(ah, ATH_LED_PIN,
640 AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
641 ath9k_hw_set_gpio(ah, ATH_LED_PIN, 0);
642
643 ieee80211_wake_queues(sc->hw);
644}
645
646static void ath_radio_disable(struct ath_softc *sc)
647{
648 struct ath_hal *ah = sc->sc_ah;
649 int status;
650
651
652 ieee80211_stop_queues(sc->hw);
653
654 /* Disable LED */
655 ath9k_hw_set_gpio(ah, ATH_LED_PIN, 1);
656 ath9k_hw_cfg_gpio_input(ah, ATH_LED_PIN);
657
658 /* Disable interrupts */
659 ath9k_hw_set_interrupts(ah, 0);
660
661 ath_draintxq(sc, false); /* clear pending tx frames */
662 ath_stoprecv(sc); /* turn off frame recv */
663 ath_flushrecv(sc); /* flush recv queue */
664
665 spin_lock_bh(&sc->sc_resetlock);
666 if (!ath9k_hw_reset(ah, ah->ah_curchan,
667 sc->sc_ht_info.tx_chan_width,
668 sc->sc_tx_chainmask,
669 sc->sc_rx_chainmask,
670 sc->sc_ht_extprotspacing,
671 false, &status)) {
672 DPRINTF(sc, ATH_DBG_FATAL,
673 "%s: unable to reset channel %u (%uMhz) "
674 "flags 0x%x hal status %u\n", __func__,
675 ath9k_hw_mhz2ieee(ah,
676 ah->ah_curchan->channel,
677 ah->ah_curchan->channelFlags),
678 ah->ah_curchan->channel,
679 ah->ah_curchan->channelFlags, status);
680 }
681 spin_unlock_bh(&sc->sc_resetlock);
682
683 ath9k_hw_phy_disable(ah);
684 ath9k_hw_setpower(ah, ATH9K_PM_FULL_SLEEP);
685}
686
687static bool ath_is_rfkill_set(struct ath_softc *sc)
688{
689 struct ath_hal *ah = sc->sc_ah;
690
691 return ath9k_hw_gpio_get(ah, ah->ah_rfkill_gpio) ==
692 ah->ah_rfkill_polarity;
693}
694
695/* h/w rfkill poll function */
696static void ath_rfkill_poll(struct work_struct *work)
697{
698 struct ath_softc *sc = container_of(work, struct ath_softc,
699 rf_kill.rfkill_poll.work);
700 bool radio_on;
701
702 if (sc->sc_flags & SC_OP_INVALID)
703 return;
704
705 radio_on = !ath_is_rfkill_set(sc);
706
707 /*
708 * enable/disable radio only when there is a
709 * state change in RF switch
710 */
711 if (radio_on == !!(sc->sc_flags & SC_OP_RFKILL_HW_BLOCKED)) {
712 enum rfkill_state state;
713
714 if (sc->sc_flags & SC_OP_RFKILL_SW_BLOCKED) {
715 state = radio_on ? RFKILL_STATE_SOFT_BLOCKED
716 : RFKILL_STATE_HARD_BLOCKED;
717 } else if (radio_on) {
718 ath_radio_enable(sc);
719 state = RFKILL_STATE_UNBLOCKED;
720 } else {
721 ath_radio_disable(sc);
722 state = RFKILL_STATE_HARD_BLOCKED;
723 }
724
725 if (state == RFKILL_STATE_HARD_BLOCKED)
726 sc->sc_flags |= SC_OP_RFKILL_HW_BLOCKED;
727 else
728 sc->sc_flags &= ~SC_OP_RFKILL_HW_BLOCKED;
729
730 rfkill_force_state(sc->rf_kill.rfkill, state);
731 }
732
733 queue_delayed_work(sc->hw->workqueue, &sc->rf_kill.rfkill_poll,
734 msecs_to_jiffies(ATH_RFKILL_POLL_INTERVAL));
735}
736
737/* s/w rfkill handler */
738static int ath_sw_toggle_radio(void *data, enum rfkill_state state)
739{
740 struct ath_softc *sc = data;
741
742 switch (state) {
743 case RFKILL_STATE_SOFT_BLOCKED:
744 if (!(sc->sc_flags & (SC_OP_RFKILL_HW_BLOCKED |
745 SC_OP_RFKILL_SW_BLOCKED)))
746 ath_radio_disable(sc);
747 sc->sc_flags |= SC_OP_RFKILL_SW_BLOCKED;
748 return 0;
749 case RFKILL_STATE_UNBLOCKED:
750 if ((sc->sc_flags & SC_OP_RFKILL_SW_BLOCKED)) {
751 sc->sc_flags &= ~SC_OP_RFKILL_SW_BLOCKED;
752 if (sc->sc_flags & SC_OP_RFKILL_HW_BLOCKED) {
753 DPRINTF(sc, ATH_DBG_FATAL, "Can't turn on the"
754 "radio as it is disabled by h/w \n");
755 return -EPERM;
756 }
757 ath_radio_enable(sc);
758 }
759 return 0;
760 default:
761 return -EINVAL;
762 }
763}
764
765/* Init s/w rfkill */
766static int ath_init_sw_rfkill(struct ath_softc *sc)
767{
768 sc->rf_kill.rfkill = rfkill_allocate(wiphy_dev(sc->hw->wiphy),
769 RFKILL_TYPE_WLAN);
770 if (!sc->rf_kill.rfkill) {
771 DPRINTF(sc, ATH_DBG_FATAL, "Failed to allocate rfkill\n");
772 return -ENOMEM;
773 }
774
775 snprintf(sc->rf_kill.rfkill_name, sizeof(sc->rf_kill.rfkill_name),
776 "ath9k-%s:rfkill", wiphy_name(sc->hw->wiphy));
777 sc->rf_kill.rfkill->name = sc->rf_kill.rfkill_name;
778 sc->rf_kill.rfkill->data = sc;
779 sc->rf_kill.rfkill->toggle_radio = ath_sw_toggle_radio;
780 sc->rf_kill.rfkill->state = RFKILL_STATE_UNBLOCKED;
781 sc->rf_kill.rfkill->user_claim_unsupported = 1;
782
783 return 0;
784}
785
786/* Deinitialize rfkill */
787static void ath_deinit_rfkill(struct ath_softc *sc)
788{
789 if (sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_RFSILENT)
790 cancel_delayed_work_sync(&sc->rf_kill.rfkill_poll);
791
792 if (sc->sc_flags & SC_OP_RFKILL_REGISTERED) {
793 rfkill_unregister(sc->rf_kill.rfkill);
794 sc->sc_flags &= ~SC_OP_RFKILL_REGISTERED;
795 sc->rf_kill.rfkill = NULL;
796 }
797}
Sujith9c84b792008-10-29 10:17:13 +0530798
799static int ath_start_rfkill_poll(struct ath_softc *sc)
800{
801 if (sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_RFSILENT)
802 queue_delayed_work(sc->hw->workqueue,
803 &sc->rf_kill.rfkill_poll, 0);
804
805 if (!(sc->sc_flags & SC_OP_RFKILL_REGISTERED)) {
806 if (rfkill_register(sc->rf_kill.rfkill)) {
807 DPRINTF(sc, ATH_DBG_FATAL,
808 "Unable to register rfkill\n");
809 rfkill_free(sc->rf_kill.rfkill);
810
811 /* Deinitialize the device */
812 if (sc->pdev->irq)
813 free_irq(sc->pdev->irq, sc);
814 ath_detach(sc);
815 pci_iounmap(sc->pdev, sc->mem);
816 pci_release_region(sc->pdev, 0);
817 pci_disable_device(sc->pdev);
Sujith9757d552008-11-04 18:25:27 +0530818 ieee80211_free_hw(sc->hw);
Sujith9c84b792008-10-29 10:17:13 +0530819 return -EIO;
820 } else {
821 sc->sc_flags |= SC_OP_RFKILL_REGISTERED;
822 }
823 }
824
825 return 0;
826}
Vasanthakumar Thiagarajan500c0642008-09-10 18:50:17 +0530827#endif /* CONFIG_RFKILL */
828
Sujith9c84b792008-10-29 10:17:13 +0530829static void ath_detach(struct ath_softc *sc)
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530830{
831 struct ieee80211_hw *hw = sc->hw;
Sujith9c84b792008-10-29 10:17:13 +0530832 int i = 0;
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530833
834 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Detach ATH hw\n", __func__);
835
Sujith9c84b792008-10-29 10:17:13 +0530836 ieee80211_unregister_hw(hw);
837
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530838 ath_deinit_leds(sc);
839
Vasanthakumar Thiagarajan500c0642008-09-10 18:50:17 +0530840#ifdef CONFIG_RFKILL
Vasanthakumar Thiagarajan500c0642008-09-10 18:50:17 +0530841 ath_deinit_rfkill(sc);
842#endif
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530843 ath_rate_control_unregister();
Sujith9c84b792008-10-29 10:17:13 +0530844 ath_rate_detach(sc->sc_rc);
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530845
846 ath_rx_cleanup(sc);
847 ath_tx_cleanup(sc);
848
Sujith9c84b792008-10-29 10:17:13 +0530849 tasklet_kill(&sc->intr_tq);
850 tasklet_kill(&sc->bcon_tasklet);
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530851
Sujith9c84b792008-10-29 10:17:13 +0530852 if (!(sc->sc_flags & SC_OP_INVALID))
853 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530854
Sujith9c84b792008-10-29 10:17:13 +0530855 /* cleanup tx queues */
856 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++)
857 if (ATH_TXQ_SETUP(sc, i))
858 ath_tx_cleanupq(sc, &sc->sc_txq[i]);
859
860 ath9k_hw_detach(sc->sc_ah);
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530861}
862
Sujith9c84b792008-10-29 10:17:13 +0530863static int ath_attach(u16 devid, struct ath_softc *sc)
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530864{
865 struct ieee80211_hw *hw = sc->hw;
866 int error = 0;
867
868 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Attach ATH hw\n", __func__);
869
870 error = ath_init(devid, sc);
871 if (error != 0)
872 return error;
873
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530874 /* get mac address from hardware and set in mac80211 */
875
876 SET_IEEE80211_PERM_ADDR(hw, sc->sc_myaddr);
877
Sujith9c84b792008-10-29 10:17:13 +0530878 hw->flags = IEEE80211_HW_RX_INCLUDES_FCS |
879 IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING |
880 IEEE80211_HW_SIGNAL_DBM |
881 IEEE80211_HW_AMPDU_AGGREGATION;
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530882
Sujith9c84b792008-10-29 10:17:13 +0530883 hw->wiphy->interface_modes =
884 BIT(NL80211_IFTYPE_AP) |
885 BIT(NL80211_IFTYPE_STATION) |
886 BIT(NL80211_IFTYPE_ADHOC);
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530887
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530888 hw->queues = 4;
Sujith528f0c62008-10-29 10:14:26 +0530889 hw->sta_data_size = sizeof(struct ath_node);
Sujith5640b082008-10-29 10:16:06 +0530890 hw->vif_data_size = sizeof(struct ath_vap);
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530891
892 /* Register rate control */
893 hw->rate_control_algorithm = "ath9k_rate_control";
894 error = ath_rate_control_register();
895 if (error != 0) {
896 DPRINTF(sc, ATH_DBG_FATAL,
897 "%s: Unable to register rate control "
898 "algorithm:%d\n", __func__, error);
899 ath_rate_control_unregister();
900 goto bad;
901 }
902
Sujith9c84b792008-10-29 10:17:13 +0530903 if (sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_HT) {
904 setup_ht_cap(&sc->sbands[IEEE80211_BAND_2GHZ].ht_cap);
905 if (test_bit(ATH9K_MODE_11A, sc->sc_ah->ah_caps.wireless_modes))
906 setup_ht_cap(&sc->sbands[IEEE80211_BAND_5GHZ].ht_cap);
907 }
908
909 hw->wiphy->bands[IEEE80211_BAND_2GHZ] = &sc->sbands[IEEE80211_BAND_2GHZ];
910 if (test_bit(ATH9K_MODE_11A, sc->sc_ah->ah_caps.wireless_modes))
911 hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
912 &sc->sbands[IEEE80211_BAND_5GHZ];
913
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530914 error = ieee80211_register_hw(hw);
915 if (error != 0) {
916 ath_rate_control_unregister();
917 goto bad;
918 }
919
920 /* Initialize LED control */
921 ath_init_leds(sc);
922
Vasanthakumar Thiagarajan500c0642008-09-10 18:50:17 +0530923#ifdef CONFIG_RFKILL
924 /* Initialze h/w Rfkill */
925 if (sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_RFSILENT)
926 INIT_DELAYED_WORK(&sc->rf_kill.rfkill_poll, ath_rfkill_poll);
927
928 /* Initialize s/w rfkill */
929 if (ath_init_sw_rfkill(sc))
930 goto detach;
931#endif
932
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530933 /* initialize tx/rx engine */
934
935 error = ath_tx_init(sc, ATH_TXBUF);
936 if (error != 0)
937 goto detach;
938
939 error = ath_rx_init(sc, ATH_RXBUF);
940 if (error != 0)
941 goto detach;
942
943 return 0;
944detach:
945 ath_detach(sc);
946bad:
947 return error;
948}
949
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700950static int ath9k_start(struct ieee80211_hw *hw)
951{
952 struct ath_softc *sc = hw->priv;
953 struct ieee80211_channel *curchan = hw->conf.channel;
954 int error = 0, pos;
955
956 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Starting driver with "
957 "initial channel: %d MHz\n", __func__, curchan->center_freq);
958
Sujith7f959032008-10-29 10:18:39 +0530959 memset(&sc->sc_ht_info, 0, sizeof(struct ath_ht_info));
960
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700961 /* setup initial channel */
962
963 pos = ath_get_channel(sc, curchan);
964 if (pos == -1) {
965 DPRINTF(sc, ATH_DBG_FATAL, "%s: Invalid channel\n", __func__);
Sujith9c84b792008-10-29 10:17:13 +0530966 error = -EINVAL;
967 goto exit;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700968 }
969
970 sc->sc_ah->ah_channels[pos].chanmode =
971 (curchan->band == IEEE80211_BAND_2GHZ) ? CHANNEL_G : CHANNEL_A;
972
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700973 error = ath_open(sc, &sc->sc_ah->ah_channels[pos]);
974 if (error) {
975 DPRINTF(sc, ATH_DBG_FATAL,
976 "%s: Unable to complete ath_open\n", __func__);
Sujith9c84b792008-10-29 10:17:13 +0530977 goto exit;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700978 }
979
Vasanthakumar Thiagarajan500c0642008-09-10 18:50:17 +0530980#ifdef CONFIG_RFKILL
Sujith9c84b792008-10-29 10:17:13 +0530981 error = ath_start_rfkill_poll(sc);
Vasanthakumar Thiagarajan500c0642008-09-10 18:50:17 +0530982#endif
983
Sujith9c84b792008-10-29 10:17:13 +0530984exit:
985 return error;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700986}
987
988static int ath9k_tx(struct ieee80211_hw *hw,
989 struct sk_buff *skb)
990{
Jouni Malinen147583c2008-08-11 14:01:50 +0300991 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
Sujith528f0c62008-10-29 10:14:26 +0530992 struct ath_softc *sc = hw->priv;
993 struct ath_tx_control txctl;
994 int hdrlen, padsize;
995
996 memset(&txctl, 0, sizeof(struct ath_tx_control));
Jouni Malinen147583c2008-08-11 14:01:50 +0300997
998 /*
999 * As a temporary workaround, assign seq# here; this will likely need
1000 * to be cleaned up to work better with Beacon transmission and virtual
1001 * BSSes.
1002 */
1003 if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
1004 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
1005 if (info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT)
1006 sc->seq_no += 0x10;
1007 hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
1008 hdr->seq_ctrl |= cpu_to_le16(sc->seq_no);
1009 }
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001010
1011 /* Add the padding after the header if this is not already done */
1012 hdrlen = ieee80211_get_hdrlen_from_skb(skb);
1013 if (hdrlen & 3) {
1014 padsize = hdrlen % 4;
1015 if (skb_headroom(skb) < padsize)
1016 return -1;
1017 skb_push(skb, padsize);
1018 memmove(skb->data, skb->data + padsize, hdrlen);
1019 }
1020
Sujith528f0c62008-10-29 10:14:26 +05301021 /* Check if a tx queue is available */
1022
1023 txctl.txq = ath_test_get_txq(sc, skb);
1024 if (!txctl.txq)
1025 goto exit;
1026
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001027 DPRINTF(sc, ATH_DBG_XMIT, "%s: transmitting packet, skb: %p\n",
1028 __func__,
1029 skb);
1030
Sujith528f0c62008-10-29 10:14:26 +05301031 if (ath_tx_start(sc, skb, &txctl) != 0) {
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001032 DPRINTF(sc, ATH_DBG_XMIT, "%s: TX failed\n", __func__);
Sujith528f0c62008-10-29 10:14:26 +05301033 goto exit;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001034 }
1035
1036 return 0;
Sujith528f0c62008-10-29 10:14:26 +05301037exit:
1038 dev_kfree_skb_any(skb);
1039 return 0;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001040}
1041
1042static void ath9k_stop(struct ieee80211_hw *hw)
1043{
1044 struct ath_softc *sc = hw->priv;
Sujith9c84b792008-10-29 10:17:13 +05301045
1046 if (sc->sc_flags & SC_OP_INVALID) {
1047 DPRINTF(sc, ATH_DBG_ANY, "%s: Device not present\n", __func__);
1048 return;
1049 }
1050
1051 ath_stop(sc);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001052
1053 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Driver halt\n", __func__);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001054}
1055
1056static int ath9k_add_interface(struct ieee80211_hw *hw,
1057 struct ieee80211_if_init_conf *conf)
1058{
1059 struct ath_softc *sc = hw->priv;
Sujith5640b082008-10-29 10:16:06 +05301060 struct ath_vap *avp = (void *)conf->vif->drv_priv;
1061 int ic_opmode = 0;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001062
1063 /* Support only vap for now */
1064
1065 if (sc->sc_nvaps)
1066 return -ENOBUFS;
1067
1068 switch (conf->type) {
Johannes Berg05c914f2008-09-11 00:01:58 +02001069 case NL80211_IFTYPE_STATION:
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001070 ic_opmode = ATH9K_M_STA;
1071 break;
Johannes Berg05c914f2008-09-11 00:01:58 +02001072 case NL80211_IFTYPE_ADHOC:
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001073 ic_opmode = ATH9K_M_IBSS;
1074 break;
Johannes Berg05c914f2008-09-11 00:01:58 +02001075 case NL80211_IFTYPE_AP:
Jouni Malinen2ad67de2008-08-11 14:01:47 +03001076 ic_opmode = ATH9K_M_HOSTAP;
1077 break;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001078 default:
1079 DPRINTF(sc, ATH_DBG_FATAL,
Jouni Malinen2ad67de2008-08-11 14:01:47 +03001080 "%s: Interface type %d not yet supported\n",
1081 __func__, conf->type);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001082 return -EOPNOTSUPP;
1083 }
1084
1085 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Attach a VAP of type: %d\n",
1086 __func__,
1087 ic_opmode);
1088
Sujith5640b082008-10-29 10:16:06 +05301089 /* Set the VAP opmode */
1090 avp->av_opmode = ic_opmode;
1091 avp->av_bslot = -1;
1092
1093 if (ic_opmode == ATH9K_M_HOSTAP)
1094 ath9k_hw_set_tsfadjust(sc->sc_ah, 1);
1095
1096 sc->sc_vaps[0] = conf->vif;
1097 sc->sc_nvaps++;
1098
1099 /* Set the device opmode */
1100 sc->sc_ah->ah_opmode = ic_opmode;
1101
1102 /* default VAP configuration */
1103 avp->av_config.av_fixed_rateset = IEEE80211_FIXED_RATE_NONE;
1104 avp->av_config.av_fixed_retryset = 0x03030303;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001105
Luis R. Rodriguez6f255422008-10-03 15:45:27 -07001106 if (conf->type == NL80211_IFTYPE_AP) {
1107 /* TODO: is this a suitable place to start ANI for AP mode? */
1108 /* Start ANI */
1109 mod_timer(&sc->sc_ani.timer,
1110 jiffies + msecs_to_jiffies(ATH_ANI_POLLINTERVAL));
1111 }
1112
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001113 return 0;
1114}
1115
1116static void ath9k_remove_interface(struct ieee80211_hw *hw,
1117 struct ieee80211_if_init_conf *conf)
1118{
1119 struct ath_softc *sc = hw->priv;
Sujith5640b082008-10-29 10:16:06 +05301120 struct ath_vap *avp = (void *)conf->vif->drv_priv;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001121
1122 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Detach VAP\n", __func__);
1123
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001124#ifdef CONFIG_SLOW_ANT_DIV
1125 ath_slow_ant_div_stop(&sc->sc_antdiv);
1126#endif
Luis R. Rodriguez6f255422008-10-03 15:45:27 -07001127 /* Stop ANI */
1128 del_timer_sync(&sc->sc_ani.timer);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001129
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001130 /* Reclaim beacon resources */
Sujithb4696c8b2008-08-11 14:04:52 +05301131 if (sc->sc_ah->ah_opmode == ATH9K_M_HOSTAP ||
1132 sc->sc_ah->ah_opmode == ATH9K_M_IBSS) {
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001133 ath9k_hw_stoptxdma(sc->sc_ah, sc->sc_bhalq);
1134 ath_beacon_return(sc, avp);
1135 }
1136
Sujith672840a2008-08-11 14:05:08 +05301137 sc->sc_flags &= ~SC_OP_BEACONS;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001138
Sujith5640b082008-10-29 10:16:06 +05301139 sc->sc_vaps[0] = NULL;
1140 sc->sc_nvaps--;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001141}
1142
Johannes Berge8975582008-10-09 12:18:51 +02001143static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001144{
1145 struct ath_softc *sc = hw->priv;
1146 struct ieee80211_channel *curchan = hw->conf.channel;
Johannes Berge8975582008-10-09 12:18:51 +02001147 struct ieee80211_conf *conf = &hw->conf;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001148 int pos;
1149
1150 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Set channel: %d MHz\n",
1151 __func__,
1152 curchan->center_freq);
1153
Johannes Bergae5eb022008-10-14 16:58:37 +02001154 /* Update chainmask */
1155 ath_update_chainmask(sc, conf->ht.enabled);
1156
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001157 pos = ath_get_channel(sc, curchan);
1158 if (pos == -1) {
1159 DPRINTF(sc, ATH_DBG_FATAL, "%s: Invalid channel\n", __func__);
1160 return -EINVAL;
1161 }
1162
1163 sc->sc_ah->ah_channels[pos].chanmode =
Sujith86b89ee2008-08-07 10:54:57 +05301164 (curchan->band == IEEE80211_BAND_2GHZ) ?
1165 CHANNEL_G : CHANNEL_A;
1166
Johannes Bergae5eb022008-10-14 16:58:37 +02001167 if (sc->sc_curaid && hw->conf.ht.enabled)
Sujith86b89ee2008-08-07 10:54:57 +05301168 sc->sc_ah->ah_channels[pos].chanmode =
1169 ath_get_extchanmode(sc, curchan);
1170
Luis R. Rodriguez5c020dc2008-10-22 13:28:45 -07001171 if (changed & IEEE80211_CONF_CHANGE_POWER)
1172 sc->sc_config.txpowlimit = 2 * conf->power_level;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001173
1174 /* set h/w channel */
1175 if (ath_set_channel(sc, &sc->sc_ah->ah_channels[pos]) < 0)
1176 DPRINTF(sc, ATH_DBG_FATAL, "%s: Unable to set channel\n",
1177 __func__);
1178
1179 return 0;
1180}
1181
1182static int ath9k_config_interface(struct ieee80211_hw *hw,
1183 struct ieee80211_vif *vif,
1184 struct ieee80211_if_conf *conf)
1185{
1186 struct ath_softc *sc = hw->priv;
Jouni Malinen2ad67de2008-08-11 14:01:47 +03001187 struct ath_hal *ah = sc->sc_ah;
Sujith5640b082008-10-29 10:16:06 +05301188 struct ath_vap *avp = (void *)vif->drv_priv;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001189 u32 rfilt = 0;
1190 int error, i;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001191
Jouni Malinen2ad67de2008-08-11 14:01:47 +03001192 /* TODO: Need to decide which hw opmode to use for multi-interface
1193 * cases */
Johannes Berg05c914f2008-09-11 00:01:58 +02001194 if (vif->type == NL80211_IFTYPE_AP &&
Jouni Malinen2ad67de2008-08-11 14:01:47 +03001195 ah->ah_opmode != ATH9K_M_HOSTAP) {
1196 ah->ah_opmode = ATH9K_M_HOSTAP;
1197 ath9k_hw_setopmode(ah);
1198 ath9k_hw_write_associd(ah, sc->sc_myaddr, 0);
1199 /* Request full reset to get hw opmode changed properly */
1200 sc->sc_flags |= SC_OP_FULL_RESET;
1201 }
1202
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001203 if ((conf->changed & IEEE80211_IFCC_BSSID) &&
1204 !is_zero_ether_addr(conf->bssid)) {
1205 switch (vif->type) {
Johannes Berg05c914f2008-09-11 00:01:58 +02001206 case NL80211_IFTYPE_STATION:
1207 case NL80211_IFTYPE_ADHOC:
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001208 /* Update ratectrl about the new state */
1209 ath_rate_newstate(sc, avp);
1210
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001211 /* Set BSSID */
1212 memcpy(sc->sc_curbssid, conf->bssid, ETH_ALEN);
1213 sc->sc_curaid = 0;
1214 ath9k_hw_write_associd(sc->sc_ah, sc->sc_curbssid,
1215 sc->sc_curaid);
1216
1217 /* Set aggregation protection mode parameters */
1218 sc->sc_config.ath_aggr_prot = 0;
1219
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001220 DPRINTF(sc, ATH_DBG_CONFIG,
Johannes Berge1749612008-10-27 15:59:26 -07001221 "%s: RX filter 0x%x bssid %pM aid 0x%x\n",
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001222 __func__, rfilt,
Johannes Berge1749612008-10-27 15:59:26 -07001223 sc->sc_curbssid, sc->sc_curaid);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001224
1225 /* need to reconfigure the beacon */
Sujith672840a2008-08-11 14:05:08 +05301226 sc->sc_flags &= ~SC_OP_BEACONS ;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001227
1228 break;
1229 default:
1230 break;
1231 }
1232 }
1233
1234 if ((conf->changed & IEEE80211_IFCC_BEACON) &&
Johannes Berg05c914f2008-09-11 00:01:58 +02001235 ((vif->type == NL80211_IFTYPE_ADHOC) ||
1236 (vif->type == NL80211_IFTYPE_AP))) {
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001237 /*
1238 * Allocate and setup the beacon frame.
1239 *
1240 * Stop any previous beacon DMA. This may be
1241 * necessary, for example, when an ibss merge
1242 * causes reconfiguration; we may be called
1243 * with beacon transmission active.
1244 */
1245 ath9k_hw_stoptxdma(sc->sc_ah, sc->sc_bhalq);
1246
1247 error = ath_beacon_alloc(sc, 0);
1248 if (error != 0)
1249 return error;
1250
1251 ath_beacon_sync(sc, 0);
1252 }
1253
1254 /* Check for WLAN_CAPABILITY_PRIVACY ? */
Sujith5640b082008-10-29 10:16:06 +05301255 if ((avp->av_opmode != ATH9K_M_STA)) {
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001256 for (i = 0; i < IEEE80211_WEP_NKID; i++)
1257 if (ath9k_hw_keyisvalid(sc->sc_ah, (u16)i))
1258 ath9k_hw_keysetmac(sc->sc_ah,
1259 (u16)i,
1260 sc->sc_curbssid);
1261 }
1262
1263 /* Only legacy IBSS for now */
Johannes Berg05c914f2008-09-11 00:01:58 +02001264 if (vif->type == NL80211_IFTYPE_ADHOC)
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001265 ath_update_chainmask(sc, 0);
1266
1267 return 0;
1268}
1269
1270#define SUPPORTED_FILTERS \
1271 (FIF_PROMISC_IN_BSS | \
1272 FIF_ALLMULTI | \
1273 FIF_CONTROL | \
1274 FIF_OTHER_BSS | \
1275 FIF_BCN_PRBRESP_PROMISC | \
1276 FIF_FCSFAIL)
1277
Sujith7dcfdcd2008-08-11 14:03:13 +05301278/* FIXME: sc->sc_full_reset ? */
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001279static void ath9k_configure_filter(struct ieee80211_hw *hw,
1280 unsigned int changed_flags,
1281 unsigned int *total_flags,
1282 int mc_count,
1283 struct dev_mc_list *mclist)
1284{
1285 struct ath_softc *sc = hw->priv;
Sujith7dcfdcd2008-08-11 14:03:13 +05301286 u32 rfilt;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001287
1288 changed_flags &= SUPPORTED_FILTERS;
1289 *total_flags &= SUPPORTED_FILTERS;
1290
Sujith7dcfdcd2008-08-11 14:03:13 +05301291 sc->rx_filter = *total_flags;
1292 rfilt = ath_calcrxfilter(sc);
1293 ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
1294
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001295 if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
1296 if (*total_flags & FIF_BCN_PRBRESP_PROMISC)
Sujith7dcfdcd2008-08-11 14:03:13 +05301297 ath9k_hw_write_associd(sc->sc_ah, ath_bcast_mac, 0);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001298 }
Sujith7dcfdcd2008-08-11 14:03:13 +05301299
1300 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Set HW RX filter: 0x%x\n",
1301 __func__, sc->rx_filter);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001302}
1303
1304static void ath9k_sta_notify(struct ieee80211_hw *hw,
1305 struct ieee80211_vif *vif,
1306 enum sta_notify_cmd cmd,
Johannes Berg17741cd2008-09-11 00:02:02 +02001307 struct ieee80211_sta *sta)
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001308{
1309 struct ath_softc *sc = hw->priv;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001310
1311 switch (cmd) {
1312 case STA_NOTIFY_ADD:
Sujith5640b082008-10-29 10:16:06 +05301313 ath_node_attach(sc, sta);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001314 break;
1315 case STA_NOTIFY_REMOVE:
Sujithb5aa9bf2008-10-29 10:13:31 +05301316 ath_node_detach(sc, sta);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001317 break;
1318 default:
1319 break;
1320 }
1321}
1322
1323static int ath9k_conf_tx(struct ieee80211_hw *hw,
1324 u16 queue,
1325 const struct ieee80211_tx_queue_params *params)
1326{
1327 struct ath_softc *sc = hw->priv;
Sujithea9880f2008-08-07 10:53:10 +05301328 struct ath9k_tx_queue_info qi;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001329 int ret = 0, qnum;
1330
1331 if (queue >= WME_NUM_AC)
1332 return 0;
1333
1334 qi.tqi_aifs = params->aifs;
1335 qi.tqi_cwmin = params->cw_min;
1336 qi.tqi_cwmax = params->cw_max;
1337 qi.tqi_burstTime = params->txop;
1338 qnum = ath_get_hal_qnum(queue, sc);
1339
1340 DPRINTF(sc, ATH_DBG_CONFIG,
1341 "%s: Configure tx [queue/halq] [%d/%d], "
1342 "aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
1343 __func__,
1344 queue,
1345 qnum,
1346 params->aifs,
1347 params->cw_min,
1348 params->cw_max,
1349 params->txop);
1350
1351 ret = ath_txq_update(sc, qnum, &qi);
1352 if (ret)
1353 DPRINTF(sc, ATH_DBG_FATAL,
1354 "%s: TXQ Update failed\n", __func__);
1355
1356 return ret;
1357}
1358
1359static int ath9k_set_key(struct ieee80211_hw *hw,
1360 enum set_key_cmd cmd,
1361 const u8 *local_addr,
1362 const u8 *addr,
1363 struct ieee80211_key_conf *key)
1364{
1365 struct ath_softc *sc = hw->priv;
1366 int ret = 0;
1367
1368 DPRINTF(sc, ATH_DBG_KEYCACHE, " %s: Set HW Key\n", __func__);
1369
1370 switch (cmd) {
1371 case SET_KEY:
1372 ret = ath_key_config(sc, addr, key);
1373 if (!ret) {
1374 set_bit(key->keyidx, sc->sc_keymap);
1375 key->hw_key_idx = key->keyidx;
1376 /* push IV and Michael MIC generation to stack */
1377 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
Senthil Balasubramanian1b961752008-09-01 19:45:21 +05301378 if (key->alg == ALG_TKIP)
1379 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001380 }
1381 break;
1382 case DISABLE_KEY:
1383 ath_key_delete(sc, key);
1384 clear_bit(key->keyidx, sc->sc_keymap);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001385 break;
1386 default:
1387 ret = -EINVAL;
1388 }
1389
1390 return ret;
1391}
1392
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001393static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
1394 struct ieee80211_vif *vif,
1395 struct ieee80211_bss_conf *bss_conf,
1396 u32 changed)
1397{
1398 struct ath_softc *sc = hw->priv;
1399
1400 if (changed & BSS_CHANGED_ERP_PREAMBLE) {
1401 DPRINTF(sc, ATH_DBG_CONFIG, "%s: BSS Changed PREAMBLE %d\n",
1402 __func__,
1403 bss_conf->use_short_preamble);
1404 if (bss_conf->use_short_preamble)
Sujith672840a2008-08-11 14:05:08 +05301405 sc->sc_flags |= SC_OP_PREAMBLE_SHORT;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001406 else
Sujith672840a2008-08-11 14:05:08 +05301407 sc->sc_flags &= ~SC_OP_PREAMBLE_SHORT;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001408 }
1409
1410 if (changed & BSS_CHANGED_ERP_CTS_PROT) {
1411 DPRINTF(sc, ATH_DBG_CONFIG, "%s: BSS Changed CTS PROT %d\n",
1412 __func__,
1413 bss_conf->use_cts_prot);
1414 if (bss_conf->use_cts_prot &&
1415 hw->conf.channel->band != IEEE80211_BAND_5GHZ)
Sujith672840a2008-08-11 14:05:08 +05301416 sc->sc_flags |= SC_OP_PROTECT_ENABLE;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001417 else
Sujith672840a2008-08-11 14:05:08 +05301418 sc->sc_flags &= ~SC_OP_PROTECT_ENABLE;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001419 }
1420
1421 if (changed & BSS_CHANGED_HT) {
Johannes Bergae5eb022008-10-14 16:58:37 +02001422 DPRINTF(sc, ATH_DBG_CONFIG, "%s: BSS Changed HT\n",
1423 __func__);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001424 ath9k_ht_conf(sc, bss_conf);
1425 }
1426
1427 if (changed & BSS_CHANGED_ASSOC) {
1428 DPRINTF(sc, ATH_DBG_CONFIG, "%s: BSS Changed ASSOC %d\n",
1429 __func__,
1430 bss_conf->assoc);
Sujith5640b082008-10-29 10:16:06 +05301431 ath9k_bss_assoc_info(sc, vif, bss_conf);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001432 }
1433}
1434
1435static u64 ath9k_get_tsf(struct ieee80211_hw *hw)
1436{
1437 u64 tsf;
1438 struct ath_softc *sc = hw->priv;
1439 struct ath_hal *ah = sc->sc_ah;
1440
1441 tsf = ath9k_hw_gettsf64(ah);
1442
1443 return tsf;
1444}
1445
1446static void ath9k_reset_tsf(struct ieee80211_hw *hw)
1447{
1448 struct ath_softc *sc = hw->priv;
1449 struct ath_hal *ah = sc->sc_ah;
1450
1451 ath9k_hw_reset_tsf(ah);
1452}
1453
1454static int ath9k_ampdu_action(struct ieee80211_hw *hw,
1455 enum ieee80211_ampdu_mlme_action action,
Johannes Berg17741cd2008-09-11 00:02:02 +02001456 struct ieee80211_sta *sta,
1457 u16 tid, u16 *ssn)
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001458{
1459 struct ath_softc *sc = hw->priv;
1460 int ret = 0;
1461
1462 switch (action) {
1463 case IEEE80211_AMPDU_RX_START:
Sujithdca3edb2008-10-29 10:19:01 +05301464 if (!(sc->sc_flags & SC_OP_RXAGGR))
1465 ret = -ENOTSUPP;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001466 break;
1467 case IEEE80211_AMPDU_RX_STOP:
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001468 break;
1469 case IEEE80211_AMPDU_TX_START:
Sujithb5aa9bf2008-10-29 10:13:31 +05301470 ret = ath_tx_aggr_start(sc, sta, tid, ssn);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001471 if (ret < 0)
1472 DPRINTF(sc, ATH_DBG_FATAL,
1473 "%s: Unable to start TX aggregation\n",
1474 __func__);
1475 else
Johannes Berg17741cd2008-09-11 00:02:02 +02001476 ieee80211_start_tx_ba_cb_irqsafe(hw, sta->addr, tid);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001477 break;
1478 case IEEE80211_AMPDU_TX_STOP:
Sujithb5aa9bf2008-10-29 10:13:31 +05301479 ret = ath_tx_aggr_stop(sc, sta, tid);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001480 if (ret < 0)
1481 DPRINTF(sc, ATH_DBG_FATAL,
1482 "%s: Unable to stop TX aggregation\n",
1483 __func__);
1484
Johannes Berg17741cd2008-09-11 00:02:02 +02001485 ieee80211_stop_tx_ba_cb_irqsafe(hw, sta->addr, tid);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001486 break;
Sujith8469cde2008-10-29 10:19:28 +05301487 case IEEE80211_AMPDU_TX_RESUME:
1488 ath_tx_aggr_resume(sc, sta, tid);
1489 break;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001490 default:
1491 DPRINTF(sc, ATH_DBG_FATAL,
1492 "%s: Unknown AMPDU action\n", __func__);
1493 }
1494
1495 return ret;
1496}
1497
Johannes Berg4233df62008-10-13 13:35:05 +02001498static int ath9k_no_fragmentation(struct ieee80211_hw *hw, u32 value)
1499{
1500 return -EOPNOTSUPP;
1501}
1502
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001503static struct ieee80211_ops ath9k_ops = {
1504 .tx = ath9k_tx,
1505 .start = ath9k_start,
1506 .stop = ath9k_stop,
1507 .add_interface = ath9k_add_interface,
1508 .remove_interface = ath9k_remove_interface,
1509 .config = ath9k_config,
1510 .config_interface = ath9k_config_interface,
1511 .configure_filter = ath9k_configure_filter,
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001512 .sta_notify = ath9k_sta_notify,
1513 .conf_tx = ath9k_conf_tx,
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001514 .bss_info_changed = ath9k_bss_info_changed,
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001515 .set_key = ath9k_set_key,
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001516 .get_tsf = ath9k_get_tsf,
1517 .reset_tsf = ath9k_reset_tsf,
Johannes Berg4233df62008-10-13 13:35:05 +02001518 .ampdu_action = ath9k_ampdu_action,
1519 .set_frag_threshold = ath9k_no_fragmentation,
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001520};
1521
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001522static int ath_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
1523{
1524 void __iomem *mem;
1525 struct ath_softc *sc;
1526 struct ieee80211_hw *hw;
1527 const char *athname;
1528 u8 csz;
1529 u32 val;
1530 int ret = 0;
1531
1532 if (pci_enable_device(pdev))
1533 return -EIO;
1534
1535 /* XXX 32-bit addressing only */
1536 if (pci_set_dma_mask(pdev, 0xffffffff)) {
1537 printk(KERN_ERR "ath_pci: 32-bit DMA not available\n");
1538 ret = -ENODEV;
1539 goto bad;
1540 }
1541
1542 /*
1543 * Cache line size is used to size and align various
1544 * structures used to communicate with the hardware.
1545 */
1546 pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, &csz);
1547 if (csz == 0) {
1548 /*
1549 * Linux 2.4.18 (at least) writes the cache line size
1550 * register as a 16-bit wide register which is wrong.
1551 * We must have this setup properly for rx buffer
1552 * DMA to work so force a reasonable value here if it
1553 * comes up zero.
1554 */
1555 csz = L1_CACHE_BYTES / sizeof(u32);
1556 pci_write_config_byte(pdev, PCI_CACHE_LINE_SIZE, csz);
1557 }
1558 /*
1559 * The default setting of latency timer yields poor results,
1560 * set it to the value used by other systems. It may be worth
1561 * tweaking this setting more.
1562 */
1563 pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 0xa8);
1564
1565 pci_set_master(pdev);
1566
1567 /*
1568 * Disable the RETRY_TIMEOUT register (0x41) to keep
1569 * PCI Tx retries from interfering with C3 CPU state.
1570 */
1571 pci_read_config_dword(pdev, 0x40, &val);
1572 if ((val & 0x0000ff00) != 0)
1573 pci_write_config_dword(pdev, 0x40, val & 0xffff00ff);
1574
1575 ret = pci_request_region(pdev, 0, "ath9k");
1576 if (ret) {
1577 dev_err(&pdev->dev, "PCI memory region reserve error\n");
1578 ret = -ENODEV;
1579 goto bad;
1580 }
1581
1582 mem = pci_iomap(pdev, 0, 0);
1583 if (!mem) {
1584 printk(KERN_ERR "PCI memory map error\n") ;
1585 ret = -EIO;
1586 goto bad1;
1587 }
1588
1589 hw = ieee80211_alloc_hw(sizeof(struct ath_softc), &ath9k_ops);
1590 if (hw == NULL) {
1591 printk(KERN_ERR "ath_pci: no memory for ieee80211_hw\n");
1592 goto bad2;
1593 }
1594
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001595 SET_IEEE80211_DEV(hw, &pdev->dev);
1596 pci_set_drvdata(pdev, hw);
1597
1598 sc = hw->priv;
1599 sc->hw = hw;
1600 sc->pdev = pdev;
1601 sc->mem = mem;
1602
1603 if (ath_attach(id->device, sc) != 0) {
1604 ret = -ENODEV;
1605 goto bad3;
1606 }
1607
1608 /* setup interrupt service routine */
1609
1610 if (request_irq(pdev->irq, ath_isr, IRQF_SHARED, "ath", sc)) {
1611 printk(KERN_ERR "%s: request_irq failed\n",
1612 wiphy_name(hw->wiphy));
1613 ret = -EIO;
1614 goto bad4;
1615 }
1616
1617 athname = ath9k_hw_probe(id->vendor, id->device);
1618
1619 printk(KERN_INFO "%s: %s: mem=0x%lx, irq=%d\n",
1620 wiphy_name(hw->wiphy),
1621 athname ? athname : "Atheros ???",
1622 (unsigned long)mem, pdev->irq);
1623
1624 return 0;
1625bad4:
1626 ath_detach(sc);
1627bad3:
1628 ieee80211_free_hw(hw);
1629bad2:
1630 pci_iounmap(pdev, mem);
1631bad1:
1632 pci_release_region(pdev, 0);
1633bad:
1634 pci_disable_device(pdev);
1635 return ret;
1636}
1637
1638static void ath_pci_remove(struct pci_dev *pdev)
1639{
1640 struct ieee80211_hw *hw = pci_get_drvdata(pdev);
1641 struct ath_softc *sc = hw->priv;
1642
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001643 ath_detach(sc);
Sujith9c84b792008-10-29 10:17:13 +05301644 if (pdev->irq)
1645 free_irq(pdev->irq, sc);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001646 pci_iounmap(pdev, sc->mem);
1647 pci_release_region(pdev, 0);
1648 pci_disable_device(pdev);
1649 ieee80211_free_hw(hw);
1650}
1651
1652#ifdef CONFIG_PM
1653
1654static int ath_pci_suspend(struct pci_dev *pdev, pm_message_t state)
1655{
Vasanthakumar Thiagarajanc83be682008-08-25 20:47:29 +05301656 struct ieee80211_hw *hw = pci_get_drvdata(pdev);
1657 struct ath_softc *sc = hw->priv;
1658
1659 ath9k_hw_set_gpio(sc->sc_ah, ATH_LED_PIN, 1);
Vasanthakumar Thiagarajan500c0642008-09-10 18:50:17 +05301660
1661#ifdef CONFIG_RFKILL
1662 if (sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_RFSILENT)
1663 cancel_delayed_work_sync(&sc->rf_kill.rfkill_poll);
1664#endif
1665
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001666 pci_save_state(pdev);
1667 pci_disable_device(pdev);
1668 pci_set_power_state(pdev, 3);
1669
1670 return 0;
1671}
1672
1673static int ath_pci_resume(struct pci_dev *pdev)
1674{
Vasanthakumar Thiagarajanc83be682008-08-25 20:47:29 +05301675 struct ieee80211_hw *hw = pci_get_drvdata(pdev);
1676 struct ath_softc *sc = hw->priv;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001677 u32 val;
1678 int err;
1679
1680 err = pci_enable_device(pdev);
1681 if (err)
1682 return err;
1683 pci_restore_state(pdev);
1684 /*
1685 * Suspend/Resume resets the PCI configuration space, so we have to
1686 * re-disable the RETRY_TIMEOUT register (0x41) to keep
1687 * PCI Tx retries from interfering with C3 CPU state
1688 */
1689 pci_read_config_dword(pdev, 0x40, &val);
1690 if ((val & 0x0000ff00) != 0)
1691 pci_write_config_dword(pdev, 0x40, val & 0xffff00ff);
1692
Vasanthakumar Thiagarajanc83be682008-08-25 20:47:29 +05301693 /* Enable LED */
1694 ath9k_hw_cfg_output(sc->sc_ah, ATH_LED_PIN,
1695 AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
1696 ath9k_hw_set_gpio(sc->sc_ah, ATH_LED_PIN, 1);
1697
Vasanthakumar Thiagarajan500c0642008-09-10 18:50:17 +05301698#ifdef CONFIG_RFKILL
1699 /*
1700 * check the h/w rfkill state on resume
1701 * and start the rfkill poll timer
1702 */
1703 if (sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_RFSILENT)
1704 queue_delayed_work(sc->hw->workqueue,
1705 &sc->rf_kill.rfkill_poll, 0);
1706#endif
1707
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001708 return 0;
1709}
1710
1711#endif /* CONFIG_PM */
1712
1713MODULE_DEVICE_TABLE(pci, ath_pci_id_table);
1714
1715static struct pci_driver ath_pci_driver = {
1716 .name = "ath9k",
1717 .id_table = ath_pci_id_table,
1718 .probe = ath_pci_probe,
1719 .remove = ath_pci_remove,
1720#ifdef CONFIG_PM
1721 .suspend = ath_pci_suspend,
1722 .resume = ath_pci_resume,
1723#endif /* CONFIG_PM */
1724};
1725
1726static int __init init_ath_pci(void)
1727{
1728 printk(KERN_INFO "%s: %s\n", dev_info, ATH_PCI_VERSION);
1729
1730 if (pci_register_driver(&ath_pci_driver) < 0) {
1731 printk(KERN_ERR
1732 "ath_pci: No devices found, driver not installed.\n");
1733 pci_unregister_driver(&ath_pci_driver);
1734 return -ENODEV;
1735 }
1736
1737 return 0;
1738}
1739module_init(init_ath_pci);
1740
1741static void __exit exit_ath_pci(void)
1742{
1743 pci_unregister_driver(&ath_pci_driver);
1744 printk(KERN_INFO "%s: driver unloaded\n", dev_info);
1745}
1746module_exit(exit_ath_pci);