blob: b2505fc5c1f78b2af4855344781d0d82cad10522 [file] [log] [blame]
Ben Hutchings8ceee662008-04-27 12:55:59 +01001/****************************************************************************
2 * Driver for Solarflare Solarstorm network controllers and boards
Ben Hutchings04300d22008-12-12 21:48:09 -08003 * Copyright 2007-2008 Solarflare Communications Inc.
Ben Hutchings8ceee662008-04-27 12:55:59 +01004 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 as published
7 * by the Free Software Foundation, incorporated herein by reference.
8 */
9
Ben Hutchingsc9597d42009-10-23 08:29:33 +000010#include <linux/rtnetlink.h>
11
Ben Hutchings8ceee662008-04-27 12:55:59 +010012#include "net_driver.h"
13#include "phy.h"
Ben Hutchings8ceee662008-04-27 12:55:59 +010014#include "efx.h"
Ben Hutchingsc9597d42009-10-23 08:29:33 +000015#include "falcon.h"
Ben Hutchings3e6c4532009-10-23 08:30:36 +000016#include "regs.h"
Ben Hutchings12d00ca2009-10-23 08:30:46 +000017#include "io.h"
Ben Hutchings3e133c42008-11-04 20:34:56 +000018#include "workarounds.h"
Ben Hutchings8ceee662008-04-27 12:55:59 +010019
20/* Macros for unpacking the board revision */
21/* The revision info is in host byte order. */
Ben Hutchings3473a5b2009-10-23 08:29:16 +000022#define FALCON_BOARD_TYPE(_rev) (_rev >> 8)
23#define FALCON_BOARD_MAJOR(_rev) ((_rev >> 4) & 0xf)
24#define FALCON_BOARD_MINOR(_rev) (_rev & 0xf)
25
26/* Board types */
Ben Hutchingsc9597d42009-10-23 08:29:33 +000027#define FALCON_BOARD_SFE4001 0x01
Ben Hutchings3473a5b2009-10-23 08:29:16 +000028#define FALCON_BOARD_SFE4002 0x02
29#define FALCON_BOARD_SFN4111T 0x51
30#define FALCON_BOARD_SFN4112F 0x52
Ben Hutchings8ceee662008-04-27 12:55:59 +010031
Ben Hutchings8ceee662008-04-27 12:55:59 +010032/*****************************************************************************
Ben Hutchings3e133c42008-11-04 20:34:56 +000033 * Support for LM87 sensor chip used on several boards
34 */
35#define LM87_REG_ALARMS1 0x41
36#define LM87_REG_ALARMS2 0x42
37#define LM87_IN_LIMITS(nr, _min, _max) \
38 0x2B + (nr) * 2, _max, 0x2C + (nr) * 2, _min
39#define LM87_AIN_LIMITS(nr, _min, _max) \
40 0x3B + (nr), _max, 0x1A + (nr), _min
41#define LM87_TEMP_INT_LIMITS(_min, _max) \
42 0x39, _max, 0x3A, _min
43#define LM87_TEMP_EXT1_LIMITS(_min, _max) \
44 0x37, _max, 0x38, _min
45
46#define LM87_ALARM_TEMP_INT 0x10
47#define LM87_ALARM_TEMP_EXT1 0x20
48
49#if defined(CONFIG_SENSORS_LM87) || defined(CONFIG_SENSORS_LM87_MODULE)
50
51static int efx_init_lm87(struct efx_nic *efx, struct i2c_board_info *info,
52 const u8 *reg_values)
53{
54 struct i2c_client *client = i2c_new_device(&efx->i2c_adap, info);
55 int rc;
56
57 if (!client)
58 return -EIO;
59
60 while (*reg_values) {
61 u8 reg = *reg_values++;
62 u8 value = *reg_values++;
63 rc = i2c_smbus_write_byte_data(client, reg, value);
64 if (rc)
65 goto err;
66 }
67
68 efx->board_info.hwmon_client = client;
69 return 0;
70
71err:
72 i2c_unregister_device(client);
73 return rc;
74}
75
76static void efx_fini_lm87(struct efx_nic *efx)
77{
78 i2c_unregister_device(efx->board_info.hwmon_client);
79}
80
81static int efx_check_lm87(struct efx_nic *efx, unsigned mask)
82{
83 struct i2c_client *client = efx->board_info.hwmon_client;
84 s32 alarms1, alarms2;
85
86 /* If link is up then do not monitor temperature */
87 if (EFX_WORKAROUND_7884(efx) && efx->link_up)
88 return 0;
89
90 alarms1 = i2c_smbus_read_byte_data(client, LM87_REG_ALARMS1);
91 alarms2 = i2c_smbus_read_byte_data(client, LM87_REG_ALARMS2);
92 if (alarms1 < 0)
93 return alarms1;
94 if (alarms2 < 0)
95 return alarms2;
96 alarms1 &= mask;
97 alarms2 &= mask >> 8;
98 if (alarms1 || alarms2) {
99 EFX_ERR(efx,
100 "LM87 detected a hardware failure (status %02x:%02x)"
101 "%s%s\n",
102 alarms1, alarms2,
103 (alarms1 & LM87_ALARM_TEMP_INT) ? " INTERNAL" : "",
104 (alarms1 & LM87_ALARM_TEMP_EXT1) ? " EXTERNAL" : "");
105 return -ERANGE;
106 }
107
108 return 0;
109}
110
111#else /* !CONFIG_SENSORS_LM87 */
112
113static inline int
114efx_init_lm87(struct efx_nic *efx, struct i2c_board_info *info,
115 const u8 *reg_values)
116{
117 return 0;
118}
119static inline void efx_fini_lm87(struct efx_nic *efx)
120{
121}
122static inline int efx_check_lm87(struct efx_nic *efx, unsigned mask)
123{
124 return 0;
125}
126
127#endif /* CONFIG_SENSORS_LM87 */
128
129/*****************************************************************************
Ben Hutchingsc9597d42009-10-23 08:29:33 +0000130 * Support for the SFE4001 and SFN4111T NICs.
131 *
132 * The SFE4001 does not power-up fully at reset due to its high power
133 * consumption. We control its power via a PCA9539 I/O expander.
134 * Both boards have a MAX6647 temperature monitor which we expose to
135 * the lm90 driver.
136 *
137 * This also provides minimal support for reflashing the PHY, which is
138 * initiated by resetting it with the FLASH_CFG_1 pin pulled down.
139 * On SFE4001 rev A2 and later this is connected to the 3V3X output of
140 * the IO-expander; on the SFN4111T it is connected to Falcon's GPIO3.
141 * We represent reflash mode as PHY_MODE_SPECIAL and make it mutually
142 * exclusive with the network device being open.
143 */
144
145/**************************************************************************
146 * Support for I2C IO Expander device on SFE40001
147 */
148#define PCA9539 0x74
149
150#define P0_IN 0x00
151#define P0_OUT 0x02
152#define P0_INVERT 0x04
153#define P0_CONFIG 0x06
154
155#define P0_EN_1V0X_LBN 0
156#define P0_EN_1V0X_WIDTH 1
157#define P0_EN_1V2_LBN 1
158#define P0_EN_1V2_WIDTH 1
159#define P0_EN_2V5_LBN 2
160#define P0_EN_2V5_WIDTH 1
161#define P0_EN_3V3X_LBN 3
162#define P0_EN_3V3X_WIDTH 1
163#define P0_EN_5V_LBN 4
164#define P0_EN_5V_WIDTH 1
165#define P0_SHORTEN_JTAG_LBN 5
166#define P0_SHORTEN_JTAG_WIDTH 1
167#define P0_X_TRST_LBN 6
168#define P0_X_TRST_WIDTH 1
169#define P0_DSP_RESET_LBN 7
170#define P0_DSP_RESET_WIDTH 1
171
172#define P1_IN 0x01
173#define P1_OUT 0x03
174#define P1_INVERT 0x05
175#define P1_CONFIG 0x07
176
177#define P1_AFE_PWD_LBN 0
178#define P1_AFE_PWD_WIDTH 1
179#define P1_DSP_PWD25_LBN 1
180#define P1_DSP_PWD25_WIDTH 1
181#define P1_RESERVED_LBN 2
182#define P1_RESERVED_WIDTH 2
183#define P1_SPARE_LBN 4
184#define P1_SPARE_WIDTH 4
185
186/* Temperature Sensor */
187#define MAX664X_REG_RSL 0x02
188#define MAX664X_REG_WLHO 0x0B
189
190static void sfe4001_poweroff(struct efx_nic *efx)
191{
192 struct i2c_client *ioexp_client = efx->board_info.ioexp_client;
193 struct i2c_client *hwmon_client = efx->board_info.hwmon_client;
194
195 /* Turn off all power rails and disable outputs */
196 i2c_smbus_write_byte_data(ioexp_client, P0_OUT, 0xff);
197 i2c_smbus_write_byte_data(ioexp_client, P1_CONFIG, 0xff);
198 i2c_smbus_write_byte_data(ioexp_client, P0_CONFIG, 0xff);
199
200 /* Clear any over-temperature alert */
201 i2c_smbus_read_byte_data(hwmon_client, MAX664X_REG_RSL);
202}
203
204static int sfe4001_poweron(struct efx_nic *efx)
205{
206 struct i2c_client *hwmon_client = efx->board_info.hwmon_client;
207 struct i2c_client *ioexp_client = efx->board_info.ioexp_client;
208 unsigned int i, j;
209 int rc;
210 u8 out;
211
212 /* Clear any previous over-temperature alert */
213 rc = i2c_smbus_read_byte_data(hwmon_client, MAX664X_REG_RSL);
214 if (rc < 0)
215 return rc;
216
217 /* Enable port 0 and port 1 outputs on IO expander */
218 rc = i2c_smbus_write_byte_data(ioexp_client, P0_CONFIG, 0x00);
219 if (rc)
220 return rc;
221 rc = i2c_smbus_write_byte_data(ioexp_client, P1_CONFIG,
222 0xff & ~(1 << P1_SPARE_LBN));
223 if (rc)
224 goto fail_on;
225
226 /* If PHY power is on, turn it all off and wait 1 second to
227 * ensure a full reset.
228 */
229 rc = i2c_smbus_read_byte_data(ioexp_client, P0_OUT);
230 if (rc < 0)
231 goto fail_on;
232 out = 0xff & ~((0 << P0_EN_1V2_LBN) | (0 << P0_EN_2V5_LBN) |
233 (0 << P0_EN_3V3X_LBN) | (0 << P0_EN_5V_LBN) |
234 (0 << P0_EN_1V0X_LBN));
235 if (rc != out) {
236 EFX_INFO(efx, "power-cycling PHY\n");
237 rc = i2c_smbus_write_byte_data(ioexp_client, P0_OUT, out);
238 if (rc)
239 goto fail_on;
240 schedule_timeout_uninterruptible(HZ);
241 }
242
243 for (i = 0; i < 20; ++i) {
244 /* Turn on 1.2V, 2.5V, 3.3V and 5V power rails */
245 out = 0xff & ~((1 << P0_EN_1V2_LBN) | (1 << P0_EN_2V5_LBN) |
246 (1 << P0_EN_3V3X_LBN) | (1 << P0_EN_5V_LBN) |
247 (1 << P0_X_TRST_LBN));
248 if (efx->phy_mode & PHY_MODE_SPECIAL)
249 out |= 1 << P0_EN_3V3X_LBN;
250
251 rc = i2c_smbus_write_byte_data(ioexp_client, P0_OUT, out);
252 if (rc)
253 goto fail_on;
254 msleep(10);
255
256 /* Turn on 1V power rail */
257 out &= ~(1 << P0_EN_1V0X_LBN);
258 rc = i2c_smbus_write_byte_data(ioexp_client, P0_OUT, out);
259 if (rc)
260 goto fail_on;
261
262 EFX_INFO(efx, "waiting for DSP boot (attempt %d)...\n", i);
263
264 /* In flash config mode, DSP does not turn on AFE, so
265 * just wait 1 second.
266 */
267 if (efx->phy_mode & PHY_MODE_SPECIAL) {
268 schedule_timeout_uninterruptible(HZ);
269 return 0;
270 }
271
272 for (j = 0; j < 10; ++j) {
273 msleep(100);
274
275 /* Check DSP has asserted AFE power line */
276 rc = i2c_smbus_read_byte_data(ioexp_client, P1_IN);
277 if (rc < 0)
278 goto fail_on;
279 if (rc & (1 << P1_AFE_PWD_LBN))
280 return 0;
281 }
282 }
283
284 EFX_INFO(efx, "timed out waiting for DSP boot\n");
285 rc = -ETIMEDOUT;
286fail_on:
287 sfe4001_poweroff(efx);
288 return rc;
289}
290
291static int sfn4111t_reset(struct efx_nic *efx)
292{
293 efx_oword_t reg;
294
295 /* GPIO 3 and the GPIO register are shared with I2C, so block that */
David S. Miller3505d1a2009-11-18 22:19:03 -0800296 i2c_lock_adapter(&efx->i2c_adap);
Ben Hutchingsc9597d42009-10-23 08:29:33 +0000297
298 /* Pull RST_N (GPIO 2) low then let it up again, setting the
299 * FLASH_CFG_1 strap (GPIO 3) appropriately. Only change the
300 * output enables; the output levels should always be 0 (low)
301 * and we rely on external pull-ups. */
Ben Hutchings12d00ca2009-10-23 08:30:46 +0000302 efx_reado(efx, &reg, FR_AB_GPIO_CTL);
Ben Hutchings3e6c4532009-10-23 08:30:36 +0000303 EFX_SET_OWORD_FIELD(reg, FRF_AB_GPIO2_OEN, true);
Ben Hutchings12d00ca2009-10-23 08:30:46 +0000304 efx_writeo(efx, &reg, FR_AB_GPIO_CTL);
Ben Hutchingsc9597d42009-10-23 08:29:33 +0000305 msleep(1000);
Ben Hutchings3e6c4532009-10-23 08:30:36 +0000306 EFX_SET_OWORD_FIELD(reg, FRF_AB_GPIO2_OEN, false);
307 EFX_SET_OWORD_FIELD(reg, FRF_AB_GPIO3_OEN,
Ben Hutchingsc9597d42009-10-23 08:29:33 +0000308 !!(efx->phy_mode & PHY_MODE_SPECIAL));
Ben Hutchings12d00ca2009-10-23 08:30:46 +0000309 efx_writeo(efx, &reg, FR_AB_GPIO_CTL);
Ben Hutchingsc9597d42009-10-23 08:29:33 +0000310 msleep(1);
311
David S. Miller3505d1a2009-11-18 22:19:03 -0800312 i2c_unlock_adapter(&efx->i2c_adap);
Ben Hutchingsc9597d42009-10-23 08:29:33 +0000313
314 ssleep(1);
315 return 0;
316}
317
318static ssize_t show_phy_flash_cfg(struct device *dev,
319 struct device_attribute *attr, char *buf)
320{
321 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
322 return sprintf(buf, "%d\n", !!(efx->phy_mode & PHY_MODE_SPECIAL));
323}
324
325static ssize_t set_phy_flash_cfg(struct device *dev,
326 struct device_attribute *attr,
327 const char *buf, size_t count)
328{
329 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
330 enum efx_phy_mode old_mode, new_mode;
331 int err;
332
333 rtnl_lock();
334 old_mode = efx->phy_mode;
335 if (count == 0 || *buf == '0')
336 new_mode = old_mode & ~PHY_MODE_SPECIAL;
337 else
338 new_mode = PHY_MODE_SPECIAL;
339 if (old_mode == new_mode) {
340 err = 0;
341 } else if (efx->state != STATE_RUNNING || netif_running(efx->net_dev)) {
342 err = -EBUSY;
343 } else {
344 /* Reset the PHY, reconfigure the MAC and enable/disable
345 * MAC stats accordingly. */
346 efx->phy_mode = new_mode;
347 if (new_mode & PHY_MODE_SPECIAL)
348 efx_stats_disable(efx);
349 if (efx->board_info.type == FALCON_BOARD_SFE4001)
350 err = sfe4001_poweron(efx);
351 else
352 err = sfn4111t_reset(efx);
353 efx_reconfigure_port(efx);
354 if (!(new_mode & PHY_MODE_SPECIAL))
355 efx_stats_enable(efx);
356 }
357 rtnl_unlock();
358
359 return err ? err : count;
360}
361
362static DEVICE_ATTR(phy_flash_cfg, 0644, show_phy_flash_cfg, set_phy_flash_cfg);
363
364static void sfe4001_fini(struct efx_nic *efx)
365{
366 EFX_INFO(efx, "%s\n", __func__);
367
368 device_remove_file(&efx->pci_dev->dev, &dev_attr_phy_flash_cfg);
369 sfe4001_poweroff(efx);
370 i2c_unregister_device(efx->board_info.ioexp_client);
371 i2c_unregister_device(efx->board_info.hwmon_client);
372}
373
374static int sfe4001_check_hw(struct efx_nic *efx)
375{
376 s32 status;
377
378 /* If XAUI link is up then do not monitor */
379 if (EFX_WORKAROUND_7884(efx) && efx->mac_up)
380 return 0;
381
382 /* Check the powered status of the PHY. Lack of power implies that
383 * the MAX6647 has shut down power to it, probably due to a temp.
384 * alarm. Reading the power status rather than the MAX6647 status
385 * directly because the later is read-to-clear and would thus
386 * start to power up the PHY again when polled, causing us to blip
387 * the power undesirably.
388 * We know we can read from the IO expander because we did
389 * it during power-on. Assume failure now is bad news. */
390 status = i2c_smbus_read_byte_data(efx->board_info.ioexp_client, P1_IN);
391 if (status >= 0 &&
392 (status & ((1 << P1_AFE_PWD_LBN) | (1 << P1_DSP_PWD25_LBN))) != 0)
393 return 0;
394
395 /* Use board power control, not PHY power control */
396 sfe4001_poweroff(efx);
397 efx->phy_mode = PHY_MODE_OFF;
398
399 return (status < 0) ? -EIO : -ERANGE;
400}
401
402static struct i2c_board_info sfe4001_hwmon_info = {
403 I2C_BOARD_INFO("max6647", 0x4e),
404};
405
406/* This board uses an I2C expander to provider power to the PHY, which needs to
407 * be turned on before the PHY can be used.
408 * Context: Process context, rtnl lock held
409 */
410static int sfe4001_init(struct efx_nic *efx)
411{
412 int rc;
413
414#if defined(CONFIG_SENSORS_LM90) || defined(CONFIG_SENSORS_LM90_MODULE)
415 efx->board_info.hwmon_client =
416 i2c_new_device(&efx->i2c_adap, &sfe4001_hwmon_info);
417#else
418 efx->board_info.hwmon_client =
419 i2c_new_dummy(&efx->i2c_adap, sfe4001_hwmon_info.addr);
420#endif
421 if (!efx->board_info.hwmon_client)
422 return -EIO;
423
424 /* Raise board/PHY high limit from 85 to 90 degrees Celsius */
425 rc = i2c_smbus_write_byte_data(efx->board_info.hwmon_client,
426 MAX664X_REG_WLHO, 90);
427 if (rc)
428 goto fail_hwmon;
429
430 efx->board_info.ioexp_client = i2c_new_dummy(&efx->i2c_adap, PCA9539);
431 if (!efx->board_info.ioexp_client) {
432 rc = -EIO;
433 goto fail_hwmon;
434 }
435
436 /* 10Xpress has fixed-function LED pins, so there is no board-specific
437 * blink code. */
Ben Hutchings398468e2009-11-23 16:03:45 +0000438 efx->board_info.set_id_led = tenxpress_set_id_led;
Ben Hutchingsc9597d42009-10-23 08:29:33 +0000439
440 efx->board_info.monitor = sfe4001_check_hw;
441 efx->board_info.fini = sfe4001_fini;
442
443 if (efx->phy_mode & PHY_MODE_SPECIAL) {
444 /* PHY won't generate a 156.25 MHz clock and MAC stats fetch
445 * will fail. */
446 efx_stats_disable(efx);
447 }
448 rc = sfe4001_poweron(efx);
449 if (rc)
450 goto fail_ioexp;
451
452 rc = device_create_file(&efx->pci_dev->dev, &dev_attr_phy_flash_cfg);
453 if (rc)
454 goto fail_on;
455
456 EFX_INFO(efx, "PHY is powered on\n");
457 return 0;
458
459fail_on:
460 sfe4001_poweroff(efx);
461fail_ioexp:
462 i2c_unregister_device(efx->board_info.ioexp_client);
463fail_hwmon:
464 i2c_unregister_device(efx->board_info.hwmon_client);
465 return rc;
466}
467
468static int sfn4111t_check_hw(struct efx_nic *efx)
469{
470 s32 status;
471
472 /* If XAUI link is up then do not monitor */
473 if (EFX_WORKAROUND_7884(efx) && efx->mac_up)
474 return 0;
475
476 /* Test LHIGH, RHIGH, FAULT, EOT and IOT alarms */
477 status = i2c_smbus_read_byte_data(efx->board_info.hwmon_client,
478 MAX664X_REG_RSL);
479 if (status < 0)
480 return -EIO;
481 if (status & 0x57)
482 return -ERANGE;
483 return 0;
484}
485
486static void sfn4111t_fini(struct efx_nic *efx)
487{
488 EFX_INFO(efx, "%s\n", __func__);
489
490 device_remove_file(&efx->pci_dev->dev, &dev_attr_phy_flash_cfg);
491 i2c_unregister_device(efx->board_info.hwmon_client);
492}
493
494static struct i2c_board_info sfn4111t_a0_hwmon_info = {
495 I2C_BOARD_INFO("max6647", 0x4e),
496};
497
498static struct i2c_board_info sfn4111t_r5_hwmon_info = {
499 I2C_BOARD_INFO("max6646", 0x4d),
500};
501
502static int sfn4111t_init(struct efx_nic *efx)
503{
504 int i = 0;
505 int rc;
506
507 efx->board_info.hwmon_client =
508 i2c_new_device(&efx->i2c_adap,
509 (efx->board_info.minor < 5) ?
510 &sfn4111t_a0_hwmon_info :
511 &sfn4111t_r5_hwmon_info);
512 if (!efx->board_info.hwmon_client)
513 return -EIO;
514
Ben Hutchings398468e2009-11-23 16:03:45 +0000515 efx->board_info.set_id_led = tenxpress_set_id_led;
Ben Hutchingsc9597d42009-10-23 08:29:33 +0000516 efx->board_info.monitor = sfn4111t_check_hw;
517 efx->board_info.fini = sfn4111t_fini;
518
519 rc = device_create_file(&efx->pci_dev->dev, &dev_attr_phy_flash_cfg);
520 if (rc)
521 goto fail_hwmon;
522
523 do {
524 if (efx->phy_mode & PHY_MODE_SPECIAL) {
525 /* PHY may not generate a 156.25 MHz clock and MAC
526 * stats fetch will fail. */
527 efx_stats_disable(efx);
528 sfn4111t_reset(efx);
529 }
530 rc = sft9001_wait_boot(efx);
531 if (rc == 0)
532 return 0;
533 efx->phy_mode = PHY_MODE_SPECIAL;
534 } while (rc == -EINVAL && ++i < 2);
535
536 device_remove_file(&efx->pci_dev->dev, &dev_attr_phy_flash_cfg);
537fail_hwmon:
538 i2c_unregister_device(efx->board_info.hwmon_client);
539 return rc;
540}
541
542/*****************************************************************************
Ben Hutchings8ceee662008-04-27 12:55:59 +0100543 * Support for the SFE4002
544 *
545 */
Ben Hutchings3e133c42008-11-04 20:34:56 +0000546static u8 sfe4002_lm87_channel = 0x03; /* use AIN not FAN inputs */
547
548static const u8 sfe4002_lm87_regs[] = {
549 LM87_IN_LIMITS(0, 0x83, 0x91), /* 2.5V: 1.8V +/- 5% */
550 LM87_IN_LIMITS(1, 0x51, 0x5a), /* Vccp1: 1.2V +/- 5% */
551 LM87_IN_LIMITS(2, 0xb6, 0xca), /* 3.3V: 3.3V +/- 5% */
552 LM87_IN_LIMITS(3, 0xb0, 0xc9), /* 5V: 4.6-5.2V */
553 LM87_IN_LIMITS(4, 0xb0, 0xe0), /* 12V: 11-14V */
554 LM87_IN_LIMITS(5, 0x44, 0x4b), /* Vccp2: 1.0V +/- 5% */
555 LM87_AIN_LIMITS(0, 0xa0, 0xb2), /* AIN1: 1.66V +/- 5% */
556 LM87_AIN_LIMITS(1, 0x91, 0xa1), /* AIN2: 1.5V +/- 5% */
557 LM87_TEMP_INT_LIMITS(10, 60), /* board */
558 LM87_TEMP_EXT1_LIMITS(10, 70), /* Falcon */
559 0
560};
561
562static struct i2c_board_info sfe4002_hwmon_info = {
563 I2C_BOARD_INFO("lm87", 0x2e),
564 .platform_data = &sfe4002_lm87_channel,
Ben Hutchings3e133c42008-11-04 20:34:56 +0000565};
566
Ben Hutchings8ceee662008-04-27 12:55:59 +0100567/****************************************************************************/
568/* LED allocations. Note that on rev A0 boards the schematic and the reality
569 * differ: red and green are swapped. Below is the fixed (A1) layout (there
570 * are only 3 A0 boards in existence, so no real reason to make this
571 * conditional).
572 */
573#define SFE4002_FAULT_LED (2) /* Red */
574#define SFE4002_RX_LED (0) /* Green */
575#define SFE4002_TX_LED (1) /* Amber */
576
Ben Hutchings8129d212009-02-27 13:08:03 +0000577static void sfe4002_init_leds(struct efx_nic *efx)
Ben Hutchings8ceee662008-04-27 12:55:59 +0100578{
579 /* Set the TX and RX LEDs to reflect status and activity, and the
580 * fault LED off */
Ben Hutchingsb37b62f2009-10-23 08:33:42 +0000581 falcon_qt202x_set_led(efx, SFE4002_TX_LED,
582 QUAKE_LED_TXLINK | QUAKE_LED_LINK_ACTSTAT);
583 falcon_qt202x_set_led(efx, SFE4002_RX_LED,
584 QUAKE_LED_RXLINK | QUAKE_LED_LINK_ACTSTAT);
585 falcon_qt202x_set_led(efx, SFE4002_FAULT_LED, QUAKE_LED_OFF);
Ben Hutchings8ceee662008-04-27 12:55:59 +0100586}
587
Ben Hutchings398468e2009-11-23 16:03:45 +0000588static void sfe4002_set_id_led(struct efx_nic *efx, enum efx_led_mode mode)
Ben Hutchings8ceee662008-04-27 12:55:59 +0100589{
Ben Hutchings398468e2009-11-23 16:03:45 +0000590 falcon_qt202x_set_led(
591 efx, SFE4002_FAULT_LED,
592 (mode == EFX_LED_ON) ? QUAKE_LED_ON : QUAKE_LED_OFF);
Ben Hutchings8ceee662008-04-27 12:55:59 +0100593}
594
Ben Hutchings3e133c42008-11-04 20:34:56 +0000595static int sfe4002_check_hw(struct efx_nic *efx)
596{
597 /* A0 board rev. 4002s report a temperature fault the whole time
598 * (bad sensor) so we mask it out. */
599 unsigned alarm_mask =
600 (efx->board_info.major == 0 && efx->board_info.minor == 0) ?
601 ~LM87_ALARM_TEMP_EXT1 : ~0;
602
603 return efx_check_lm87(efx, alarm_mask);
604}
605
Ben Hutchings8ceee662008-04-27 12:55:59 +0100606static int sfe4002_init(struct efx_nic *efx)
607{
Ben Hutchings3e133c42008-11-04 20:34:56 +0000608 int rc = efx_init_lm87(efx, &sfe4002_hwmon_info, sfe4002_lm87_regs);
609 if (rc)
610 return rc;
611 efx->board_info.monitor = sfe4002_check_hw;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100612 efx->board_info.init_leds = sfe4002_init_leds;
Ben Hutchings8129d212009-02-27 13:08:03 +0000613 efx->board_info.set_id_led = sfe4002_set_id_led;
Ben Hutchings3e133c42008-11-04 20:34:56 +0000614 efx->board_info.fini = efx_fini_lm87;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100615 return 0;
616}
617
Ben Hutchings94f52cd2009-02-27 13:08:18 +0000618/*****************************************************************************
619 * Support for the SFN4112F
620 *
621 */
622static u8 sfn4112f_lm87_channel = 0x03; /* use AIN not FAN inputs */
623
624static const u8 sfn4112f_lm87_regs[] = {
625 LM87_IN_LIMITS(0, 0x83, 0x91), /* 2.5V: 1.8V +/- 5% */
626 LM87_IN_LIMITS(1, 0x51, 0x5a), /* Vccp1: 1.2V +/- 5% */
627 LM87_IN_LIMITS(2, 0xb6, 0xca), /* 3.3V: 3.3V +/- 5% */
628 LM87_IN_LIMITS(4, 0xb0, 0xe0), /* 12V: 11-14V */
629 LM87_IN_LIMITS(5, 0x44, 0x4b), /* Vccp2: 1.0V +/- 5% */
630 LM87_AIN_LIMITS(1, 0x91, 0xa1), /* AIN2: 1.5V +/- 5% */
631 LM87_TEMP_INT_LIMITS(10, 60), /* board */
632 LM87_TEMP_EXT1_LIMITS(10, 70), /* Falcon */
633 0
634};
635
636static struct i2c_board_info sfn4112f_hwmon_info = {
637 I2C_BOARD_INFO("lm87", 0x2e),
638 .platform_data = &sfn4112f_lm87_channel,
Ben Hutchings94f52cd2009-02-27 13:08:18 +0000639};
640
641#define SFN4112F_ACT_LED 0
642#define SFN4112F_LINK_LED 1
643
644static void sfn4112f_init_leds(struct efx_nic *efx)
645{
Ben Hutchingsb37b62f2009-10-23 08:33:42 +0000646 falcon_qt202x_set_led(efx, SFN4112F_ACT_LED,
647 QUAKE_LED_RXLINK | QUAKE_LED_LINK_ACT);
648 falcon_qt202x_set_led(efx, SFN4112F_LINK_LED,
649 QUAKE_LED_RXLINK | QUAKE_LED_LINK_STAT);
Ben Hutchings94f52cd2009-02-27 13:08:18 +0000650}
651
Ben Hutchings398468e2009-11-23 16:03:45 +0000652static void sfn4112f_set_id_led(struct efx_nic *efx, enum efx_led_mode mode)
Ben Hutchings94f52cd2009-02-27 13:08:18 +0000653{
Ben Hutchings398468e2009-11-23 16:03:45 +0000654 int reg;
655
656 switch (mode) {
657 case EFX_LED_OFF:
658 reg = QUAKE_LED_OFF;
659 break;
660 case EFX_LED_ON:
661 reg = QUAKE_LED_ON;
662 break;
663 default:
664 reg = QUAKE_LED_RXLINK | QUAKE_LED_LINK_STAT;
665 break;
666 }
667
668 falcon_qt202x_set_led(efx, SFN4112F_LINK_LED, reg);
Ben Hutchings94f52cd2009-02-27 13:08:18 +0000669}
670
671static int sfn4112f_check_hw(struct efx_nic *efx)
672{
673 /* Mask out unused sensors */
674 return efx_check_lm87(efx, ~0x48);
675}
676
677static int sfn4112f_init(struct efx_nic *efx)
678{
679 int rc = efx_init_lm87(efx, &sfn4112f_hwmon_info, sfn4112f_lm87_regs);
680 if (rc)
681 return rc;
682 efx->board_info.monitor = sfn4112f_check_hw;
683 efx->board_info.init_leds = sfn4112f_init_leds;
684 efx->board_info.set_id_led = sfn4112f_set_id_led;
Ben Hutchings94f52cd2009-02-27 13:08:18 +0000685 efx->board_info.fini = efx_fini_lm87;
686 return 0;
687}
688
Ben Hutchings8ceee662008-04-27 12:55:59 +0100689/* This will get expanded as board-specific details get moved out of the
690 * PHY drivers. */
Ben Hutchings3473a5b2009-10-23 08:29:16 +0000691struct falcon_board_data {
692 u8 type;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100693 const char *ref_model;
694 const char *gen_type;
695 int (*init) (struct efx_nic *nic);
696};
697
Ben Hutchings8ceee662008-04-27 12:55:59 +0100698
Ben Hutchings3473a5b2009-10-23 08:29:16 +0000699static struct falcon_board_data board_data[] = {
700 { FALCON_BOARD_SFE4001, "SFE4001", "10GBASE-T adapter", sfe4001_init },
701 { FALCON_BOARD_SFE4002, "SFE4002", "XFP adapter", sfe4002_init },
702 { FALCON_BOARD_SFN4111T, "SFN4111T", "100/1000/10GBASE-T adapter",
Ben Hutchings6f158d52008-12-12 22:00:49 -0800703 sfn4111t_init },
Ben Hutchings3473a5b2009-10-23 08:29:16 +0000704 { FALCON_BOARD_SFN4112F, "SFN4112F", "SFP+ adapter",
Ben Hutchings94f52cd2009-02-27 13:08:18 +0000705 sfn4112f_init },
Ben Hutchings8ceee662008-04-27 12:55:59 +0100706};
707
Ben Hutchings3473a5b2009-10-23 08:29:16 +0000708void falcon_probe_board(struct efx_nic *efx, u16 revision_info)
Ben Hutchings8ceee662008-04-27 12:55:59 +0100709{
Ben Hutchings3473a5b2009-10-23 08:29:16 +0000710 struct falcon_board_data *data = NULL;
Ben Hutchings04300d22008-12-12 21:48:09 -0800711 int i;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100712
Ben Hutchings3473a5b2009-10-23 08:29:16 +0000713 efx->board_info.type = FALCON_BOARD_TYPE(revision_info);
714 efx->board_info.major = FALCON_BOARD_MAJOR(revision_info);
715 efx->board_info.minor = FALCON_BOARD_MINOR(revision_info);
Ben Hutchings8ceee662008-04-27 12:55:59 +0100716
Ben Hutchings04300d22008-12-12 21:48:09 -0800717 for (i = 0; i < ARRAY_SIZE(board_data); i++)
718 if (board_data[i].type == efx->board_info.type)
719 data = &board_data[i];
Ben Hutchings8ceee662008-04-27 12:55:59 +0100720
Ben Hutchings04300d22008-12-12 21:48:09 -0800721 if (data) {
Ben Hutchings8ceee662008-04-27 12:55:59 +0100722 EFX_INFO(efx, "board is %s rev %c%d\n",
723 (efx->pci_dev->subsystem_vendor == EFX_VENDID_SFC)
724 ? data->ref_model : data->gen_type,
725 'A' + efx->board_info.major, efx->board_info.minor);
Ben Hutchings04300d22008-12-12 21:48:09 -0800726 efx->board_info.init = data->init;
727 } else {
728 EFX_ERR(efx, "unknown board type %d\n", efx->board_info.type);
729 }
Ben Hutchings8ceee662008-04-27 12:55:59 +0100730}