Ilan Peer | 3a6490c | 2012-06-03 13:36:51 +0300 | [diff] [blame^] | 1 | /****************************************************************************** |
| 2 | * |
| 3 | * This file is provided under a dual BSD/GPLv2 license. When using or |
| 4 | * redistributing this file, you may do so under either license. |
| 5 | * |
| 6 | * GPL LICENSE SUMMARY |
| 7 | * |
| 8 | * Copyright(c) 2010 - 2012 Intel Corporation. All rights reserved. |
| 9 | * |
| 10 | * This program is free software; you can redistribute it and/or modify |
| 11 | * it under the terms of version 2 of the GNU General Public License as |
| 12 | * published by the Free Software Foundation. |
| 13 | * |
| 14 | * This program is distributed in the hope that it will be useful, but |
| 15 | * WITHOUT ANY WARRANTY; without even the implied warranty of |
| 16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
| 17 | * General Public License for more details. |
| 18 | * |
| 19 | * You should have received a copy of the GNU General Public License |
| 20 | * along with this program; if not, write to the Free Software |
| 21 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110, |
| 22 | * USA |
| 23 | * |
| 24 | * The full GNU General Public License is included in this distribution |
| 25 | * in the file called LICENSE.GPL. |
| 26 | * |
| 27 | * Contact Information: |
| 28 | * Intel Linux Wireless <ilw@linux.intel.com> |
| 29 | * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 |
| 30 | * |
| 31 | * BSD LICENSE |
| 32 | * |
| 33 | * Copyright(c) 2010 - 2012 Intel Corporation. All rights reserved. |
| 34 | * All rights reserved. |
| 35 | * |
| 36 | * Redistribution and use in source and binary forms, with or without |
| 37 | * modification, are permitted provided that the following conditions |
| 38 | * are met: |
| 39 | * |
| 40 | * * Redistributions of source code must retain the above copyright |
| 41 | * notice, this list of conditions and the following disclaimer. |
| 42 | * * Redistributions in binary form must reproduce the above copyright |
| 43 | * notice, this list of conditions and the following disclaimer in |
| 44 | * the documentation and/or other materials provided with the |
| 45 | * distribution. |
| 46 | * * Neither the name Intel Corporation nor the names of its |
| 47 | * contributors may be used to endorse or promote products derived |
| 48 | * from this software without specific prior written permission. |
| 49 | * |
| 50 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
| 51 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
| 52 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR |
| 53 | * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT |
| 54 | * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, |
| 55 | * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT |
| 56 | * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
| 57 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
| 58 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| 59 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
| 60 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| 61 | * |
| 62 | *****************************************************************************/ |
| 63 | |
| 64 | #include <net/netlink.h> |
| 65 | #include "iwl-io.h" |
| 66 | #include "iwl-fh.h" |
| 67 | #include "iwl-prph.h" |
| 68 | #include "iwl-trans.h" |
| 69 | #include "iwl-test.h" |
| 70 | #include "iwl-csr.h" |
| 71 | #include "iwl-testmode.h" |
| 72 | |
| 73 | /* |
| 74 | * Periphery registers absolute lower bound. This is used in order to |
| 75 | * differentiate registery access through HBUS_TARG_PRPH_* and |
| 76 | * HBUS_TARG_MEM_* accesses. |
| 77 | */ |
| 78 | #define IWL_ABS_PRPH_START (0xA00000) |
| 79 | |
| 80 | /* |
| 81 | * The TLVs used in the gnl message policy between the kernel module and |
| 82 | * user space application. iwl_testmode_gnl_msg_policy is to be carried |
| 83 | * through the NL80211_CMD_TESTMODE channel regulated by nl80211. |
| 84 | * See iwl-testmode.h |
| 85 | */ |
| 86 | static |
| 87 | struct nla_policy iwl_testmode_gnl_msg_policy[IWL_TM_ATTR_MAX] = { |
| 88 | [IWL_TM_ATTR_COMMAND] = { .type = NLA_U32, }, |
| 89 | |
| 90 | [IWL_TM_ATTR_UCODE_CMD_ID] = { .type = NLA_U8, }, |
| 91 | [IWL_TM_ATTR_UCODE_CMD_DATA] = { .type = NLA_UNSPEC, }, |
| 92 | |
| 93 | [IWL_TM_ATTR_REG_OFFSET] = { .type = NLA_U32, }, |
| 94 | [IWL_TM_ATTR_REG_VALUE8] = { .type = NLA_U8, }, |
| 95 | [IWL_TM_ATTR_REG_VALUE32] = { .type = NLA_U32, }, |
| 96 | |
| 97 | [IWL_TM_ATTR_SYNC_RSP] = { .type = NLA_UNSPEC, }, |
| 98 | [IWL_TM_ATTR_UCODE_RX_PKT] = { .type = NLA_UNSPEC, }, |
| 99 | |
| 100 | [IWL_TM_ATTR_EEPROM] = { .type = NLA_UNSPEC, }, |
| 101 | |
| 102 | [IWL_TM_ATTR_TRACE_ADDR] = { .type = NLA_UNSPEC, }, |
| 103 | [IWL_TM_ATTR_TRACE_DUMP] = { .type = NLA_UNSPEC, }, |
| 104 | [IWL_TM_ATTR_TRACE_SIZE] = { .type = NLA_U32, }, |
| 105 | |
| 106 | [IWL_TM_ATTR_FIXRATE] = { .type = NLA_U32, }, |
| 107 | |
| 108 | [IWL_TM_ATTR_UCODE_OWNER] = { .type = NLA_U8, }, |
| 109 | |
| 110 | [IWL_TM_ATTR_MEM_ADDR] = { .type = NLA_U32, }, |
| 111 | [IWL_TM_ATTR_BUFFER_SIZE] = { .type = NLA_U32, }, |
| 112 | [IWL_TM_ATTR_BUFFER_DUMP] = { .type = NLA_UNSPEC, }, |
| 113 | |
| 114 | [IWL_TM_ATTR_FW_VERSION] = { .type = NLA_U32, }, |
| 115 | [IWL_TM_ATTR_DEVICE_ID] = { .type = NLA_U32, }, |
| 116 | [IWL_TM_ATTR_FW_TYPE] = { .type = NLA_U32, }, |
| 117 | [IWL_TM_ATTR_FW_INST_SIZE] = { .type = NLA_U32, }, |
| 118 | [IWL_TM_ATTR_FW_DATA_SIZE] = { .type = NLA_U32, }, |
| 119 | |
| 120 | [IWL_TM_ATTR_ENABLE_NOTIFICATION] = {.type = NLA_FLAG, }, |
| 121 | }; |
| 122 | |
| 123 | static inline void iwl_test_trace_clear(struct iwl_test *tst) |
| 124 | { |
| 125 | memset(&tst->trace, 0, sizeof(struct iwl_test_trace)); |
| 126 | } |
| 127 | |
| 128 | static void iwl_test_trace_stop(struct iwl_test *tst) |
| 129 | { |
| 130 | if (!tst->trace.enabled) |
| 131 | return; |
| 132 | |
| 133 | if (tst->trace.cpu_addr && tst->trace.dma_addr) |
| 134 | dma_free_coherent(tst->trans->dev, |
| 135 | tst->trace.tsize, |
| 136 | tst->trace.cpu_addr, |
| 137 | tst->trace.dma_addr); |
| 138 | |
| 139 | iwl_test_trace_clear(tst); |
| 140 | } |
| 141 | |
| 142 | static inline void iwl_test_mem_clear(struct iwl_test *tst) |
| 143 | { |
| 144 | memset(&tst->mem, 0, sizeof(struct iwl_test_mem)); |
| 145 | } |
| 146 | |
| 147 | static inline void iwl_test_mem_stop(struct iwl_test *tst) |
| 148 | { |
| 149 | if (!tst->mem.in_read) |
| 150 | return; |
| 151 | |
| 152 | iwl_test_mem_clear(tst); |
| 153 | } |
| 154 | |
| 155 | /* |
| 156 | * Initializes the test object |
| 157 | * During the lifetime of the test object it is assumed that the transport is |
| 158 | * started. The test object should be stopped before the transport is stopped. |
| 159 | */ |
| 160 | void iwl_test_init(struct iwl_test *tst, struct iwl_trans *trans, |
| 161 | struct iwl_test_ops *ops) |
| 162 | { |
| 163 | tst->trans = trans; |
| 164 | tst->ops = ops; |
| 165 | |
| 166 | iwl_test_trace_clear(tst); |
| 167 | iwl_test_mem_clear(tst); |
| 168 | } |
| 169 | EXPORT_SYMBOL_GPL(iwl_test_init); |
| 170 | |
| 171 | /* |
| 172 | * Stop the test object |
| 173 | */ |
| 174 | void iwl_test_free(struct iwl_test *tst) |
| 175 | { |
| 176 | iwl_test_mem_stop(tst); |
| 177 | iwl_test_trace_stop(tst); |
| 178 | } |
| 179 | EXPORT_SYMBOL_GPL(iwl_test_free); |
| 180 | |
| 181 | /* |
| 182 | * This function handles the user application commands to the fw. The fw |
| 183 | * commands are sent in a synchronuous manner. In case that the user requested |
| 184 | * to get commands response, it is send to the user. |
| 185 | */ |
| 186 | static int iwl_test_fw_cmd(struct iwl_test *tst, struct ieee80211_hw *hw, |
| 187 | struct nlattr **tb) |
| 188 | { |
| 189 | struct iwl_host_cmd cmd; |
| 190 | struct iwl_rx_packet *pkt; |
| 191 | struct sk_buff *skb; |
| 192 | void *reply_buf; |
| 193 | u32 reply_len; |
| 194 | int ret; |
| 195 | bool cmd_want_skb; |
| 196 | |
| 197 | memset(&cmd, 0, sizeof(struct iwl_host_cmd)); |
| 198 | |
| 199 | if (!tb[IWL_TM_ATTR_UCODE_CMD_ID] || |
| 200 | !tb[IWL_TM_ATTR_UCODE_CMD_DATA]) { |
| 201 | IWL_ERR(tst->trans, "Missing fw command mandatory fields\n"); |
| 202 | return -ENOMSG; |
| 203 | } |
| 204 | |
| 205 | cmd.flags = CMD_ON_DEMAND | CMD_SYNC; |
| 206 | cmd_want_skb = nla_get_flag(tb[IWL_TM_ATTR_UCODE_CMD_SKB]); |
| 207 | if (cmd_want_skb) |
| 208 | cmd.flags |= CMD_WANT_SKB; |
| 209 | |
| 210 | cmd.id = nla_get_u8(tb[IWL_TM_ATTR_UCODE_CMD_ID]); |
| 211 | cmd.data[0] = nla_data(tb[IWL_TM_ATTR_UCODE_CMD_DATA]); |
| 212 | cmd.len[0] = nla_len(tb[IWL_TM_ATTR_UCODE_CMD_DATA]); |
| 213 | cmd.dataflags[0] = IWL_HCMD_DFL_NOCOPY; |
| 214 | IWL_DEBUG_INFO(tst->trans, "test fw cmd=0x%x, flags 0x%x, len %d\n", |
| 215 | cmd.id, cmd.flags, cmd.len[0]); |
| 216 | |
| 217 | ret = tst->ops->send_cmd(tst->trans->op_mode, &cmd); |
| 218 | if (ret) { |
| 219 | IWL_ERR(tst->trans, "Failed to send hcmd\n"); |
| 220 | return ret; |
| 221 | } |
| 222 | if (!cmd_want_skb) |
| 223 | return ret; |
| 224 | |
| 225 | /* Handling return of SKB to the user */ |
| 226 | pkt = cmd.resp_pkt; |
| 227 | if (!pkt) { |
| 228 | IWL_ERR(tst->trans, "HCMD received a null response packet\n"); |
| 229 | return ret; |
| 230 | } |
| 231 | |
| 232 | reply_len = le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK; |
| 233 | skb = cfg80211_testmode_alloc_reply_skb(hw->wiphy, reply_len + 20); |
| 234 | reply_buf = kmalloc(reply_len, GFP_KERNEL); |
| 235 | if (!skb || !reply_buf) { |
| 236 | kfree_skb(skb); |
| 237 | kfree(reply_buf); |
| 238 | return -ENOMEM; |
| 239 | } |
| 240 | |
| 241 | /* The reply is in a page, that we cannot send to user space. */ |
| 242 | memcpy(reply_buf, &(pkt->hdr), reply_len); |
| 243 | iwl_free_resp(&cmd); |
| 244 | |
| 245 | if (nla_put_u32(skb, IWL_TM_ATTR_COMMAND, |
| 246 | IWL_TM_CMD_DEV2APP_UCODE_RX_PKT) || |
| 247 | nla_put(skb, IWL_TM_ATTR_UCODE_RX_PKT, reply_len, reply_buf)) |
| 248 | goto nla_put_failure; |
| 249 | return cfg80211_testmode_reply(skb); |
| 250 | |
| 251 | nla_put_failure: |
| 252 | IWL_DEBUG_INFO(tst->trans, "Failed creating NL attributes\n"); |
| 253 | kfree(reply_buf); |
| 254 | kfree_skb(skb); |
| 255 | return -ENOMSG; |
| 256 | } |
| 257 | |
| 258 | /* |
| 259 | * Handles the user application commands for register access. |
| 260 | */ |
| 261 | static int iwl_test_reg(struct iwl_test *tst, struct ieee80211_hw *hw, |
| 262 | struct nlattr **tb) |
| 263 | { |
| 264 | u32 ofs, val32, cmd; |
| 265 | u8 val8; |
| 266 | struct sk_buff *skb; |
| 267 | int status = 0; |
| 268 | struct iwl_trans *trans = tst->trans; |
| 269 | |
| 270 | if (!tb[IWL_TM_ATTR_REG_OFFSET]) { |
| 271 | IWL_ERR(trans, "Missing reg offset\n"); |
| 272 | return -ENOMSG; |
| 273 | } |
| 274 | |
| 275 | ofs = nla_get_u32(tb[IWL_TM_ATTR_REG_OFFSET]); |
| 276 | IWL_DEBUG_INFO(trans, "test reg access cmd offset=0x%x\n", ofs); |
| 277 | |
| 278 | cmd = nla_get_u32(tb[IWL_TM_ATTR_COMMAND]); |
| 279 | |
| 280 | /* |
| 281 | * Allow access only to FH/CSR/HBUS in direct mode. |
| 282 | * Since we don't have the upper bounds for the CSR and HBUS segments, |
| 283 | * we will use only the upper bound of FH for sanity check. |
| 284 | */ |
| 285 | if (ofs >= FH_MEM_UPPER_BOUND) { |
| 286 | IWL_ERR(trans, "offset out of segment (0x0 - 0x%x)\n", |
| 287 | FH_MEM_UPPER_BOUND); |
| 288 | return -EINVAL; |
| 289 | } |
| 290 | |
| 291 | switch (cmd) { |
| 292 | case IWL_TM_CMD_APP2DEV_DIRECT_REG_READ32: |
| 293 | val32 = iwl_read_direct32(tst->trans, ofs); |
| 294 | IWL_DEBUG_INFO(trans, "32 value to read 0x%x\n", val32); |
| 295 | |
| 296 | skb = cfg80211_testmode_alloc_reply_skb(hw->wiphy, 20); |
| 297 | if (!skb) { |
| 298 | IWL_ERR(trans, "Memory allocation fail\n"); |
| 299 | return -ENOMEM; |
| 300 | } |
| 301 | if (nla_put_u32(skb, IWL_TM_ATTR_REG_VALUE32, val32)) |
| 302 | goto nla_put_failure; |
| 303 | status = cfg80211_testmode_reply(skb); |
| 304 | if (status < 0) |
| 305 | IWL_ERR(trans, "Error sending msg : %d\n", status); |
| 306 | break; |
| 307 | |
| 308 | case IWL_TM_CMD_APP2DEV_DIRECT_REG_WRITE32: |
| 309 | if (!tb[IWL_TM_ATTR_REG_VALUE32]) { |
| 310 | IWL_ERR(trans, "Missing value to write\n"); |
| 311 | return -ENOMSG; |
| 312 | } else { |
| 313 | val32 = nla_get_u32(tb[IWL_TM_ATTR_REG_VALUE32]); |
| 314 | IWL_DEBUG_INFO(trans, "32b write val=0x%x\n", val32); |
| 315 | iwl_write_direct32(tst->trans, ofs, val32); |
| 316 | } |
| 317 | break; |
| 318 | |
| 319 | case IWL_TM_CMD_APP2DEV_DIRECT_REG_WRITE8: |
| 320 | if (!tb[IWL_TM_ATTR_REG_VALUE8]) { |
| 321 | IWL_ERR(trans, "Missing value to write\n"); |
| 322 | return -ENOMSG; |
| 323 | } else { |
| 324 | val8 = nla_get_u8(tb[IWL_TM_ATTR_REG_VALUE8]); |
| 325 | IWL_DEBUG_INFO(trans, "8b write val=0x%x\n", val8); |
| 326 | iwl_write8(tst->trans, ofs, val8); |
| 327 | } |
| 328 | break; |
| 329 | |
| 330 | default: |
| 331 | IWL_ERR(trans, "Unknown test register cmd ID\n"); |
| 332 | return -ENOMSG; |
| 333 | } |
| 334 | |
| 335 | return status; |
| 336 | |
| 337 | nla_put_failure: |
| 338 | kfree_skb(skb); |
| 339 | return -EMSGSIZE; |
| 340 | } |
| 341 | |
| 342 | /* |
| 343 | * Handles the request to start FW tracing. Allocates of the trace buffer |
| 344 | * and sends a reply to user space with the address of the allocated buffer. |
| 345 | */ |
| 346 | static int iwl_test_trace_begin(struct iwl_test *tst, struct ieee80211_hw *hw, |
| 347 | struct nlattr **tb) |
| 348 | { |
| 349 | struct sk_buff *skb; |
| 350 | int status = 0; |
| 351 | |
| 352 | if (tst->trace.enabled) |
| 353 | return -EBUSY; |
| 354 | |
| 355 | if (!tb[IWL_TM_ATTR_TRACE_SIZE]) |
| 356 | tst->trace.size = TRACE_BUFF_SIZE_DEF; |
| 357 | else |
| 358 | tst->trace.size = |
| 359 | nla_get_u32(tb[IWL_TM_ATTR_TRACE_SIZE]); |
| 360 | |
| 361 | if (!tst->trace.size) |
| 362 | return -EINVAL; |
| 363 | |
| 364 | if (tst->trace.size < TRACE_BUFF_SIZE_MIN || |
| 365 | tst->trace.size > TRACE_BUFF_SIZE_MAX) |
| 366 | return -EINVAL; |
| 367 | |
| 368 | tst->trace.tsize = tst->trace.size + TRACE_BUFF_PADD; |
| 369 | tst->trace.cpu_addr = dma_alloc_coherent(tst->trans->dev, |
| 370 | tst->trace.tsize, |
| 371 | &tst->trace.dma_addr, |
| 372 | GFP_KERNEL); |
| 373 | if (!tst->trace.cpu_addr) |
| 374 | return -ENOMEM; |
| 375 | |
| 376 | tst->trace.enabled = true; |
| 377 | tst->trace.trace_addr = (u8 *)PTR_ALIGN(tst->trace.cpu_addr, 0x100); |
| 378 | |
| 379 | memset(tst->trace.trace_addr, 0x03B, tst->trace.size); |
| 380 | |
| 381 | skb = cfg80211_testmode_alloc_reply_skb(hw->wiphy, |
| 382 | sizeof(tst->trace.dma_addr) + 20); |
| 383 | |
| 384 | if (!skb) { |
| 385 | IWL_ERR(tst->trans, "Memory allocation fail\n"); |
| 386 | iwl_test_trace_stop(tst); |
| 387 | return -ENOMEM; |
| 388 | } |
| 389 | |
| 390 | if (nla_put(skb, IWL_TM_ATTR_TRACE_ADDR, |
| 391 | sizeof(tst->trace.dma_addr), |
| 392 | (u64 *)&tst->trace.dma_addr)) |
| 393 | goto nla_put_failure; |
| 394 | |
| 395 | status = cfg80211_testmode_reply(skb); |
| 396 | if (status < 0) |
| 397 | IWL_ERR(tst->trans, "Error sending msg : %d\n", status); |
| 398 | |
| 399 | tst->trace.nchunks = DIV_ROUND_UP(tst->trace.size, |
| 400 | DUMP_CHUNK_SIZE); |
| 401 | |
| 402 | return status; |
| 403 | |
| 404 | nla_put_failure: |
| 405 | kfree_skb(skb); |
| 406 | if (nla_get_u32(tb[IWL_TM_ATTR_COMMAND]) == |
| 407 | IWL_TM_CMD_APP2DEV_BEGIN_TRACE) |
| 408 | iwl_test_trace_stop(tst); |
| 409 | return -EMSGSIZE; |
| 410 | } |
| 411 | |
| 412 | /* |
| 413 | * Handles indirect read from the periphery or the SRAM. The read is performed |
| 414 | * to a temporary buffer. The user space application should later issue a dump |
| 415 | */ |
| 416 | static int iwl_test_indirect_read(struct iwl_test *tst, u32 addr, u32 size) |
| 417 | { |
| 418 | struct iwl_trans *trans = tst->trans; |
| 419 | unsigned long flags; |
| 420 | int i; |
| 421 | |
| 422 | if (size & 0x3) |
| 423 | return -EINVAL; |
| 424 | |
| 425 | tst->mem.size = size; |
| 426 | tst->mem.addr = kmalloc(tst->mem.size, GFP_KERNEL); |
| 427 | if (tst->mem.addr == NULL) |
| 428 | return -ENOMEM; |
| 429 | |
| 430 | /* Hard-coded periphery absolute address */ |
| 431 | if (IWL_ABS_PRPH_START <= addr && |
| 432 | addr < IWL_ABS_PRPH_START + PRPH_END) { |
| 433 | spin_lock_irqsave(&trans->reg_lock, flags); |
| 434 | iwl_grab_nic_access(trans); |
| 435 | iwl_write32(trans, HBUS_TARG_PRPH_RADDR, |
| 436 | addr | (3 << 24)); |
| 437 | for (i = 0; i < size; i += 4) |
| 438 | *(u32 *)(tst->mem.addr + i) = |
| 439 | iwl_read32(trans, HBUS_TARG_PRPH_RDAT); |
| 440 | iwl_release_nic_access(trans); |
| 441 | spin_unlock_irqrestore(&trans->reg_lock, flags); |
| 442 | } else { /* target memory (SRAM) */ |
| 443 | _iwl_read_targ_mem_words(trans, addr, |
| 444 | tst->mem.addr, |
| 445 | tst->mem.size / 4); |
| 446 | } |
| 447 | |
| 448 | tst->mem.nchunks = |
| 449 | DIV_ROUND_UP(tst->mem.size, DUMP_CHUNK_SIZE); |
| 450 | tst->mem.in_read = true; |
| 451 | return 0; |
| 452 | |
| 453 | } |
| 454 | |
| 455 | /* |
| 456 | * Handles indirect write to the periphery or SRAM. The is performed to a |
| 457 | * temporary buffer. |
| 458 | */ |
| 459 | static int iwl_test_indirect_write(struct iwl_test *tst, u32 addr, |
| 460 | u32 size, unsigned char *buf) |
| 461 | { |
| 462 | struct iwl_trans *trans = tst->trans; |
| 463 | u32 val, i; |
| 464 | unsigned long flags; |
| 465 | |
| 466 | if (IWL_ABS_PRPH_START <= addr && |
| 467 | addr < IWL_ABS_PRPH_START + PRPH_END) { |
| 468 | /* Periphery writes can be 1-3 bytes long, or DWORDs */ |
| 469 | if (size < 4) { |
| 470 | memcpy(&val, buf, size); |
| 471 | spin_lock_irqsave(&trans->reg_lock, flags); |
| 472 | iwl_grab_nic_access(trans); |
| 473 | iwl_write32(trans, HBUS_TARG_PRPH_WADDR, |
| 474 | (addr & 0x0000FFFF) | |
| 475 | ((size - 1) << 24)); |
| 476 | iwl_write32(trans, HBUS_TARG_PRPH_WDAT, val); |
| 477 | iwl_release_nic_access(trans); |
| 478 | /* needed after consecutive writes w/o read */ |
| 479 | mmiowb(); |
| 480 | spin_unlock_irqrestore(&trans->reg_lock, flags); |
| 481 | } else { |
| 482 | if (size % 4) |
| 483 | return -EINVAL; |
| 484 | for (i = 0; i < size; i += 4) |
| 485 | iwl_write_prph(trans, addr+i, |
| 486 | *(u32 *)(buf+i)); |
| 487 | } |
| 488 | } else if (tst->ops->valid_hw_addr(addr)) { |
| 489 | _iwl_write_targ_mem_words(trans, addr, buf, size/4); |
| 490 | } else { |
| 491 | return -EINVAL; |
| 492 | } |
| 493 | return 0; |
| 494 | } |
| 495 | |
| 496 | /* |
| 497 | * Handles the user application commands for indirect read/write |
| 498 | * to/from the periphery or the SRAM. |
| 499 | */ |
| 500 | static int iwl_test_indirect_mem(struct iwl_test *tst, struct nlattr **tb) |
| 501 | { |
| 502 | u32 addr, size, cmd; |
| 503 | unsigned char *buf; |
| 504 | |
| 505 | /* Both read and write should be blocked, for atomicity */ |
| 506 | if (tst->mem.in_read) |
| 507 | return -EBUSY; |
| 508 | |
| 509 | cmd = nla_get_u32(tb[IWL_TM_ATTR_COMMAND]); |
| 510 | if (!tb[IWL_TM_ATTR_MEM_ADDR]) { |
| 511 | IWL_ERR(tst->trans, "Error finding memory offset address\n"); |
| 512 | return -ENOMSG; |
| 513 | } |
| 514 | addr = nla_get_u32(tb[IWL_TM_ATTR_MEM_ADDR]); |
| 515 | if (!tb[IWL_TM_ATTR_BUFFER_SIZE]) { |
| 516 | IWL_ERR(tst->trans, "Error finding size for memory reading\n"); |
| 517 | return -ENOMSG; |
| 518 | } |
| 519 | size = nla_get_u32(tb[IWL_TM_ATTR_BUFFER_SIZE]); |
| 520 | |
| 521 | if (cmd == IWL_TM_CMD_APP2DEV_INDIRECT_BUFFER_READ) { |
| 522 | return iwl_test_indirect_read(tst, addr, size); |
| 523 | } else { |
| 524 | if (!tb[IWL_TM_ATTR_BUFFER_DUMP]) |
| 525 | return -EINVAL; |
| 526 | buf = (unsigned char *)nla_data(tb[IWL_TM_ATTR_BUFFER_DUMP]); |
| 527 | return iwl_test_indirect_write(tst, addr, size, buf); |
| 528 | } |
| 529 | } |
| 530 | |
| 531 | /* |
| 532 | * Enable notifications to user space |
| 533 | */ |
| 534 | static int iwl_test_notifications(struct iwl_test *tst, |
| 535 | struct nlattr **tb) |
| 536 | { |
| 537 | tst->notify = nla_get_flag(tb[IWL_TM_ATTR_ENABLE_NOTIFICATION]); |
| 538 | return 0; |
| 539 | } |
| 540 | |
| 541 | /* |
| 542 | * Handles the request to get the device id |
| 543 | */ |
| 544 | static int iwl_test_get_dev_id(struct iwl_test *tst, struct ieee80211_hw *hw, |
| 545 | struct nlattr **tb) |
| 546 | { |
| 547 | u32 devid = tst->trans->hw_id; |
| 548 | struct sk_buff *skb; |
| 549 | int status; |
| 550 | |
| 551 | IWL_DEBUG_INFO(tst->trans, "hw version: 0x%x\n", devid); |
| 552 | |
| 553 | skb = cfg80211_testmode_alloc_reply_skb(hw->wiphy, 20); |
| 554 | if (!skb) { |
| 555 | IWL_ERR(tst->trans, "Memory allocation fail\n"); |
| 556 | return -ENOMEM; |
| 557 | } |
| 558 | |
| 559 | if (nla_put_u32(skb, IWL_TM_ATTR_DEVICE_ID, devid)) |
| 560 | goto nla_put_failure; |
| 561 | status = cfg80211_testmode_reply(skb); |
| 562 | if (status < 0) |
| 563 | IWL_ERR(tst->trans, "Error sending msg : %d\n", status); |
| 564 | |
| 565 | return 0; |
| 566 | |
| 567 | nla_put_failure: |
| 568 | kfree_skb(skb); |
| 569 | return -EMSGSIZE; |
| 570 | } |
| 571 | |
| 572 | /* |
| 573 | * Handles the request to get the FW version |
| 574 | */ |
| 575 | static int iwl_test_get_fw_ver(struct iwl_test *tst, struct ieee80211_hw *hw, |
| 576 | struct nlattr **tb) |
| 577 | { |
| 578 | struct sk_buff *skb; |
| 579 | int status; |
| 580 | u32 ver = tst->ops->get_fw_ver(tst->trans->op_mode); |
| 581 | |
| 582 | IWL_DEBUG_INFO(tst->trans, "uCode version raw: 0x%x\n", ver); |
| 583 | |
| 584 | skb = cfg80211_testmode_alloc_reply_skb(hw->wiphy, 20); |
| 585 | if (!skb) { |
| 586 | IWL_ERR(tst->trans, "Memory allocation fail\n"); |
| 587 | return -ENOMEM; |
| 588 | } |
| 589 | |
| 590 | if (nla_put_u32(skb, IWL_TM_ATTR_FW_VERSION, ver)) |
| 591 | goto nla_put_failure; |
| 592 | |
| 593 | status = cfg80211_testmode_reply(skb); |
| 594 | if (status < 0) |
| 595 | IWL_ERR(tst->trans, "Error sending msg : %d\n", status); |
| 596 | |
| 597 | return 0; |
| 598 | |
| 599 | nla_put_failure: |
| 600 | kfree_skb(skb); |
| 601 | return -EMSGSIZE; |
| 602 | } |
| 603 | |
| 604 | /* |
| 605 | * Parse the netlink message and validate that the IWL_TM_ATTR_CMD exists |
| 606 | */ |
| 607 | int iwl_test_parse(struct iwl_test *tst, struct nlattr **tb, |
| 608 | void *data, int len) |
| 609 | { |
| 610 | int result; |
| 611 | |
| 612 | result = nla_parse(tb, IWL_TM_ATTR_MAX - 1, data, len, |
| 613 | iwl_testmode_gnl_msg_policy); |
| 614 | if (result) { |
| 615 | IWL_ERR(tst->trans, "Fail parse gnl msg: %d\n", result); |
| 616 | return result; |
| 617 | } |
| 618 | |
| 619 | /* IWL_TM_ATTR_COMMAND is absolutely mandatory */ |
| 620 | if (!tb[IWL_TM_ATTR_COMMAND]) { |
| 621 | IWL_ERR(tst->trans, "Missing testmode command type\n"); |
| 622 | return -ENOMSG; |
| 623 | } |
| 624 | return 0; |
| 625 | } |
| 626 | EXPORT_SYMBOL_GPL(iwl_test_parse); |
| 627 | |
| 628 | /* |
| 629 | * Handle test commands. |
| 630 | * Returns 1 for unknown commands (not handled by the test object); negative |
| 631 | * value in case of error. |
| 632 | */ |
| 633 | int iwl_test_handle_cmd(struct iwl_test *tst, struct ieee80211_hw *hw, |
| 634 | struct nlattr **tb) |
| 635 | { |
| 636 | int result; |
| 637 | |
| 638 | switch (nla_get_u32(tb[IWL_TM_ATTR_COMMAND])) { |
| 639 | case IWL_TM_CMD_APP2DEV_UCODE: |
| 640 | IWL_DEBUG_INFO(tst->trans, "test cmd to uCode\n"); |
| 641 | result = iwl_test_fw_cmd(tst, hw, tb); |
| 642 | break; |
| 643 | |
| 644 | case IWL_TM_CMD_APP2DEV_DIRECT_REG_READ32: |
| 645 | case IWL_TM_CMD_APP2DEV_DIRECT_REG_WRITE32: |
| 646 | case IWL_TM_CMD_APP2DEV_DIRECT_REG_WRITE8: |
| 647 | IWL_DEBUG_INFO(tst->trans, "test cmd to register\n"); |
| 648 | result = iwl_test_reg(tst, hw, tb); |
| 649 | break; |
| 650 | |
| 651 | case IWL_TM_CMD_APP2DEV_BEGIN_TRACE: |
| 652 | IWL_DEBUG_INFO(tst->trans, "test uCode trace cmd to driver\n"); |
| 653 | result = iwl_test_trace_begin(tst, hw, tb); |
| 654 | break; |
| 655 | |
| 656 | case IWL_TM_CMD_APP2DEV_END_TRACE: |
| 657 | iwl_test_trace_stop(tst); |
| 658 | result = 0; |
| 659 | break; |
| 660 | |
| 661 | case IWL_TM_CMD_APP2DEV_INDIRECT_BUFFER_READ: |
| 662 | case IWL_TM_CMD_APP2DEV_INDIRECT_BUFFER_WRITE: |
| 663 | IWL_DEBUG_INFO(tst->trans, "test indirect memory cmd\n"); |
| 664 | result = iwl_test_indirect_mem(tst, tb); |
| 665 | break; |
| 666 | |
| 667 | case IWL_TM_CMD_APP2DEV_NOTIFICATIONS: |
| 668 | IWL_DEBUG_INFO(tst->trans, "test notifications cmd\n"); |
| 669 | result = iwl_test_notifications(tst, tb); |
| 670 | break; |
| 671 | |
| 672 | case IWL_TM_CMD_APP2DEV_GET_FW_VERSION: |
| 673 | IWL_DEBUG_INFO(tst->trans, "test get FW ver cmd\n"); |
| 674 | result = iwl_test_get_fw_ver(tst, hw, tb); |
| 675 | break; |
| 676 | |
| 677 | case IWL_TM_CMD_APP2DEV_GET_DEVICE_ID: |
| 678 | IWL_DEBUG_INFO(tst->trans, "test Get device ID cmd\n"); |
| 679 | result = iwl_test_get_dev_id(tst, hw, tb); |
| 680 | break; |
| 681 | |
| 682 | default: |
| 683 | IWL_DEBUG_INFO(tst->trans, "Unknown test command\n"); |
| 684 | result = 1; |
| 685 | break; |
| 686 | } |
| 687 | return result; |
| 688 | } |
| 689 | EXPORT_SYMBOL_GPL(iwl_test_handle_cmd); |
| 690 | |
| 691 | static int iwl_test_trace_dump(struct iwl_test *tst, struct sk_buff *skb, |
| 692 | struct netlink_callback *cb) |
| 693 | { |
| 694 | int idx, length; |
| 695 | |
| 696 | if (!tst->trace.enabled || !tst->trace.trace_addr) |
| 697 | return -EFAULT; |
| 698 | |
| 699 | idx = cb->args[4]; |
| 700 | if (idx >= tst->trace.nchunks) |
| 701 | return -ENOENT; |
| 702 | |
| 703 | length = DUMP_CHUNK_SIZE; |
| 704 | if (((idx + 1) == tst->trace.nchunks) && |
| 705 | (tst->trace.size % DUMP_CHUNK_SIZE)) |
| 706 | length = tst->trace.size % |
| 707 | DUMP_CHUNK_SIZE; |
| 708 | |
| 709 | if (nla_put(skb, IWL_TM_ATTR_TRACE_DUMP, length, |
| 710 | tst->trace.trace_addr + (DUMP_CHUNK_SIZE * idx))) |
| 711 | goto nla_put_failure; |
| 712 | |
| 713 | cb->args[4] = ++idx; |
| 714 | return 0; |
| 715 | |
| 716 | nla_put_failure: |
| 717 | return -ENOBUFS; |
| 718 | } |
| 719 | |
| 720 | static int iwl_test_buffer_dump(struct iwl_test *tst, struct sk_buff *skb, |
| 721 | struct netlink_callback *cb) |
| 722 | { |
| 723 | int idx, length; |
| 724 | |
| 725 | if (!tst->mem.in_read) |
| 726 | return -EFAULT; |
| 727 | |
| 728 | idx = cb->args[4]; |
| 729 | if (idx >= tst->mem.nchunks) { |
| 730 | iwl_test_mem_stop(tst); |
| 731 | return -ENOENT; |
| 732 | } |
| 733 | |
| 734 | length = DUMP_CHUNK_SIZE; |
| 735 | if (((idx + 1) == tst->mem.nchunks) && |
| 736 | (tst->mem.size % DUMP_CHUNK_SIZE)) |
| 737 | length = tst->mem.size % DUMP_CHUNK_SIZE; |
| 738 | |
| 739 | if (nla_put(skb, IWL_TM_ATTR_BUFFER_DUMP, length, |
| 740 | tst->mem.addr + (DUMP_CHUNK_SIZE * idx))) |
| 741 | goto nla_put_failure; |
| 742 | |
| 743 | cb->args[4] = ++idx; |
| 744 | return 0; |
| 745 | |
| 746 | nla_put_failure: |
| 747 | return -ENOBUFS; |
| 748 | } |
| 749 | |
| 750 | /* |
| 751 | * Handle dump commands. |
| 752 | * Returns 1 for unknown commands (not handled by the test object); negative |
| 753 | * value in case of error. |
| 754 | */ |
| 755 | int iwl_test_dump(struct iwl_test *tst, u32 cmd, struct sk_buff *skb, |
| 756 | struct netlink_callback *cb) |
| 757 | { |
| 758 | int result; |
| 759 | |
| 760 | switch (cmd) { |
| 761 | case IWL_TM_CMD_APP2DEV_READ_TRACE: |
| 762 | IWL_DEBUG_INFO(tst->trans, "uCode trace cmd\n"); |
| 763 | result = iwl_test_trace_dump(tst, skb, cb); |
| 764 | break; |
| 765 | |
| 766 | case IWL_TM_CMD_APP2DEV_INDIRECT_BUFFER_DUMP: |
| 767 | IWL_DEBUG_INFO(tst->trans, "testmode sram dump cmd\n"); |
| 768 | result = iwl_test_buffer_dump(tst, skb, cb); |
| 769 | break; |
| 770 | |
| 771 | default: |
| 772 | result = 1; |
| 773 | break; |
| 774 | } |
| 775 | return result; |
| 776 | } |
| 777 | EXPORT_SYMBOL_GPL(iwl_test_dump); |
| 778 | |
| 779 | /* |
| 780 | * Multicast a spontaneous messages from the device to the user space. |
| 781 | */ |
| 782 | static void iwl_test_send_rx(struct iwl_test *tst, struct ieee80211_hw *hw, |
| 783 | struct iwl_rx_cmd_buffer *rxb) |
| 784 | { |
| 785 | struct sk_buff *skb; |
| 786 | struct iwl_rx_packet *data; |
| 787 | int length; |
| 788 | |
| 789 | data = rxb_addr(rxb); |
| 790 | length = le32_to_cpu(data->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK; |
| 791 | |
| 792 | /* the length doesn't include len_n_flags field, so add it manually */ |
| 793 | length += sizeof(__le32); |
| 794 | |
| 795 | skb = cfg80211_testmode_alloc_event_skb(hw->wiphy, 20 + length, |
| 796 | GFP_ATOMIC); |
| 797 | if (skb == NULL) { |
| 798 | IWL_ERR(tst->trans, "Out of memory for message to user\n"); |
| 799 | return; |
| 800 | } |
| 801 | |
| 802 | if (nla_put_u32(skb, IWL_TM_ATTR_COMMAND, |
| 803 | IWL_TM_CMD_DEV2APP_UCODE_RX_PKT) || |
| 804 | nla_put(skb, IWL_TM_ATTR_UCODE_RX_PKT, length, data)) |
| 805 | goto nla_put_failure; |
| 806 | |
| 807 | cfg80211_testmode_event(skb, GFP_ATOMIC); |
| 808 | return; |
| 809 | |
| 810 | nla_put_failure: |
| 811 | kfree_skb(skb); |
| 812 | IWL_ERR(tst->trans, "Ouch, overran buffer, check allocation!\n"); |
| 813 | } |
| 814 | |
| 815 | /* |
| 816 | * Called whenever a Rx frames is recevied from the device. If notifications to |
| 817 | * the user space are requested, sends the frames to the user. |
| 818 | */ |
| 819 | void iwl_test_rx(struct iwl_test *tst, struct ieee80211_hw *hw, |
| 820 | struct iwl_rx_cmd_buffer *rxb) |
| 821 | { |
| 822 | if (tst->notify) |
| 823 | iwl_test_send_rx(tst, hw, rxb); |
| 824 | } |
| 825 | EXPORT_SYMBOL_GPL(iwl_test_rx); |