blob: c30f5aa392c6aea25c35f8c0b9710006fd19894d [file] [log] [blame]
Mark Brownf2644a22009-04-07 19:20:14 +01001/*
2 * wm8960.c -- WM8960 ALSA SoC Audio driver
3 *
Mark Brown656baae2012-05-23 12:39:07 +01004 * Copyright 2007-11 Wolfson Microelectronics, plc
5 *
Mark Brownf2644a22009-04-07 19:20:14 +01006 * Author: Liam Girdwood
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13#include <linux/module.h>
14#include <linux/moduleparam.h>
15#include <linux/init.h>
16#include <linux/delay.h>
17#include <linux/pm.h>
Zidan Wang75aa8862015-01-07 15:31:44 +080018#include <linux/clk.h>
Mark Brownf2644a22009-04-07 19:20:14 +010019#include <linux/i2c.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090020#include <linux/slab.h>
Mark Brownf2644a22009-04-07 19:20:14 +010021#include <sound/core.h>
22#include <sound/pcm.h>
23#include <sound/pcm_params.h>
24#include <sound/soc.h>
Mark Brownf2644a22009-04-07 19:20:14 +010025#include <sound/initval.h>
26#include <sound/tlv.h>
Mark Brownb6877a42010-03-03 11:43:38 +000027#include <sound/wm8960.h>
Mark Brownf2644a22009-04-07 19:20:14 +010028
29#include "wm8960.h"
30
Mark Brownf2644a22009-04-07 19:20:14 +010031/* R25 - Power 1 */
Mark Brown913d7b42010-03-03 13:47:03 +000032#define WM8960_VMID_MASK 0x180
Mark Brownf2644a22009-04-07 19:20:14 +010033#define WM8960_VREF 0x40
34
Mark Brown913d7b42010-03-03 13:47:03 +000035/* R26 - Power 2 */
36#define WM8960_PWR2_LOUT1 0x40
37#define WM8960_PWR2_ROUT1 0x20
38#define WM8960_PWR2_OUT3 0x02
39
Mark Brownf2644a22009-04-07 19:20:14 +010040/* R28 - Anti-pop 1 */
41#define WM8960_POBCTRL 0x80
42#define WM8960_BUFDCOPEN 0x10
43#define WM8960_BUFIOEN 0x08
44#define WM8960_SOFT_ST 0x04
45#define WM8960_HPSTBY 0x01
46
47/* R29 - Anti-pop 2 */
48#define WM8960_DISOP 0x40
Mark Brown913d7b42010-03-03 13:47:03 +000049#define WM8960_DRES_MASK 0x30
Mark Brownf2644a22009-04-07 19:20:14 +010050
Zidan Wang3176bf22015-08-11 19:25:15 +080051static bool is_pll_freq_available(unsigned int source, unsigned int target);
Kuninori Morimotoe075fc12018-01-29 03:05:45 +000052static int wm8960_set_pll(struct snd_soc_component *component,
Zidan Wang3176bf22015-08-11 19:25:15 +080053 unsigned int freq_in, unsigned int freq_out);
Mark Brownf2644a22009-04-07 19:20:14 +010054/*
55 * wm8960 register cache
56 * We can't read the WM8960 register space when we are
57 * using 2 wire for device control, so we cache them instead.
58 */
Mark Brown0ebe36c2012-09-10 19:23:57 +080059static const struct reg_default wm8960_reg_defaults[] = {
Mark Brownb3df0262013-02-26 23:35:46 +000060 { 0x0, 0x00a7 },
61 { 0x1, 0x00a7 },
Mark Brown0ebe36c2012-09-10 19:23:57 +080062 { 0x2, 0x0000 },
63 { 0x3, 0x0000 },
64 { 0x4, 0x0000 },
65 { 0x5, 0x0008 },
66 { 0x6, 0x0000 },
67 { 0x7, 0x000a },
68 { 0x8, 0x01c0 },
69 { 0x9, 0x0000 },
70 { 0xa, 0x00ff },
71 { 0xb, 0x00ff },
72
73 { 0x10, 0x0000 },
74 { 0x11, 0x007b },
75 { 0x12, 0x0100 },
76 { 0x13, 0x0032 },
77 { 0x14, 0x0000 },
78 { 0x15, 0x00c3 },
79 { 0x16, 0x00c3 },
80 { 0x17, 0x01c0 },
81 { 0x18, 0x0000 },
82 { 0x19, 0x0000 },
83 { 0x1a, 0x0000 },
84 { 0x1b, 0x0000 },
85 { 0x1c, 0x0000 },
86 { 0x1d, 0x0000 },
87
88 { 0x20, 0x0100 },
89 { 0x21, 0x0100 },
90 { 0x22, 0x0050 },
91
92 { 0x25, 0x0050 },
93 { 0x26, 0x0000 },
94 { 0x27, 0x0000 },
95 { 0x28, 0x0000 },
96 { 0x29, 0x0000 },
97 { 0x2a, 0x0040 },
98 { 0x2b, 0x0000 },
99 { 0x2c, 0x0000 },
100 { 0x2d, 0x0050 },
101 { 0x2e, 0x0050 },
102 { 0x2f, 0x0000 },
103 { 0x30, 0x0002 },
104 { 0x31, 0x0037 },
105
106 { 0x33, 0x0080 },
107 { 0x34, 0x0008 },
108 { 0x35, 0x0031 },
109 { 0x36, 0x0026 },
110 { 0x37, 0x00e9 },
Mark Brownf2644a22009-04-07 19:20:14 +0100111};
112
Mark Brown0ebe36c2012-09-10 19:23:57 +0800113static bool wm8960_volatile(struct device *dev, unsigned int reg)
114{
115 switch (reg) {
116 case WM8960_RESET:
117 return true;
118 default:
119 return false;
120 }
121}
122
Mark Brownf2644a22009-04-07 19:20:14 +0100123struct wm8960_priv {
Zidan Wang75aa8862015-01-07 15:31:44 +0800124 struct clk *mclk;
Mark Brown0ebe36c2012-09-10 19:23:57 +0800125 struct regmap *regmap;
Kuninori Morimotoe075fc12018-01-29 03:05:45 +0000126 int (*set_bias_level)(struct snd_soc_component *,
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000127 enum snd_soc_bias_level level);
Mark Brown913d7b42010-03-03 13:47:03 +0000128 struct snd_soc_dapm_widget *lout1;
129 struct snd_soc_dapm_widget *rout1;
130 struct snd_soc_dapm_widget *out3;
Mark Brownafd6d362010-07-05 13:58:16 +0900131 bool deemph;
Zidan Wang3176bf22015-08-11 19:25:15 +0800132 int lrclk;
Zidan Wang0e50b512015-05-12 14:58:08 +0800133 int bclk;
134 int sysclk;
Zidan Wang3176bf22015-08-11 19:25:15 +0800135 int clk_id;
136 int freq_in;
137 bool is_stream_in_use[2];
Zidan Wange2280c902014-11-20 19:07:48 +0800138 struct wm8960_data pdata;
Mark Brownf2644a22009-04-07 19:20:14 +0100139};
140
Zidan Wang3ad5e862014-11-27 16:53:08 +0800141#define wm8960_reset(c) regmap_write(c, WM8960_RESET, 0)
Mark Brownf2644a22009-04-07 19:20:14 +0100142
143/* enumerated controls */
Mark Brownf2644a22009-04-07 19:20:14 +0100144static const char *wm8960_polarity[] = {"No Inversion", "Left Inverted",
145 "Right Inverted", "Stereo Inversion"};
146static const char *wm8960_3d_upper_cutoff[] = {"High", "Low"};
147static const char *wm8960_3d_lower_cutoff[] = {"Low", "High"};
148static const char *wm8960_alcfunc[] = {"Off", "Right", "Left", "Stereo"};
149static const char *wm8960_alcmode[] = {"ALC", "Limiter"};
Zidan Wang4a5893c2015-12-24 14:58:03 +0800150static const char *wm8960_adc_data_output_sel[] = {
151 "Left Data = Left ADC; Right Data = Right ADC",
152 "Left Data = Left ADC; Right Data = Left ADC",
153 "Left Data = Right ADC; Right Data = Right ADC",
154 "Left Data = Right ADC; Right Data = Left ADC",
155};
Zidan Wangdefbf702016-01-08 16:57:01 +0800156static const char *wm8960_dmonomix[] = {"Stereo", "Mono"};
Mark Brownf2644a22009-04-07 19:20:14 +0100157
158static const struct soc_enum wm8960_enum[] = {
Mark Brownf2644a22009-04-07 19:20:14 +0100159 SOC_ENUM_SINGLE(WM8960_DACCTL1, 5, 4, wm8960_polarity),
160 SOC_ENUM_SINGLE(WM8960_DACCTL2, 5, 4, wm8960_polarity),
161 SOC_ENUM_SINGLE(WM8960_3D, 6, 2, wm8960_3d_upper_cutoff),
162 SOC_ENUM_SINGLE(WM8960_3D, 5, 2, wm8960_3d_lower_cutoff),
163 SOC_ENUM_SINGLE(WM8960_ALC1, 7, 4, wm8960_alcfunc),
164 SOC_ENUM_SINGLE(WM8960_ALC3, 8, 2, wm8960_alcmode),
Zidan Wang4a5893c2015-12-24 14:58:03 +0800165 SOC_ENUM_SINGLE(WM8960_ADDCTL1, 2, 4, wm8960_adc_data_output_sel),
Zidan Wangdefbf702016-01-08 16:57:01 +0800166 SOC_ENUM_SINGLE(WM8960_ADDCTL1, 4, 2, wm8960_dmonomix),
Mark Brownf2644a22009-04-07 19:20:14 +0100167};
168
Mark Brownafd6d362010-07-05 13:58:16 +0900169static const int deemph_settings[] = { 0, 32000, 44100, 48000 };
170
Kuninori Morimotoe075fc12018-01-29 03:05:45 +0000171static int wm8960_set_deemph(struct snd_soc_component *component)
Mark Brownafd6d362010-07-05 13:58:16 +0900172{
Kuninori Morimotoe075fc12018-01-29 03:05:45 +0000173 struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component);
Mark Brownafd6d362010-07-05 13:58:16 +0900174 int val, i, best;
175
176 /* If we're using deemphasis select the nearest available sample
177 * rate.
178 */
179 if (wm8960->deemph) {
180 best = 1;
181 for (i = 2; i < ARRAY_SIZE(deemph_settings); i++) {
Zidan Wang3176bf22015-08-11 19:25:15 +0800182 if (abs(deemph_settings[i] - wm8960->lrclk) <
183 abs(deemph_settings[best] - wm8960->lrclk))
Mark Brownafd6d362010-07-05 13:58:16 +0900184 best = i;
185 }
186
187 val = best << 1;
188 } else {
189 val = 0;
190 }
191
Kuninori Morimotoe075fc12018-01-29 03:05:45 +0000192 dev_dbg(component->dev, "Set deemphasis %d\n", val);
Mark Brownafd6d362010-07-05 13:58:16 +0900193
Kuninori Morimotoe075fc12018-01-29 03:05:45 +0000194 return snd_soc_component_update_bits(component, WM8960_DACCTL1,
Mark Brownafd6d362010-07-05 13:58:16 +0900195 0x6, val);
196}
197
198static int wm8960_get_deemph(struct snd_kcontrol *kcontrol,
199 struct snd_ctl_elem_value *ucontrol)
200{
Kuninori Morimotoe075fc12018-01-29 03:05:45 +0000201 struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
202 struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component);
Mark Brownafd6d362010-07-05 13:58:16 +0900203
Takashi Iwaib4a18c82015-03-10 12:39:14 +0100204 ucontrol->value.integer.value[0] = wm8960->deemph;
Dmitry Artamonow3f343f82010-12-08 23:36:17 +0300205 return 0;
Mark Brownafd6d362010-07-05 13:58:16 +0900206}
207
208static int wm8960_put_deemph(struct snd_kcontrol *kcontrol,
209 struct snd_ctl_elem_value *ucontrol)
210{
Kuninori Morimotoe075fc12018-01-29 03:05:45 +0000211 struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
212 struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component);
Dan Carpenterc1fe81f2015-10-13 10:09:19 +0300213 unsigned int deemph = ucontrol->value.integer.value[0];
Mark Brownafd6d362010-07-05 13:58:16 +0900214
215 if (deemph > 1)
216 return -EINVAL;
217
218 wm8960->deemph = deemph;
219
Kuninori Morimotoe075fc12018-01-29 03:05:45 +0000220 return wm8960_set_deemph(component);
Mark Brownafd6d362010-07-05 13:58:16 +0900221}
222
Zidan Wang3758ff52015-09-09 19:29:10 +0800223static const DECLARE_TLV_DB_SCALE(adc_tlv, -9750, 50, 1);
Zidan Wang7e90f9b2015-09-09 19:29:11 +0800224static const DECLARE_TLV_DB_SCALE(inpga_tlv, -1725, 75, 0);
Zidan Wang3758ff52015-09-09 19:29:10 +0800225static const DECLARE_TLV_DB_SCALE(dac_tlv, -12750, 50, 1);
Mark Brownf2644a22009-04-07 19:20:14 +0100226static const DECLARE_TLV_DB_SCALE(bypass_tlv, -2100, 300, 0);
227static const DECLARE_TLV_DB_SCALE(out_tlv, -12100, 100, 1);
Zidan Wang7e90f9b2015-09-09 19:29:11 +0800228static const DECLARE_TLV_DB_SCALE(lineinboost_tlv, -1500, 300, 1);
Takashi Sakamotob269ceb2016-09-28 09:29:21 +0900229static const SNDRV_CTL_TLVD_DECLARE_DB_RANGE(micboost_tlv,
Zidan Wang7e90f9b2015-09-09 19:29:11 +0800230 0, 1, TLV_DB_SCALE_ITEM(0, 1300, 0),
231 2, 3, TLV_DB_SCALE_ITEM(2000, 900, 0),
Takashi Sakamotob269ceb2016-09-28 09:29:21 +0900232);
Mark Brownf2644a22009-04-07 19:20:14 +0100233
234static const struct snd_kcontrol_new wm8960_snd_controls[] = {
235SOC_DOUBLE_R_TLV("Capture Volume", WM8960_LINVOL, WM8960_RINVOL,
Zidan Wang7e90f9b2015-09-09 19:29:11 +0800236 0, 63, 0, inpga_tlv),
Mark Brownf2644a22009-04-07 19:20:14 +0100237SOC_DOUBLE_R("Capture Volume ZC Switch", WM8960_LINVOL, WM8960_RINVOL,
238 6, 1, 0),
239SOC_DOUBLE_R("Capture Switch", WM8960_LINVOL, WM8960_RINVOL,
JongHo Kim41a59ca2015-11-03 11:06:32 +0900240 7, 1, 1),
Mark Brownf2644a22009-04-07 19:20:14 +0100241
Mark Brown21eb2692013-02-26 23:36:37 +0000242SOC_SINGLE_TLV("Left Input Boost Mixer LINPUT3 Volume",
Stuart Henderson95826a32016-01-19 13:09:08 +0000243 WM8960_INBMIX1, 4, 7, 0, lineinboost_tlv),
Mark Brown21eb2692013-02-26 23:36:37 +0000244SOC_SINGLE_TLV("Left Input Boost Mixer LINPUT2 Volume",
Stuart Henderson95826a32016-01-19 13:09:08 +0000245 WM8960_INBMIX1, 1, 7, 0, lineinboost_tlv),
246SOC_SINGLE_TLV("Right Input Boost Mixer RINPUT3 Volume",
247 WM8960_INBMIX2, 4, 7, 0, lineinboost_tlv),
248SOC_SINGLE_TLV("Right Input Boost Mixer RINPUT2 Volume",
Zidan Wang7e90f9b2015-09-09 19:29:11 +0800249 WM8960_INBMIX2, 1, 7, 0, lineinboost_tlv),
250SOC_SINGLE_TLV("Right Input Boost Mixer RINPUT1 Volume",
Zidan Wang8524bb02015-09-18 17:19:43 +0800251 WM8960_RINPATH, 4, 3, 0, micboost_tlv),
Zidan Wang7e90f9b2015-09-09 19:29:11 +0800252SOC_SINGLE_TLV("Left Input Boost Mixer LINPUT1 Volume",
Zidan Wang8524bb02015-09-18 17:19:43 +0800253 WM8960_LINPATH, 4, 3, 0, micboost_tlv),
Mark Brown21eb2692013-02-26 23:36:37 +0000254
Mark Brownf2644a22009-04-07 19:20:14 +0100255SOC_DOUBLE_R_TLV("Playback Volume", WM8960_LDAC, WM8960_RDAC,
256 0, 255, 0, dac_tlv),
257
258SOC_DOUBLE_R_TLV("Headphone Playback Volume", WM8960_LOUT1, WM8960_ROUT1,
259 0, 127, 0, out_tlv),
260SOC_DOUBLE_R("Headphone Playback ZC Switch", WM8960_LOUT1, WM8960_ROUT1,
261 7, 1, 0),
262
263SOC_DOUBLE_R_TLV("Speaker Playback Volume", WM8960_LOUT2, WM8960_ROUT2,
264 0, 127, 0, out_tlv),
265SOC_DOUBLE_R("Speaker Playback ZC Switch", WM8960_LOUT2, WM8960_ROUT2,
266 7, 1, 0),
267SOC_SINGLE("Speaker DC Volume", WM8960_CLASSD3, 3, 5, 0),
268SOC_SINGLE("Speaker AC Volume", WM8960_CLASSD3, 0, 5, 0),
269
270SOC_SINGLE("PCM Playback -6dB Switch", WM8960_DACCTL1, 7, 1, 0),
Mark Brown4faaa8d2010-07-05 13:54:32 +0900271SOC_ENUM("ADC Polarity", wm8960_enum[0]),
Mark Brownf2644a22009-04-07 19:20:14 +0100272SOC_SINGLE("ADC High Pass Filter Switch", WM8960_DACCTL1, 0, 1, 0),
273
Zidan Wanga077e812015-06-11 19:14:36 +0800274SOC_ENUM("DAC Polarity", wm8960_enum[1]),
Mark Brownafd6d362010-07-05 13:58:16 +0900275SOC_SINGLE_BOOL_EXT("DAC Deemphasis Switch", 0,
276 wm8960_get_deemph, wm8960_put_deemph),
Mark Brownf2644a22009-04-07 19:20:14 +0100277
Mark Brown4faaa8d2010-07-05 13:54:32 +0900278SOC_ENUM("3D Filter Upper Cut-Off", wm8960_enum[2]),
279SOC_ENUM("3D Filter Lower Cut-Off", wm8960_enum[3]),
Mark Brownf2644a22009-04-07 19:20:14 +0100280SOC_SINGLE("3D Volume", WM8960_3D, 1, 15, 0),
281SOC_SINGLE("3D Switch", WM8960_3D, 0, 1, 0),
282
Mark Brown4faaa8d2010-07-05 13:54:32 +0900283SOC_ENUM("ALC Function", wm8960_enum[4]),
Mark Brownf2644a22009-04-07 19:20:14 +0100284SOC_SINGLE("ALC Max Gain", WM8960_ALC1, 4, 7, 0),
285SOC_SINGLE("ALC Target", WM8960_ALC1, 0, 15, 1),
286SOC_SINGLE("ALC Min Gain", WM8960_ALC2, 4, 7, 0),
287SOC_SINGLE("ALC Hold Time", WM8960_ALC2, 0, 15, 0),
Mark Brown4faaa8d2010-07-05 13:54:32 +0900288SOC_ENUM("ALC Mode", wm8960_enum[5]),
Mark Brownf2644a22009-04-07 19:20:14 +0100289SOC_SINGLE("ALC Decay", WM8960_ALC3, 4, 15, 0),
290SOC_SINGLE("ALC Attack", WM8960_ALC3, 0, 15, 0),
291
292SOC_SINGLE("Noise Gate Threshold", WM8960_NOISEG, 3, 31, 0),
293SOC_SINGLE("Noise Gate Switch", WM8960_NOISEG, 0, 1, 0),
294
Ma Haijunc324aac2013-08-14 09:15:38 +0800295SOC_DOUBLE_R_TLV("ADC PCM Capture Volume", WM8960_LADC, WM8960_RADC,
296 0, 255, 0, adc_tlv),
Mark Brownf2644a22009-04-07 19:20:14 +0100297
298SOC_SINGLE_TLV("Left Output Mixer Boost Bypass Volume",
299 WM8960_BYPASS1, 4, 7, 1, bypass_tlv),
300SOC_SINGLE_TLV("Left Output Mixer LINPUT3 Volume",
301 WM8960_LOUTMIX, 4, 7, 1, bypass_tlv),
302SOC_SINGLE_TLV("Right Output Mixer Boost Bypass Volume",
303 WM8960_BYPASS2, 4, 7, 1, bypass_tlv),
304SOC_SINGLE_TLV("Right Output Mixer RINPUT3 Volume",
305 WM8960_ROUTMIX, 4, 7, 1, bypass_tlv),
Zidan Wang4a5893c2015-12-24 14:58:03 +0800306
307SOC_ENUM("ADC Data Output Select", wm8960_enum[6]),
Zidan Wangdefbf702016-01-08 16:57:01 +0800308SOC_ENUM("DAC Mono Mix", wm8960_enum[7]),
Mark Brownf2644a22009-04-07 19:20:14 +0100309};
310
311static const struct snd_kcontrol_new wm8960_lin_boost[] = {
312SOC_DAPM_SINGLE("LINPUT2 Switch", WM8960_LINPATH, 6, 1, 0),
313SOC_DAPM_SINGLE("LINPUT3 Switch", WM8960_LINPATH, 7, 1, 0),
314SOC_DAPM_SINGLE("LINPUT1 Switch", WM8960_LINPATH, 8, 1, 0),
315};
316
317static const struct snd_kcontrol_new wm8960_lin[] = {
318SOC_DAPM_SINGLE("Boost Switch", WM8960_LINPATH, 3, 1, 0),
319};
320
321static const struct snd_kcontrol_new wm8960_rin_boost[] = {
322SOC_DAPM_SINGLE("RINPUT2 Switch", WM8960_RINPATH, 6, 1, 0),
323SOC_DAPM_SINGLE("RINPUT3 Switch", WM8960_RINPATH, 7, 1, 0),
324SOC_DAPM_SINGLE("RINPUT1 Switch", WM8960_RINPATH, 8, 1, 0),
325};
326
327static const struct snd_kcontrol_new wm8960_rin[] = {
328SOC_DAPM_SINGLE("Boost Switch", WM8960_RINPATH, 3, 1, 0),
329};
330
331static const struct snd_kcontrol_new wm8960_loutput_mixer[] = {
332SOC_DAPM_SINGLE("PCM Playback Switch", WM8960_LOUTMIX, 8, 1, 0),
333SOC_DAPM_SINGLE("LINPUT3 Switch", WM8960_LOUTMIX, 7, 1, 0),
334SOC_DAPM_SINGLE("Boost Bypass Switch", WM8960_BYPASS1, 7, 1, 0),
335};
336
337static const struct snd_kcontrol_new wm8960_routput_mixer[] = {
338SOC_DAPM_SINGLE("PCM Playback Switch", WM8960_ROUTMIX, 8, 1, 0),
339SOC_DAPM_SINGLE("RINPUT3 Switch", WM8960_ROUTMIX, 7, 1, 0),
340SOC_DAPM_SINGLE("Boost Bypass Switch", WM8960_BYPASS2, 7, 1, 0),
341};
342
343static const struct snd_kcontrol_new wm8960_mono_out[] = {
344SOC_DAPM_SINGLE("Left Switch", WM8960_MONOMIX1, 7, 1, 0),
345SOC_DAPM_SINGLE("Right Switch", WM8960_MONOMIX2, 7, 1, 0),
346};
347
348static const struct snd_soc_dapm_widget wm8960_dapm_widgets[] = {
349SND_SOC_DAPM_INPUT("LINPUT1"),
350SND_SOC_DAPM_INPUT("RINPUT1"),
351SND_SOC_DAPM_INPUT("LINPUT2"),
352SND_SOC_DAPM_INPUT("RINPUT2"),
353SND_SOC_DAPM_INPUT("LINPUT3"),
354SND_SOC_DAPM_INPUT("RINPUT3"),
355
Mark Brown187774c2011-10-27 09:46:17 +0200356SND_SOC_DAPM_SUPPLY("MICB", WM8960_POWER1, 1, 0, NULL, 0),
Mark Brownf2644a22009-04-07 19:20:14 +0100357
358SND_SOC_DAPM_MIXER("Left Boost Mixer", WM8960_POWER1, 5, 0,
359 wm8960_lin_boost, ARRAY_SIZE(wm8960_lin_boost)),
360SND_SOC_DAPM_MIXER("Right Boost Mixer", WM8960_POWER1, 4, 0,
361 wm8960_rin_boost, ARRAY_SIZE(wm8960_rin_boost)),
362
363SND_SOC_DAPM_MIXER("Left Input Mixer", WM8960_POWER3, 5, 0,
364 wm8960_lin, ARRAY_SIZE(wm8960_lin)),
365SND_SOC_DAPM_MIXER("Right Input Mixer", WM8960_POWER3, 4, 0,
366 wm8960_rin, ARRAY_SIZE(wm8960_rin)),
367
Mark Brown44426de2013-02-26 23:36:48 +0000368SND_SOC_DAPM_ADC("Left ADC", "Capture", WM8960_POWER1, 3, 0),
369SND_SOC_DAPM_ADC("Right ADC", "Capture", WM8960_POWER1, 2, 0),
Mark Brownf2644a22009-04-07 19:20:14 +0100370
371SND_SOC_DAPM_DAC("Left DAC", "Playback", WM8960_POWER2, 8, 0),
372SND_SOC_DAPM_DAC("Right DAC", "Playback", WM8960_POWER2, 7, 0),
373
374SND_SOC_DAPM_MIXER("Left Output Mixer", WM8960_POWER3, 3, 0,
375 &wm8960_loutput_mixer[0],
376 ARRAY_SIZE(wm8960_loutput_mixer)),
377SND_SOC_DAPM_MIXER("Right Output Mixer", WM8960_POWER3, 2, 0,
378 &wm8960_routput_mixer[0],
379 ARRAY_SIZE(wm8960_routput_mixer)),
380
Mark Brownf2644a22009-04-07 19:20:14 +0100381SND_SOC_DAPM_PGA("LOUT1 PGA", WM8960_POWER2, 6, 0, NULL, 0),
382SND_SOC_DAPM_PGA("ROUT1 PGA", WM8960_POWER2, 5, 0, NULL, 0),
383
384SND_SOC_DAPM_PGA("Left Speaker PGA", WM8960_POWER2, 4, 0, NULL, 0),
385SND_SOC_DAPM_PGA("Right Speaker PGA", WM8960_POWER2, 3, 0, NULL, 0),
386
387SND_SOC_DAPM_PGA("Right Speaker Output", WM8960_CLASSD1, 7, 0, NULL, 0),
388SND_SOC_DAPM_PGA("Left Speaker Output", WM8960_CLASSD1, 6, 0, NULL, 0),
389
390SND_SOC_DAPM_OUTPUT("SPK_LP"),
391SND_SOC_DAPM_OUTPUT("SPK_LN"),
392SND_SOC_DAPM_OUTPUT("HP_L"),
393SND_SOC_DAPM_OUTPUT("HP_R"),
394SND_SOC_DAPM_OUTPUT("SPK_RP"),
395SND_SOC_DAPM_OUTPUT("SPK_RN"),
396SND_SOC_DAPM_OUTPUT("OUT3"),
397};
398
Mark Brown913d7b42010-03-03 13:47:03 +0000399static const struct snd_soc_dapm_widget wm8960_dapm_widgets_out3[] = {
400SND_SOC_DAPM_MIXER("Mono Output Mixer", WM8960_POWER2, 1, 0,
401 &wm8960_mono_out[0],
402 ARRAY_SIZE(wm8960_mono_out)),
403};
404
405/* Represent OUT3 as a PGA so that it gets turned on with LOUT1/ROUT1 */
406static const struct snd_soc_dapm_widget wm8960_dapm_widgets_capless[] = {
407SND_SOC_DAPM_PGA("OUT3 VMID", WM8960_POWER2, 1, 0, NULL, 0),
408};
409
Mark Brownf2644a22009-04-07 19:20:14 +0100410static const struct snd_soc_dapm_route audio_paths[] = {
411 { "Left Boost Mixer", "LINPUT1 Switch", "LINPUT1" },
412 { "Left Boost Mixer", "LINPUT2 Switch", "LINPUT2" },
413 { "Left Boost Mixer", "LINPUT3 Switch", "LINPUT3" },
414
Zidan Wang2d4a3262016-01-08 16:57:02 +0800415 { "Left Input Mixer", "Boost Switch", "Left Boost Mixer" },
416 { "Left Input Mixer", "Boost Switch", "LINPUT1" }, /* Really Boost Switch */
Mark Brownf2644a22009-04-07 19:20:14 +0100417 { "Left Input Mixer", NULL, "LINPUT2" },
418 { "Left Input Mixer", NULL, "LINPUT3" },
419
420 { "Right Boost Mixer", "RINPUT1 Switch", "RINPUT1" },
421 { "Right Boost Mixer", "RINPUT2 Switch", "RINPUT2" },
422 { "Right Boost Mixer", "RINPUT3 Switch", "RINPUT3" },
423
Zidan Wang2d4a3262016-01-08 16:57:02 +0800424 { "Right Input Mixer", "Boost Switch", "Right Boost Mixer" },
425 { "Right Input Mixer", "Boost Switch", "RINPUT1" }, /* Really Boost Switch */
Mark Brownf2644a22009-04-07 19:20:14 +0100426 { "Right Input Mixer", NULL, "RINPUT2" },
Zidan Wang85e36a1f2015-05-12 14:58:36 +0800427 { "Right Input Mixer", NULL, "RINPUT3" },
Mark Brownf2644a22009-04-07 19:20:14 +0100428
429 { "Left ADC", NULL, "Left Input Mixer" },
430 { "Right ADC", NULL, "Right Input Mixer" },
431
432 { "Left Output Mixer", "LINPUT3 Switch", "LINPUT3" },
Zidan Wang2d4a3262016-01-08 16:57:02 +0800433 { "Left Output Mixer", "Boost Bypass Switch", "Left Boost Mixer" },
Mark Brownf2644a22009-04-07 19:20:14 +0100434 { "Left Output Mixer", "PCM Playback Switch", "Left DAC" },
435
436 { "Right Output Mixer", "RINPUT3 Switch", "RINPUT3" },
Zidan Wang2d4a3262016-01-08 16:57:02 +0800437 { "Right Output Mixer", "Boost Bypass Switch", "Right Boost Mixer" },
Mark Brownf2644a22009-04-07 19:20:14 +0100438 { "Right Output Mixer", "PCM Playback Switch", "Right DAC" },
439
Mark Brownf2644a22009-04-07 19:20:14 +0100440 { "LOUT1 PGA", NULL, "Left Output Mixer" },
441 { "ROUT1 PGA", NULL, "Right Output Mixer" },
442
443 { "HP_L", NULL, "LOUT1 PGA" },
444 { "HP_R", NULL, "ROUT1 PGA" },
445
446 { "Left Speaker PGA", NULL, "Left Output Mixer" },
447 { "Right Speaker PGA", NULL, "Right Output Mixer" },
448
449 { "Left Speaker Output", NULL, "Left Speaker PGA" },
450 { "Right Speaker Output", NULL, "Right Speaker PGA" },
451
452 { "SPK_LN", NULL, "Left Speaker Output" },
453 { "SPK_LP", NULL, "Left Speaker Output" },
454 { "SPK_RN", NULL, "Right Speaker Output" },
455 { "SPK_RP", NULL, "Right Speaker Output" },
Mark Brown913d7b42010-03-03 13:47:03 +0000456};
457
458static const struct snd_soc_dapm_route audio_paths_out3[] = {
459 { "Mono Output Mixer", "Left Switch", "Left Output Mixer" },
460 { "Mono Output Mixer", "Right Switch", "Right Output Mixer" },
Mark Brownf2644a22009-04-07 19:20:14 +0100461
462 { "OUT3", NULL, "Mono Output Mixer", }
463};
464
Mark Brown913d7b42010-03-03 13:47:03 +0000465static const struct snd_soc_dapm_route audio_paths_capless[] = {
466 { "HP_L", NULL, "OUT3 VMID" },
467 { "HP_R", NULL, "OUT3 VMID" },
468
469 { "OUT3 VMID", NULL, "Left Output Mixer" },
470 { "OUT3 VMID", NULL, "Right Output Mixer" },
471};
472
Kuninori Morimotoe075fc12018-01-29 03:05:45 +0000473static int wm8960_add_widgets(struct snd_soc_component *component)
Mark Brownf2644a22009-04-07 19:20:14 +0100474{
Kuninori Morimotoe075fc12018-01-29 03:05:45 +0000475 struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component);
Zidan Wange2280c902014-11-20 19:07:48 +0800476 struct wm8960_data *pdata = &wm8960->pdata;
Kuninori Morimotoe075fc12018-01-29 03:05:45 +0000477 struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
Mark Brown913d7b42010-03-03 13:47:03 +0000478 struct snd_soc_dapm_widget *w;
479
Liam Girdwoodce6120c2010-11-05 15:53:46 +0200480 snd_soc_dapm_new_controls(dapm, wm8960_dapm_widgets,
Mark Brownf2644a22009-04-07 19:20:14 +0100481 ARRAY_SIZE(wm8960_dapm_widgets));
482
Liam Girdwoodce6120c2010-11-05 15:53:46 +0200483 snd_soc_dapm_add_routes(dapm, audio_paths, ARRAY_SIZE(audio_paths));
Mark Brownf2644a22009-04-07 19:20:14 +0100484
Mark Brown913d7b42010-03-03 13:47:03 +0000485 /* In capless mode OUT3 is used to provide VMID for the
486 * headphone outputs, otherwise it is used as a mono mixer.
487 */
488 if (pdata && pdata->capless) {
Liam Girdwoodce6120c2010-11-05 15:53:46 +0200489 snd_soc_dapm_new_controls(dapm, wm8960_dapm_widgets_capless,
Mark Brown913d7b42010-03-03 13:47:03 +0000490 ARRAY_SIZE(wm8960_dapm_widgets_capless));
491
Liam Girdwoodce6120c2010-11-05 15:53:46 +0200492 snd_soc_dapm_add_routes(dapm, audio_paths_capless,
Mark Brown913d7b42010-03-03 13:47:03 +0000493 ARRAY_SIZE(audio_paths_capless));
494 } else {
Liam Girdwoodce6120c2010-11-05 15:53:46 +0200495 snd_soc_dapm_new_controls(dapm, wm8960_dapm_widgets_out3,
Mark Brown913d7b42010-03-03 13:47:03 +0000496 ARRAY_SIZE(wm8960_dapm_widgets_out3));
497
Liam Girdwoodce6120c2010-11-05 15:53:46 +0200498 snd_soc_dapm_add_routes(dapm, audio_paths_out3,
Mark Brown913d7b42010-03-03 13:47:03 +0000499 ARRAY_SIZE(audio_paths_out3));
500 }
501
502 /* We need to power up the headphone output stage out of
503 * sequence for capless mode. To save scanning the widget
504 * list each time to find the desired power state do so now
505 * and save the result.
506 */
Kuninori Morimotoe075fc12018-01-29 03:05:45 +0000507 list_for_each_entry(w, &component->card->widgets, list) {
Lars-Peter Clausen93f32f52015-06-01 10:10:48 +0200508 if (w->dapm != dapm)
Jarkko Nikula97c866d2010-12-14 12:18:31 +0200509 continue;
Mark Brown913d7b42010-03-03 13:47:03 +0000510 if (strcmp(w->name, "LOUT1 PGA") == 0)
511 wm8960->lout1 = w;
512 if (strcmp(w->name, "ROUT1 PGA") == 0)
513 wm8960->rout1 = w;
514 if (strcmp(w->name, "OUT3 VMID") == 0)
515 wm8960->out3 = w;
516 }
517
Mark Brownf2644a22009-04-07 19:20:14 +0100518 return 0;
519}
520
521static int wm8960_set_dai_fmt(struct snd_soc_dai *codec_dai,
522 unsigned int fmt)
523{
Kuninori Morimotoe075fc12018-01-29 03:05:45 +0000524 struct snd_soc_component *component = codec_dai->component;
Mark Brownf2644a22009-04-07 19:20:14 +0100525 u16 iface = 0;
526
527 /* set master/slave audio interface */
528 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
529 case SND_SOC_DAIFMT_CBM_CFM:
530 iface |= 0x0040;
531 break;
532 case SND_SOC_DAIFMT_CBS_CFS:
533 break;
534 default:
535 return -EINVAL;
536 }
537
538 /* interface format */
539 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
540 case SND_SOC_DAIFMT_I2S:
541 iface |= 0x0002;
542 break;
543 case SND_SOC_DAIFMT_RIGHT_J:
544 break;
545 case SND_SOC_DAIFMT_LEFT_J:
546 iface |= 0x0001;
547 break;
548 case SND_SOC_DAIFMT_DSP_A:
549 iface |= 0x0003;
550 break;
551 case SND_SOC_DAIFMT_DSP_B:
552 iface |= 0x0013;
553 break;
554 default:
555 return -EINVAL;
556 }
557
558 /* clock inversion */
559 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
560 case SND_SOC_DAIFMT_NB_NF:
561 break;
562 case SND_SOC_DAIFMT_IB_IF:
563 iface |= 0x0090;
564 break;
565 case SND_SOC_DAIFMT_IB_NF:
566 iface |= 0x0080;
567 break;
568 case SND_SOC_DAIFMT_NB_IF:
569 iface |= 0x0010;
570 break;
571 default:
572 return -EINVAL;
573 }
574
575 /* set iface */
Kuninori Morimotoe075fc12018-01-29 03:05:45 +0000576 snd_soc_component_write(component, WM8960_IFACE1, iface);
Mark Brownf2644a22009-04-07 19:20:14 +0100577 return 0;
578}
579
Mark Browndb059c02010-07-05 23:54:51 +0900580static struct {
581 int rate;
582 unsigned int val;
583} alc_rates[] = {
584 { 48000, 0 },
585 { 44100, 0 },
586 { 32000, 1 },
587 { 22050, 2 },
588 { 24000, 2 },
589 { 16000, 3 },
Zidan Wang22ee76d2014-12-31 11:39:14 +0800590 { 11025, 4 },
Mark Browndb059c02010-07-05 23:54:51 +0900591 { 12000, 4 },
592 { 8000, 5 },
593};
594
Zidan Wang3176bf22015-08-11 19:25:15 +0800595/* -1 for reserved value */
596static const int sysclk_divs[] = { 1, -1, 2, -1 };
597
Zidan Wang0e50b512015-05-12 14:58:08 +0800598/* Multiply 256 for internal 256 div */
599static const int dac_divs[] = { 256, 384, 512, 768, 1024, 1408, 1536 };
600
601/* Multiply 10 to eliminate decimials */
602static const int bclk_divs[] = {
603 10, 15, 20, 30, 40, 55, 60, 80, 110,
604 120, 160, 220, 240, 320, 320, 320
605};
606
Daniel Baluta3ddc9722017-03-21 17:03:24 +0200607/**
608 * wm8960_configure_sysclk - checks if there is a sysclk frequency available
609 * The sysclk must be chosen such that:
610 * - sysclk = MCLK / sysclk_divs
611 * - lrclk = sysclk / dac_divs
612 * - 10 * bclk = sysclk / bclk_divs
613 *
Daniel Baluta3c01b9e2017-03-21 17:03:25 +0200614 * If we cannot find an exact match for (sysclk, lrclk, bclk)
615 * triplet, we relax the bclk such that bclk is chosen as the
616 * closest available frequency greater than expected bclk.
617 *
Daniel Baluta3ddc9722017-03-21 17:03:24 +0200618 * @wm8960_priv: wm8960 codec private data
619 * @mclk: MCLK used to derive sysclk
620 * @sysclk_idx: sysclk_divs index for found sysclk
621 * @dac_idx: dac_divs index for found lrclk
622 * @bclk_idx: bclk_divs index for found bclk
623 *
624 * Returns:
Daniel Baluta3c01b9e2017-03-21 17:03:25 +0200625 * -1, in case no sysclk frequency available found
626 * >=0, in case we could derive bclk and lrclk from sysclk using
627 * (@sysclk_idx, @dac_idx, @bclk_idx) dividers
Daniel Baluta3ddc9722017-03-21 17:03:24 +0200628 */
629static
630int wm8960_configure_sysclk(struct wm8960_priv *wm8960, int mclk,
631 int *sysclk_idx, int *dac_idx, int *bclk_idx)
632{
633 int sysclk, bclk, lrclk;
634 int i, j, k;
Daniel Baluta3c01b9e2017-03-21 17:03:25 +0200635 int diff, closest = mclk;
636
637 /* marker for no match */
638 *bclk_idx = -1;
Daniel Baluta3ddc9722017-03-21 17:03:24 +0200639
640 bclk = wm8960->bclk;
641 lrclk = wm8960->lrclk;
642
643 /* check if the sysclk frequency is available. */
644 for (i = 0; i < ARRAY_SIZE(sysclk_divs); ++i) {
645 if (sysclk_divs[i] == -1)
646 continue;
647 sysclk = mclk / sysclk_divs[i];
648 for (j = 0; j < ARRAY_SIZE(dac_divs); ++j) {
649 if (sysclk != dac_divs[j] * lrclk)
650 continue;
651 for (k = 0; k < ARRAY_SIZE(bclk_divs); ++k) {
652 diff = sysclk - bclk * bclk_divs[k] / 10;
653 if (diff == 0) {
654 *sysclk_idx = i;
655 *dac_idx = j;
656 *bclk_idx = k;
657 break;
658 }
Daniel Baluta3c01b9e2017-03-21 17:03:25 +0200659 if (diff > 0 && closest > diff) {
660 *sysclk_idx = i;
661 *dac_idx = j;
662 *bclk_idx = k;
663 closest = diff;
664 }
Daniel Baluta3ddc9722017-03-21 17:03:24 +0200665 }
666 if (k != ARRAY_SIZE(bclk_divs))
667 break;
668 }
669 if (j != ARRAY_SIZE(dac_divs))
670 break;
671 }
Daniel Baluta3c01b9e2017-03-21 17:03:25 +0200672 return *bclk_idx;
Daniel Baluta3ddc9722017-03-21 17:03:24 +0200673}
674
Daniel Baluta84fdc002017-04-04 19:45:13 +0300675/**
676 * wm8960_configure_pll - checks if there is a PLL out frequency available
677 * The PLL out frequency must be chosen such that:
678 * - sysclk = lrclk * dac_divs
679 * - freq_out = sysclk * sysclk_divs
680 * - 10 * sysclk = bclk * bclk_divs
681 *
Daniel Baluta82bab882017-04-26 16:09:52 +0300682 * If we cannot find an exact match for (sysclk, lrclk, bclk)
683 * triplet, we relax the bclk such that bclk is chosen as the
684 * closest available frequency greater than expected bclk.
685 *
Kuninori Morimotoe075fc12018-01-29 03:05:45 +0000686 * @component: component structure
Daniel Baluta84fdc002017-04-04 19:45:13 +0300687 * @freq_in: input frequency used to derive freq out via PLL
688 * @sysclk_idx: sysclk_divs index for found sysclk
689 * @dac_idx: dac_divs index for found lrclk
690 * @bclk_idx: bclk_divs index for found bclk
691 *
692 * Returns:
Daniel Baluta66772ed2017-04-26 16:09:51 +0300693 * < 0, in case no PLL frequency out available was found
Daniel Baluta84fdc002017-04-04 19:45:13 +0300694 * >=0, in case we could derive bclk, lrclk, sysclk from PLL out using
695 * (@sysclk_idx, @dac_idx, @bclk_idx) dividers
696 */
697static
Kuninori Morimotoe075fc12018-01-29 03:05:45 +0000698int wm8960_configure_pll(struct snd_soc_component *component, int freq_in,
Daniel Baluta84fdc002017-04-04 19:45:13 +0300699 int *sysclk_idx, int *dac_idx, int *bclk_idx)
700{
Kuninori Morimotoe075fc12018-01-29 03:05:45 +0000701 struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component);
Daniel Baluta84fdc002017-04-04 19:45:13 +0300702 int sysclk, bclk, lrclk, freq_out;
Daniel Baluta82bab882017-04-26 16:09:52 +0300703 int diff, closest, best_freq_out;
Daniel Baluta84fdc002017-04-04 19:45:13 +0300704 int i, j, k;
705
706 bclk = wm8960->bclk;
707 lrclk = wm8960->lrclk;
Daniel Baluta82bab882017-04-26 16:09:52 +0300708 closest = freq_in;
Daniel Baluta84fdc002017-04-04 19:45:13 +0300709
Daniel Baluta82bab882017-04-26 16:09:52 +0300710 best_freq_out = -EINVAL;
Daniel Baluta66772ed2017-04-26 16:09:51 +0300711 *sysclk_idx = *dac_idx = *bclk_idx = -1;
Daniel Baluta84fdc002017-04-04 19:45:13 +0300712
713 for (i = 0; i < ARRAY_SIZE(sysclk_divs); ++i) {
714 if (sysclk_divs[i] == -1)
715 continue;
716 for (j = 0; j < ARRAY_SIZE(dac_divs); ++j) {
717 sysclk = lrclk * dac_divs[j];
718 freq_out = sysclk * sysclk_divs[i];
719
720 for (k = 0; k < ARRAY_SIZE(bclk_divs); ++k) {
721 if (!is_pll_freq_available(freq_in, freq_out))
722 continue;
723
724 diff = sysclk - bclk * bclk_divs[k] / 10;
725 if (diff == 0) {
726 *sysclk_idx = i;
727 *dac_idx = j;
728 *bclk_idx = k;
Daniel Baluta66772ed2017-04-26 16:09:51 +0300729 return freq_out;
Daniel Baluta84fdc002017-04-04 19:45:13 +0300730 }
Daniel Baluta82bab882017-04-26 16:09:52 +0300731 if (diff > 0 && closest > diff) {
732 *sysclk_idx = i;
733 *dac_idx = j;
734 *bclk_idx = k;
735 closest = diff;
736 best_freq_out = freq_out;
737 }
Daniel Baluta84fdc002017-04-04 19:45:13 +0300738 }
739 }
740 }
Daniel Baluta82bab882017-04-26 16:09:52 +0300741
742 return best_freq_out;
Daniel Baluta84fdc002017-04-04 19:45:13 +0300743}
Kuninori Morimotoe075fc12018-01-29 03:05:45 +0000744static int wm8960_configure_clocking(struct snd_soc_component *component)
Zidan Wang0e50b512015-05-12 14:58:08 +0800745{
Kuninori Morimotoe075fc12018-01-29 03:05:45 +0000746 struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component);
Daniel Baluta84fdc002017-04-04 19:45:13 +0300747 int freq_out, freq_in;
Kuninori Morimotoe075fc12018-01-29 03:05:45 +0000748 u16 iface1 = snd_soc_component_read32(component, WM8960_IFACE1);
Zidan Wang3176bf22015-08-11 19:25:15 +0800749 int i, j, k;
Daniel Baluta3ddc9722017-03-21 17:03:24 +0200750 int ret;
Zidan Wang0e50b512015-05-12 14:58:08 +0800751
752 if (!(iface1 & (1<<6))) {
Kuninori Morimotoe075fc12018-01-29 03:05:45 +0000753 dev_dbg(component->dev,
Zidan Wang0e50b512015-05-12 14:58:08 +0800754 "Codec is slave mode, no need to configure clock\n");
Zidan Wang3176bf22015-08-11 19:25:15 +0800755 return 0;
Zidan Wang0e50b512015-05-12 14:58:08 +0800756 }
757
Zidan Wang3176bf22015-08-11 19:25:15 +0800758 if (wm8960->clk_id != WM8960_SYSCLK_MCLK && !wm8960->freq_in) {
Kuninori Morimotoe075fc12018-01-29 03:05:45 +0000759 dev_err(component->dev, "No MCLK configured\n");
Zidan Wang3176bf22015-08-11 19:25:15 +0800760 return -EINVAL;
Zidan Wang0e50b512015-05-12 14:58:08 +0800761 }
762
Zidan Wang3176bf22015-08-11 19:25:15 +0800763 freq_in = wm8960->freq_in;
Zidan Wang3176bf22015-08-11 19:25:15 +0800764 /*
765 * If it's sysclk auto mode, check if the MCLK can provide sysclk or
766 * not. If MCLK can provide sysclk, using MCLK to provide sysclk
767 * directly. Otherwise, auto select a available pll out frequency
768 * and set PLL.
769 */
770 if (wm8960->clk_id == WM8960_SYSCLK_AUTO) {
771 /* disable the PLL and using MCLK to provide sysclk */
Kuninori Morimotoe075fc12018-01-29 03:05:45 +0000772 wm8960_set_pll(component, 0, 0);
Zidan Wang3176bf22015-08-11 19:25:15 +0800773 freq_out = freq_in;
774 } else if (wm8960->sysclk) {
775 freq_out = wm8960->sysclk;
776 } else {
Kuninori Morimotoe075fc12018-01-29 03:05:45 +0000777 dev_err(component->dev, "No SYSCLK configured\n");
Zidan Wang3176bf22015-08-11 19:25:15 +0800778 return -EINVAL;
Zidan Wang0e50b512015-05-12 14:58:08 +0800779 }
780
Stuart Henderson6bb74512016-01-19 13:09:09 +0000781 if (wm8960->clk_id != WM8960_SYSCLK_PLL) {
Daniel Baluta3ddc9722017-03-21 17:03:24 +0200782 ret = wm8960_configure_sysclk(wm8960, freq_out, &i, &j, &k);
Daniel Baluta3c01b9e2017-03-21 17:03:25 +0200783 if (ret >= 0) {
Stuart Henderson6bb74512016-01-19 13:09:09 +0000784 goto configure_clock;
785 } else if (wm8960->clk_id != WM8960_SYSCLK_AUTO) {
Kuninori Morimotoe075fc12018-01-29 03:05:45 +0000786 dev_err(component->dev, "failed to configure clock\n");
Stuart Henderson6bb74512016-01-19 13:09:09 +0000787 return -EINVAL;
788 }
Zidan Wang3176bf22015-08-11 19:25:15 +0800789 }
Zidan Wang3176bf22015-08-11 19:25:15 +0800790
Kuninori Morimotoe075fc12018-01-29 03:05:45 +0000791 freq_out = wm8960_configure_pll(component, freq_in, &i, &j, &k);
Daniel Baluta66772ed2017-04-26 16:09:51 +0300792 if (freq_out < 0) {
Kuninori Morimotoe075fc12018-01-29 03:05:45 +0000793 dev_err(component->dev, "failed to configure clock via PLL\n");
Daniel Baluta66772ed2017-04-26 16:09:51 +0300794 return freq_out;
Zidan Wang0e50b512015-05-12 14:58:08 +0800795 }
Kuninori Morimotoe075fc12018-01-29 03:05:45 +0000796 wm8960_set_pll(component, freq_in, freq_out);
Zidan Wang0e50b512015-05-12 14:58:08 +0800797
Zidan Wang3176bf22015-08-11 19:25:15 +0800798configure_clock:
799 /* configure sysclk clock */
Kuninori Morimotoe075fc12018-01-29 03:05:45 +0000800 snd_soc_component_update_bits(component, WM8960_CLOCK1, 3 << 1, i << 1);
Zidan Wang3176bf22015-08-11 19:25:15 +0800801
802 /* configure frame clock */
Kuninori Morimotoe075fc12018-01-29 03:05:45 +0000803 snd_soc_component_update_bits(component, WM8960_CLOCK1, 0x7 << 3, j << 3);
804 snd_soc_component_update_bits(component, WM8960_CLOCK1, 0x7 << 6, j << 6);
Zidan Wang0e50b512015-05-12 14:58:08 +0800805
806 /* configure bit clock */
Kuninori Morimotoe075fc12018-01-29 03:05:45 +0000807 snd_soc_component_update_bits(component, WM8960_CLOCK2, 0xf, k);
Zidan Wang3176bf22015-08-11 19:25:15 +0800808
809 return 0;
Zidan Wang0e50b512015-05-12 14:58:08 +0800810}
811
Mark Brownf2644a22009-04-07 19:20:14 +0100812static int wm8960_hw_params(struct snd_pcm_substream *substream,
813 struct snd_pcm_hw_params *params,
814 struct snd_soc_dai *dai)
815{
Kuninori Morimotoe075fc12018-01-29 03:05:45 +0000816 struct snd_soc_component *component = dai->component;
817 struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component);
818 u16 iface = snd_soc_component_read32(component, WM8960_IFACE1) & 0xfff3;
Zidan Wang0e50b512015-05-12 14:58:08 +0800819 bool tx = substream->stream == SNDRV_PCM_STREAM_PLAYBACK;
Mark Browndb059c02010-07-05 23:54:51 +0900820 int i;
Mark Brownf2644a22009-04-07 19:20:14 +0100821
Zidan Wang0e50b512015-05-12 14:58:08 +0800822 wm8960->bclk = snd_soc_params_to_bclk(params);
823 if (params_channels(params) == 1)
824 wm8960->bclk *= 2;
825
Mark Brownf2644a22009-04-07 19:20:14 +0100826 /* bit size */
Mark Brown39e9cc42014-07-31 12:53:23 +0100827 switch (params_width(params)) {
828 case 16:
Mark Brownf2644a22009-04-07 19:20:14 +0100829 break;
Mark Brown39e9cc42014-07-31 12:53:23 +0100830 case 20:
Mark Brownf2644a22009-04-07 19:20:14 +0100831 iface |= 0x0004;
832 break;
Mark Brown39e9cc42014-07-31 12:53:23 +0100833 case 24:
Mark Brownf2644a22009-04-07 19:20:14 +0100834 iface |= 0x0008;
835 break;
Zidan Wang7a8c7862015-05-12 14:58:21 +0800836 case 32:
837 /* right justify mode does not support 32 word length */
838 if ((iface & 0x3) != 0) {
839 iface |= 0x000c;
840 break;
841 }
Timur Tabi4c2474c2012-09-14 16:14:37 -0500842 default:
Kuninori Morimotoe075fc12018-01-29 03:05:45 +0000843 dev_err(component->dev, "unsupported width %d\n",
Mark Brown39e9cc42014-07-31 12:53:23 +0100844 params_width(params));
Timur Tabi4c2474c2012-09-14 16:14:37 -0500845 return -EINVAL;
Mark Brownf2644a22009-04-07 19:20:14 +0100846 }
847
Zidan Wang3176bf22015-08-11 19:25:15 +0800848 wm8960->lrclk = params_rate(params);
Mark Brownafd6d362010-07-05 13:58:16 +0900849 /* Update filters for the new rate */
Zidan Wang3176bf22015-08-11 19:25:15 +0800850 if (tx) {
Kuninori Morimotoe075fc12018-01-29 03:05:45 +0000851 wm8960_set_deemph(component);
Mark Browndb059c02010-07-05 23:54:51 +0900852 } else {
853 for (i = 0; i < ARRAY_SIZE(alc_rates); i++)
854 if (alc_rates[i].rate == params_rate(params))
Kuninori Morimotoe075fc12018-01-29 03:05:45 +0000855 snd_soc_component_update_bits(component,
Mark Browndb059c02010-07-05 23:54:51 +0900856 WM8960_ADDCTL3, 0x7,
857 alc_rates[i].val);
Mark Brownafd6d362010-07-05 13:58:16 +0900858 }
859
Mark Brownf2644a22009-04-07 19:20:14 +0100860 /* set iface */
Kuninori Morimotoe075fc12018-01-29 03:05:45 +0000861 snd_soc_component_write(component, WM8960_IFACE1, iface);
Zidan Wang0e50b512015-05-12 14:58:08 +0800862
Zidan Wang3176bf22015-08-11 19:25:15 +0800863 wm8960->is_stream_in_use[tx] = true;
864
Kuninori Morimotoe075fc12018-01-29 03:05:45 +0000865 if (snd_soc_component_get_bias_level(component) == SND_SOC_BIAS_ON &&
Zidan Wang3176bf22015-08-11 19:25:15 +0800866 !wm8960->is_stream_in_use[!tx])
Kuninori Morimotoe075fc12018-01-29 03:05:45 +0000867 return wm8960_configure_clocking(component);
Zidan Wang3176bf22015-08-11 19:25:15 +0800868
869 return 0;
870}
871
872static int wm8960_hw_free(struct snd_pcm_substream *substream,
873 struct snd_soc_dai *dai)
874{
Kuninori Morimotoe075fc12018-01-29 03:05:45 +0000875 struct snd_soc_component *component = dai->component;
876 struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component);
Zidan Wang3176bf22015-08-11 19:25:15 +0800877 bool tx = substream->stream == SNDRV_PCM_STREAM_PLAYBACK;
878
879 wm8960->is_stream_in_use[tx] = false;
Zidan Wang0e50b512015-05-12 14:58:08 +0800880
Mark Brownf2644a22009-04-07 19:20:14 +0100881 return 0;
882}
883
884static int wm8960_mute(struct snd_soc_dai *dai, int mute)
885{
Kuninori Morimotoe075fc12018-01-29 03:05:45 +0000886 struct snd_soc_component *component = dai->component;
Mark Brownf2644a22009-04-07 19:20:14 +0100887
888 if (mute)
Kuninori Morimotoe075fc12018-01-29 03:05:45 +0000889 snd_soc_component_update_bits(component, WM8960_DACCTL1, 0x8, 0x8);
Mark Brownf2644a22009-04-07 19:20:14 +0100890 else
Kuninori Morimotoe075fc12018-01-29 03:05:45 +0000891 snd_soc_component_update_bits(component, WM8960_DACCTL1, 0x8, 0);
Mark Brownf2644a22009-04-07 19:20:14 +0100892 return 0;
893}
894
Kuninori Morimotoe075fc12018-01-29 03:05:45 +0000895static int wm8960_set_bias_level_out3(struct snd_soc_component *component,
Mark Brown913d7b42010-03-03 13:47:03 +0000896 enum snd_soc_bias_level level)
Mark Brownf2644a22009-04-07 19:20:14 +0100897{
Kuninori Morimotoe075fc12018-01-29 03:05:45 +0000898 struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component);
899 u16 pm2 = snd_soc_component_read32(component, WM8960_POWER2);
Zidan Wang75aa8862015-01-07 15:31:44 +0800900 int ret;
Mark Brown0ebe36c2012-09-10 19:23:57 +0800901
Mark Brownf2644a22009-04-07 19:20:14 +0100902 switch (level) {
903 case SND_SOC_BIAS_ON:
904 break;
905
906 case SND_SOC_BIAS_PREPARE:
Kuninori Morimotoe075fc12018-01-29 03:05:45 +0000907 switch (snd_soc_component_get_bias_level(component)) {
Zidan Wang75aa8862015-01-07 15:31:44 +0800908 case SND_SOC_BIAS_STANDBY:
909 if (!IS_ERR(wm8960->mclk)) {
910 ret = clk_prepare_enable(wm8960->mclk);
911 if (ret) {
Kuninori Morimotoe075fc12018-01-29 03:05:45 +0000912 dev_err(component->dev,
Zidan Wang75aa8862015-01-07 15:31:44 +0800913 "Failed to enable MCLK: %d\n",
914 ret);
915 return ret;
916 }
917 }
918
Kuninori Morimotoe075fc12018-01-29 03:05:45 +0000919 ret = wm8960_configure_clocking(component);
Zidan Wang3176bf22015-08-11 19:25:15 +0800920 if (ret)
921 return ret;
922
Zidan Wang75aa8862015-01-07 15:31:44 +0800923 /* Set VMID to 2x50k */
Kuninori Morimotoe075fc12018-01-29 03:05:45 +0000924 snd_soc_component_update_bits(component, WM8960_POWER1, 0x180, 0x80);
Zidan Wang75aa8862015-01-07 15:31:44 +0800925 break;
926
927 case SND_SOC_BIAS_ON:
Zidan Wang3176bf22015-08-11 19:25:15 +0800928 /*
929 * If it's sysclk auto mode, and the pll is enabled,
930 * disable the pll
931 */
932 if (wm8960->clk_id == WM8960_SYSCLK_AUTO && (pm2 & 0x1))
Kuninori Morimotoe075fc12018-01-29 03:05:45 +0000933 wm8960_set_pll(component, 0, 0);
Zidan Wang3176bf22015-08-11 19:25:15 +0800934
Zidan Wang75aa8862015-01-07 15:31:44 +0800935 if (!IS_ERR(wm8960->mclk))
936 clk_disable_unprepare(wm8960->mclk);
937 break;
938
939 default:
940 break;
941 }
942
Mark Brownf2644a22009-04-07 19:20:14 +0100943 break;
944
945 case SND_SOC_BIAS_STANDBY:
Kuninori Morimotoe075fc12018-01-29 03:05:45 +0000946 if (snd_soc_component_get_bias_level(component) == SND_SOC_BIAS_OFF) {
Mark Brown0ebe36c2012-09-10 19:23:57 +0800947 regcache_sync(wm8960->regmap);
Axel Linbc45df22011-10-07 21:50:23 +0800948
Mark Brownf2644a22009-04-07 19:20:14 +0100949 /* Enable anti-pop features */
Kuninori Morimotoe075fc12018-01-29 03:05:45 +0000950 snd_soc_component_write(component, WM8960_APOP1,
Mark Brown913d7b42010-03-03 13:47:03 +0000951 WM8960_POBCTRL | WM8960_SOFT_ST |
952 WM8960_BUFDCOPEN | WM8960_BUFIOEN);
Mark Brownf2644a22009-04-07 19:20:14 +0100953
954 /* Enable & ramp VMID at 2x50k */
Kuninori Morimotoe075fc12018-01-29 03:05:45 +0000955 snd_soc_component_update_bits(component, WM8960_POWER1, 0x80, 0x80);
Mark Brownf2644a22009-04-07 19:20:14 +0100956 msleep(100);
957
958 /* Enable VREF */
Kuninori Morimotoe075fc12018-01-29 03:05:45 +0000959 snd_soc_component_update_bits(component, WM8960_POWER1, WM8960_VREF,
Axel Lin16b24882011-12-08 11:09:15 +0800960 WM8960_VREF);
Mark Brownf2644a22009-04-07 19:20:14 +0100961
962 /* Disable anti-pop features */
Kuninori Morimotoe075fc12018-01-29 03:05:45 +0000963 snd_soc_component_write(component, WM8960_APOP1, WM8960_BUFIOEN);
Mark Brownf2644a22009-04-07 19:20:14 +0100964 }
965
966 /* Set VMID to 2x250k */
Kuninori Morimotoe075fc12018-01-29 03:05:45 +0000967 snd_soc_component_update_bits(component, WM8960_POWER1, 0x180, 0x100);
Mark Brownf2644a22009-04-07 19:20:14 +0100968 break;
969
970 case SND_SOC_BIAS_OFF:
971 /* Enable anti-pop features */
Kuninori Morimotoe075fc12018-01-29 03:05:45 +0000972 snd_soc_component_write(component, WM8960_APOP1,
Mark Brownf2644a22009-04-07 19:20:14 +0100973 WM8960_POBCTRL | WM8960_SOFT_ST |
974 WM8960_BUFDCOPEN | WM8960_BUFIOEN);
975
976 /* Disable VMID and VREF, let them discharge */
Kuninori Morimotoe075fc12018-01-29 03:05:45 +0000977 snd_soc_component_write(component, WM8960_POWER1, 0);
Mark Brownf2644a22009-04-07 19:20:14 +0100978 msleep(600);
Mark Brown913d7b42010-03-03 13:47:03 +0000979 break;
980 }
Mark Brownf2644a22009-04-07 19:20:14 +0100981
Mark Brown913d7b42010-03-03 13:47:03 +0000982 return 0;
983}
984
Kuninori Morimotoe075fc12018-01-29 03:05:45 +0000985static int wm8960_set_bias_level_capless(struct snd_soc_component *component,
Mark Brown913d7b42010-03-03 13:47:03 +0000986 enum snd_soc_bias_level level)
987{
Kuninori Morimotoe075fc12018-01-29 03:05:45 +0000988 struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component);
989 u16 pm2 = snd_soc_component_read32(component, WM8960_POWER2);
Zidan Wang75aa8862015-01-07 15:31:44 +0800990 int reg, ret;
Mark Brown913d7b42010-03-03 13:47:03 +0000991
992 switch (level) {
993 case SND_SOC_BIAS_ON:
994 break;
995
996 case SND_SOC_BIAS_PREPARE:
Kuninori Morimotoe075fc12018-01-29 03:05:45 +0000997 switch (snd_soc_component_get_bias_level(component)) {
Mark Brown913d7b42010-03-03 13:47:03 +0000998 case SND_SOC_BIAS_STANDBY:
999 /* Enable anti pop mode */
Kuninori Morimotoe075fc12018-01-29 03:05:45 +00001000 snd_soc_component_update_bits(component, WM8960_APOP1,
Mark Brown913d7b42010-03-03 13:47:03 +00001001 WM8960_POBCTRL | WM8960_SOFT_ST |
1002 WM8960_BUFDCOPEN,
1003 WM8960_POBCTRL | WM8960_SOFT_ST |
1004 WM8960_BUFDCOPEN);
1005
1006 /* Enable LOUT1, ROUT1 and OUT3 if they're enabled */
1007 reg = 0;
1008 if (wm8960->lout1 && wm8960->lout1->power)
1009 reg |= WM8960_PWR2_LOUT1;
1010 if (wm8960->rout1 && wm8960->rout1->power)
1011 reg |= WM8960_PWR2_ROUT1;
1012 if (wm8960->out3 && wm8960->out3->power)
1013 reg |= WM8960_PWR2_OUT3;
Kuninori Morimotoe075fc12018-01-29 03:05:45 +00001014 snd_soc_component_update_bits(component, WM8960_POWER2,
Mark Brown913d7b42010-03-03 13:47:03 +00001015 WM8960_PWR2_LOUT1 |
1016 WM8960_PWR2_ROUT1 |
1017 WM8960_PWR2_OUT3, reg);
1018
1019 /* Enable VMID at 2*50k */
Kuninori Morimotoe075fc12018-01-29 03:05:45 +00001020 snd_soc_component_update_bits(component, WM8960_POWER1,
Mark Brown913d7b42010-03-03 13:47:03 +00001021 WM8960_VMID_MASK, 0x80);
1022
1023 /* Ramp */
1024 msleep(100);
1025
1026 /* Enable VREF */
Kuninori Morimotoe075fc12018-01-29 03:05:45 +00001027 snd_soc_component_update_bits(component, WM8960_POWER1,
Mark Brown913d7b42010-03-03 13:47:03 +00001028 WM8960_VREF, WM8960_VREF);
1029
1030 msleep(100);
Zidan Wang75aa8862015-01-07 15:31:44 +08001031
1032 if (!IS_ERR(wm8960->mclk)) {
1033 ret = clk_prepare_enable(wm8960->mclk);
1034 if (ret) {
Kuninori Morimotoe075fc12018-01-29 03:05:45 +00001035 dev_err(component->dev,
Zidan Wang75aa8862015-01-07 15:31:44 +08001036 "Failed to enable MCLK: %d\n",
1037 ret);
1038 return ret;
1039 }
1040 }
Zidan Wang3176bf22015-08-11 19:25:15 +08001041
Kuninori Morimotoe075fc12018-01-29 03:05:45 +00001042 ret = wm8960_configure_clocking(component);
Zidan Wang3176bf22015-08-11 19:25:15 +08001043 if (ret)
1044 return ret;
1045
Mark Brown913d7b42010-03-03 13:47:03 +00001046 break;
1047
1048 case SND_SOC_BIAS_ON:
Zidan Wang3176bf22015-08-11 19:25:15 +08001049 /*
1050 * If it's sysclk auto mode, and the pll is enabled,
1051 * disable the pll
1052 */
1053 if (wm8960->clk_id == WM8960_SYSCLK_AUTO && (pm2 & 0x1))
Kuninori Morimotoe075fc12018-01-29 03:05:45 +00001054 wm8960_set_pll(component, 0, 0);
Zidan Wang3176bf22015-08-11 19:25:15 +08001055
Zidan Wang75aa8862015-01-07 15:31:44 +08001056 if (!IS_ERR(wm8960->mclk))
1057 clk_disable_unprepare(wm8960->mclk);
1058
Mark Brown913d7b42010-03-03 13:47:03 +00001059 /* Enable anti-pop mode */
Kuninori Morimotoe075fc12018-01-29 03:05:45 +00001060 snd_soc_component_update_bits(component, WM8960_APOP1,
Mark Brown913d7b42010-03-03 13:47:03 +00001061 WM8960_POBCTRL | WM8960_SOFT_ST |
1062 WM8960_BUFDCOPEN,
1063 WM8960_POBCTRL | WM8960_SOFT_ST |
1064 WM8960_BUFDCOPEN);
1065
1066 /* Disable VMID and VREF */
Kuninori Morimotoe075fc12018-01-29 03:05:45 +00001067 snd_soc_component_update_bits(component, WM8960_POWER1,
Mark Brown913d7b42010-03-03 13:47:03 +00001068 WM8960_VREF | WM8960_VMID_MASK, 0);
1069 break;
1070
Axel Linbc45df22011-10-07 21:50:23 +08001071 case SND_SOC_BIAS_OFF:
Mark Brown0ebe36c2012-09-10 19:23:57 +08001072 regcache_sync(wm8960->regmap);
Axel Linbc45df22011-10-07 21:50:23 +08001073 break;
Mark Brown913d7b42010-03-03 13:47:03 +00001074 default:
1075 break;
1076 }
1077 break;
1078
1079 case SND_SOC_BIAS_STANDBY:
Kuninori Morimotoe075fc12018-01-29 03:05:45 +00001080 switch (snd_soc_component_get_bias_level(component)) {
Mark Brown913d7b42010-03-03 13:47:03 +00001081 case SND_SOC_BIAS_PREPARE:
1082 /* Disable HP discharge */
Kuninori Morimotoe075fc12018-01-29 03:05:45 +00001083 snd_soc_component_update_bits(component, WM8960_APOP2,
Mark Brown913d7b42010-03-03 13:47:03 +00001084 WM8960_DISOP | WM8960_DRES_MASK,
1085 0);
1086
1087 /* Disable anti-pop features */
Kuninori Morimotoe075fc12018-01-29 03:05:45 +00001088 snd_soc_component_update_bits(component, WM8960_APOP1,
Mark Brown913d7b42010-03-03 13:47:03 +00001089 WM8960_POBCTRL | WM8960_SOFT_ST |
1090 WM8960_BUFDCOPEN,
1091 WM8960_POBCTRL | WM8960_SOFT_ST |
1092 WM8960_BUFDCOPEN);
1093 break;
1094
1095 default:
1096 break;
1097 }
1098 break;
1099
1100 case SND_SOC_BIAS_OFF:
Mark Brownf2644a22009-04-07 19:20:14 +01001101 break;
1102 }
1103
Mark Brownf2644a22009-04-07 19:20:14 +01001104 return 0;
1105}
1106
1107/* PLL divisors */
1108struct _pll_div {
1109 u32 pre_div:1;
1110 u32 n:4;
1111 u32 k:24;
1112};
1113
Zidan Wang3176bf22015-08-11 19:25:15 +08001114static bool is_pll_freq_available(unsigned int source, unsigned int target)
1115{
1116 unsigned int Ndiv;
1117
1118 if (source == 0 || target == 0)
1119 return false;
1120
1121 /* Scale up target to PLL operating frequency */
1122 target *= 4;
1123 Ndiv = target / source;
1124
1125 if (Ndiv < 6) {
1126 source >>= 1;
1127 Ndiv = target / source;
1128 }
1129
1130 if ((Ndiv < 6) || (Ndiv > 12))
1131 return false;
1132
1133 return true;
1134}
1135
Mark Brownf2644a22009-04-07 19:20:14 +01001136/* The size in bits of the pll divide multiplied by 10
1137 * to allow rounding later */
1138#define FIXED_PLL_SIZE ((1 << 24) * 10)
1139
1140static int pll_factors(unsigned int source, unsigned int target,
1141 struct _pll_div *pll_div)
1142{
1143 unsigned long long Kpart;
1144 unsigned int K, Ndiv, Nmod;
1145
1146 pr_debug("WM8960 PLL: setting %dHz->%dHz\n", source, target);
1147
1148 /* Scale up target to PLL operating frequency */
1149 target *= 4;
1150
1151 Ndiv = target / source;
1152 if (Ndiv < 6) {
1153 source >>= 1;
1154 pll_div->pre_div = 1;
1155 Ndiv = target / source;
1156 } else
1157 pll_div->pre_div = 0;
1158
1159 if ((Ndiv < 6) || (Ndiv > 12)) {
1160 pr_err("WM8960 PLL: Unsupported N=%d\n", Ndiv);
1161 return -EINVAL;
1162 }
1163
1164 pll_div->n = Ndiv;
1165 Nmod = target % source;
1166 Kpart = FIXED_PLL_SIZE * (long long)Nmod;
1167
1168 do_div(Kpart, source);
1169
1170 K = Kpart & 0xFFFFFFFF;
1171
1172 /* Check if we need to round */
1173 if ((K % 10) >= 5)
1174 K += 5;
1175
1176 /* Move down to proper range now rounding is done */
1177 K /= 10;
1178
1179 pll_div->k = K;
1180
1181 pr_debug("WM8960 PLL: N=%x K=%x pre_div=%d\n",
1182 pll_div->n, pll_div->k, pll_div->pre_div);
1183
1184 return 0;
1185}
1186
Kuninori Morimotoe075fc12018-01-29 03:05:45 +00001187static int wm8960_set_pll(struct snd_soc_component *component,
Zidan Wang3176bf22015-08-11 19:25:15 +08001188 unsigned int freq_in, unsigned int freq_out)
Mark Brownf2644a22009-04-07 19:20:14 +01001189{
Mark Brownf2644a22009-04-07 19:20:14 +01001190 u16 reg;
1191 static struct _pll_div pll_div;
1192 int ret;
1193
1194 if (freq_in && freq_out) {
1195 ret = pll_factors(freq_in, freq_out, &pll_div);
1196 if (ret != 0)
1197 return ret;
1198 }
1199
1200 /* Disable the PLL: even if we are changing the frequency the
1201 * PLL needs to be disabled while we do so. */
Kuninori Morimotoe075fc12018-01-29 03:05:45 +00001202 snd_soc_component_update_bits(component, WM8960_CLOCK1, 0x1, 0);
1203 snd_soc_component_update_bits(component, WM8960_POWER2, 0x1, 0);
Mark Brownf2644a22009-04-07 19:20:14 +01001204
1205 if (!freq_in || !freq_out)
1206 return 0;
1207
Kuninori Morimotoe075fc12018-01-29 03:05:45 +00001208 reg = snd_soc_component_read32(component, WM8960_PLL1) & ~0x3f;
Mark Brownf2644a22009-04-07 19:20:14 +01001209 reg |= pll_div.pre_div << 4;
1210 reg |= pll_div.n;
1211
1212 if (pll_div.k) {
1213 reg |= 0x20;
1214
Kuninori Morimotoe075fc12018-01-29 03:05:45 +00001215 snd_soc_component_write(component, WM8960_PLL2, (pll_div.k >> 16) & 0xff);
1216 snd_soc_component_write(component, WM8960_PLL3, (pll_div.k >> 8) & 0xff);
1217 snd_soc_component_write(component, WM8960_PLL4, pll_div.k & 0xff);
Mark Brownf2644a22009-04-07 19:20:14 +01001218 }
Kuninori Morimotoe075fc12018-01-29 03:05:45 +00001219 snd_soc_component_write(component, WM8960_PLL1, reg);
Mark Brownf2644a22009-04-07 19:20:14 +01001220
1221 /* Turn it on */
Kuninori Morimotoe075fc12018-01-29 03:05:45 +00001222 snd_soc_component_update_bits(component, WM8960_POWER2, 0x1, 0x1);
Mark Brownf2644a22009-04-07 19:20:14 +01001223 msleep(250);
Kuninori Morimotoe075fc12018-01-29 03:05:45 +00001224 snd_soc_component_update_bits(component, WM8960_CLOCK1, 0x1, 0x1);
Mark Brownf2644a22009-04-07 19:20:14 +01001225
1226 return 0;
1227}
1228
Zidan Wang3176bf22015-08-11 19:25:15 +08001229static int wm8960_set_dai_pll(struct snd_soc_dai *codec_dai, int pll_id,
1230 int source, unsigned int freq_in, unsigned int freq_out)
1231{
Kuninori Morimotoe075fc12018-01-29 03:05:45 +00001232 struct snd_soc_component *component = codec_dai->component;
1233 struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component);
Zidan Wang3176bf22015-08-11 19:25:15 +08001234
1235 wm8960->freq_in = freq_in;
1236
1237 if (pll_id == WM8960_SYSCLK_AUTO)
1238 return 0;
1239
Kuninori Morimotoe075fc12018-01-29 03:05:45 +00001240 return wm8960_set_pll(component, freq_in, freq_out);
Zidan Wang3176bf22015-08-11 19:25:15 +08001241}
1242
Mark Brownf2644a22009-04-07 19:20:14 +01001243static int wm8960_set_dai_clkdiv(struct snd_soc_dai *codec_dai,
1244 int div_id, int div)
1245{
Kuninori Morimotoe075fc12018-01-29 03:05:45 +00001246 struct snd_soc_component *component = codec_dai->component;
Mark Brownf2644a22009-04-07 19:20:14 +01001247 u16 reg;
1248
1249 switch (div_id) {
Mark Brownf2644a22009-04-07 19:20:14 +01001250 case WM8960_SYSCLKDIV:
Kuninori Morimotoe075fc12018-01-29 03:05:45 +00001251 reg = snd_soc_component_read32(component, WM8960_CLOCK1) & 0x1f9;
1252 snd_soc_component_write(component, WM8960_CLOCK1, reg | div);
Mark Brownf2644a22009-04-07 19:20:14 +01001253 break;
1254 case WM8960_DACDIV:
Kuninori Morimotoe075fc12018-01-29 03:05:45 +00001255 reg = snd_soc_component_read32(component, WM8960_CLOCK1) & 0x1c7;
1256 snd_soc_component_write(component, WM8960_CLOCK1, reg | div);
Mark Brownf2644a22009-04-07 19:20:14 +01001257 break;
1258 case WM8960_OPCLKDIV:
Kuninori Morimotoe075fc12018-01-29 03:05:45 +00001259 reg = snd_soc_component_read32(component, WM8960_PLL1) & 0x03f;
1260 snd_soc_component_write(component, WM8960_PLL1, reg | div);
Mark Brownf2644a22009-04-07 19:20:14 +01001261 break;
1262 case WM8960_DCLKDIV:
Kuninori Morimotoe075fc12018-01-29 03:05:45 +00001263 reg = snd_soc_component_read32(component, WM8960_CLOCK2) & 0x03f;
1264 snd_soc_component_write(component, WM8960_CLOCK2, reg | div);
Mark Brownf2644a22009-04-07 19:20:14 +01001265 break;
1266 case WM8960_TOCLKSEL:
Kuninori Morimotoe075fc12018-01-29 03:05:45 +00001267 reg = snd_soc_component_read32(component, WM8960_ADDCTL1) & 0x1fd;
1268 snd_soc_component_write(component, WM8960_ADDCTL1, reg | div);
Mark Brownf2644a22009-04-07 19:20:14 +01001269 break;
1270 default:
1271 return -EINVAL;
1272 }
1273
1274 return 0;
1275}
1276
Kuninori Morimotoe075fc12018-01-29 03:05:45 +00001277static int wm8960_set_bias_level(struct snd_soc_component *component,
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +00001278 enum snd_soc_bias_level level)
1279{
Kuninori Morimotoe075fc12018-01-29 03:05:45 +00001280 struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component);
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +00001281
Kuninori Morimotoe075fc12018-01-29 03:05:45 +00001282 return wm8960->set_bias_level(component, level);
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +00001283}
1284
Zidan Wang0e50b512015-05-12 14:58:08 +08001285static int wm8960_set_dai_sysclk(struct snd_soc_dai *dai, int clk_id,
1286 unsigned int freq, int dir)
1287{
Kuninori Morimotoe075fc12018-01-29 03:05:45 +00001288 struct snd_soc_component *component = dai->component;
1289 struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component);
Zidan Wang0e50b512015-05-12 14:58:08 +08001290
1291 switch (clk_id) {
1292 case WM8960_SYSCLK_MCLK:
Kuninori Morimotoe075fc12018-01-29 03:05:45 +00001293 snd_soc_component_update_bits(component, WM8960_CLOCK1,
Zidan Wang0e50b512015-05-12 14:58:08 +08001294 0x1, WM8960_SYSCLK_MCLK);
1295 break;
1296 case WM8960_SYSCLK_PLL:
Kuninori Morimotoe075fc12018-01-29 03:05:45 +00001297 snd_soc_component_update_bits(component, WM8960_CLOCK1,
Zidan Wang0e50b512015-05-12 14:58:08 +08001298 0x1, WM8960_SYSCLK_PLL);
1299 break;
Zidan Wang3176bf22015-08-11 19:25:15 +08001300 case WM8960_SYSCLK_AUTO:
1301 break;
Zidan Wang0e50b512015-05-12 14:58:08 +08001302 default:
1303 return -EINVAL;
1304 }
1305
1306 wm8960->sysclk = freq;
Zidan Wang3176bf22015-08-11 19:25:15 +08001307 wm8960->clk_id = clk_id;
Zidan Wang0e50b512015-05-12 14:58:08 +08001308
1309 return 0;
1310}
1311
Mark Brownf2644a22009-04-07 19:20:14 +01001312#define WM8960_RATES SNDRV_PCM_RATE_8000_48000
1313
1314#define WM8960_FORMATS \
1315 (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
Zidan Wang7a8c7862015-05-12 14:58:21 +08001316 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE)
Mark Brownf2644a22009-04-07 19:20:14 +01001317
Lars-Peter Clausen85e76522011-11-23 11:40:40 +01001318static const struct snd_soc_dai_ops wm8960_dai_ops = {
Mark Brownf2644a22009-04-07 19:20:14 +01001319 .hw_params = wm8960_hw_params,
Zidan Wang3176bf22015-08-11 19:25:15 +08001320 .hw_free = wm8960_hw_free,
Mark Brownf2644a22009-04-07 19:20:14 +01001321 .digital_mute = wm8960_mute,
1322 .set_fmt = wm8960_set_dai_fmt,
1323 .set_clkdiv = wm8960_set_dai_clkdiv,
1324 .set_pll = wm8960_set_dai_pll,
Zidan Wang0e50b512015-05-12 14:58:08 +08001325 .set_sysclk = wm8960_set_dai_sysclk,
Mark Brownf2644a22009-04-07 19:20:14 +01001326};
1327
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +00001328static struct snd_soc_dai_driver wm8960_dai = {
1329 .name = "wm8960-hifi",
Mark Brownf2644a22009-04-07 19:20:14 +01001330 .playback = {
1331 .stream_name = "Playback",
1332 .channels_min = 1,
1333 .channels_max = 2,
1334 .rates = WM8960_RATES,
1335 .formats = WM8960_FORMATS,},
1336 .capture = {
1337 .stream_name = "Capture",
1338 .channels_min = 1,
1339 .channels_max = 2,
1340 .rates = WM8960_RATES,
1341 .formats = WM8960_FORMATS,},
1342 .ops = &wm8960_dai_ops,
1343 .symmetric_rates = 1,
1344};
Mark Brownf2644a22009-04-07 19:20:14 +01001345
Kuninori Morimotoe075fc12018-01-29 03:05:45 +00001346static int wm8960_probe(struct snd_soc_component *component)
Mark Brownf2644a22009-04-07 19:20:14 +01001347{
Kuninori Morimotoe075fc12018-01-29 03:05:45 +00001348 struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component);
Zidan Wange2280c902014-11-20 19:07:48 +08001349 struct wm8960_data *pdata = &wm8960->pdata;
Mark Brownf2644a22009-04-07 19:20:14 +01001350
Zidan Wange2280c902014-11-20 19:07:48 +08001351 if (pdata->capless)
1352 wm8960->set_bias_level = wm8960_set_bias_level_capless;
1353 else
1354 wm8960->set_bias_level = wm8960_set_bias_level_out3;
Mark Brownf2644a22009-04-07 19:20:14 +01001355
Kuninori Morimotoe075fc12018-01-29 03:05:45 +00001356 snd_soc_add_component_controls(component, wm8960_snd_controls,
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +00001357 ARRAY_SIZE(wm8960_snd_controls));
Kuninori Morimotoe075fc12018-01-29 03:05:45 +00001358 wm8960_add_widgets(component);
Mark Brownf2644a22009-04-07 19:20:14 +01001359
1360 return 0;
1361}
1362
Kuninori Morimotoe075fc12018-01-29 03:05:45 +00001363static const struct snd_soc_component_driver soc_component_dev_wm8960 = {
1364 .probe = wm8960_probe,
1365 .set_bias_level = wm8960_set_bias_level,
1366 .suspend_bias_off = 1,
1367 .idle_bias_on = 1,
1368 .use_pmdown_time = 1,
1369 .endianness = 1,
1370 .non_legacy_dai_naming = 1,
Mark Brown0ebe36c2012-09-10 19:23:57 +08001371};
1372
1373static const struct regmap_config wm8960_regmap = {
1374 .reg_bits = 7,
1375 .val_bits = 9,
1376 .max_register = WM8960_PLL4,
1377
1378 .reg_defaults = wm8960_reg_defaults,
1379 .num_reg_defaults = ARRAY_SIZE(wm8960_reg_defaults),
1380 .cache_type = REGCACHE_RBTREE,
1381
1382 .volatile_reg = wm8960_volatile,
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +00001383};
1384
Zidan Wange2280c902014-11-20 19:07:48 +08001385static void wm8960_set_pdata_from_of(struct i2c_client *i2c,
1386 struct wm8960_data *pdata)
1387{
1388 const struct device_node *np = i2c->dev.of_node;
1389
1390 if (of_property_read_bool(np, "wlf,capless"))
1391 pdata->capless = true;
1392
1393 if (of_property_read_bool(np, "wlf,shared-lrclk"))
1394 pdata->shared_lrclk = true;
1395}
1396
Bill Pemberton7a79e942012-12-07 09:26:37 -05001397static int wm8960_i2c_probe(struct i2c_client *i2c,
1398 const struct i2c_device_id *id)
Mark Brownf2644a22009-04-07 19:20:14 +01001399{
Mark Brown37061632012-09-13 11:46:58 +08001400 struct wm8960_data *pdata = dev_get_platdata(&i2c->dev);
Mark Brownf2644a22009-04-07 19:20:14 +01001401 struct wm8960_priv *wm8960;
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +00001402 int ret;
Mark Brownf2644a22009-04-07 19:20:14 +01001403
Mark Brownb9791c02011-12-16 07:42:58 +01001404 wm8960 = devm_kzalloc(&i2c->dev, sizeof(struct wm8960_priv),
1405 GFP_KERNEL);
Mark Brownf2644a22009-04-07 19:20:14 +01001406 if (wm8960 == NULL)
1407 return -ENOMEM;
1408
Zidan Wang75aa8862015-01-07 15:31:44 +08001409 wm8960->mclk = devm_clk_get(&i2c->dev, "mclk");
1410 if (IS_ERR(wm8960->mclk)) {
1411 if (PTR_ERR(wm8960->mclk) == -EPROBE_DEFER)
1412 return -EPROBE_DEFER;
1413 }
1414
Sachin Kamatc5e6f5f2012-11-26 17:19:43 +05301415 wm8960->regmap = devm_regmap_init_i2c(i2c, &wm8960_regmap);
Mark Brown0ebe36c2012-09-10 19:23:57 +08001416 if (IS_ERR(wm8960->regmap))
1417 return PTR_ERR(wm8960->regmap);
1418
Zidan Wange2280c902014-11-20 19:07:48 +08001419 if (pdata)
1420 memcpy(&wm8960->pdata, pdata, sizeof(struct wm8960_data));
1421 else if (i2c->dev.of_node)
1422 wm8960_set_pdata_from_of(i2c, &wm8960->pdata);
1423
Zidan Wang3ad5e862014-11-27 16:53:08 +08001424 ret = wm8960_reset(wm8960->regmap);
1425 if (ret != 0) {
1426 dev_err(&i2c->dev, "Failed to issue reset\n");
1427 return ret;
1428 }
1429
1430 if (wm8960->pdata.shared_lrclk) {
Mark Brown37061632012-09-13 11:46:58 +08001431 ret = regmap_update_bits(wm8960->regmap, WM8960_ADDCTL2,
1432 0x4, 0x4);
1433 if (ret != 0) {
1434 dev_err(&i2c->dev, "Failed to enable LRCM: %d\n",
1435 ret);
1436 return ret;
1437 }
1438 }
1439
Zidan Wang3ad5e862014-11-27 16:53:08 +08001440 /* Latch the update bits */
1441 regmap_update_bits(wm8960->regmap, WM8960_LINVOL, 0x100, 0x100);
1442 regmap_update_bits(wm8960->regmap, WM8960_RINVOL, 0x100, 0x100);
1443 regmap_update_bits(wm8960->regmap, WM8960_LADC, 0x100, 0x100);
1444 regmap_update_bits(wm8960->regmap, WM8960_RADC, 0x100, 0x100);
1445 regmap_update_bits(wm8960->regmap, WM8960_LDAC, 0x100, 0x100);
1446 regmap_update_bits(wm8960->regmap, WM8960_RDAC, 0x100, 0x100);
1447 regmap_update_bits(wm8960->regmap, WM8960_LOUT1, 0x100, 0x100);
1448 regmap_update_bits(wm8960->regmap, WM8960_ROUT1, 0x100, 0x100);
1449 regmap_update_bits(wm8960->regmap, WM8960_LOUT2, 0x100, 0x100);
1450 regmap_update_bits(wm8960->regmap, WM8960_ROUT2, 0x100, 0x100);
1451
Mark Brownf2644a22009-04-07 19:20:14 +01001452 i2c_set_clientdata(i2c, wm8960);
Mark Brownf2644a22009-04-07 19:20:14 +01001453
Kuninori Morimotoe075fc12018-01-29 03:05:45 +00001454 ret = devm_snd_soc_register_component(&i2c->dev,
1455 &soc_component_dev_wm8960, &wm8960_dai, 1);
Mark Brownb9791c02011-12-16 07:42:58 +01001456
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +00001457 return ret;
Mark Brownf2644a22009-04-07 19:20:14 +01001458}
1459
Bill Pemberton7a79e942012-12-07 09:26:37 -05001460static int wm8960_i2c_remove(struct i2c_client *client)
Mark Brownf2644a22009-04-07 19:20:14 +01001461{
Mark Brownf2644a22009-04-07 19:20:14 +01001462 return 0;
1463}
1464
1465static const struct i2c_device_id wm8960_i2c_id[] = {
1466 { "wm8960", 0 },
1467 { }
1468};
1469MODULE_DEVICE_TABLE(i2c, wm8960_i2c_id);
1470
Zidan Wange2280c902014-11-20 19:07:48 +08001471static const struct of_device_id wm8960_of_match[] = {
1472 { .compatible = "wlf,wm8960", },
1473 { }
1474};
1475MODULE_DEVICE_TABLE(of, wm8960_of_match);
1476
Mark Brownf2644a22009-04-07 19:20:14 +01001477static struct i2c_driver wm8960_i2c_driver = {
1478 .driver = {
Mark Brown091edcc2011-12-02 22:08:49 +00001479 .name = "wm8960",
Zidan Wange2280c902014-11-20 19:07:48 +08001480 .of_match_table = wm8960_of_match,
Mark Brownf2644a22009-04-07 19:20:14 +01001481 },
1482 .probe = wm8960_i2c_probe,
Bill Pemberton7a79e942012-12-07 09:26:37 -05001483 .remove = wm8960_i2c_remove,
Mark Brownf2644a22009-04-07 19:20:14 +01001484 .id_table = wm8960_i2c_id,
1485};
1486
Sachin Kamat3c010e62012-08-06 17:25:36 +05301487module_i2c_driver(wm8960_i2c_driver);
Mark Brownf2644a22009-04-07 19:20:14 +01001488
Mark Brownf2644a22009-04-07 19:20:14 +01001489MODULE_DESCRIPTION("ASoC WM8960 driver");
1490MODULE_AUTHOR("Liam Girdwood");
1491MODULE_LICENSE("GPL");