Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 1 | /* |
| 2 | * Broadcom NetXtreme-E RoCE driver. |
| 3 | * |
| 4 | * Copyright (c) 2016 - 2017, Broadcom. All rights reserved. The term |
| 5 | * Broadcom refers to Broadcom Limited and/or its subsidiaries. |
| 6 | * |
| 7 | * This software is available to you under a choice of one of two |
| 8 | * licenses. You may choose to be licensed under the terms of the GNU |
| 9 | * General Public License (GPL) Version 2, available from the file |
| 10 | * COPYING in the main directory of this source tree, or the |
| 11 | * BSD license below: |
| 12 | * |
| 13 | * Redistribution and use in source and binary forms, with or without |
| 14 | * modification, are permitted provided that the following conditions |
| 15 | * are met: |
| 16 | * |
| 17 | * 1. Redistributions of source code must retain the above copyright |
| 18 | * notice, this list of conditions and the following disclaimer. |
| 19 | * 2. Redistributions in binary form must reproduce the above copyright |
| 20 | * notice, this list of conditions and the following disclaimer in |
| 21 | * the documentation and/or other materials provided with the |
| 22 | * distribution. |
| 23 | * |
| 24 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' |
| 25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, |
| 26 | * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR |
| 27 | * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS |
| 28 | * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
| 29 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
| 30 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR |
| 31 | * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, |
| 32 | * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE |
| 33 | * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN |
| 34 | * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| 35 | * |
| 36 | * Description: Fast Path Operators |
| 37 | */ |
| 38 | |
| 39 | #include <linux/interrupt.h> |
| 40 | #include <linux/spinlock.h> |
| 41 | #include <linux/sched.h> |
| 42 | #include <linux/slab.h> |
| 43 | #include <linux/pci.h> |
| 44 | #include <linux/prefetch.h> |
| 45 | |
| 46 | #include "roce_hsi.h" |
| 47 | |
| 48 | #include "qplib_res.h" |
| 49 | #include "qplib_rcfw.h" |
| 50 | #include "qplib_sp.h" |
| 51 | #include "qplib_fp.h" |
| 52 | |
| 53 | static void bnxt_qplib_arm_cq_enable(struct bnxt_qplib_cq *cq); |
Selvin Xavier | f218d67 | 2017-06-29 12:28:15 -0700 | [diff] [blame] | 54 | static void __clean_cq(struct bnxt_qplib_cq *cq, u64 qp); |
Devesh Sharma | 37cb11a | 2018-01-11 11:52:11 -0500 | [diff] [blame] | 55 | static void bnxt_qplib_arm_srq(struct bnxt_qplib_srq *srq, u32 arm_type); |
Selvin Xavier | f218d67 | 2017-06-29 12:28:15 -0700 | [diff] [blame] | 56 | |
| 57 | static void bnxt_qplib_cancel_phantom_processing(struct bnxt_qplib_qp *qp) |
| 58 | { |
| 59 | qp->sq.condition = false; |
| 60 | qp->sq.send_phantom = false; |
| 61 | qp->sq.single = false; |
| 62 | } |
| 63 | |
| 64 | /* Flush list */ |
| 65 | static void __bnxt_qplib_add_flush_qp(struct bnxt_qplib_qp *qp) |
| 66 | { |
| 67 | struct bnxt_qplib_cq *scq, *rcq; |
| 68 | |
| 69 | scq = qp->scq; |
| 70 | rcq = qp->rcq; |
| 71 | |
| 72 | if (!qp->sq.flushed) { |
| 73 | dev_dbg(&scq->hwq.pdev->dev, |
| 74 | "QPLIB: FP: Adding to SQ Flush list = %p", |
| 75 | qp); |
| 76 | bnxt_qplib_cancel_phantom_processing(qp); |
| 77 | list_add_tail(&qp->sq_flush, &scq->sqf_head); |
| 78 | qp->sq.flushed = true; |
| 79 | } |
| 80 | if (!qp->srq) { |
| 81 | if (!qp->rq.flushed) { |
| 82 | dev_dbg(&rcq->hwq.pdev->dev, |
| 83 | "QPLIB: FP: Adding to RQ Flush list = %p", |
| 84 | qp); |
| 85 | list_add_tail(&qp->rq_flush, &rcq->rqf_head); |
| 86 | qp->rq.flushed = true; |
| 87 | } |
| 88 | } |
| 89 | } |
| 90 | |
| 91 | void bnxt_qplib_acquire_cq_locks(struct bnxt_qplib_qp *qp, |
| 92 | unsigned long *flags) |
| 93 | __acquires(&qp->scq->hwq.lock) __acquires(&qp->rcq->hwq.lock) |
| 94 | { |
| 95 | spin_lock_irqsave(&qp->scq->hwq.lock, *flags); |
| 96 | if (qp->scq == qp->rcq) |
| 97 | __acquire(&qp->rcq->hwq.lock); |
| 98 | else |
| 99 | spin_lock(&qp->rcq->hwq.lock); |
| 100 | } |
| 101 | |
| 102 | void bnxt_qplib_release_cq_locks(struct bnxt_qplib_qp *qp, |
| 103 | unsigned long *flags) |
| 104 | __releases(&qp->scq->hwq.lock) __releases(&qp->rcq->hwq.lock) |
| 105 | { |
| 106 | if (qp->scq == qp->rcq) |
| 107 | __release(&qp->rcq->hwq.lock); |
| 108 | else |
| 109 | spin_unlock(&qp->rcq->hwq.lock); |
| 110 | spin_unlock_irqrestore(&qp->scq->hwq.lock, *flags); |
| 111 | } |
| 112 | |
| 113 | static struct bnxt_qplib_cq *bnxt_qplib_find_buddy_cq(struct bnxt_qplib_qp *qp, |
| 114 | struct bnxt_qplib_cq *cq) |
| 115 | { |
| 116 | struct bnxt_qplib_cq *buddy_cq = NULL; |
| 117 | |
| 118 | if (qp->scq == qp->rcq) |
| 119 | buddy_cq = NULL; |
| 120 | else if (qp->scq == cq) |
| 121 | buddy_cq = qp->rcq; |
| 122 | else |
| 123 | buddy_cq = qp->scq; |
| 124 | return buddy_cq; |
| 125 | } |
| 126 | |
| 127 | static void bnxt_qplib_lock_buddy_cq(struct bnxt_qplib_qp *qp, |
| 128 | struct bnxt_qplib_cq *cq) |
| 129 | __acquires(&buddy_cq->hwq.lock) |
| 130 | { |
| 131 | struct bnxt_qplib_cq *buddy_cq = NULL; |
| 132 | |
| 133 | buddy_cq = bnxt_qplib_find_buddy_cq(qp, cq); |
| 134 | if (!buddy_cq) |
| 135 | __acquire(&cq->hwq.lock); |
| 136 | else |
| 137 | spin_lock(&buddy_cq->hwq.lock); |
| 138 | } |
| 139 | |
| 140 | static void bnxt_qplib_unlock_buddy_cq(struct bnxt_qplib_qp *qp, |
| 141 | struct bnxt_qplib_cq *cq) |
| 142 | __releases(&buddy_cq->hwq.lock) |
| 143 | { |
| 144 | struct bnxt_qplib_cq *buddy_cq = NULL; |
| 145 | |
| 146 | buddy_cq = bnxt_qplib_find_buddy_cq(qp, cq); |
| 147 | if (!buddy_cq) |
| 148 | __release(&cq->hwq.lock); |
| 149 | else |
| 150 | spin_unlock(&buddy_cq->hwq.lock); |
| 151 | } |
| 152 | |
| 153 | void bnxt_qplib_add_flush_qp(struct bnxt_qplib_qp *qp) |
| 154 | { |
| 155 | unsigned long flags; |
| 156 | |
| 157 | bnxt_qplib_acquire_cq_locks(qp, &flags); |
| 158 | __bnxt_qplib_add_flush_qp(qp); |
| 159 | bnxt_qplib_release_cq_locks(qp, &flags); |
| 160 | } |
| 161 | |
| 162 | static void __bnxt_qplib_del_flush_qp(struct bnxt_qplib_qp *qp) |
| 163 | { |
Selvin Xavier | f218d67 | 2017-06-29 12:28:15 -0700 | [diff] [blame] | 164 | if (qp->sq.flushed) { |
| 165 | qp->sq.flushed = false; |
| 166 | list_del(&qp->sq_flush); |
| 167 | } |
| 168 | if (!qp->srq) { |
| 169 | if (qp->rq.flushed) { |
| 170 | qp->rq.flushed = false; |
| 171 | list_del(&qp->rq_flush); |
| 172 | } |
| 173 | } |
| 174 | } |
| 175 | |
Selvin Xavier | 3b921e3 | 2018-02-15 21:20:11 -0800 | [diff] [blame^] | 176 | void bnxt_qplib_clean_qp(struct bnxt_qplib_qp *qp) |
Selvin Xavier | f218d67 | 2017-06-29 12:28:15 -0700 | [diff] [blame] | 177 | { |
| 178 | unsigned long flags; |
| 179 | |
| 180 | bnxt_qplib_acquire_cq_locks(qp, &flags); |
| 181 | __clean_cq(qp->scq, (u64)(unsigned long)qp); |
| 182 | qp->sq.hwq.prod = 0; |
| 183 | qp->sq.hwq.cons = 0; |
| 184 | __clean_cq(qp->rcq, (u64)(unsigned long)qp); |
| 185 | qp->rq.hwq.prod = 0; |
| 186 | qp->rq.hwq.cons = 0; |
| 187 | |
| 188 | __bnxt_qplib_del_flush_qp(qp); |
| 189 | bnxt_qplib_release_cq_locks(qp, &flags); |
| 190 | } |
| 191 | |
| 192 | static void bnxt_qpn_cqn_sched_task(struct work_struct *work) |
| 193 | { |
| 194 | struct bnxt_qplib_nq_work *nq_work = |
| 195 | container_of(work, struct bnxt_qplib_nq_work, work); |
| 196 | |
| 197 | struct bnxt_qplib_cq *cq = nq_work->cq; |
| 198 | struct bnxt_qplib_nq *nq = nq_work->nq; |
| 199 | |
| 200 | if (cq && nq) { |
| 201 | spin_lock_bh(&cq->compl_lock); |
| 202 | if (atomic_read(&cq->arm_state) && nq->cqn_handler) { |
| 203 | dev_dbg(&nq->pdev->dev, |
| 204 | "%s:Trigger cq = %p event nq = %p\n", |
| 205 | __func__, cq, nq); |
| 206 | nq->cqn_handler(nq, cq); |
| 207 | } |
| 208 | spin_unlock_bh(&cq->compl_lock); |
| 209 | } |
| 210 | kfree(nq_work); |
| 211 | } |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 212 | |
| 213 | static void bnxt_qplib_free_qp_hdr_buf(struct bnxt_qplib_res *res, |
| 214 | struct bnxt_qplib_qp *qp) |
| 215 | { |
| 216 | struct bnxt_qplib_q *rq = &qp->rq; |
| 217 | struct bnxt_qplib_q *sq = &qp->sq; |
| 218 | |
| 219 | if (qp->rq_hdr_buf) |
| 220 | dma_free_coherent(&res->pdev->dev, |
| 221 | rq->hwq.max_elements * qp->rq_hdr_buf_size, |
| 222 | qp->rq_hdr_buf, qp->rq_hdr_buf_map); |
| 223 | if (qp->sq_hdr_buf) |
| 224 | dma_free_coherent(&res->pdev->dev, |
| 225 | sq->hwq.max_elements * qp->sq_hdr_buf_size, |
| 226 | qp->sq_hdr_buf, qp->sq_hdr_buf_map); |
| 227 | qp->rq_hdr_buf = NULL; |
| 228 | qp->sq_hdr_buf = NULL; |
| 229 | qp->rq_hdr_buf_map = 0; |
| 230 | qp->sq_hdr_buf_map = 0; |
| 231 | qp->sq_hdr_buf_size = 0; |
| 232 | qp->rq_hdr_buf_size = 0; |
| 233 | } |
| 234 | |
| 235 | static int bnxt_qplib_alloc_qp_hdr_buf(struct bnxt_qplib_res *res, |
| 236 | struct bnxt_qplib_qp *qp) |
| 237 | { |
| 238 | struct bnxt_qplib_q *rq = &qp->rq; |
| 239 | struct bnxt_qplib_q *sq = &qp->rq; |
| 240 | int rc = 0; |
| 241 | |
| 242 | if (qp->sq_hdr_buf_size && sq->hwq.max_elements) { |
| 243 | qp->sq_hdr_buf = dma_alloc_coherent(&res->pdev->dev, |
| 244 | sq->hwq.max_elements * |
| 245 | qp->sq_hdr_buf_size, |
| 246 | &qp->sq_hdr_buf_map, GFP_KERNEL); |
| 247 | if (!qp->sq_hdr_buf) { |
| 248 | rc = -ENOMEM; |
| 249 | dev_err(&res->pdev->dev, |
| 250 | "QPLIB: Failed to create sq_hdr_buf"); |
| 251 | goto fail; |
| 252 | } |
| 253 | } |
| 254 | |
| 255 | if (qp->rq_hdr_buf_size && rq->hwq.max_elements) { |
| 256 | qp->rq_hdr_buf = dma_alloc_coherent(&res->pdev->dev, |
| 257 | rq->hwq.max_elements * |
| 258 | qp->rq_hdr_buf_size, |
| 259 | &qp->rq_hdr_buf_map, |
| 260 | GFP_KERNEL); |
| 261 | if (!qp->rq_hdr_buf) { |
| 262 | rc = -ENOMEM; |
| 263 | dev_err(&res->pdev->dev, |
| 264 | "QPLIB: Failed to create rq_hdr_buf"); |
| 265 | goto fail; |
| 266 | } |
| 267 | } |
| 268 | return 0; |
| 269 | |
| 270 | fail: |
| 271 | bnxt_qplib_free_qp_hdr_buf(res, qp); |
| 272 | return rc; |
| 273 | } |
| 274 | |
| 275 | static void bnxt_qplib_service_nq(unsigned long data) |
| 276 | { |
| 277 | struct bnxt_qplib_nq *nq = (struct bnxt_qplib_nq *)data; |
| 278 | struct bnxt_qplib_hwq *hwq = &nq->hwq; |
| 279 | struct nq_base *nqe, **nq_ptr; |
Selvin Xavier | f218d67 | 2017-06-29 12:28:15 -0700 | [diff] [blame] | 280 | struct bnxt_qplib_cq *cq; |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 281 | int num_cqne_processed = 0; |
Devesh Sharma | 37cb11a | 2018-01-11 11:52:11 -0500 | [diff] [blame] | 282 | int num_srqne_processed = 0; |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 283 | u32 sw_cons, raw_cons; |
| 284 | u16 type; |
| 285 | int budget = nq->budget; |
| 286 | u64 q_handle; |
| 287 | |
| 288 | /* Service the NQ until empty */ |
| 289 | raw_cons = hwq->cons; |
| 290 | while (budget--) { |
| 291 | sw_cons = HWQ_CMP(raw_cons, hwq); |
| 292 | nq_ptr = (struct nq_base **)hwq->pbl_ptr; |
| 293 | nqe = &nq_ptr[NQE_PG(sw_cons)][NQE_IDX(sw_cons)]; |
| 294 | if (!NQE_CMP_VALID(nqe, raw_cons, hwq->max_elements)) |
| 295 | break; |
| 296 | |
Somnath Kotur | 9b40183 | 2017-11-06 08:07:29 -0800 | [diff] [blame] | 297 | /* |
| 298 | * The valid test of the entry must be done first before |
| 299 | * reading any further. |
| 300 | */ |
| 301 | dma_rmb(); |
| 302 | |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 303 | type = le16_to_cpu(nqe->info10_type) & NQ_BASE_TYPE_MASK; |
| 304 | switch (type) { |
| 305 | case NQ_BASE_TYPE_CQ_NOTIFICATION: |
| 306 | { |
| 307 | struct nq_cn *nqcne = (struct nq_cn *)nqe; |
| 308 | |
| 309 | q_handle = le32_to_cpu(nqcne->cq_handle_low); |
| 310 | q_handle |= (u64)le32_to_cpu(nqcne->cq_handle_high) |
| 311 | << 32; |
Selvin Xavier | f218d67 | 2017-06-29 12:28:15 -0700 | [diff] [blame] | 312 | cq = (struct bnxt_qplib_cq *)(unsigned long)q_handle; |
| 313 | bnxt_qplib_arm_cq_enable(cq); |
| 314 | spin_lock_bh(&cq->compl_lock); |
| 315 | atomic_set(&cq->arm_state, 0); |
| 316 | if (!nq->cqn_handler(nq, (cq))) |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 317 | num_cqne_processed++; |
| 318 | else |
| 319 | dev_warn(&nq->pdev->dev, |
| 320 | "QPLIB: cqn - type 0x%x not handled", |
| 321 | type); |
Selvin Xavier | f218d67 | 2017-06-29 12:28:15 -0700 | [diff] [blame] | 322 | spin_unlock_bh(&cq->compl_lock); |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 323 | break; |
| 324 | } |
Devesh Sharma | 37cb11a | 2018-01-11 11:52:11 -0500 | [diff] [blame] | 325 | case NQ_BASE_TYPE_SRQ_EVENT: |
| 326 | { |
| 327 | struct nq_srq_event *nqsrqe = |
| 328 | (struct nq_srq_event *)nqe; |
| 329 | |
| 330 | q_handle = le32_to_cpu(nqsrqe->srq_handle_low); |
| 331 | q_handle |= (u64)le32_to_cpu(nqsrqe->srq_handle_high) |
| 332 | << 32; |
| 333 | bnxt_qplib_arm_srq((struct bnxt_qplib_srq *)q_handle, |
| 334 | DBR_DBR_TYPE_SRQ_ARMENA); |
| 335 | if (!nq->srqn_handler(nq, |
| 336 | (struct bnxt_qplib_srq *)q_handle, |
| 337 | nqsrqe->event)) |
| 338 | num_srqne_processed++; |
| 339 | else |
| 340 | dev_warn(&nq->pdev->dev, |
| 341 | "QPLIB: SRQ event 0x%x not handled", |
| 342 | nqsrqe->event); |
| 343 | break; |
| 344 | } |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 345 | case NQ_BASE_TYPE_DBQ_EVENT: |
| 346 | break; |
| 347 | default: |
| 348 | dev_warn(&nq->pdev->dev, |
| 349 | "QPLIB: nqe with type = 0x%x not handled", |
| 350 | type); |
| 351 | break; |
| 352 | } |
| 353 | raw_cons++; |
| 354 | } |
| 355 | if (hwq->cons != raw_cons) { |
| 356 | hwq->cons = raw_cons; |
| 357 | NQ_DB_REARM(nq->bar_reg_iomem, hwq->cons, hwq->max_elements); |
| 358 | } |
| 359 | } |
| 360 | |
| 361 | static irqreturn_t bnxt_qplib_nq_irq(int irq, void *dev_instance) |
| 362 | { |
| 363 | struct bnxt_qplib_nq *nq = dev_instance; |
| 364 | struct bnxt_qplib_hwq *hwq = &nq->hwq; |
| 365 | struct nq_base **nq_ptr; |
| 366 | u32 sw_cons; |
| 367 | |
| 368 | /* Prefetch the NQ element */ |
| 369 | sw_cons = HWQ_CMP(hwq->cons, hwq); |
| 370 | nq_ptr = (struct nq_base **)nq->hwq.pbl_ptr; |
| 371 | prefetch(&nq_ptr[NQE_PG(sw_cons)][NQE_IDX(sw_cons)]); |
| 372 | |
| 373 | /* Fan out to CPU affinitized kthreads? */ |
| 374 | tasklet_schedule(&nq->worker); |
| 375 | |
| 376 | return IRQ_HANDLED; |
| 377 | } |
| 378 | |
| 379 | void bnxt_qplib_disable_nq(struct bnxt_qplib_nq *nq) |
| 380 | { |
Selvin Xavier | f218d67 | 2017-06-29 12:28:15 -0700 | [diff] [blame] | 381 | if (nq->cqn_wq) { |
| 382 | destroy_workqueue(nq->cqn_wq); |
| 383 | nq->cqn_wq = NULL; |
| 384 | } |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 385 | /* Make sure the HW is stopped! */ |
| 386 | synchronize_irq(nq->vector); |
| 387 | tasklet_disable(&nq->worker); |
| 388 | tasklet_kill(&nq->worker); |
| 389 | |
| 390 | if (nq->requested) { |
Selvin Xavier | 6a5df91 | 2017-08-02 01:46:18 -0700 | [diff] [blame] | 391 | irq_set_affinity_hint(nq->vector, NULL); |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 392 | free_irq(nq->vector, nq); |
| 393 | nq->requested = false; |
| 394 | } |
| 395 | if (nq->bar_reg_iomem) |
| 396 | iounmap(nq->bar_reg_iomem); |
| 397 | nq->bar_reg_iomem = NULL; |
| 398 | |
| 399 | nq->cqn_handler = NULL; |
| 400 | nq->srqn_handler = NULL; |
| 401 | nq->vector = 0; |
| 402 | } |
| 403 | |
| 404 | int bnxt_qplib_enable_nq(struct pci_dev *pdev, struct bnxt_qplib_nq *nq, |
Selvin Xavier | 6a5df91 | 2017-08-02 01:46:18 -0700 | [diff] [blame] | 405 | int nq_idx, int msix_vector, int bar_reg_offset, |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 406 | int (*cqn_handler)(struct bnxt_qplib_nq *nq, |
| 407 | struct bnxt_qplib_cq *), |
| 408 | int (*srqn_handler)(struct bnxt_qplib_nq *nq, |
Devesh Sharma | 37cb11a | 2018-01-11 11:52:11 -0500 | [diff] [blame] | 409 | struct bnxt_qplib_srq *, |
| 410 | u8 event)) |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 411 | { |
| 412 | resource_size_t nq_base; |
Selvin Xavier | f218d67 | 2017-06-29 12:28:15 -0700 | [diff] [blame] | 413 | int rc = -1; |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 414 | |
| 415 | nq->pdev = pdev; |
| 416 | nq->vector = msix_vector; |
Devesh Sharma | 37cb11a | 2018-01-11 11:52:11 -0500 | [diff] [blame] | 417 | if (cqn_handler) |
| 418 | nq->cqn_handler = cqn_handler; |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 419 | |
Devesh Sharma | 37cb11a | 2018-01-11 11:52:11 -0500 | [diff] [blame] | 420 | if (srqn_handler) |
| 421 | nq->srqn_handler = srqn_handler; |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 422 | |
| 423 | tasklet_init(&nq->worker, bnxt_qplib_service_nq, (unsigned long)nq); |
| 424 | |
Selvin Xavier | f218d67 | 2017-06-29 12:28:15 -0700 | [diff] [blame] | 425 | /* Have a task to schedule CQ notifiers in post send case */ |
| 426 | nq->cqn_wq = create_singlethread_workqueue("bnxt_qplib_nq"); |
| 427 | if (!nq->cqn_wq) |
| 428 | goto fail; |
| 429 | |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 430 | nq->requested = false; |
Selvin Xavier | 6a5df91 | 2017-08-02 01:46:18 -0700 | [diff] [blame] | 431 | memset(nq->name, 0, 32); |
| 432 | sprintf(nq->name, "bnxt_qplib_nq-%d", nq_idx); |
| 433 | rc = request_irq(nq->vector, bnxt_qplib_nq_irq, 0, nq->name, nq); |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 434 | if (rc) { |
| 435 | dev_err(&nq->pdev->dev, |
| 436 | "Failed to request IRQ for NQ: %#x", rc); |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 437 | goto fail; |
| 438 | } |
Selvin Xavier | 6a5df91 | 2017-08-02 01:46:18 -0700 | [diff] [blame] | 439 | |
| 440 | cpumask_clear(&nq->mask); |
| 441 | cpumask_set_cpu(nq_idx, &nq->mask); |
| 442 | rc = irq_set_affinity_hint(nq->vector, &nq->mask); |
| 443 | if (rc) { |
| 444 | dev_warn(&nq->pdev->dev, |
| 445 | "QPLIB: set affinity failed; vector: %d nq_idx: %d\n", |
| 446 | nq->vector, nq_idx); |
| 447 | } |
| 448 | |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 449 | nq->requested = true; |
| 450 | nq->bar_reg = NQ_CONS_PCI_BAR_REGION; |
| 451 | nq->bar_reg_off = bar_reg_offset; |
| 452 | nq_base = pci_resource_start(pdev, nq->bar_reg); |
| 453 | if (!nq_base) { |
| 454 | rc = -ENOMEM; |
| 455 | goto fail; |
| 456 | } |
| 457 | nq->bar_reg_iomem = ioremap_nocache(nq_base + nq->bar_reg_off, 4); |
| 458 | if (!nq->bar_reg_iomem) { |
| 459 | rc = -ENOMEM; |
| 460 | goto fail; |
| 461 | } |
| 462 | NQ_DB_REARM(nq->bar_reg_iomem, nq->hwq.cons, nq->hwq.max_elements); |
| 463 | |
| 464 | return 0; |
| 465 | fail: |
| 466 | bnxt_qplib_disable_nq(nq); |
| 467 | return rc; |
| 468 | } |
| 469 | |
| 470 | void bnxt_qplib_free_nq(struct bnxt_qplib_nq *nq) |
| 471 | { |
Selvin Xavier | 6a5df91 | 2017-08-02 01:46:18 -0700 | [diff] [blame] | 472 | if (nq->hwq.max_elements) { |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 473 | bnxt_qplib_free_hwq(nq->pdev, &nq->hwq); |
Selvin Xavier | 6a5df91 | 2017-08-02 01:46:18 -0700 | [diff] [blame] | 474 | nq->hwq.max_elements = 0; |
| 475 | } |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 476 | } |
| 477 | |
| 478 | int bnxt_qplib_alloc_nq(struct pci_dev *pdev, struct bnxt_qplib_nq *nq) |
| 479 | { |
| 480 | nq->pdev = pdev; |
| 481 | if (!nq->hwq.max_elements || |
| 482 | nq->hwq.max_elements > BNXT_QPLIB_NQE_MAX_CNT) |
| 483 | nq->hwq.max_elements = BNXT_QPLIB_NQE_MAX_CNT; |
| 484 | |
| 485 | if (bnxt_qplib_alloc_init_hwq(nq->pdev, &nq->hwq, NULL, 0, |
| 486 | &nq->hwq.max_elements, |
| 487 | BNXT_QPLIB_MAX_NQE_ENTRY_SIZE, 0, |
| 488 | PAGE_SIZE, HWQ_TYPE_L2_CMPL)) |
| 489 | return -ENOMEM; |
| 490 | |
| 491 | nq->budget = 8; |
| 492 | return 0; |
| 493 | } |
| 494 | |
Devesh Sharma | 37cb11a | 2018-01-11 11:52:11 -0500 | [diff] [blame] | 495 | /* SRQ */ |
| 496 | static void bnxt_qplib_arm_srq(struct bnxt_qplib_srq *srq, u32 arm_type) |
| 497 | { |
| 498 | struct bnxt_qplib_hwq *srq_hwq = &srq->hwq; |
| 499 | struct dbr_dbr db_msg = { 0 }; |
| 500 | void __iomem *db; |
| 501 | u32 sw_prod = 0; |
| 502 | |
| 503 | /* Ring DB */ |
| 504 | sw_prod = (arm_type == DBR_DBR_TYPE_SRQ_ARM) ? srq->threshold : |
| 505 | HWQ_CMP(srq_hwq->prod, srq_hwq); |
| 506 | db_msg.index = cpu_to_le32((sw_prod << DBR_DBR_INDEX_SFT) & |
| 507 | DBR_DBR_INDEX_MASK); |
| 508 | db_msg.type_xid = cpu_to_le32(((srq->id << DBR_DBR_XID_SFT) & |
| 509 | DBR_DBR_XID_MASK) | arm_type); |
| 510 | db = (arm_type == DBR_DBR_TYPE_SRQ_ARMENA) ? |
| 511 | srq->dbr_base : srq->dpi->dbr; |
| 512 | wmb(); /* barrier before db ring */ |
| 513 | __iowrite64_copy(db, &db_msg, sizeof(db_msg) / sizeof(u64)); |
| 514 | } |
| 515 | |
| 516 | int bnxt_qplib_destroy_srq(struct bnxt_qplib_res *res, |
| 517 | struct bnxt_qplib_srq *srq) |
| 518 | { |
| 519 | struct bnxt_qplib_rcfw *rcfw = res->rcfw; |
| 520 | struct cmdq_destroy_srq req; |
| 521 | struct creq_destroy_srq_resp resp; |
| 522 | u16 cmd_flags = 0; |
| 523 | int rc; |
| 524 | |
| 525 | RCFW_CMD_PREP(req, DESTROY_SRQ, cmd_flags); |
| 526 | |
| 527 | /* Configure the request */ |
| 528 | req.srq_cid = cpu_to_le32(srq->id); |
| 529 | |
| 530 | rc = bnxt_qplib_rcfw_send_message(rcfw, (void *)&req, |
| 531 | (void *)&resp, NULL, 0); |
| 532 | if (rc) |
| 533 | return rc; |
| 534 | |
| 535 | bnxt_qplib_free_hwq(res->pdev, &srq->hwq); |
| 536 | kfree(srq->swq); |
| 537 | return 0; |
| 538 | } |
| 539 | |
| 540 | int bnxt_qplib_create_srq(struct bnxt_qplib_res *res, |
| 541 | struct bnxt_qplib_srq *srq) |
| 542 | { |
| 543 | struct bnxt_qplib_rcfw *rcfw = res->rcfw; |
| 544 | struct cmdq_create_srq req; |
| 545 | struct creq_create_srq_resp resp; |
| 546 | struct bnxt_qplib_pbl *pbl; |
| 547 | u16 cmd_flags = 0; |
| 548 | int rc, idx; |
| 549 | |
| 550 | srq->hwq.max_elements = srq->max_wqe; |
| 551 | rc = bnxt_qplib_alloc_init_hwq(res->pdev, &srq->hwq, srq->sglist, |
| 552 | srq->nmap, &srq->hwq.max_elements, |
| 553 | BNXT_QPLIB_MAX_RQE_ENTRY_SIZE, 0, |
| 554 | PAGE_SIZE, HWQ_TYPE_QUEUE); |
| 555 | if (rc) |
| 556 | goto exit; |
| 557 | |
| 558 | srq->swq = kcalloc(srq->hwq.max_elements, sizeof(*srq->swq), |
| 559 | GFP_KERNEL); |
Dan Carpenter | 8de9399 | 2018-01-30 23:40:30 +0300 | [diff] [blame] | 560 | if (!srq->swq) { |
| 561 | rc = -ENOMEM; |
Devesh Sharma | 37cb11a | 2018-01-11 11:52:11 -0500 | [diff] [blame] | 562 | goto fail; |
Dan Carpenter | 8de9399 | 2018-01-30 23:40:30 +0300 | [diff] [blame] | 563 | } |
Devesh Sharma | 37cb11a | 2018-01-11 11:52:11 -0500 | [diff] [blame] | 564 | |
| 565 | RCFW_CMD_PREP(req, CREATE_SRQ, cmd_flags); |
| 566 | |
| 567 | /* Configure the request */ |
| 568 | req.dpi = cpu_to_le32(srq->dpi->dpi); |
| 569 | req.srq_handle = cpu_to_le64(srq); |
| 570 | |
| 571 | req.srq_size = cpu_to_le16((u16)srq->hwq.max_elements); |
| 572 | pbl = &srq->hwq.pbl[PBL_LVL_0]; |
| 573 | req.pg_size_lvl = cpu_to_le16((((u16)srq->hwq.level & |
| 574 | CMDQ_CREATE_SRQ_LVL_MASK) << |
| 575 | CMDQ_CREATE_SRQ_LVL_SFT) | |
| 576 | (pbl->pg_size == ROCE_PG_SIZE_4K ? |
| 577 | CMDQ_CREATE_SRQ_PG_SIZE_PG_4K : |
| 578 | pbl->pg_size == ROCE_PG_SIZE_8K ? |
| 579 | CMDQ_CREATE_SRQ_PG_SIZE_PG_8K : |
| 580 | pbl->pg_size == ROCE_PG_SIZE_64K ? |
| 581 | CMDQ_CREATE_SRQ_PG_SIZE_PG_64K : |
| 582 | pbl->pg_size == ROCE_PG_SIZE_2M ? |
| 583 | CMDQ_CREATE_SRQ_PG_SIZE_PG_2M : |
| 584 | pbl->pg_size == ROCE_PG_SIZE_8M ? |
| 585 | CMDQ_CREATE_SRQ_PG_SIZE_PG_8M : |
| 586 | pbl->pg_size == ROCE_PG_SIZE_1G ? |
| 587 | CMDQ_CREATE_SRQ_PG_SIZE_PG_1G : |
| 588 | CMDQ_CREATE_SRQ_PG_SIZE_PG_4K)); |
| 589 | req.pbl = cpu_to_le64(pbl->pg_map_arr[0]); |
| 590 | req.pd_id = cpu_to_le32(srq->pd->id); |
| 591 | req.eventq_id = cpu_to_le16(srq->eventq_hw_ring_id); |
| 592 | |
| 593 | rc = bnxt_qplib_rcfw_send_message(rcfw, (void *)&req, |
| 594 | (void *)&resp, NULL, 0); |
| 595 | if (rc) |
| 596 | goto fail; |
| 597 | |
| 598 | spin_lock_init(&srq->lock); |
| 599 | srq->start_idx = 0; |
| 600 | srq->last_idx = srq->hwq.max_elements - 1; |
| 601 | for (idx = 0; idx < srq->hwq.max_elements; idx++) |
| 602 | srq->swq[idx].next_idx = idx + 1; |
| 603 | srq->swq[srq->last_idx].next_idx = -1; |
| 604 | |
| 605 | srq->id = le32_to_cpu(resp.xid); |
| 606 | srq->dbr_base = res->dpi_tbl.dbr_bar_reg_iomem; |
| 607 | if (srq->threshold) |
| 608 | bnxt_qplib_arm_srq(srq, DBR_DBR_TYPE_SRQ_ARMENA); |
| 609 | srq->arm_req = false; |
| 610 | |
| 611 | return 0; |
| 612 | fail: |
| 613 | bnxt_qplib_free_hwq(res->pdev, &srq->hwq); |
| 614 | kfree(srq->swq); |
| 615 | exit: |
| 616 | return rc; |
| 617 | } |
| 618 | |
| 619 | int bnxt_qplib_modify_srq(struct bnxt_qplib_res *res, |
| 620 | struct bnxt_qplib_srq *srq) |
| 621 | { |
| 622 | struct bnxt_qplib_hwq *srq_hwq = &srq->hwq; |
| 623 | u32 sw_prod, sw_cons, count = 0; |
| 624 | |
| 625 | sw_prod = HWQ_CMP(srq_hwq->prod, srq_hwq); |
| 626 | sw_cons = HWQ_CMP(srq_hwq->cons, srq_hwq); |
| 627 | |
| 628 | count = sw_prod > sw_cons ? sw_prod - sw_cons : |
| 629 | srq_hwq->max_elements - sw_cons + sw_prod; |
| 630 | if (count > srq->threshold) { |
| 631 | srq->arm_req = false; |
| 632 | bnxt_qplib_arm_srq(srq, DBR_DBR_TYPE_SRQ_ARM); |
| 633 | } else { |
| 634 | /* Deferred arming */ |
| 635 | srq->arm_req = true; |
| 636 | } |
| 637 | |
| 638 | return 0; |
| 639 | } |
| 640 | |
| 641 | int bnxt_qplib_query_srq(struct bnxt_qplib_res *res, |
| 642 | struct bnxt_qplib_srq *srq) |
| 643 | { |
| 644 | struct bnxt_qplib_rcfw *rcfw = res->rcfw; |
| 645 | struct cmdq_query_srq req; |
| 646 | struct creq_query_srq_resp resp; |
| 647 | struct bnxt_qplib_rcfw_sbuf *sbuf; |
| 648 | struct creq_query_srq_resp_sb *sb; |
| 649 | u16 cmd_flags = 0; |
| 650 | int rc = 0; |
| 651 | |
| 652 | RCFW_CMD_PREP(req, QUERY_SRQ, cmd_flags); |
| 653 | req.srq_cid = cpu_to_le32(srq->id); |
| 654 | |
| 655 | /* Configure the request */ |
| 656 | sbuf = bnxt_qplib_rcfw_alloc_sbuf(rcfw, sizeof(*sb)); |
| 657 | if (!sbuf) |
| 658 | return -ENOMEM; |
| 659 | sb = sbuf->sb; |
| 660 | rc = bnxt_qplib_rcfw_send_message(rcfw, (void *)&req, (void *)&resp, |
| 661 | (void *)sbuf, 0); |
| 662 | srq->threshold = le16_to_cpu(sb->srq_limit); |
| 663 | bnxt_qplib_rcfw_free_sbuf(rcfw, sbuf); |
| 664 | |
| 665 | return rc; |
| 666 | } |
| 667 | |
| 668 | int bnxt_qplib_post_srq_recv(struct bnxt_qplib_srq *srq, |
| 669 | struct bnxt_qplib_swqe *wqe) |
| 670 | { |
| 671 | struct bnxt_qplib_hwq *srq_hwq = &srq->hwq; |
| 672 | struct rq_wqe *srqe, **srqe_ptr; |
| 673 | struct sq_sge *hw_sge; |
| 674 | u32 sw_prod, sw_cons, count = 0; |
| 675 | int i, rc = 0, next; |
| 676 | |
| 677 | spin_lock(&srq_hwq->lock); |
| 678 | if (srq->start_idx == srq->last_idx) { |
| 679 | dev_err(&srq_hwq->pdev->dev, "QPLIB: FP: SRQ (0x%x) is full!", |
| 680 | srq->id); |
| 681 | rc = -EINVAL; |
| 682 | spin_unlock(&srq_hwq->lock); |
| 683 | goto done; |
| 684 | } |
| 685 | next = srq->start_idx; |
| 686 | srq->start_idx = srq->swq[next].next_idx; |
| 687 | spin_unlock(&srq_hwq->lock); |
| 688 | |
| 689 | sw_prod = HWQ_CMP(srq_hwq->prod, srq_hwq); |
| 690 | srqe_ptr = (struct rq_wqe **)srq_hwq->pbl_ptr; |
| 691 | srqe = &srqe_ptr[RQE_PG(sw_prod)][RQE_IDX(sw_prod)]; |
| 692 | memset(srqe, 0, BNXT_QPLIB_MAX_RQE_ENTRY_SIZE); |
| 693 | /* Calculate wqe_size16 and data_len */ |
| 694 | for (i = 0, hw_sge = (struct sq_sge *)srqe->data; |
| 695 | i < wqe->num_sge; i++, hw_sge++) { |
| 696 | hw_sge->va_or_pa = cpu_to_le64(wqe->sg_list[i].addr); |
| 697 | hw_sge->l_key = cpu_to_le32(wqe->sg_list[i].lkey); |
| 698 | hw_sge->size = cpu_to_le32(wqe->sg_list[i].size); |
| 699 | } |
| 700 | srqe->wqe_type = wqe->type; |
| 701 | srqe->flags = wqe->flags; |
| 702 | srqe->wqe_size = wqe->num_sge + |
| 703 | ((offsetof(typeof(*srqe), data) + 15) >> 4); |
| 704 | srqe->wr_id[0] = cpu_to_le32((u32)next); |
| 705 | srq->swq[next].wr_id = wqe->wr_id; |
| 706 | |
| 707 | srq_hwq->prod++; |
| 708 | |
| 709 | spin_lock(&srq_hwq->lock); |
| 710 | sw_prod = HWQ_CMP(srq_hwq->prod, srq_hwq); |
| 711 | /* retaining srq_hwq->cons for this logic |
| 712 | * actually the lock is only required to |
| 713 | * read srq_hwq->cons. |
| 714 | */ |
| 715 | sw_cons = HWQ_CMP(srq_hwq->cons, srq_hwq); |
| 716 | count = sw_prod > sw_cons ? sw_prod - sw_cons : |
| 717 | srq_hwq->max_elements - sw_cons + sw_prod; |
| 718 | spin_unlock(&srq_hwq->lock); |
| 719 | /* Ring DB */ |
| 720 | bnxt_qplib_arm_srq(srq, DBR_DBR_TYPE_SRQ); |
| 721 | if (srq->arm_req == true && count > srq->threshold) { |
| 722 | srq->arm_req = false; |
| 723 | bnxt_qplib_arm_srq(srq, DBR_DBR_TYPE_SRQ_ARM); |
| 724 | } |
| 725 | done: |
| 726 | return rc; |
| 727 | } |
| 728 | |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 729 | /* QP */ |
| 730 | int bnxt_qplib_create_qp1(struct bnxt_qplib_res *res, struct bnxt_qplib_qp *qp) |
| 731 | { |
| 732 | struct bnxt_qplib_rcfw *rcfw = res->rcfw; |
| 733 | struct cmdq_create_qp1 req; |
Devesh Sharma | cc1ec76 | 2017-05-22 03:15:31 -0700 | [diff] [blame] | 734 | struct creq_create_qp1_resp resp; |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 735 | struct bnxt_qplib_pbl *pbl; |
| 736 | struct bnxt_qplib_q *sq = &qp->sq; |
| 737 | struct bnxt_qplib_q *rq = &qp->rq; |
| 738 | int rc; |
| 739 | u16 cmd_flags = 0; |
| 740 | u32 qp_flags = 0; |
| 741 | |
| 742 | RCFW_CMD_PREP(req, CREATE_QP1, cmd_flags); |
| 743 | |
| 744 | /* General */ |
| 745 | req.type = qp->type; |
| 746 | req.dpi = cpu_to_le32(qp->dpi->dpi); |
| 747 | req.qp_handle = cpu_to_le64(qp->qp_handle); |
| 748 | |
| 749 | /* SQ */ |
| 750 | sq->hwq.max_elements = sq->max_wqe; |
| 751 | rc = bnxt_qplib_alloc_init_hwq(res->pdev, &sq->hwq, NULL, 0, |
| 752 | &sq->hwq.max_elements, |
| 753 | BNXT_QPLIB_MAX_SQE_ENTRY_SIZE, 0, |
| 754 | PAGE_SIZE, HWQ_TYPE_QUEUE); |
| 755 | if (rc) |
| 756 | goto exit; |
| 757 | |
| 758 | sq->swq = kcalloc(sq->hwq.max_elements, sizeof(*sq->swq), GFP_KERNEL); |
| 759 | if (!sq->swq) { |
| 760 | rc = -ENOMEM; |
| 761 | goto fail_sq; |
| 762 | } |
| 763 | pbl = &sq->hwq.pbl[PBL_LVL_0]; |
| 764 | req.sq_pbl = cpu_to_le64(pbl->pg_map_arr[0]); |
| 765 | req.sq_pg_size_sq_lvl = |
| 766 | ((sq->hwq.level & CMDQ_CREATE_QP1_SQ_LVL_MASK) |
| 767 | << CMDQ_CREATE_QP1_SQ_LVL_SFT) | |
| 768 | (pbl->pg_size == ROCE_PG_SIZE_4K ? |
| 769 | CMDQ_CREATE_QP1_SQ_PG_SIZE_PG_4K : |
| 770 | pbl->pg_size == ROCE_PG_SIZE_8K ? |
| 771 | CMDQ_CREATE_QP1_SQ_PG_SIZE_PG_8K : |
| 772 | pbl->pg_size == ROCE_PG_SIZE_64K ? |
| 773 | CMDQ_CREATE_QP1_SQ_PG_SIZE_PG_64K : |
| 774 | pbl->pg_size == ROCE_PG_SIZE_2M ? |
| 775 | CMDQ_CREATE_QP1_SQ_PG_SIZE_PG_2M : |
| 776 | pbl->pg_size == ROCE_PG_SIZE_8M ? |
| 777 | CMDQ_CREATE_QP1_SQ_PG_SIZE_PG_8M : |
| 778 | pbl->pg_size == ROCE_PG_SIZE_1G ? |
| 779 | CMDQ_CREATE_QP1_SQ_PG_SIZE_PG_1G : |
| 780 | CMDQ_CREATE_QP1_SQ_PG_SIZE_PG_4K); |
| 781 | |
| 782 | if (qp->scq) |
| 783 | req.scq_cid = cpu_to_le32(qp->scq->id); |
| 784 | |
| 785 | qp_flags |= CMDQ_CREATE_QP1_QP_FLAGS_RESERVED_LKEY_ENABLE; |
| 786 | |
| 787 | /* RQ */ |
| 788 | if (rq->max_wqe) { |
| 789 | rq->hwq.max_elements = qp->rq.max_wqe; |
| 790 | rc = bnxt_qplib_alloc_init_hwq(res->pdev, &rq->hwq, NULL, 0, |
| 791 | &rq->hwq.max_elements, |
| 792 | BNXT_QPLIB_MAX_RQE_ENTRY_SIZE, 0, |
| 793 | PAGE_SIZE, HWQ_TYPE_QUEUE); |
| 794 | if (rc) |
| 795 | goto fail_sq; |
| 796 | |
| 797 | rq->swq = kcalloc(rq->hwq.max_elements, sizeof(*rq->swq), |
| 798 | GFP_KERNEL); |
| 799 | if (!rq->swq) { |
| 800 | rc = -ENOMEM; |
| 801 | goto fail_rq; |
| 802 | } |
| 803 | pbl = &rq->hwq.pbl[PBL_LVL_0]; |
| 804 | req.rq_pbl = cpu_to_le64(pbl->pg_map_arr[0]); |
| 805 | req.rq_pg_size_rq_lvl = |
| 806 | ((rq->hwq.level & CMDQ_CREATE_QP1_RQ_LVL_MASK) << |
| 807 | CMDQ_CREATE_QP1_RQ_LVL_SFT) | |
| 808 | (pbl->pg_size == ROCE_PG_SIZE_4K ? |
| 809 | CMDQ_CREATE_QP1_RQ_PG_SIZE_PG_4K : |
| 810 | pbl->pg_size == ROCE_PG_SIZE_8K ? |
| 811 | CMDQ_CREATE_QP1_RQ_PG_SIZE_PG_8K : |
| 812 | pbl->pg_size == ROCE_PG_SIZE_64K ? |
| 813 | CMDQ_CREATE_QP1_RQ_PG_SIZE_PG_64K : |
| 814 | pbl->pg_size == ROCE_PG_SIZE_2M ? |
| 815 | CMDQ_CREATE_QP1_RQ_PG_SIZE_PG_2M : |
| 816 | pbl->pg_size == ROCE_PG_SIZE_8M ? |
| 817 | CMDQ_CREATE_QP1_RQ_PG_SIZE_PG_8M : |
| 818 | pbl->pg_size == ROCE_PG_SIZE_1G ? |
| 819 | CMDQ_CREATE_QP1_RQ_PG_SIZE_PG_1G : |
| 820 | CMDQ_CREATE_QP1_RQ_PG_SIZE_PG_4K); |
| 821 | if (qp->rcq) |
| 822 | req.rcq_cid = cpu_to_le32(qp->rcq->id); |
| 823 | } |
| 824 | |
| 825 | /* Header buffer - allow hdr_buf pass in */ |
| 826 | rc = bnxt_qplib_alloc_qp_hdr_buf(res, qp); |
| 827 | if (rc) { |
| 828 | rc = -ENOMEM; |
| 829 | goto fail; |
| 830 | } |
| 831 | req.qp_flags = cpu_to_le32(qp_flags); |
| 832 | req.sq_size = cpu_to_le32(sq->hwq.max_elements); |
| 833 | req.rq_size = cpu_to_le32(rq->hwq.max_elements); |
| 834 | |
| 835 | req.sq_fwo_sq_sge = |
| 836 | cpu_to_le16((sq->max_sge & CMDQ_CREATE_QP1_SQ_SGE_MASK) << |
| 837 | CMDQ_CREATE_QP1_SQ_SGE_SFT); |
| 838 | req.rq_fwo_rq_sge = |
| 839 | cpu_to_le16((rq->max_sge & CMDQ_CREATE_QP1_RQ_SGE_MASK) << |
| 840 | CMDQ_CREATE_QP1_RQ_SGE_SFT); |
| 841 | |
| 842 | req.pd_id = cpu_to_le32(qp->pd->id); |
| 843 | |
Devesh Sharma | cc1ec76 | 2017-05-22 03:15:31 -0700 | [diff] [blame] | 844 | rc = bnxt_qplib_rcfw_send_message(rcfw, (void *)&req, |
| 845 | (void *)&resp, NULL, 0); |
| 846 | if (rc) |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 847 | goto fail; |
Devesh Sharma | cc1ec76 | 2017-05-22 03:15:31 -0700 | [diff] [blame] | 848 | |
| 849 | qp->id = le32_to_cpu(resp.xid); |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 850 | qp->cur_qp_state = CMDQ_MODIFY_QP_NEW_STATE_RESET; |
Selvin Xavier | f218d67 | 2017-06-29 12:28:15 -0700 | [diff] [blame] | 851 | rcfw->qp_tbl[qp->id].qp_id = qp->id; |
| 852 | rcfw->qp_tbl[qp->id].qp_handle = (void *)qp; |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 853 | |
| 854 | return 0; |
| 855 | |
| 856 | fail: |
| 857 | bnxt_qplib_free_qp_hdr_buf(res, qp); |
| 858 | fail_rq: |
| 859 | bnxt_qplib_free_hwq(res->pdev, &rq->hwq); |
| 860 | kfree(rq->swq); |
| 861 | fail_sq: |
| 862 | bnxt_qplib_free_hwq(res->pdev, &sq->hwq); |
| 863 | kfree(sq->swq); |
| 864 | exit: |
| 865 | return rc; |
| 866 | } |
| 867 | |
| 868 | int bnxt_qplib_create_qp(struct bnxt_qplib_res *res, struct bnxt_qplib_qp *qp) |
| 869 | { |
| 870 | struct bnxt_qplib_rcfw *rcfw = res->rcfw; |
| 871 | struct sq_send *hw_sq_send_hdr, **hw_sq_send_ptr; |
| 872 | struct cmdq_create_qp req; |
Devesh Sharma | cc1ec76 | 2017-05-22 03:15:31 -0700 | [diff] [blame] | 873 | struct creq_create_qp_resp resp; |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 874 | struct bnxt_qplib_pbl *pbl; |
| 875 | struct sq_psn_search **psn_search_ptr; |
| 876 | unsigned long int psn_search, poff = 0; |
| 877 | struct bnxt_qplib_q *sq = &qp->sq; |
| 878 | struct bnxt_qplib_q *rq = &qp->rq; |
| 879 | struct bnxt_qplib_hwq *xrrq; |
| 880 | int i, rc, req_size, psn_sz; |
| 881 | u16 cmd_flags = 0, max_ssge; |
| 882 | u32 sw_prod, qp_flags = 0; |
| 883 | |
| 884 | RCFW_CMD_PREP(req, CREATE_QP, cmd_flags); |
| 885 | |
| 886 | /* General */ |
| 887 | req.type = qp->type; |
| 888 | req.dpi = cpu_to_le32(qp->dpi->dpi); |
| 889 | req.qp_handle = cpu_to_le64(qp->qp_handle); |
| 890 | |
| 891 | /* SQ */ |
| 892 | psn_sz = (qp->type == CMDQ_CREATE_QP_TYPE_RC) ? |
| 893 | sizeof(struct sq_psn_search) : 0; |
| 894 | sq->hwq.max_elements = sq->max_wqe; |
| 895 | rc = bnxt_qplib_alloc_init_hwq(res->pdev, &sq->hwq, sq->sglist, |
| 896 | sq->nmap, &sq->hwq.max_elements, |
| 897 | BNXT_QPLIB_MAX_SQE_ENTRY_SIZE, |
| 898 | psn_sz, |
| 899 | PAGE_SIZE, HWQ_TYPE_QUEUE); |
| 900 | if (rc) |
| 901 | goto exit; |
| 902 | |
| 903 | sq->swq = kcalloc(sq->hwq.max_elements, sizeof(*sq->swq), GFP_KERNEL); |
| 904 | if (!sq->swq) { |
| 905 | rc = -ENOMEM; |
| 906 | goto fail_sq; |
| 907 | } |
| 908 | hw_sq_send_ptr = (struct sq_send **)sq->hwq.pbl_ptr; |
| 909 | if (psn_sz) { |
| 910 | psn_search_ptr = (struct sq_psn_search **) |
| 911 | &hw_sq_send_ptr[get_sqe_pg |
| 912 | (sq->hwq.max_elements)]; |
| 913 | psn_search = (unsigned long int) |
| 914 | &hw_sq_send_ptr[get_sqe_pg(sq->hwq.max_elements)] |
| 915 | [get_sqe_idx(sq->hwq.max_elements)]; |
| 916 | if (psn_search & ~PAGE_MASK) { |
| 917 | /* If the psn_search does not start on a page boundary, |
| 918 | * then calculate the offset |
| 919 | */ |
| 920 | poff = (psn_search & ~PAGE_MASK) / |
| 921 | BNXT_QPLIB_MAX_PSNE_ENTRY_SIZE; |
| 922 | } |
| 923 | for (i = 0; i < sq->hwq.max_elements; i++) |
| 924 | sq->swq[i].psn_search = |
| 925 | &psn_search_ptr[get_psne_pg(i + poff)] |
| 926 | [get_psne_idx(i + poff)]; |
| 927 | } |
| 928 | pbl = &sq->hwq.pbl[PBL_LVL_0]; |
| 929 | req.sq_pbl = cpu_to_le64(pbl->pg_map_arr[0]); |
| 930 | req.sq_pg_size_sq_lvl = |
| 931 | ((sq->hwq.level & CMDQ_CREATE_QP_SQ_LVL_MASK) |
| 932 | << CMDQ_CREATE_QP_SQ_LVL_SFT) | |
| 933 | (pbl->pg_size == ROCE_PG_SIZE_4K ? |
| 934 | CMDQ_CREATE_QP_SQ_PG_SIZE_PG_4K : |
| 935 | pbl->pg_size == ROCE_PG_SIZE_8K ? |
| 936 | CMDQ_CREATE_QP_SQ_PG_SIZE_PG_8K : |
| 937 | pbl->pg_size == ROCE_PG_SIZE_64K ? |
| 938 | CMDQ_CREATE_QP_SQ_PG_SIZE_PG_64K : |
| 939 | pbl->pg_size == ROCE_PG_SIZE_2M ? |
| 940 | CMDQ_CREATE_QP_SQ_PG_SIZE_PG_2M : |
| 941 | pbl->pg_size == ROCE_PG_SIZE_8M ? |
| 942 | CMDQ_CREATE_QP_SQ_PG_SIZE_PG_8M : |
| 943 | pbl->pg_size == ROCE_PG_SIZE_1G ? |
| 944 | CMDQ_CREATE_QP_SQ_PG_SIZE_PG_1G : |
| 945 | CMDQ_CREATE_QP_SQ_PG_SIZE_PG_4K); |
| 946 | |
| 947 | /* initialize all SQ WQEs to LOCAL_INVALID (sq prep for hw fetch) */ |
| 948 | hw_sq_send_ptr = (struct sq_send **)sq->hwq.pbl_ptr; |
| 949 | for (sw_prod = 0; sw_prod < sq->hwq.max_elements; sw_prod++) { |
| 950 | hw_sq_send_hdr = &hw_sq_send_ptr[get_sqe_pg(sw_prod)] |
| 951 | [get_sqe_idx(sw_prod)]; |
| 952 | hw_sq_send_hdr->wqe_type = SQ_BASE_WQE_TYPE_LOCAL_INVALID; |
| 953 | } |
| 954 | |
| 955 | if (qp->scq) |
| 956 | req.scq_cid = cpu_to_le32(qp->scq->id); |
| 957 | |
| 958 | qp_flags |= CMDQ_CREATE_QP_QP_FLAGS_RESERVED_LKEY_ENABLE; |
| 959 | qp_flags |= CMDQ_CREATE_QP_QP_FLAGS_FR_PMR_ENABLED; |
| 960 | if (qp->sig_type) |
| 961 | qp_flags |= CMDQ_CREATE_QP_QP_FLAGS_FORCE_COMPLETION; |
| 962 | |
| 963 | /* RQ */ |
| 964 | if (rq->max_wqe) { |
| 965 | rq->hwq.max_elements = rq->max_wqe; |
| 966 | rc = bnxt_qplib_alloc_init_hwq(res->pdev, &rq->hwq, rq->sglist, |
| 967 | rq->nmap, &rq->hwq.max_elements, |
| 968 | BNXT_QPLIB_MAX_RQE_ENTRY_SIZE, 0, |
| 969 | PAGE_SIZE, HWQ_TYPE_QUEUE); |
| 970 | if (rc) |
| 971 | goto fail_sq; |
| 972 | |
| 973 | rq->swq = kcalloc(rq->hwq.max_elements, sizeof(*rq->swq), |
| 974 | GFP_KERNEL); |
| 975 | if (!rq->swq) { |
| 976 | rc = -ENOMEM; |
| 977 | goto fail_rq; |
| 978 | } |
| 979 | pbl = &rq->hwq.pbl[PBL_LVL_0]; |
| 980 | req.rq_pbl = cpu_to_le64(pbl->pg_map_arr[0]); |
| 981 | req.rq_pg_size_rq_lvl = |
| 982 | ((rq->hwq.level & CMDQ_CREATE_QP_RQ_LVL_MASK) << |
| 983 | CMDQ_CREATE_QP_RQ_LVL_SFT) | |
| 984 | (pbl->pg_size == ROCE_PG_SIZE_4K ? |
| 985 | CMDQ_CREATE_QP_RQ_PG_SIZE_PG_4K : |
| 986 | pbl->pg_size == ROCE_PG_SIZE_8K ? |
| 987 | CMDQ_CREATE_QP_RQ_PG_SIZE_PG_8K : |
| 988 | pbl->pg_size == ROCE_PG_SIZE_64K ? |
| 989 | CMDQ_CREATE_QP_RQ_PG_SIZE_PG_64K : |
| 990 | pbl->pg_size == ROCE_PG_SIZE_2M ? |
| 991 | CMDQ_CREATE_QP_RQ_PG_SIZE_PG_2M : |
| 992 | pbl->pg_size == ROCE_PG_SIZE_8M ? |
| 993 | CMDQ_CREATE_QP_RQ_PG_SIZE_PG_8M : |
| 994 | pbl->pg_size == ROCE_PG_SIZE_1G ? |
| 995 | CMDQ_CREATE_QP_RQ_PG_SIZE_PG_1G : |
| 996 | CMDQ_CREATE_QP_RQ_PG_SIZE_PG_4K); |
Devesh Sharma | 37cb11a | 2018-01-11 11:52:11 -0500 | [diff] [blame] | 997 | } else { |
| 998 | /* SRQ */ |
| 999 | if (qp->srq) { |
| 1000 | qp_flags |= CMDQ_CREATE_QP_QP_FLAGS_SRQ_USED; |
| 1001 | req.srq_cid = cpu_to_le32(qp->srq->id); |
| 1002 | } |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 1003 | } |
| 1004 | |
| 1005 | if (qp->rcq) |
| 1006 | req.rcq_cid = cpu_to_le32(qp->rcq->id); |
| 1007 | req.qp_flags = cpu_to_le32(qp_flags); |
| 1008 | req.sq_size = cpu_to_le32(sq->hwq.max_elements); |
| 1009 | req.rq_size = cpu_to_le32(rq->hwq.max_elements); |
| 1010 | qp->sq_hdr_buf = NULL; |
| 1011 | qp->rq_hdr_buf = NULL; |
| 1012 | |
| 1013 | rc = bnxt_qplib_alloc_qp_hdr_buf(res, qp); |
| 1014 | if (rc) |
| 1015 | goto fail_rq; |
| 1016 | |
| 1017 | /* CTRL-22434: Irrespective of the requested SGE count on the SQ |
| 1018 | * always create the QP with max send sges possible if the requested |
| 1019 | * inline size is greater than 0. |
| 1020 | */ |
| 1021 | max_ssge = qp->max_inline_data ? 6 : sq->max_sge; |
| 1022 | req.sq_fwo_sq_sge = cpu_to_le16( |
| 1023 | ((max_ssge & CMDQ_CREATE_QP_SQ_SGE_MASK) |
| 1024 | << CMDQ_CREATE_QP_SQ_SGE_SFT) | 0); |
| 1025 | req.rq_fwo_rq_sge = cpu_to_le16( |
| 1026 | ((rq->max_sge & CMDQ_CREATE_QP_RQ_SGE_MASK) |
| 1027 | << CMDQ_CREATE_QP_RQ_SGE_SFT) | 0); |
| 1028 | /* ORRQ and IRRQ */ |
| 1029 | if (psn_sz) { |
| 1030 | xrrq = &qp->orrq; |
| 1031 | xrrq->max_elements = |
| 1032 | ORD_LIMIT_TO_ORRQ_SLOTS(qp->max_rd_atomic); |
| 1033 | req_size = xrrq->max_elements * |
| 1034 | BNXT_QPLIB_MAX_ORRQE_ENTRY_SIZE + PAGE_SIZE - 1; |
| 1035 | req_size &= ~(PAGE_SIZE - 1); |
| 1036 | rc = bnxt_qplib_alloc_init_hwq(res->pdev, xrrq, NULL, 0, |
| 1037 | &xrrq->max_elements, |
| 1038 | BNXT_QPLIB_MAX_ORRQE_ENTRY_SIZE, |
| 1039 | 0, req_size, HWQ_TYPE_CTX); |
| 1040 | if (rc) |
| 1041 | goto fail_buf_free; |
| 1042 | pbl = &xrrq->pbl[PBL_LVL_0]; |
| 1043 | req.orrq_addr = cpu_to_le64(pbl->pg_map_arr[0]); |
| 1044 | |
| 1045 | xrrq = &qp->irrq; |
| 1046 | xrrq->max_elements = IRD_LIMIT_TO_IRRQ_SLOTS( |
| 1047 | qp->max_dest_rd_atomic); |
| 1048 | req_size = xrrq->max_elements * |
| 1049 | BNXT_QPLIB_MAX_IRRQE_ENTRY_SIZE + PAGE_SIZE - 1; |
| 1050 | req_size &= ~(PAGE_SIZE - 1); |
| 1051 | |
| 1052 | rc = bnxt_qplib_alloc_init_hwq(res->pdev, xrrq, NULL, 0, |
| 1053 | &xrrq->max_elements, |
| 1054 | BNXT_QPLIB_MAX_IRRQE_ENTRY_SIZE, |
| 1055 | 0, req_size, HWQ_TYPE_CTX); |
| 1056 | if (rc) |
| 1057 | goto fail_orrq; |
| 1058 | |
| 1059 | pbl = &xrrq->pbl[PBL_LVL_0]; |
| 1060 | req.irrq_addr = cpu_to_le64(pbl->pg_map_arr[0]); |
| 1061 | } |
| 1062 | req.pd_id = cpu_to_le32(qp->pd->id); |
| 1063 | |
Devesh Sharma | cc1ec76 | 2017-05-22 03:15:31 -0700 | [diff] [blame] | 1064 | rc = bnxt_qplib_rcfw_send_message(rcfw, (void *)&req, |
| 1065 | (void *)&resp, NULL, 0); |
| 1066 | if (rc) |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 1067 | goto fail; |
Devesh Sharma | cc1ec76 | 2017-05-22 03:15:31 -0700 | [diff] [blame] | 1068 | |
| 1069 | qp->id = le32_to_cpu(resp.xid); |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 1070 | qp->cur_qp_state = CMDQ_MODIFY_QP_NEW_STATE_RESET; |
Selvin Xavier | f218d67 | 2017-06-29 12:28:15 -0700 | [diff] [blame] | 1071 | INIT_LIST_HEAD(&qp->sq_flush); |
| 1072 | INIT_LIST_HEAD(&qp->rq_flush); |
| 1073 | rcfw->qp_tbl[qp->id].qp_id = qp->id; |
| 1074 | rcfw->qp_tbl[qp->id].qp_handle = (void *)qp; |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 1075 | |
| 1076 | return 0; |
| 1077 | |
| 1078 | fail: |
| 1079 | if (qp->irrq.max_elements) |
| 1080 | bnxt_qplib_free_hwq(res->pdev, &qp->irrq); |
| 1081 | fail_orrq: |
| 1082 | if (qp->orrq.max_elements) |
| 1083 | bnxt_qplib_free_hwq(res->pdev, &qp->orrq); |
| 1084 | fail_buf_free: |
| 1085 | bnxt_qplib_free_qp_hdr_buf(res, qp); |
| 1086 | fail_rq: |
| 1087 | bnxt_qplib_free_hwq(res->pdev, &rq->hwq); |
| 1088 | kfree(rq->swq); |
| 1089 | fail_sq: |
| 1090 | bnxt_qplib_free_hwq(res->pdev, &sq->hwq); |
| 1091 | kfree(sq->swq); |
| 1092 | exit: |
| 1093 | return rc; |
| 1094 | } |
| 1095 | |
| 1096 | static void __modify_flags_from_init_state(struct bnxt_qplib_qp *qp) |
| 1097 | { |
| 1098 | switch (qp->state) { |
| 1099 | case CMDQ_MODIFY_QP_NEW_STATE_RTR: |
| 1100 | /* INIT->RTR, configure the path_mtu to the default |
| 1101 | * 2048 if not being requested |
| 1102 | */ |
| 1103 | if (!(qp->modify_flags & |
| 1104 | CMDQ_MODIFY_QP_MODIFY_MASK_PATH_MTU)) { |
| 1105 | qp->modify_flags |= |
| 1106 | CMDQ_MODIFY_QP_MODIFY_MASK_PATH_MTU; |
| 1107 | qp->path_mtu = |
| 1108 | CMDQ_MODIFY_QP_PATH_MTU_MTU_2048; |
| 1109 | } |
| 1110 | qp->modify_flags &= |
| 1111 | ~CMDQ_MODIFY_QP_MODIFY_MASK_VLAN_ID; |
| 1112 | /* Bono FW require the max_dest_rd_atomic to be >= 1 */ |
| 1113 | if (qp->max_dest_rd_atomic < 1) |
| 1114 | qp->max_dest_rd_atomic = 1; |
| 1115 | qp->modify_flags &= ~CMDQ_MODIFY_QP_MODIFY_MASK_SRC_MAC; |
| 1116 | /* Bono FW 20.6.5 requires SGID_INDEX configuration */ |
| 1117 | if (!(qp->modify_flags & |
| 1118 | CMDQ_MODIFY_QP_MODIFY_MASK_SGID_INDEX)) { |
| 1119 | qp->modify_flags |= |
| 1120 | CMDQ_MODIFY_QP_MODIFY_MASK_SGID_INDEX; |
| 1121 | qp->ah.sgid_index = 0; |
| 1122 | } |
| 1123 | break; |
| 1124 | default: |
| 1125 | break; |
| 1126 | } |
| 1127 | } |
| 1128 | |
| 1129 | static void __modify_flags_from_rtr_state(struct bnxt_qplib_qp *qp) |
| 1130 | { |
| 1131 | switch (qp->state) { |
| 1132 | case CMDQ_MODIFY_QP_NEW_STATE_RTS: |
| 1133 | /* Bono FW requires the max_rd_atomic to be >= 1 */ |
| 1134 | if (qp->max_rd_atomic < 1) |
| 1135 | qp->max_rd_atomic = 1; |
| 1136 | /* Bono FW does not allow PKEY_INDEX, |
| 1137 | * DGID, FLOW_LABEL, SGID_INDEX, HOP_LIMIT, |
| 1138 | * TRAFFIC_CLASS, DEST_MAC, PATH_MTU, RQ_PSN, |
| 1139 | * MIN_RNR_TIMER, MAX_DEST_RD_ATOMIC, DEST_QP_ID |
| 1140 | * modification |
| 1141 | */ |
| 1142 | qp->modify_flags &= |
| 1143 | ~(CMDQ_MODIFY_QP_MODIFY_MASK_PKEY | |
| 1144 | CMDQ_MODIFY_QP_MODIFY_MASK_DGID | |
| 1145 | CMDQ_MODIFY_QP_MODIFY_MASK_FLOW_LABEL | |
| 1146 | CMDQ_MODIFY_QP_MODIFY_MASK_SGID_INDEX | |
| 1147 | CMDQ_MODIFY_QP_MODIFY_MASK_HOP_LIMIT | |
| 1148 | CMDQ_MODIFY_QP_MODIFY_MASK_TRAFFIC_CLASS | |
| 1149 | CMDQ_MODIFY_QP_MODIFY_MASK_DEST_MAC | |
| 1150 | CMDQ_MODIFY_QP_MODIFY_MASK_PATH_MTU | |
| 1151 | CMDQ_MODIFY_QP_MODIFY_MASK_RQ_PSN | |
| 1152 | CMDQ_MODIFY_QP_MODIFY_MASK_MIN_RNR_TIMER | |
| 1153 | CMDQ_MODIFY_QP_MODIFY_MASK_MAX_DEST_RD_ATOMIC | |
| 1154 | CMDQ_MODIFY_QP_MODIFY_MASK_DEST_QP_ID); |
| 1155 | break; |
| 1156 | default: |
| 1157 | break; |
| 1158 | } |
| 1159 | } |
| 1160 | |
| 1161 | static void __filter_modify_flags(struct bnxt_qplib_qp *qp) |
| 1162 | { |
| 1163 | switch (qp->cur_qp_state) { |
| 1164 | case CMDQ_MODIFY_QP_NEW_STATE_RESET: |
| 1165 | break; |
| 1166 | case CMDQ_MODIFY_QP_NEW_STATE_INIT: |
| 1167 | __modify_flags_from_init_state(qp); |
| 1168 | break; |
| 1169 | case CMDQ_MODIFY_QP_NEW_STATE_RTR: |
| 1170 | __modify_flags_from_rtr_state(qp); |
| 1171 | break; |
| 1172 | case CMDQ_MODIFY_QP_NEW_STATE_RTS: |
| 1173 | break; |
| 1174 | case CMDQ_MODIFY_QP_NEW_STATE_SQD: |
| 1175 | break; |
| 1176 | case CMDQ_MODIFY_QP_NEW_STATE_SQE: |
| 1177 | break; |
| 1178 | case CMDQ_MODIFY_QP_NEW_STATE_ERR: |
| 1179 | break; |
| 1180 | default: |
| 1181 | break; |
| 1182 | } |
| 1183 | } |
| 1184 | |
| 1185 | int bnxt_qplib_modify_qp(struct bnxt_qplib_res *res, struct bnxt_qplib_qp *qp) |
| 1186 | { |
| 1187 | struct bnxt_qplib_rcfw *rcfw = res->rcfw; |
| 1188 | struct cmdq_modify_qp req; |
Devesh Sharma | cc1ec76 | 2017-05-22 03:15:31 -0700 | [diff] [blame] | 1189 | struct creq_modify_qp_resp resp; |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 1190 | u16 cmd_flags = 0, pkey; |
| 1191 | u32 temp32[4]; |
| 1192 | u32 bmask; |
Devesh Sharma | cc1ec76 | 2017-05-22 03:15:31 -0700 | [diff] [blame] | 1193 | int rc; |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 1194 | |
| 1195 | RCFW_CMD_PREP(req, MODIFY_QP, cmd_flags); |
| 1196 | |
| 1197 | /* Filter out the qp_attr_mask based on the state->new transition */ |
| 1198 | __filter_modify_flags(qp); |
| 1199 | bmask = qp->modify_flags; |
| 1200 | req.modify_mask = cpu_to_le32(qp->modify_flags); |
| 1201 | req.qp_cid = cpu_to_le32(qp->id); |
| 1202 | if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_STATE) { |
| 1203 | req.network_type_en_sqd_async_notify_new_state = |
| 1204 | (qp->state & CMDQ_MODIFY_QP_NEW_STATE_MASK) | |
| 1205 | (qp->en_sqd_async_notify ? |
| 1206 | CMDQ_MODIFY_QP_EN_SQD_ASYNC_NOTIFY : 0); |
| 1207 | } |
| 1208 | req.network_type_en_sqd_async_notify_new_state |= qp->nw_type; |
| 1209 | |
| 1210 | if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_ACCESS) |
| 1211 | req.access = qp->access; |
| 1212 | |
| 1213 | if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_PKEY) { |
| 1214 | if (!bnxt_qplib_get_pkey(res, &res->pkey_tbl, |
| 1215 | qp->pkey_index, &pkey)) |
| 1216 | req.pkey = cpu_to_le16(pkey); |
| 1217 | } |
| 1218 | if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_QKEY) |
| 1219 | req.qkey = cpu_to_le32(qp->qkey); |
| 1220 | |
| 1221 | if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_DGID) { |
| 1222 | memcpy(temp32, qp->ah.dgid.data, sizeof(struct bnxt_qplib_gid)); |
| 1223 | req.dgid[0] = cpu_to_le32(temp32[0]); |
| 1224 | req.dgid[1] = cpu_to_le32(temp32[1]); |
| 1225 | req.dgid[2] = cpu_to_le32(temp32[2]); |
| 1226 | req.dgid[3] = cpu_to_le32(temp32[3]); |
| 1227 | } |
| 1228 | if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_FLOW_LABEL) |
| 1229 | req.flow_label = cpu_to_le32(qp->ah.flow_label); |
| 1230 | |
| 1231 | if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_SGID_INDEX) |
| 1232 | req.sgid_index = cpu_to_le16(res->sgid_tbl.hw_id |
| 1233 | [qp->ah.sgid_index]); |
| 1234 | |
| 1235 | if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_HOP_LIMIT) |
| 1236 | req.hop_limit = qp->ah.hop_limit; |
| 1237 | |
| 1238 | if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_TRAFFIC_CLASS) |
| 1239 | req.traffic_class = qp->ah.traffic_class; |
| 1240 | |
| 1241 | if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_DEST_MAC) |
| 1242 | memcpy(req.dest_mac, qp->ah.dmac, 6); |
| 1243 | |
| 1244 | if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_PATH_MTU) |
| 1245 | req.path_mtu = qp->path_mtu; |
| 1246 | |
| 1247 | if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_TIMEOUT) |
| 1248 | req.timeout = qp->timeout; |
| 1249 | |
| 1250 | if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_RETRY_CNT) |
| 1251 | req.retry_cnt = qp->retry_cnt; |
| 1252 | |
| 1253 | if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_RNR_RETRY) |
| 1254 | req.rnr_retry = qp->rnr_retry; |
| 1255 | |
| 1256 | if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_MIN_RNR_TIMER) |
| 1257 | req.min_rnr_timer = qp->min_rnr_timer; |
| 1258 | |
| 1259 | if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_RQ_PSN) |
| 1260 | req.rq_psn = cpu_to_le32(qp->rq.psn); |
| 1261 | |
| 1262 | if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_SQ_PSN) |
| 1263 | req.sq_psn = cpu_to_le32(qp->sq.psn); |
| 1264 | |
| 1265 | if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_MAX_RD_ATOMIC) |
| 1266 | req.max_rd_atomic = |
| 1267 | ORD_LIMIT_TO_ORRQ_SLOTS(qp->max_rd_atomic); |
| 1268 | |
| 1269 | if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_MAX_DEST_RD_ATOMIC) |
| 1270 | req.max_dest_rd_atomic = |
| 1271 | IRD_LIMIT_TO_IRRQ_SLOTS(qp->max_dest_rd_atomic); |
| 1272 | |
| 1273 | req.sq_size = cpu_to_le32(qp->sq.hwq.max_elements); |
| 1274 | req.rq_size = cpu_to_le32(qp->rq.hwq.max_elements); |
| 1275 | req.sq_sge = cpu_to_le16(qp->sq.max_sge); |
| 1276 | req.rq_sge = cpu_to_le16(qp->rq.max_sge); |
| 1277 | req.max_inline_data = cpu_to_le32(qp->max_inline_data); |
| 1278 | if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_DEST_QP_ID) |
| 1279 | req.dest_qp_id = cpu_to_le32(qp->dest_qpn); |
| 1280 | |
| 1281 | req.vlan_pcp_vlan_dei_vlan_id = cpu_to_le16(qp->vlan_id); |
| 1282 | |
Devesh Sharma | cc1ec76 | 2017-05-22 03:15:31 -0700 | [diff] [blame] | 1283 | rc = bnxt_qplib_rcfw_send_message(rcfw, (void *)&req, |
| 1284 | (void *)&resp, NULL, 0); |
| 1285 | if (rc) |
| 1286 | return rc; |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 1287 | qp->cur_qp_state = qp->state; |
| 1288 | return 0; |
| 1289 | } |
| 1290 | |
| 1291 | int bnxt_qplib_query_qp(struct bnxt_qplib_res *res, struct bnxt_qplib_qp *qp) |
| 1292 | { |
| 1293 | struct bnxt_qplib_rcfw *rcfw = res->rcfw; |
| 1294 | struct cmdq_query_qp req; |
Devesh Sharma | cc1ec76 | 2017-05-22 03:15:31 -0700 | [diff] [blame] | 1295 | struct creq_query_qp_resp resp; |
| 1296 | struct bnxt_qplib_rcfw_sbuf *sbuf; |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 1297 | struct creq_query_qp_resp_sb *sb; |
| 1298 | u16 cmd_flags = 0; |
| 1299 | u32 temp32[4]; |
Devesh Sharma | cc1ec76 | 2017-05-22 03:15:31 -0700 | [diff] [blame] | 1300 | int i, rc = 0; |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 1301 | |
| 1302 | RCFW_CMD_PREP(req, QUERY_QP, cmd_flags); |
| 1303 | |
Devesh Sharma | cc1ec76 | 2017-05-22 03:15:31 -0700 | [diff] [blame] | 1304 | sbuf = bnxt_qplib_rcfw_alloc_sbuf(rcfw, sizeof(*sb)); |
| 1305 | if (!sbuf) |
| 1306 | return -ENOMEM; |
| 1307 | sb = sbuf->sb; |
| 1308 | |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 1309 | req.qp_cid = cpu_to_le32(qp->id); |
| 1310 | req.resp_size = sizeof(*sb) / BNXT_QPLIB_CMDQE_UNITS; |
Devesh Sharma | cc1ec76 | 2017-05-22 03:15:31 -0700 | [diff] [blame] | 1311 | rc = bnxt_qplib_rcfw_send_message(rcfw, (void *)&req, (void *)&resp, |
| 1312 | (void *)sbuf, 0); |
| 1313 | if (rc) |
| 1314 | goto bail; |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 1315 | /* Extract the context from the side buffer */ |
| 1316 | qp->state = sb->en_sqd_async_notify_state & |
| 1317 | CREQ_QUERY_QP_RESP_SB_STATE_MASK; |
| 1318 | qp->en_sqd_async_notify = sb->en_sqd_async_notify_state & |
| 1319 | CREQ_QUERY_QP_RESP_SB_EN_SQD_ASYNC_NOTIFY ? |
| 1320 | true : false; |
| 1321 | qp->access = sb->access; |
| 1322 | qp->pkey_index = le16_to_cpu(sb->pkey); |
| 1323 | qp->qkey = le32_to_cpu(sb->qkey); |
| 1324 | |
| 1325 | temp32[0] = le32_to_cpu(sb->dgid[0]); |
| 1326 | temp32[1] = le32_to_cpu(sb->dgid[1]); |
| 1327 | temp32[2] = le32_to_cpu(sb->dgid[2]); |
| 1328 | temp32[3] = le32_to_cpu(sb->dgid[3]); |
| 1329 | memcpy(qp->ah.dgid.data, temp32, sizeof(qp->ah.dgid.data)); |
| 1330 | |
| 1331 | qp->ah.flow_label = le32_to_cpu(sb->flow_label); |
| 1332 | |
| 1333 | qp->ah.sgid_index = 0; |
| 1334 | for (i = 0; i < res->sgid_tbl.max; i++) { |
| 1335 | if (res->sgid_tbl.hw_id[i] == le16_to_cpu(sb->sgid_index)) { |
| 1336 | qp->ah.sgid_index = i; |
| 1337 | break; |
| 1338 | } |
| 1339 | } |
| 1340 | if (i == res->sgid_tbl.max) |
| 1341 | dev_warn(&res->pdev->dev, "QPLIB: SGID not found??"); |
| 1342 | |
| 1343 | qp->ah.hop_limit = sb->hop_limit; |
| 1344 | qp->ah.traffic_class = sb->traffic_class; |
| 1345 | memcpy(qp->ah.dmac, sb->dest_mac, 6); |
| 1346 | qp->ah.vlan_id = (le16_to_cpu(sb->path_mtu_dest_vlan_id) & |
| 1347 | CREQ_QUERY_QP_RESP_SB_VLAN_ID_MASK) >> |
| 1348 | CREQ_QUERY_QP_RESP_SB_VLAN_ID_SFT; |
| 1349 | qp->path_mtu = (le16_to_cpu(sb->path_mtu_dest_vlan_id) & |
| 1350 | CREQ_QUERY_QP_RESP_SB_PATH_MTU_MASK) >> |
| 1351 | CREQ_QUERY_QP_RESP_SB_PATH_MTU_SFT; |
| 1352 | qp->timeout = sb->timeout; |
| 1353 | qp->retry_cnt = sb->retry_cnt; |
| 1354 | qp->rnr_retry = sb->rnr_retry; |
| 1355 | qp->min_rnr_timer = sb->min_rnr_timer; |
| 1356 | qp->rq.psn = le32_to_cpu(sb->rq_psn); |
| 1357 | qp->max_rd_atomic = ORRQ_SLOTS_TO_ORD_LIMIT(sb->max_rd_atomic); |
| 1358 | qp->sq.psn = le32_to_cpu(sb->sq_psn); |
| 1359 | qp->max_dest_rd_atomic = |
| 1360 | IRRQ_SLOTS_TO_IRD_LIMIT(sb->max_dest_rd_atomic); |
| 1361 | qp->sq.max_wqe = qp->sq.hwq.max_elements; |
| 1362 | qp->rq.max_wqe = qp->rq.hwq.max_elements; |
| 1363 | qp->sq.max_sge = le16_to_cpu(sb->sq_sge); |
| 1364 | qp->rq.max_sge = le16_to_cpu(sb->rq_sge); |
| 1365 | qp->max_inline_data = le32_to_cpu(sb->max_inline_data); |
| 1366 | qp->dest_qpn = le32_to_cpu(sb->dest_qp_id); |
| 1367 | memcpy(qp->smac, sb->src_mac, 6); |
| 1368 | qp->vlan_id = le16_to_cpu(sb->vlan_pcp_vlan_dei_vlan_id); |
Devesh Sharma | cc1ec76 | 2017-05-22 03:15:31 -0700 | [diff] [blame] | 1369 | bail: |
| 1370 | bnxt_qplib_rcfw_free_sbuf(rcfw, sbuf); |
| 1371 | return rc; |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 1372 | } |
| 1373 | |
| 1374 | static void __clean_cq(struct bnxt_qplib_cq *cq, u64 qp) |
| 1375 | { |
| 1376 | struct bnxt_qplib_hwq *cq_hwq = &cq->hwq; |
| 1377 | struct cq_base *hw_cqe, **hw_cqe_ptr; |
| 1378 | int i; |
| 1379 | |
| 1380 | for (i = 0; i < cq_hwq->max_elements; i++) { |
| 1381 | hw_cqe_ptr = (struct cq_base **)cq_hwq->pbl_ptr; |
| 1382 | hw_cqe = &hw_cqe_ptr[CQE_PG(i)][CQE_IDX(i)]; |
| 1383 | if (!CQE_CMP_VALID(hw_cqe, i, cq_hwq->max_elements)) |
| 1384 | continue; |
Somnath Kotur | 9b40183 | 2017-11-06 08:07:29 -0800 | [diff] [blame] | 1385 | /* |
| 1386 | * The valid test of the entry must be done first before |
| 1387 | * reading any further. |
| 1388 | */ |
| 1389 | dma_rmb(); |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 1390 | switch (hw_cqe->cqe_type_toggle & CQ_BASE_CQE_TYPE_MASK) { |
| 1391 | case CQ_BASE_CQE_TYPE_REQ: |
| 1392 | case CQ_BASE_CQE_TYPE_TERMINAL: |
| 1393 | { |
| 1394 | struct cq_req *cqe = (struct cq_req *)hw_cqe; |
| 1395 | |
| 1396 | if (qp == le64_to_cpu(cqe->qp_handle)) |
| 1397 | cqe->qp_handle = 0; |
| 1398 | break; |
| 1399 | } |
| 1400 | case CQ_BASE_CQE_TYPE_RES_RC: |
| 1401 | case CQ_BASE_CQE_TYPE_RES_UD: |
| 1402 | case CQ_BASE_CQE_TYPE_RES_RAWETH_QP1: |
| 1403 | { |
| 1404 | struct cq_res_rc *cqe = (struct cq_res_rc *)hw_cqe; |
| 1405 | |
| 1406 | if (qp == le64_to_cpu(cqe->qp_handle)) |
| 1407 | cqe->qp_handle = 0; |
| 1408 | break; |
| 1409 | } |
| 1410 | default: |
| 1411 | break; |
| 1412 | } |
| 1413 | } |
| 1414 | } |
| 1415 | |
| 1416 | int bnxt_qplib_destroy_qp(struct bnxt_qplib_res *res, |
| 1417 | struct bnxt_qplib_qp *qp) |
| 1418 | { |
| 1419 | struct bnxt_qplib_rcfw *rcfw = res->rcfw; |
| 1420 | struct cmdq_destroy_qp req; |
Devesh Sharma | cc1ec76 | 2017-05-22 03:15:31 -0700 | [diff] [blame] | 1421 | struct creq_destroy_qp_resp resp; |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 1422 | u16 cmd_flags = 0; |
Devesh Sharma | cc1ec76 | 2017-05-22 03:15:31 -0700 | [diff] [blame] | 1423 | int rc; |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 1424 | |
Selvin Xavier | f218d67 | 2017-06-29 12:28:15 -0700 | [diff] [blame] | 1425 | rcfw->qp_tbl[qp->id].qp_id = BNXT_QPLIB_QP_ID_INVALID; |
| 1426 | rcfw->qp_tbl[qp->id].qp_handle = NULL; |
| 1427 | |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 1428 | RCFW_CMD_PREP(req, DESTROY_QP, cmd_flags); |
| 1429 | |
| 1430 | req.qp_cid = cpu_to_le32(qp->id); |
Devesh Sharma | cc1ec76 | 2017-05-22 03:15:31 -0700 | [diff] [blame] | 1431 | rc = bnxt_qplib_rcfw_send_message(rcfw, (void *)&req, |
| 1432 | (void *)&resp, NULL, 0); |
Selvin Xavier | f218d67 | 2017-06-29 12:28:15 -0700 | [diff] [blame] | 1433 | if (rc) { |
| 1434 | rcfw->qp_tbl[qp->id].qp_id = qp->id; |
| 1435 | rcfw->qp_tbl[qp->id].qp_handle = qp; |
Devesh Sharma | cc1ec76 | 2017-05-22 03:15:31 -0700 | [diff] [blame] | 1436 | return rc; |
Selvin Xavier | f218d67 | 2017-06-29 12:28:15 -0700 | [diff] [blame] | 1437 | } |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 1438 | |
Selvin Xavier | 3b921e3 | 2018-02-15 21:20:11 -0800 | [diff] [blame^] | 1439 | return 0; |
| 1440 | } |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 1441 | |
Selvin Xavier | 3b921e3 | 2018-02-15 21:20:11 -0800 | [diff] [blame^] | 1442 | void bnxt_qplib_free_qp_res(struct bnxt_qplib_res *res, |
| 1443 | struct bnxt_qplib_qp *qp) |
| 1444 | { |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 1445 | bnxt_qplib_free_qp_hdr_buf(res, qp); |
| 1446 | bnxt_qplib_free_hwq(res->pdev, &qp->sq.hwq); |
| 1447 | kfree(qp->sq.swq); |
| 1448 | |
| 1449 | bnxt_qplib_free_hwq(res->pdev, &qp->rq.hwq); |
| 1450 | kfree(qp->rq.swq); |
| 1451 | |
| 1452 | if (qp->irrq.max_elements) |
| 1453 | bnxt_qplib_free_hwq(res->pdev, &qp->irrq); |
| 1454 | if (qp->orrq.max_elements) |
| 1455 | bnxt_qplib_free_hwq(res->pdev, &qp->orrq); |
| 1456 | |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 1457 | } |
| 1458 | |
| 1459 | void *bnxt_qplib_get_qp1_sq_buf(struct bnxt_qplib_qp *qp, |
| 1460 | struct bnxt_qplib_sge *sge) |
| 1461 | { |
| 1462 | struct bnxt_qplib_q *sq = &qp->sq; |
| 1463 | u32 sw_prod; |
| 1464 | |
| 1465 | memset(sge, 0, sizeof(*sge)); |
| 1466 | |
| 1467 | if (qp->sq_hdr_buf) { |
| 1468 | sw_prod = HWQ_CMP(sq->hwq.prod, &sq->hwq); |
| 1469 | sge->addr = (dma_addr_t)(qp->sq_hdr_buf_map + |
| 1470 | sw_prod * qp->sq_hdr_buf_size); |
| 1471 | sge->lkey = 0xFFFFFFFF; |
| 1472 | sge->size = qp->sq_hdr_buf_size; |
| 1473 | return qp->sq_hdr_buf + sw_prod * sge->size; |
| 1474 | } |
| 1475 | return NULL; |
| 1476 | } |
| 1477 | |
| 1478 | u32 bnxt_qplib_get_rq_prod_index(struct bnxt_qplib_qp *qp) |
| 1479 | { |
| 1480 | struct bnxt_qplib_q *rq = &qp->rq; |
| 1481 | |
| 1482 | return HWQ_CMP(rq->hwq.prod, &rq->hwq); |
| 1483 | } |
| 1484 | |
| 1485 | dma_addr_t bnxt_qplib_get_qp_buf_from_index(struct bnxt_qplib_qp *qp, u32 index) |
| 1486 | { |
| 1487 | return (qp->rq_hdr_buf_map + index * qp->rq_hdr_buf_size); |
| 1488 | } |
| 1489 | |
| 1490 | void *bnxt_qplib_get_qp1_rq_buf(struct bnxt_qplib_qp *qp, |
| 1491 | struct bnxt_qplib_sge *sge) |
| 1492 | { |
| 1493 | struct bnxt_qplib_q *rq = &qp->rq; |
| 1494 | u32 sw_prod; |
| 1495 | |
| 1496 | memset(sge, 0, sizeof(*sge)); |
| 1497 | |
| 1498 | if (qp->rq_hdr_buf) { |
| 1499 | sw_prod = HWQ_CMP(rq->hwq.prod, &rq->hwq); |
| 1500 | sge->addr = (dma_addr_t)(qp->rq_hdr_buf_map + |
| 1501 | sw_prod * qp->rq_hdr_buf_size); |
| 1502 | sge->lkey = 0xFFFFFFFF; |
| 1503 | sge->size = qp->rq_hdr_buf_size; |
| 1504 | return qp->rq_hdr_buf + sw_prod * sge->size; |
| 1505 | } |
| 1506 | return NULL; |
| 1507 | } |
| 1508 | |
| 1509 | void bnxt_qplib_post_send_db(struct bnxt_qplib_qp *qp) |
| 1510 | { |
| 1511 | struct bnxt_qplib_q *sq = &qp->sq; |
| 1512 | struct dbr_dbr db_msg = { 0 }; |
| 1513 | u32 sw_prod; |
| 1514 | |
| 1515 | sw_prod = HWQ_CMP(sq->hwq.prod, &sq->hwq); |
| 1516 | |
| 1517 | db_msg.index = cpu_to_le32((sw_prod << DBR_DBR_INDEX_SFT) & |
| 1518 | DBR_DBR_INDEX_MASK); |
| 1519 | db_msg.type_xid = |
| 1520 | cpu_to_le32(((qp->id << DBR_DBR_XID_SFT) & DBR_DBR_XID_MASK) | |
| 1521 | DBR_DBR_TYPE_SQ); |
| 1522 | /* Flush all the WQE writes to HW */ |
| 1523 | wmb(); |
| 1524 | __iowrite64_copy(qp->dpi->dbr, &db_msg, sizeof(db_msg) / sizeof(u64)); |
| 1525 | } |
| 1526 | |
| 1527 | int bnxt_qplib_post_send(struct bnxt_qplib_qp *qp, |
| 1528 | struct bnxt_qplib_swqe *wqe) |
| 1529 | { |
| 1530 | struct bnxt_qplib_q *sq = &qp->sq; |
| 1531 | struct bnxt_qplib_swq *swq; |
| 1532 | struct sq_send *hw_sq_send_hdr, **hw_sq_send_ptr; |
| 1533 | struct sq_sge *hw_sge; |
Selvin Xavier | f218d67 | 2017-06-29 12:28:15 -0700 | [diff] [blame] | 1534 | struct bnxt_qplib_nq_work *nq_work = NULL; |
| 1535 | bool sch_handler = false; |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 1536 | u32 sw_prod; |
| 1537 | u8 wqe_size16; |
| 1538 | int i, rc = 0, data_len = 0, pkt_num = 0; |
| 1539 | __le32 temp32; |
| 1540 | |
| 1541 | if (qp->state != CMDQ_MODIFY_QP_NEW_STATE_RTS) { |
Selvin Xavier | f218d67 | 2017-06-29 12:28:15 -0700 | [diff] [blame] | 1542 | if (qp->state == CMDQ_MODIFY_QP_NEW_STATE_ERR) { |
| 1543 | sch_handler = true; |
| 1544 | dev_dbg(&sq->hwq.pdev->dev, |
| 1545 | "%s Error QP. Scheduling for poll_cq\n", |
| 1546 | __func__); |
| 1547 | goto queue_err; |
| 1548 | } |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 1549 | } |
Eddie Wai | 9152e0b | 2017-06-14 03:26:23 -0700 | [diff] [blame] | 1550 | |
| 1551 | if (bnxt_qplib_queue_full(sq)) { |
| 1552 | dev_err(&sq->hwq.pdev->dev, |
| 1553 | "QPLIB: prod = %#x cons = %#x qdepth = %#x delta = %#x", |
| 1554 | sq->hwq.prod, sq->hwq.cons, sq->hwq.max_elements, |
| 1555 | sq->q_full_delta); |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 1556 | rc = -ENOMEM; |
| 1557 | goto done; |
| 1558 | } |
| 1559 | sw_prod = HWQ_CMP(sq->hwq.prod, &sq->hwq); |
| 1560 | swq = &sq->swq[sw_prod]; |
| 1561 | swq->wr_id = wqe->wr_id; |
| 1562 | swq->type = wqe->type; |
| 1563 | swq->flags = wqe->flags; |
| 1564 | if (qp->sig_type) |
| 1565 | swq->flags |= SQ_SEND_FLAGS_SIGNAL_COMP; |
| 1566 | swq->start_psn = sq->psn & BTH_PSN_MASK; |
| 1567 | |
| 1568 | hw_sq_send_ptr = (struct sq_send **)sq->hwq.pbl_ptr; |
| 1569 | hw_sq_send_hdr = &hw_sq_send_ptr[get_sqe_pg(sw_prod)] |
| 1570 | [get_sqe_idx(sw_prod)]; |
| 1571 | |
| 1572 | memset(hw_sq_send_hdr, 0, BNXT_QPLIB_MAX_SQE_ENTRY_SIZE); |
| 1573 | |
| 1574 | if (wqe->flags & BNXT_QPLIB_SWQE_FLAGS_INLINE) { |
| 1575 | /* Copy the inline data */ |
| 1576 | if (wqe->inline_len > BNXT_QPLIB_SWQE_MAX_INLINE_LENGTH) { |
| 1577 | dev_warn(&sq->hwq.pdev->dev, |
| 1578 | "QPLIB: Inline data length > 96 detected"); |
| 1579 | data_len = BNXT_QPLIB_SWQE_MAX_INLINE_LENGTH; |
| 1580 | } else { |
| 1581 | data_len = wqe->inline_len; |
| 1582 | } |
| 1583 | memcpy(hw_sq_send_hdr->data, wqe->inline_data, data_len); |
| 1584 | wqe_size16 = (data_len + 15) >> 4; |
| 1585 | } else { |
| 1586 | for (i = 0, hw_sge = (struct sq_sge *)hw_sq_send_hdr->data; |
| 1587 | i < wqe->num_sge; i++, hw_sge++) { |
| 1588 | hw_sge->va_or_pa = cpu_to_le64(wqe->sg_list[i].addr); |
| 1589 | hw_sge->l_key = cpu_to_le32(wqe->sg_list[i].lkey); |
| 1590 | hw_sge->size = cpu_to_le32(wqe->sg_list[i].size); |
| 1591 | data_len += wqe->sg_list[i].size; |
| 1592 | } |
| 1593 | /* Each SGE entry = 1 WQE size16 */ |
| 1594 | wqe_size16 = wqe->num_sge; |
Somnath Kotur | ab69d4c | 2017-06-29 12:28:09 -0700 | [diff] [blame] | 1595 | /* HW requires wqe size has room for atleast one SGE even if |
| 1596 | * none was supplied by ULP |
| 1597 | */ |
| 1598 | if (!wqe->num_sge) |
| 1599 | wqe_size16++; |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 1600 | } |
| 1601 | |
| 1602 | /* Specifics */ |
| 1603 | switch (wqe->type) { |
| 1604 | case BNXT_QPLIB_SWQE_TYPE_SEND: |
| 1605 | if (qp->type == CMDQ_CREATE_QP1_TYPE_GSI) { |
| 1606 | /* Assemble info for Raw Ethertype QPs */ |
| 1607 | struct sq_send_raweth_qp1 *sqe = |
| 1608 | (struct sq_send_raweth_qp1 *)hw_sq_send_hdr; |
| 1609 | |
| 1610 | sqe->wqe_type = wqe->type; |
| 1611 | sqe->flags = wqe->flags; |
| 1612 | sqe->wqe_size = wqe_size16 + |
| 1613 | ((offsetof(typeof(*sqe), data) + 15) >> 4); |
| 1614 | sqe->cfa_action = cpu_to_le16(wqe->rawqp1.cfa_action); |
| 1615 | sqe->lflags = cpu_to_le16(wqe->rawqp1.lflags); |
| 1616 | sqe->length = cpu_to_le32(data_len); |
| 1617 | sqe->cfa_meta = cpu_to_le32((wqe->rawqp1.cfa_meta & |
| 1618 | SQ_SEND_RAWETH_QP1_CFA_META_VLAN_VID_MASK) << |
| 1619 | SQ_SEND_RAWETH_QP1_CFA_META_VLAN_VID_SFT); |
| 1620 | |
| 1621 | break; |
| 1622 | } |
Bart Van Assche | 38c8a71 | 2017-10-11 10:48:48 -0700 | [diff] [blame] | 1623 | /* fall thru */ |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 1624 | case BNXT_QPLIB_SWQE_TYPE_SEND_WITH_IMM: |
| 1625 | case BNXT_QPLIB_SWQE_TYPE_SEND_WITH_INV: |
| 1626 | { |
| 1627 | struct sq_send *sqe = (struct sq_send *)hw_sq_send_hdr; |
| 1628 | |
| 1629 | sqe->wqe_type = wqe->type; |
| 1630 | sqe->flags = wqe->flags; |
| 1631 | sqe->wqe_size = wqe_size16 + |
| 1632 | ((offsetof(typeof(*sqe), data) + 15) >> 4); |
| 1633 | sqe->inv_key_or_imm_data = cpu_to_le32( |
| 1634 | wqe->send.inv_key); |
| 1635 | if (qp->type == CMDQ_CREATE_QP_TYPE_UD) { |
| 1636 | sqe->q_key = cpu_to_le32(wqe->send.q_key); |
| 1637 | sqe->dst_qp = cpu_to_le32( |
| 1638 | wqe->send.dst_qp & SQ_SEND_DST_QP_MASK); |
| 1639 | sqe->length = cpu_to_le32(data_len); |
| 1640 | sqe->avid = cpu_to_le32(wqe->send.avid & |
| 1641 | SQ_SEND_AVID_MASK); |
| 1642 | sq->psn = (sq->psn + 1) & BTH_PSN_MASK; |
| 1643 | } else { |
| 1644 | sqe->length = cpu_to_le32(data_len); |
| 1645 | sqe->dst_qp = 0; |
| 1646 | sqe->avid = 0; |
| 1647 | if (qp->mtu) |
| 1648 | pkt_num = (data_len + qp->mtu - 1) / qp->mtu; |
| 1649 | if (!pkt_num) |
| 1650 | pkt_num = 1; |
| 1651 | sq->psn = (sq->psn + pkt_num) & BTH_PSN_MASK; |
| 1652 | } |
| 1653 | break; |
| 1654 | } |
| 1655 | case BNXT_QPLIB_SWQE_TYPE_RDMA_WRITE: |
| 1656 | case BNXT_QPLIB_SWQE_TYPE_RDMA_WRITE_WITH_IMM: |
| 1657 | case BNXT_QPLIB_SWQE_TYPE_RDMA_READ: |
| 1658 | { |
| 1659 | struct sq_rdma *sqe = (struct sq_rdma *)hw_sq_send_hdr; |
| 1660 | |
| 1661 | sqe->wqe_type = wqe->type; |
| 1662 | sqe->flags = wqe->flags; |
| 1663 | sqe->wqe_size = wqe_size16 + |
| 1664 | ((offsetof(typeof(*sqe), data) + 15) >> 4); |
| 1665 | sqe->imm_data = cpu_to_le32(wqe->rdma.inv_key); |
| 1666 | sqe->length = cpu_to_le32((u32)data_len); |
| 1667 | sqe->remote_va = cpu_to_le64(wqe->rdma.remote_va); |
| 1668 | sqe->remote_key = cpu_to_le32(wqe->rdma.r_key); |
| 1669 | if (qp->mtu) |
| 1670 | pkt_num = (data_len + qp->mtu - 1) / qp->mtu; |
| 1671 | if (!pkt_num) |
| 1672 | pkt_num = 1; |
| 1673 | sq->psn = (sq->psn + pkt_num) & BTH_PSN_MASK; |
| 1674 | break; |
| 1675 | } |
| 1676 | case BNXT_QPLIB_SWQE_TYPE_ATOMIC_CMP_AND_SWP: |
| 1677 | case BNXT_QPLIB_SWQE_TYPE_ATOMIC_FETCH_AND_ADD: |
| 1678 | { |
| 1679 | struct sq_atomic *sqe = (struct sq_atomic *)hw_sq_send_hdr; |
| 1680 | |
| 1681 | sqe->wqe_type = wqe->type; |
| 1682 | sqe->flags = wqe->flags; |
| 1683 | sqe->remote_key = cpu_to_le32(wqe->atomic.r_key); |
| 1684 | sqe->remote_va = cpu_to_le64(wqe->atomic.remote_va); |
| 1685 | sqe->swap_data = cpu_to_le64(wqe->atomic.swap_data); |
| 1686 | sqe->cmp_data = cpu_to_le64(wqe->atomic.cmp_data); |
| 1687 | if (qp->mtu) |
| 1688 | pkt_num = (data_len + qp->mtu - 1) / qp->mtu; |
| 1689 | if (!pkt_num) |
| 1690 | pkt_num = 1; |
| 1691 | sq->psn = (sq->psn + pkt_num) & BTH_PSN_MASK; |
| 1692 | break; |
| 1693 | } |
| 1694 | case BNXT_QPLIB_SWQE_TYPE_LOCAL_INV: |
| 1695 | { |
| 1696 | struct sq_localinvalidate *sqe = |
| 1697 | (struct sq_localinvalidate *)hw_sq_send_hdr; |
| 1698 | |
| 1699 | sqe->wqe_type = wqe->type; |
| 1700 | sqe->flags = wqe->flags; |
| 1701 | sqe->inv_l_key = cpu_to_le32(wqe->local_inv.inv_l_key); |
| 1702 | |
| 1703 | break; |
| 1704 | } |
| 1705 | case BNXT_QPLIB_SWQE_TYPE_FAST_REG_MR: |
| 1706 | { |
| 1707 | struct sq_fr_pmr *sqe = (struct sq_fr_pmr *)hw_sq_send_hdr; |
| 1708 | |
| 1709 | sqe->wqe_type = wqe->type; |
| 1710 | sqe->flags = wqe->flags; |
| 1711 | sqe->access_cntl = wqe->frmr.access_cntl | |
| 1712 | SQ_FR_PMR_ACCESS_CNTL_LOCAL_WRITE; |
| 1713 | sqe->zero_based_page_size_log = |
| 1714 | (wqe->frmr.pg_sz_log & SQ_FR_PMR_PAGE_SIZE_LOG_MASK) << |
| 1715 | SQ_FR_PMR_PAGE_SIZE_LOG_SFT | |
| 1716 | (wqe->frmr.zero_based ? SQ_FR_PMR_ZERO_BASED : 0); |
| 1717 | sqe->l_key = cpu_to_le32(wqe->frmr.l_key); |
| 1718 | temp32 = cpu_to_le32(wqe->frmr.length); |
| 1719 | memcpy(sqe->length, &temp32, sizeof(wqe->frmr.length)); |
| 1720 | sqe->numlevels_pbl_page_size_log = |
| 1721 | ((wqe->frmr.pbl_pg_sz_log << |
| 1722 | SQ_FR_PMR_PBL_PAGE_SIZE_LOG_SFT) & |
| 1723 | SQ_FR_PMR_PBL_PAGE_SIZE_LOG_MASK) | |
| 1724 | ((wqe->frmr.levels << SQ_FR_PMR_NUMLEVELS_SFT) & |
| 1725 | SQ_FR_PMR_NUMLEVELS_MASK); |
| 1726 | |
| 1727 | for (i = 0; i < wqe->frmr.page_list_len; i++) |
| 1728 | wqe->frmr.pbl_ptr[i] = cpu_to_le64( |
| 1729 | wqe->frmr.page_list[i] | |
| 1730 | PTU_PTE_VALID); |
| 1731 | sqe->pblptr = cpu_to_le64(wqe->frmr.pbl_dma_ptr); |
| 1732 | sqe->va = cpu_to_le64(wqe->frmr.va); |
| 1733 | |
| 1734 | break; |
| 1735 | } |
| 1736 | case BNXT_QPLIB_SWQE_TYPE_BIND_MW: |
| 1737 | { |
| 1738 | struct sq_bind *sqe = (struct sq_bind *)hw_sq_send_hdr; |
| 1739 | |
| 1740 | sqe->wqe_type = wqe->type; |
| 1741 | sqe->flags = wqe->flags; |
| 1742 | sqe->access_cntl = wqe->bind.access_cntl; |
| 1743 | sqe->mw_type_zero_based = wqe->bind.mw_type | |
| 1744 | (wqe->bind.zero_based ? SQ_BIND_ZERO_BASED : 0); |
| 1745 | sqe->parent_l_key = cpu_to_le32(wqe->bind.parent_l_key); |
| 1746 | sqe->l_key = cpu_to_le32(wqe->bind.r_key); |
| 1747 | sqe->va = cpu_to_le64(wqe->bind.va); |
| 1748 | temp32 = cpu_to_le32(wqe->bind.length); |
| 1749 | memcpy(&sqe->length, &temp32, sizeof(wqe->bind.length)); |
| 1750 | break; |
| 1751 | } |
| 1752 | default: |
| 1753 | /* Bad wqe, return error */ |
| 1754 | rc = -EINVAL; |
| 1755 | goto done; |
| 1756 | } |
| 1757 | swq->next_psn = sq->psn & BTH_PSN_MASK; |
| 1758 | if (swq->psn_search) { |
| 1759 | swq->psn_search->opcode_start_psn = cpu_to_le32( |
| 1760 | ((swq->start_psn << SQ_PSN_SEARCH_START_PSN_SFT) & |
| 1761 | SQ_PSN_SEARCH_START_PSN_MASK) | |
| 1762 | ((wqe->type << SQ_PSN_SEARCH_OPCODE_SFT) & |
| 1763 | SQ_PSN_SEARCH_OPCODE_MASK)); |
| 1764 | swq->psn_search->flags_next_psn = cpu_to_le32( |
| 1765 | ((swq->next_psn << SQ_PSN_SEARCH_NEXT_PSN_SFT) & |
| 1766 | SQ_PSN_SEARCH_NEXT_PSN_MASK)); |
| 1767 | } |
Selvin Xavier | f218d67 | 2017-06-29 12:28:15 -0700 | [diff] [blame] | 1768 | queue_err: |
| 1769 | if (sch_handler) { |
| 1770 | /* Store the ULP info in the software structures */ |
| 1771 | sw_prod = HWQ_CMP(sq->hwq.prod, &sq->hwq); |
| 1772 | swq = &sq->swq[sw_prod]; |
| 1773 | swq->wr_id = wqe->wr_id; |
| 1774 | swq->type = wqe->type; |
| 1775 | swq->flags = wqe->flags; |
| 1776 | if (qp->sig_type) |
| 1777 | swq->flags |= SQ_SEND_FLAGS_SIGNAL_COMP; |
| 1778 | swq->start_psn = sq->psn & BTH_PSN_MASK; |
| 1779 | } |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 1780 | sq->hwq.prod++; |
Somnath Kotur | 3fb755b | 2017-05-22 03:15:36 -0700 | [diff] [blame] | 1781 | qp->wqe_cnt++; |
| 1782 | |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 1783 | done: |
Selvin Xavier | f218d67 | 2017-06-29 12:28:15 -0700 | [diff] [blame] | 1784 | if (sch_handler) { |
| 1785 | nq_work = kzalloc(sizeof(*nq_work), GFP_ATOMIC); |
| 1786 | if (nq_work) { |
| 1787 | nq_work->cq = qp->scq; |
| 1788 | nq_work->nq = qp->scq->nq; |
| 1789 | INIT_WORK(&nq_work->work, bnxt_qpn_cqn_sched_task); |
| 1790 | queue_work(qp->scq->nq->cqn_wq, &nq_work->work); |
| 1791 | } else { |
| 1792 | dev_err(&sq->hwq.pdev->dev, |
| 1793 | "QPLIB: FP: Failed to allocate SQ nq_work!"); |
| 1794 | rc = -ENOMEM; |
| 1795 | } |
| 1796 | } |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 1797 | return rc; |
| 1798 | } |
| 1799 | |
| 1800 | void bnxt_qplib_post_recv_db(struct bnxt_qplib_qp *qp) |
| 1801 | { |
| 1802 | struct bnxt_qplib_q *rq = &qp->rq; |
| 1803 | struct dbr_dbr db_msg = { 0 }; |
| 1804 | u32 sw_prod; |
| 1805 | |
| 1806 | sw_prod = HWQ_CMP(rq->hwq.prod, &rq->hwq); |
| 1807 | db_msg.index = cpu_to_le32((sw_prod << DBR_DBR_INDEX_SFT) & |
| 1808 | DBR_DBR_INDEX_MASK); |
| 1809 | db_msg.type_xid = |
| 1810 | cpu_to_le32(((qp->id << DBR_DBR_XID_SFT) & DBR_DBR_XID_MASK) | |
| 1811 | DBR_DBR_TYPE_RQ); |
| 1812 | |
| 1813 | /* Flush the writes to HW Rx WQE before the ringing Rx DB */ |
| 1814 | wmb(); |
| 1815 | __iowrite64_copy(qp->dpi->dbr, &db_msg, sizeof(db_msg) / sizeof(u64)); |
| 1816 | } |
| 1817 | |
| 1818 | int bnxt_qplib_post_recv(struct bnxt_qplib_qp *qp, |
| 1819 | struct bnxt_qplib_swqe *wqe) |
| 1820 | { |
| 1821 | struct bnxt_qplib_q *rq = &qp->rq; |
| 1822 | struct rq_wqe *rqe, **rqe_ptr; |
| 1823 | struct sq_sge *hw_sge; |
Selvin Xavier | f218d67 | 2017-06-29 12:28:15 -0700 | [diff] [blame] | 1824 | struct bnxt_qplib_nq_work *nq_work = NULL; |
| 1825 | bool sch_handler = false; |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 1826 | u32 sw_prod; |
| 1827 | int i, rc = 0; |
| 1828 | |
| 1829 | if (qp->state == CMDQ_MODIFY_QP_NEW_STATE_ERR) { |
Selvin Xavier | f218d67 | 2017-06-29 12:28:15 -0700 | [diff] [blame] | 1830 | sch_handler = true; |
| 1831 | dev_dbg(&rq->hwq.pdev->dev, |
| 1832 | "%s Error QP. Scheduling for poll_cq\n", |
| 1833 | __func__); |
| 1834 | goto queue_err; |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 1835 | } |
Eddie Wai | 9152e0b | 2017-06-14 03:26:23 -0700 | [diff] [blame] | 1836 | if (bnxt_qplib_queue_full(rq)) { |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 1837 | dev_err(&rq->hwq.pdev->dev, |
| 1838 | "QPLIB: FP: QP (0x%x) RQ is full!", qp->id); |
| 1839 | rc = -EINVAL; |
| 1840 | goto done; |
| 1841 | } |
| 1842 | sw_prod = HWQ_CMP(rq->hwq.prod, &rq->hwq); |
| 1843 | rq->swq[sw_prod].wr_id = wqe->wr_id; |
| 1844 | |
| 1845 | rqe_ptr = (struct rq_wqe **)rq->hwq.pbl_ptr; |
| 1846 | rqe = &rqe_ptr[RQE_PG(sw_prod)][RQE_IDX(sw_prod)]; |
| 1847 | |
| 1848 | memset(rqe, 0, BNXT_QPLIB_MAX_RQE_ENTRY_SIZE); |
| 1849 | |
| 1850 | /* Calculate wqe_size16 and data_len */ |
| 1851 | for (i = 0, hw_sge = (struct sq_sge *)rqe->data; |
| 1852 | i < wqe->num_sge; i++, hw_sge++) { |
| 1853 | hw_sge->va_or_pa = cpu_to_le64(wqe->sg_list[i].addr); |
| 1854 | hw_sge->l_key = cpu_to_le32(wqe->sg_list[i].lkey); |
| 1855 | hw_sge->size = cpu_to_le32(wqe->sg_list[i].size); |
| 1856 | } |
| 1857 | rqe->wqe_type = wqe->type; |
| 1858 | rqe->flags = wqe->flags; |
| 1859 | rqe->wqe_size = wqe->num_sge + |
| 1860 | ((offsetof(typeof(*rqe), data) + 15) >> 4); |
Somnath Kotur | ab69d4c | 2017-06-29 12:28:09 -0700 | [diff] [blame] | 1861 | /* HW requires wqe size has room for atleast one SGE even if none |
| 1862 | * was supplied by ULP |
| 1863 | */ |
| 1864 | if (!wqe->num_sge) |
| 1865 | rqe->wqe_size++; |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 1866 | |
| 1867 | /* Supply the rqe->wr_id index to the wr_id_tbl for now */ |
| 1868 | rqe->wr_id[0] = cpu_to_le32(sw_prod); |
| 1869 | |
Selvin Xavier | f218d67 | 2017-06-29 12:28:15 -0700 | [diff] [blame] | 1870 | queue_err: |
| 1871 | if (sch_handler) { |
| 1872 | /* Store the ULP info in the software structures */ |
| 1873 | sw_prod = HWQ_CMP(rq->hwq.prod, &rq->hwq); |
| 1874 | rq->swq[sw_prod].wr_id = wqe->wr_id; |
| 1875 | } |
| 1876 | |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 1877 | rq->hwq.prod++; |
Selvin Xavier | f218d67 | 2017-06-29 12:28:15 -0700 | [diff] [blame] | 1878 | if (sch_handler) { |
| 1879 | nq_work = kzalloc(sizeof(*nq_work), GFP_ATOMIC); |
| 1880 | if (nq_work) { |
| 1881 | nq_work->cq = qp->rcq; |
| 1882 | nq_work->nq = qp->rcq->nq; |
| 1883 | INIT_WORK(&nq_work->work, bnxt_qpn_cqn_sched_task); |
| 1884 | queue_work(qp->rcq->nq->cqn_wq, &nq_work->work); |
| 1885 | } else { |
| 1886 | dev_err(&rq->hwq.pdev->dev, |
| 1887 | "QPLIB: FP: Failed to allocate RQ nq_work!"); |
| 1888 | rc = -ENOMEM; |
| 1889 | } |
| 1890 | } |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 1891 | done: |
| 1892 | return rc; |
| 1893 | } |
| 1894 | |
| 1895 | /* CQ */ |
| 1896 | |
| 1897 | /* Spinlock must be held */ |
| 1898 | static void bnxt_qplib_arm_cq_enable(struct bnxt_qplib_cq *cq) |
| 1899 | { |
| 1900 | struct dbr_dbr db_msg = { 0 }; |
| 1901 | |
| 1902 | db_msg.type_xid = |
| 1903 | cpu_to_le32(((cq->id << DBR_DBR_XID_SFT) & DBR_DBR_XID_MASK) | |
| 1904 | DBR_DBR_TYPE_CQ_ARMENA); |
| 1905 | /* Flush memory writes before enabling the CQ */ |
| 1906 | wmb(); |
| 1907 | __iowrite64_copy(cq->dbr_base, &db_msg, sizeof(db_msg) / sizeof(u64)); |
| 1908 | } |
| 1909 | |
| 1910 | static void bnxt_qplib_arm_cq(struct bnxt_qplib_cq *cq, u32 arm_type) |
| 1911 | { |
| 1912 | struct bnxt_qplib_hwq *cq_hwq = &cq->hwq; |
| 1913 | struct dbr_dbr db_msg = { 0 }; |
| 1914 | u32 sw_cons; |
| 1915 | |
| 1916 | /* Ring DB */ |
| 1917 | sw_cons = HWQ_CMP(cq_hwq->cons, cq_hwq); |
| 1918 | db_msg.index = cpu_to_le32((sw_cons << DBR_DBR_INDEX_SFT) & |
| 1919 | DBR_DBR_INDEX_MASK); |
| 1920 | db_msg.type_xid = |
| 1921 | cpu_to_le32(((cq->id << DBR_DBR_XID_SFT) & DBR_DBR_XID_MASK) | |
| 1922 | arm_type); |
| 1923 | /* flush memory writes before arming the CQ */ |
| 1924 | wmb(); |
| 1925 | __iowrite64_copy(cq->dpi->dbr, &db_msg, sizeof(db_msg) / sizeof(u64)); |
| 1926 | } |
| 1927 | |
| 1928 | int bnxt_qplib_create_cq(struct bnxt_qplib_res *res, struct bnxt_qplib_cq *cq) |
| 1929 | { |
| 1930 | struct bnxt_qplib_rcfw *rcfw = res->rcfw; |
| 1931 | struct cmdq_create_cq req; |
Devesh Sharma | cc1ec76 | 2017-05-22 03:15:31 -0700 | [diff] [blame] | 1932 | struct creq_create_cq_resp resp; |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 1933 | struct bnxt_qplib_pbl *pbl; |
| 1934 | u16 cmd_flags = 0; |
| 1935 | int rc; |
| 1936 | |
| 1937 | cq->hwq.max_elements = cq->max_wqe; |
| 1938 | rc = bnxt_qplib_alloc_init_hwq(res->pdev, &cq->hwq, cq->sghead, |
| 1939 | cq->nmap, &cq->hwq.max_elements, |
| 1940 | BNXT_QPLIB_MAX_CQE_ENTRY_SIZE, 0, |
| 1941 | PAGE_SIZE, HWQ_TYPE_QUEUE); |
| 1942 | if (rc) |
| 1943 | goto exit; |
| 1944 | |
| 1945 | RCFW_CMD_PREP(req, CREATE_CQ, cmd_flags); |
| 1946 | |
| 1947 | if (!cq->dpi) { |
| 1948 | dev_err(&rcfw->pdev->dev, |
| 1949 | "QPLIB: FP: CREATE_CQ failed due to NULL DPI"); |
| 1950 | return -EINVAL; |
| 1951 | } |
| 1952 | req.dpi = cpu_to_le32(cq->dpi->dpi); |
| 1953 | req.cq_handle = cpu_to_le64(cq->cq_handle); |
| 1954 | |
| 1955 | req.cq_size = cpu_to_le32(cq->hwq.max_elements); |
| 1956 | pbl = &cq->hwq.pbl[PBL_LVL_0]; |
| 1957 | req.pg_size_lvl = cpu_to_le32( |
| 1958 | ((cq->hwq.level & CMDQ_CREATE_CQ_LVL_MASK) << |
| 1959 | CMDQ_CREATE_CQ_LVL_SFT) | |
| 1960 | (pbl->pg_size == ROCE_PG_SIZE_4K ? CMDQ_CREATE_CQ_PG_SIZE_PG_4K : |
| 1961 | pbl->pg_size == ROCE_PG_SIZE_8K ? CMDQ_CREATE_CQ_PG_SIZE_PG_8K : |
| 1962 | pbl->pg_size == ROCE_PG_SIZE_64K ? CMDQ_CREATE_CQ_PG_SIZE_PG_64K : |
| 1963 | pbl->pg_size == ROCE_PG_SIZE_2M ? CMDQ_CREATE_CQ_PG_SIZE_PG_2M : |
| 1964 | pbl->pg_size == ROCE_PG_SIZE_8M ? CMDQ_CREATE_CQ_PG_SIZE_PG_8M : |
| 1965 | pbl->pg_size == ROCE_PG_SIZE_1G ? CMDQ_CREATE_CQ_PG_SIZE_PG_1G : |
| 1966 | CMDQ_CREATE_CQ_PG_SIZE_PG_4K)); |
| 1967 | |
| 1968 | req.pbl = cpu_to_le64(pbl->pg_map_arr[0]); |
| 1969 | |
| 1970 | req.cq_fco_cnq_id = cpu_to_le32( |
| 1971 | (cq->cnq_hw_ring_id & CMDQ_CREATE_CQ_CNQ_ID_MASK) << |
| 1972 | CMDQ_CREATE_CQ_CNQ_ID_SFT); |
| 1973 | |
Devesh Sharma | cc1ec76 | 2017-05-22 03:15:31 -0700 | [diff] [blame] | 1974 | rc = bnxt_qplib_rcfw_send_message(rcfw, (void *)&req, |
| 1975 | (void *)&resp, NULL, 0); |
| 1976 | if (rc) |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 1977 | goto fail; |
Devesh Sharma | cc1ec76 | 2017-05-22 03:15:31 -0700 | [diff] [blame] | 1978 | |
| 1979 | cq->id = le32_to_cpu(resp.xid); |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 1980 | cq->dbr_base = res->dpi_tbl.dbr_bar_reg_iomem; |
| 1981 | cq->period = BNXT_QPLIB_QUEUE_START_PERIOD; |
| 1982 | init_waitqueue_head(&cq->waitq); |
Selvin Xavier | f218d67 | 2017-06-29 12:28:15 -0700 | [diff] [blame] | 1983 | INIT_LIST_HEAD(&cq->sqf_head); |
| 1984 | INIT_LIST_HEAD(&cq->rqf_head); |
| 1985 | spin_lock_init(&cq->compl_lock); |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 1986 | |
| 1987 | bnxt_qplib_arm_cq_enable(cq); |
| 1988 | return 0; |
| 1989 | |
| 1990 | fail: |
| 1991 | bnxt_qplib_free_hwq(res->pdev, &cq->hwq); |
| 1992 | exit: |
| 1993 | return rc; |
| 1994 | } |
| 1995 | |
| 1996 | int bnxt_qplib_destroy_cq(struct bnxt_qplib_res *res, struct bnxt_qplib_cq *cq) |
| 1997 | { |
| 1998 | struct bnxt_qplib_rcfw *rcfw = res->rcfw; |
| 1999 | struct cmdq_destroy_cq req; |
Devesh Sharma | cc1ec76 | 2017-05-22 03:15:31 -0700 | [diff] [blame] | 2000 | struct creq_destroy_cq_resp resp; |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 2001 | u16 cmd_flags = 0; |
Devesh Sharma | cc1ec76 | 2017-05-22 03:15:31 -0700 | [diff] [blame] | 2002 | int rc; |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 2003 | |
| 2004 | RCFW_CMD_PREP(req, DESTROY_CQ, cmd_flags); |
| 2005 | |
| 2006 | req.cq_cid = cpu_to_le32(cq->id); |
Devesh Sharma | cc1ec76 | 2017-05-22 03:15:31 -0700 | [diff] [blame] | 2007 | rc = bnxt_qplib_rcfw_send_message(rcfw, (void *)&req, |
| 2008 | (void *)&resp, NULL, 0); |
| 2009 | if (rc) |
| 2010 | return rc; |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 2011 | bnxt_qplib_free_hwq(res->pdev, &cq->hwq); |
| 2012 | return 0; |
| 2013 | } |
| 2014 | |
| 2015 | static int __flush_sq(struct bnxt_qplib_q *sq, struct bnxt_qplib_qp *qp, |
| 2016 | struct bnxt_qplib_cqe **pcqe, int *budget) |
| 2017 | { |
| 2018 | u32 sw_prod, sw_cons; |
| 2019 | struct bnxt_qplib_cqe *cqe; |
| 2020 | int rc = 0; |
| 2021 | |
| 2022 | /* Now complete all outstanding SQEs with FLUSHED_ERR */ |
| 2023 | sw_prod = HWQ_CMP(sq->hwq.prod, &sq->hwq); |
| 2024 | cqe = *pcqe; |
| 2025 | while (*budget) { |
| 2026 | sw_cons = HWQ_CMP(sq->hwq.cons, &sq->hwq); |
| 2027 | if (sw_cons == sw_prod) { |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 2028 | break; |
| 2029 | } |
Selvin Xavier | f218d67 | 2017-06-29 12:28:15 -0700 | [diff] [blame] | 2030 | /* Skip the FENCE WQE completions */ |
| 2031 | if (sq->swq[sw_cons].wr_id == BNXT_QPLIB_FENCE_WRID) { |
| 2032 | bnxt_qplib_cancel_phantom_processing(qp); |
| 2033 | goto skip_compl; |
| 2034 | } |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 2035 | memset(cqe, 0, sizeof(*cqe)); |
| 2036 | cqe->status = CQ_REQ_STATUS_WORK_REQUEST_FLUSHED_ERR; |
| 2037 | cqe->opcode = CQ_BASE_CQE_TYPE_REQ; |
| 2038 | cqe->qp_handle = (u64)(unsigned long)qp; |
| 2039 | cqe->wr_id = sq->swq[sw_cons].wr_id; |
| 2040 | cqe->src_qp = qp->id; |
| 2041 | cqe->type = sq->swq[sw_cons].type; |
| 2042 | cqe++; |
| 2043 | (*budget)--; |
Selvin Xavier | f218d67 | 2017-06-29 12:28:15 -0700 | [diff] [blame] | 2044 | skip_compl: |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 2045 | sq->hwq.cons++; |
| 2046 | } |
| 2047 | *pcqe = cqe; |
| 2048 | if (!(*budget) && HWQ_CMP(sq->hwq.cons, &sq->hwq) != sw_prod) |
| 2049 | /* Out of budget */ |
| 2050 | rc = -EAGAIN; |
| 2051 | |
| 2052 | return rc; |
| 2053 | } |
| 2054 | |
| 2055 | static int __flush_rq(struct bnxt_qplib_q *rq, struct bnxt_qplib_qp *qp, |
Selvin Xavier | f218d67 | 2017-06-29 12:28:15 -0700 | [diff] [blame] | 2056 | struct bnxt_qplib_cqe **pcqe, int *budget) |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 2057 | { |
| 2058 | struct bnxt_qplib_cqe *cqe; |
| 2059 | u32 sw_prod, sw_cons; |
| 2060 | int rc = 0; |
Selvin Xavier | f218d67 | 2017-06-29 12:28:15 -0700 | [diff] [blame] | 2061 | int opcode = 0; |
| 2062 | |
| 2063 | switch (qp->type) { |
| 2064 | case CMDQ_CREATE_QP1_TYPE_GSI: |
| 2065 | opcode = CQ_BASE_CQE_TYPE_RES_RAWETH_QP1; |
| 2066 | break; |
| 2067 | case CMDQ_CREATE_QP_TYPE_RC: |
| 2068 | opcode = CQ_BASE_CQE_TYPE_RES_RC; |
| 2069 | break; |
| 2070 | case CMDQ_CREATE_QP_TYPE_UD: |
| 2071 | opcode = CQ_BASE_CQE_TYPE_RES_UD; |
| 2072 | break; |
| 2073 | } |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 2074 | |
| 2075 | /* Flush the rest of the RQ */ |
| 2076 | sw_prod = HWQ_CMP(rq->hwq.prod, &rq->hwq); |
| 2077 | cqe = *pcqe; |
| 2078 | while (*budget) { |
| 2079 | sw_cons = HWQ_CMP(rq->hwq.cons, &rq->hwq); |
| 2080 | if (sw_cons == sw_prod) |
| 2081 | break; |
| 2082 | memset(cqe, 0, sizeof(*cqe)); |
| 2083 | cqe->status = |
| 2084 | CQ_RES_RC_STATUS_WORK_REQUEST_FLUSHED_ERR; |
| 2085 | cqe->opcode = opcode; |
| 2086 | cqe->qp_handle = (unsigned long)qp; |
| 2087 | cqe->wr_id = rq->swq[sw_cons].wr_id; |
| 2088 | cqe++; |
| 2089 | (*budget)--; |
| 2090 | rq->hwq.cons++; |
| 2091 | } |
| 2092 | *pcqe = cqe; |
| 2093 | if (!*budget && HWQ_CMP(rq->hwq.cons, &rq->hwq) != sw_prod) |
| 2094 | /* Out of budget */ |
| 2095 | rc = -EAGAIN; |
| 2096 | |
| 2097 | return rc; |
| 2098 | } |
| 2099 | |
Selvin Xavier | f218d67 | 2017-06-29 12:28:15 -0700 | [diff] [blame] | 2100 | void bnxt_qplib_mark_qp_error(void *qp_handle) |
| 2101 | { |
| 2102 | struct bnxt_qplib_qp *qp = qp_handle; |
| 2103 | |
| 2104 | if (!qp) |
| 2105 | return; |
| 2106 | |
| 2107 | /* Must block new posting of SQ and RQ */ |
| 2108 | qp->state = CMDQ_MODIFY_QP_NEW_STATE_ERR; |
| 2109 | bnxt_qplib_cancel_phantom_processing(qp); |
| 2110 | |
| 2111 | /* Add qp to flush list of the CQ */ |
| 2112 | __bnxt_qplib_add_flush_qp(qp); |
| 2113 | } |
| 2114 | |
Eddie Wai | 9152e0b | 2017-06-14 03:26:23 -0700 | [diff] [blame] | 2115 | /* Note: SQE is valid from sw_sq_cons up to cqe_sq_cons (exclusive) |
| 2116 | * CQE is track from sw_cq_cons to max_element but valid only if VALID=1 |
| 2117 | */ |
| 2118 | static int do_wa9060(struct bnxt_qplib_qp *qp, struct bnxt_qplib_cq *cq, |
| 2119 | u32 cq_cons, u32 sw_sq_cons, u32 cqe_sq_cons) |
| 2120 | { |
| 2121 | struct bnxt_qplib_q *sq = &qp->sq; |
| 2122 | struct bnxt_qplib_swq *swq; |
| 2123 | u32 peek_sw_cq_cons, peek_raw_cq_cons, peek_sq_cons_idx; |
| 2124 | struct cq_base *peek_hwcqe, **peek_hw_cqe_ptr; |
| 2125 | struct cq_req *peek_req_hwcqe; |
| 2126 | struct bnxt_qplib_qp *peek_qp; |
| 2127 | struct bnxt_qplib_q *peek_sq; |
| 2128 | int i, rc = 0; |
| 2129 | |
| 2130 | /* Normal mode */ |
| 2131 | /* Check for the psn_search marking before completing */ |
| 2132 | swq = &sq->swq[sw_sq_cons]; |
| 2133 | if (swq->psn_search && |
| 2134 | le32_to_cpu(swq->psn_search->flags_next_psn) & 0x80000000) { |
| 2135 | /* Unmark */ |
| 2136 | swq->psn_search->flags_next_psn = cpu_to_le32 |
| 2137 | (le32_to_cpu(swq->psn_search->flags_next_psn) |
| 2138 | & ~0x80000000); |
| 2139 | dev_dbg(&cq->hwq.pdev->dev, |
| 2140 | "FP: Process Req cq_cons=0x%x qp=0x%x sq cons sw=0x%x cqe=0x%x marked!\n", |
| 2141 | cq_cons, qp->id, sw_sq_cons, cqe_sq_cons); |
| 2142 | sq->condition = true; |
| 2143 | sq->send_phantom = true; |
| 2144 | |
| 2145 | /* TODO: Only ARM if the previous SQE is ARMALL */ |
| 2146 | bnxt_qplib_arm_cq(cq, DBR_DBR_TYPE_CQ_ARMALL); |
| 2147 | |
| 2148 | rc = -EAGAIN; |
| 2149 | goto out; |
| 2150 | } |
| 2151 | if (sq->condition) { |
| 2152 | /* Peek at the completions */ |
| 2153 | peek_raw_cq_cons = cq->hwq.cons; |
| 2154 | peek_sw_cq_cons = cq_cons; |
| 2155 | i = cq->hwq.max_elements; |
| 2156 | while (i--) { |
| 2157 | peek_sw_cq_cons = HWQ_CMP((peek_sw_cq_cons), &cq->hwq); |
| 2158 | peek_hw_cqe_ptr = (struct cq_base **)cq->hwq.pbl_ptr; |
| 2159 | peek_hwcqe = &peek_hw_cqe_ptr[CQE_PG(peek_sw_cq_cons)] |
| 2160 | [CQE_IDX(peek_sw_cq_cons)]; |
| 2161 | /* If the next hwcqe is VALID */ |
| 2162 | if (CQE_CMP_VALID(peek_hwcqe, peek_raw_cq_cons, |
| 2163 | cq->hwq.max_elements)) { |
Somnath Kotur | 9b40183 | 2017-11-06 08:07:29 -0800 | [diff] [blame] | 2164 | /* |
| 2165 | * The valid test of the entry must be done first before |
| 2166 | * reading any further. |
| 2167 | */ |
| 2168 | dma_rmb(); |
Eddie Wai | 9152e0b | 2017-06-14 03:26:23 -0700 | [diff] [blame] | 2169 | /* If the next hwcqe is a REQ */ |
| 2170 | if ((peek_hwcqe->cqe_type_toggle & |
| 2171 | CQ_BASE_CQE_TYPE_MASK) == |
| 2172 | CQ_BASE_CQE_TYPE_REQ) { |
| 2173 | peek_req_hwcqe = (struct cq_req *) |
| 2174 | peek_hwcqe; |
| 2175 | peek_qp = (struct bnxt_qplib_qp *) |
| 2176 | ((unsigned long) |
| 2177 | le64_to_cpu |
| 2178 | (peek_req_hwcqe->qp_handle)); |
| 2179 | peek_sq = &peek_qp->sq; |
| 2180 | peek_sq_cons_idx = HWQ_CMP(le16_to_cpu( |
| 2181 | peek_req_hwcqe->sq_cons_idx) - 1 |
| 2182 | , &sq->hwq); |
| 2183 | /* If the hwcqe's sq's wr_id matches */ |
| 2184 | if (peek_sq == sq && |
| 2185 | sq->swq[peek_sq_cons_idx].wr_id == |
| 2186 | BNXT_QPLIB_FENCE_WRID) { |
| 2187 | /* |
| 2188 | * Unbreak only if the phantom |
| 2189 | * comes back |
| 2190 | */ |
| 2191 | dev_dbg(&cq->hwq.pdev->dev, |
| 2192 | "FP:Got Phantom CQE"); |
| 2193 | sq->condition = false; |
| 2194 | sq->single = true; |
| 2195 | rc = 0; |
| 2196 | goto out; |
| 2197 | } |
| 2198 | } |
| 2199 | /* Valid but not the phantom, so keep looping */ |
| 2200 | } else { |
| 2201 | /* Not valid yet, just exit and wait */ |
| 2202 | rc = -EINVAL; |
| 2203 | goto out; |
| 2204 | } |
| 2205 | peek_sw_cq_cons++; |
| 2206 | peek_raw_cq_cons++; |
| 2207 | } |
| 2208 | dev_err(&cq->hwq.pdev->dev, |
| 2209 | "Should not have come here! cq_cons=0x%x qp=0x%x sq cons sw=0x%x hw=0x%x", |
| 2210 | cq_cons, qp->id, sw_sq_cons, cqe_sq_cons); |
| 2211 | rc = -EINVAL; |
| 2212 | } |
| 2213 | out: |
| 2214 | return rc; |
| 2215 | } |
| 2216 | |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 2217 | static int bnxt_qplib_cq_process_req(struct bnxt_qplib_cq *cq, |
| 2218 | struct cq_req *hwcqe, |
Eddie Wai | 9152e0b | 2017-06-14 03:26:23 -0700 | [diff] [blame] | 2219 | struct bnxt_qplib_cqe **pcqe, int *budget, |
| 2220 | u32 cq_cons, struct bnxt_qplib_qp **lib_qp) |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 2221 | { |
| 2222 | struct bnxt_qplib_qp *qp; |
| 2223 | struct bnxt_qplib_q *sq; |
| 2224 | struct bnxt_qplib_cqe *cqe; |
Eddie Wai | 9152e0b | 2017-06-14 03:26:23 -0700 | [diff] [blame] | 2225 | u32 sw_sq_cons, cqe_sq_cons; |
| 2226 | struct bnxt_qplib_swq *swq; |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 2227 | int rc = 0; |
| 2228 | |
| 2229 | qp = (struct bnxt_qplib_qp *)((unsigned long) |
| 2230 | le64_to_cpu(hwcqe->qp_handle)); |
| 2231 | if (!qp) { |
| 2232 | dev_err(&cq->hwq.pdev->dev, |
| 2233 | "QPLIB: FP: Process Req qp is NULL"); |
| 2234 | return -EINVAL; |
| 2235 | } |
| 2236 | sq = &qp->sq; |
| 2237 | |
Eddie Wai | 9152e0b | 2017-06-14 03:26:23 -0700 | [diff] [blame] | 2238 | cqe_sq_cons = HWQ_CMP(le16_to_cpu(hwcqe->sq_cons_idx), &sq->hwq); |
| 2239 | if (cqe_sq_cons > sq->hwq.max_elements) { |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 2240 | dev_err(&cq->hwq.pdev->dev, |
| 2241 | "QPLIB: FP: CQ Process req reported "); |
| 2242 | dev_err(&cq->hwq.pdev->dev, |
| 2243 | "QPLIB: sq_cons_idx 0x%x which exceeded max 0x%x", |
Eddie Wai | 9152e0b | 2017-06-14 03:26:23 -0700 | [diff] [blame] | 2244 | cqe_sq_cons, sq->hwq.max_elements); |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 2245 | return -EINVAL; |
| 2246 | } |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 2247 | |
Selvin Xavier | f218d67 | 2017-06-29 12:28:15 -0700 | [diff] [blame] | 2248 | if (qp->sq.flushed) { |
| 2249 | dev_dbg(&cq->hwq.pdev->dev, |
| 2250 | "%s: QPLIB: QP in Flush QP = %p\n", __func__, qp); |
| 2251 | goto done; |
| 2252 | } |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 2253 | /* Require to walk the sq's swq to fabricate CQEs for all previously |
| 2254 | * signaled SWQEs due to CQE aggregation from the current sq cons |
Eddie Wai | 9152e0b | 2017-06-14 03:26:23 -0700 | [diff] [blame] | 2255 | * to the cqe_sq_cons |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 2256 | */ |
| 2257 | cqe = *pcqe; |
| 2258 | while (*budget) { |
Eddie Wai | 9152e0b | 2017-06-14 03:26:23 -0700 | [diff] [blame] | 2259 | sw_sq_cons = HWQ_CMP(sq->hwq.cons, &sq->hwq); |
| 2260 | if (sw_sq_cons == cqe_sq_cons) |
| 2261 | /* Done */ |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 2262 | break; |
Eddie Wai | 9152e0b | 2017-06-14 03:26:23 -0700 | [diff] [blame] | 2263 | |
| 2264 | swq = &sq->swq[sw_sq_cons]; |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 2265 | memset(cqe, 0, sizeof(*cqe)); |
| 2266 | cqe->opcode = CQ_BASE_CQE_TYPE_REQ; |
| 2267 | cqe->qp_handle = (u64)(unsigned long)qp; |
| 2268 | cqe->src_qp = qp->id; |
Eddie Wai | 9152e0b | 2017-06-14 03:26:23 -0700 | [diff] [blame] | 2269 | cqe->wr_id = swq->wr_id; |
| 2270 | if (cqe->wr_id == BNXT_QPLIB_FENCE_WRID) |
| 2271 | goto skip; |
| 2272 | cqe->type = swq->type; |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 2273 | |
| 2274 | /* For the last CQE, check for status. For errors, regardless |
| 2275 | * of the request being signaled or not, it must complete with |
| 2276 | * the hwcqe error status |
| 2277 | */ |
Eddie Wai | 9152e0b | 2017-06-14 03:26:23 -0700 | [diff] [blame] | 2278 | if (HWQ_CMP((sw_sq_cons + 1), &sq->hwq) == cqe_sq_cons && |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 2279 | hwcqe->status != CQ_REQ_STATUS_OK) { |
| 2280 | cqe->status = hwcqe->status; |
| 2281 | dev_err(&cq->hwq.pdev->dev, |
| 2282 | "QPLIB: FP: CQ Processed Req "); |
| 2283 | dev_err(&cq->hwq.pdev->dev, |
| 2284 | "QPLIB: wr_id[%d] = 0x%llx with status 0x%x", |
Eddie Wai | 9152e0b | 2017-06-14 03:26:23 -0700 | [diff] [blame] | 2285 | sw_sq_cons, cqe->wr_id, cqe->status); |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 2286 | cqe++; |
| 2287 | (*budget)--; |
Selvin Xavier | f218d67 | 2017-06-29 12:28:15 -0700 | [diff] [blame] | 2288 | bnxt_qplib_lock_buddy_cq(qp, cq); |
| 2289 | bnxt_qplib_mark_qp_error(qp); |
| 2290 | bnxt_qplib_unlock_buddy_cq(qp, cq); |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 2291 | } else { |
Eddie Wai | 9152e0b | 2017-06-14 03:26:23 -0700 | [diff] [blame] | 2292 | if (swq->flags & SQ_SEND_FLAGS_SIGNAL_COMP) { |
| 2293 | /* Before we complete, do WA 9060 */ |
| 2294 | if (do_wa9060(qp, cq, cq_cons, sw_sq_cons, |
| 2295 | cqe_sq_cons)) { |
| 2296 | *lib_qp = qp; |
| 2297 | goto out; |
| 2298 | } |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 2299 | cqe->status = CQ_REQ_STATUS_OK; |
| 2300 | cqe++; |
| 2301 | (*budget)--; |
| 2302 | } |
| 2303 | } |
Eddie Wai | 9152e0b | 2017-06-14 03:26:23 -0700 | [diff] [blame] | 2304 | skip: |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 2305 | sq->hwq.cons++; |
Eddie Wai | 9152e0b | 2017-06-14 03:26:23 -0700 | [diff] [blame] | 2306 | if (sq->single) |
| 2307 | break; |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 2308 | } |
Eddie Wai | 9152e0b | 2017-06-14 03:26:23 -0700 | [diff] [blame] | 2309 | out: |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 2310 | *pcqe = cqe; |
Eddie Wai | 9152e0b | 2017-06-14 03:26:23 -0700 | [diff] [blame] | 2311 | if (HWQ_CMP(sq->hwq.cons, &sq->hwq) != cqe_sq_cons) { |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 2312 | /* Out of budget */ |
| 2313 | rc = -EAGAIN; |
| 2314 | goto done; |
| 2315 | } |
Eddie Wai | 9152e0b | 2017-06-14 03:26:23 -0700 | [diff] [blame] | 2316 | /* |
| 2317 | * Back to normal completion mode only after it has completed all of |
| 2318 | * the WC for this CQE |
| 2319 | */ |
| 2320 | sq->single = false; |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 2321 | done: |
| 2322 | return rc; |
| 2323 | } |
| 2324 | |
Devesh Sharma | 37cb11a | 2018-01-11 11:52:11 -0500 | [diff] [blame] | 2325 | static void bnxt_qplib_release_srqe(struct bnxt_qplib_srq *srq, u32 tag) |
| 2326 | { |
| 2327 | spin_lock(&srq->hwq.lock); |
| 2328 | srq->swq[srq->last_idx].next_idx = (int)tag; |
| 2329 | srq->last_idx = (int)tag; |
| 2330 | srq->swq[srq->last_idx].next_idx = -1; |
| 2331 | srq->hwq.cons++; /* Support for SRQE counter */ |
| 2332 | spin_unlock(&srq->hwq.lock); |
| 2333 | } |
| 2334 | |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 2335 | static int bnxt_qplib_cq_process_res_rc(struct bnxt_qplib_cq *cq, |
| 2336 | struct cq_res_rc *hwcqe, |
| 2337 | struct bnxt_qplib_cqe **pcqe, |
| 2338 | int *budget) |
| 2339 | { |
| 2340 | struct bnxt_qplib_qp *qp; |
| 2341 | struct bnxt_qplib_q *rq; |
Devesh Sharma | 37cb11a | 2018-01-11 11:52:11 -0500 | [diff] [blame] | 2342 | struct bnxt_qplib_srq *srq; |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 2343 | struct bnxt_qplib_cqe *cqe; |
| 2344 | u32 wr_id_idx; |
| 2345 | int rc = 0; |
| 2346 | |
| 2347 | qp = (struct bnxt_qplib_qp *)((unsigned long) |
| 2348 | le64_to_cpu(hwcqe->qp_handle)); |
| 2349 | if (!qp) { |
| 2350 | dev_err(&cq->hwq.pdev->dev, "QPLIB: process_cq RC qp is NULL"); |
| 2351 | return -EINVAL; |
| 2352 | } |
Selvin Xavier | f218d67 | 2017-06-29 12:28:15 -0700 | [diff] [blame] | 2353 | if (qp->rq.flushed) { |
| 2354 | dev_dbg(&cq->hwq.pdev->dev, |
| 2355 | "%s: QPLIB: QP in Flush QP = %p\n", __func__, qp); |
| 2356 | goto done; |
| 2357 | } |
| 2358 | |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 2359 | cqe = *pcqe; |
| 2360 | cqe->opcode = hwcqe->cqe_type_toggle & CQ_BASE_CQE_TYPE_MASK; |
| 2361 | cqe->length = le32_to_cpu(hwcqe->length); |
| 2362 | cqe->invrkey = le32_to_cpu(hwcqe->imm_data_or_inv_r_key); |
| 2363 | cqe->mr_handle = le64_to_cpu(hwcqe->mr_handle); |
| 2364 | cqe->flags = le16_to_cpu(hwcqe->flags); |
| 2365 | cqe->status = hwcqe->status; |
| 2366 | cqe->qp_handle = (u64)(unsigned long)qp; |
| 2367 | |
| 2368 | wr_id_idx = le32_to_cpu(hwcqe->srq_or_rq_wr_id) & |
| 2369 | CQ_RES_RC_SRQ_OR_RQ_WR_ID_MASK; |
Devesh Sharma | 37cb11a | 2018-01-11 11:52:11 -0500 | [diff] [blame] | 2370 | if (cqe->flags & CQ_RES_RC_FLAGS_SRQ_SRQ) { |
| 2371 | srq = qp->srq; |
| 2372 | if (!srq) |
| 2373 | return -EINVAL; |
| 2374 | if (wr_id_idx > srq->hwq.max_elements) { |
| 2375 | dev_err(&cq->hwq.pdev->dev, |
| 2376 | "QPLIB: FP: CQ Process RC "); |
| 2377 | dev_err(&cq->hwq.pdev->dev, |
| 2378 | "QPLIB: wr_id idx 0x%x exceeded SRQ max 0x%x", |
| 2379 | wr_id_idx, srq->hwq.max_elements); |
| 2380 | return -EINVAL; |
| 2381 | } |
| 2382 | cqe->wr_id = srq->swq[wr_id_idx].wr_id; |
| 2383 | bnxt_qplib_release_srqe(srq, wr_id_idx); |
| 2384 | cqe++; |
| 2385 | (*budget)--; |
| 2386 | *pcqe = cqe; |
| 2387 | } else { |
| 2388 | rq = &qp->rq; |
| 2389 | if (wr_id_idx > rq->hwq.max_elements) { |
| 2390 | dev_err(&cq->hwq.pdev->dev, |
| 2391 | "QPLIB: FP: CQ Process RC "); |
| 2392 | dev_err(&cq->hwq.pdev->dev, |
| 2393 | "QPLIB: wr_id idx 0x%x exceeded RQ max 0x%x", |
| 2394 | wr_id_idx, rq->hwq.max_elements); |
| 2395 | return -EINVAL; |
| 2396 | } |
| 2397 | cqe->wr_id = rq->swq[wr_id_idx].wr_id; |
| 2398 | cqe++; |
| 2399 | (*budget)--; |
| 2400 | rq->hwq.cons++; |
| 2401 | *pcqe = cqe; |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 2402 | |
Devesh Sharma | 37cb11a | 2018-01-11 11:52:11 -0500 | [diff] [blame] | 2403 | if (hwcqe->status != CQ_RES_RC_STATUS_OK) { |
| 2404 | qp->state = CMDQ_MODIFY_QP_NEW_STATE_ERR; |
| 2405 | /* Add qp to flush list of the CQ */ |
| 2406 | bnxt_qplib_lock_buddy_cq(qp, cq); |
| 2407 | __bnxt_qplib_add_flush_qp(qp); |
| 2408 | bnxt_qplib_unlock_buddy_cq(qp, cq); |
| 2409 | } |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 2410 | } |
Selvin Xavier | f218d67 | 2017-06-29 12:28:15 -0700 | [diff] [blame] | 2411 | |
| 2412 | done: |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 2413 | return rc; |
| 2414 | } |
| 2415 | |
| 2416 | static int bnxt_qplib_cq_process_res_ud(struct bnxt_qplib_cq *cq, |
| 2417 | struct cq_res_ud *hwcqe, |
| 2418 | struct bnxt_qplib_cqe **pcqe, |
| 2419 | int *budget) |
| 2420 | { |
| 2421 | struct bnxt_qplib_qp *qp; |
| 2422 | struct bnxt_qplib_q *rq; |
Devesh Sharma | 37cb11a | 2018-01-11 11:52:11 -0500 | [diff] [blame] | 2423 | struct bnxt_qplib_srq *srq; |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 2424 | struct bnxt_qplib_cqe *cqe; |
| 2425 | u32 wr_id_idx; |
| 2426 | int rc = 0; |
| 2427 | |
| 2428 | qp = (struct bnxt_qplib_qp *)((unsigned long) |
| 2429 | le64_to_cpu(hwcqe->qp_handle)); |
| 2430 | if (!qp) { |
| 2431 | dev_err(&cq->hwq.pdev->dev, "QPLIB: process_cq UD qp is NULL"); |
| 2432 | return -EINVAL; |
| 2433 | } |
Selvin Xavier | f218d67 | 2017-06-29 12:28:15 -0700 | [diff] [blame] | 2434 | if (qp->rq.flushed) { |
| 2435 | dev_dbg(&cq->hwq.pdev->dev, |
| 2436 | "%s: QPLIB: QP in Flush QP = %p\n", __func__, qp); |
| 2437 | goto done; |
| 2438 | } |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 2439 | cqe = *pcqe; |
| 2440 | cqe->opcode = hwcqe->cqe_type_toggle & CQ_BASE_CQE_TYPE_MASK; |
| 2441 | cqe->length = le32_to_cpu(hwcqe->length); |
| 2442 | cqe->invrkey = le32_to_cpu(hwcqe->imm_data); |
| 2443 | cqe->flags = le16_to_cpu(hwcqe->flags); |
| 2444 | cqe->status = hwcqe->status; |
| 2445 | cqe->qp_handle = (u64)(unsigned long)qp; |
| 2446 | memcpy(cqe->smac, hwcqe->src_mac, 6); |
| 2447 | wr_id_idx = le32_to_cpu(hwcqe->src_qp_high_srq_or_rq_wr_id) |
| 2448 | & CQ_RES_UD_SRQ_OR_RQ_WR_ID_MASK; |
| 2449 | cqe->src_qp = le16_to_cpu(hwcqe->src_qp_low) | |
| 2450 | ((le32_to_cpu( |
| 2451 | hwcqe->src_qp_high_srq_or_rq_wr_id) & |
| 2452 | CQ_RES_UD_SRC_QP_HIGH_MASK) >> 8); |
| 2453 | |
Devesh Sharma | 37cb11a | 2018-01-11 11:52:11 -0500 | [diff] [blame] | 2454 | if (cqe->flags & CQ_RES_RC_FLAGS_SRQ_SRQ) { |
| 2455 | srq = qp->srq; |
| 2456 | if (!srq) |
| 2457 | return -EINVAL; |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 2458 | |
Devesh Sharma | 37cb11a | 2018-01-11 11:52:11 -0500 | [diff] [blame] | 2459 | if (wr_id_idx > srq->hwq.max_elements) { |
| 2460 | dev_err(&cq->hwq.pdev->dev, |
| 2461 | "QPLIB: FP: CQ Process UD "); |
| 2462 | dev_err(&cq->hwq.pdev->dev, |
| 2463 | "QPLIB: wr_id idx 0x%x exceeded SRQ max 0x%x", |
| 2464 | wr_id_idx, srq->hwq.max_elements); |
| 2465 | return -EINVAL; |
| 2466 | } |
| 2467 | cqe->wr_id = srq->swq[wr_id_idx].wr_id; |
| 2468 | bnxt_qplib_release_srqe(srq, wr_id_idx); |
| 2469 | cqe++; |
| 2470 | (*budget)--; |
| 2471 | *pcqe = cqe; |
| 2472 | } else { |
| 2473 | rq = &qp->rq; |
| 2474 | if (wr_id_idx > rq->hwq.max_elements) { |
| 2475 | dev_err(&cq->hwq.pdev->dev, |
| 2476 | "QPLIB: FP: CQ Process UD "); |
| 2477 | dev_err(&cq->hwq.pdev->dev, |
| 2478 | "QPLIB: wr_id idx 0x%x exceeded RQ max 0x%x", |
| 2479 | wr_id_idx, rq->hwq.max_elements); |
| 2480 | return -EINVAL; |
| 2481 | } |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 2482 | |
Devesh Sharma | 37cb11a | 2018-01-11 11:52:11 -0500 | [diff] [blame] | 2483 | cqe->wr_id = rq->swq[wr_id_idx].wr_id; |
| 2484 | cqe++; |
| 2485 | (*budget)--; |
| 2486 | rq->hwq.cons++; |
| 2487 | *pcqe = cqe; |
| 2488 | |
| 2489 | if (hwcqe->status != CQ_RES_RC_STATUS_OK) { |
| 2490 | qp->state = CMDQ_MODIFY_QP_NEW_STATE_ERR; |
| 2491 | /* Add qp to flush list of the CQ */ |
| 2492 | bnxt_qplib_lock_buddy_cq(qp, cq); |
| 2493 | __bnxt_qplib_add_flush_qp(qp); |
| 2494 | bnxt_qplib_unlock_buddy_cq(qp, cq); |
| 2495 | } |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 2496 | } |
Selvin Xavier | f218d67 | 2017-06-29 12:28:15 -0700 | [diff] [blame] | 2497 | done: |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 2498 | return rc; |
| 2499 | } |
| 2500 | |
Selvin Xavier | 499e456 | 2017-06-29 12:28:18 -0700 | [diff] [blame] | 2501 | bool bnxt_qplib_is_cq_empty(struct bnxt_qplib_cq *cq) |
| 2502 | { |
| 2503 | struct cq_base *hw_cqe, **hw_cqe_ptr; |
| 2504 | unsigned long flags; |
| 2505 | u32 sw_cons, raw_cons; |
| 2506 | bool rc = true; |
| 2507 | |
| 2508 | spin_lock_irqsave(&cq->hwq.lock, flags); |
| 2509 | raw_cons = cq->hwq.cons; |
| 2510 | sw_cons = HWQ_CMP(raw_cons, &cq->hwq); |
| 2511 | hw_cqe_ptr = (struct cq_base **)cq->hwq.pbl_ptr; |
| 2512 | hw_cqe = &hw_cqe_ptr[CQE_PG(sw_cons)][CQE_IDX(sw_cons)]; |
| 2513 | |
| 2514 | /* Check for Valid bit. If the CQE is valid, return false */ |
| 2515 | rc = !CQE_CMP_VALID(hw_cqe, raw_cons, cq->hwq.max_elements); |
| 2516 | spin_unlock_irqrestore(&cq->hwq.lock, flags); |
| 2517 | return rc; |
| 2518 | } |
| 2519 | |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 2520 | static int bnxt_qplib_cq_process_res_raweth_qp1(struct bnxt_qplib_cq *cq, |
| 2521 | struct cq_res_raweth_qp1 *hwcqe, |
| 2522 | struct bnxt_qplib_cqe **pcqe, |
| 2523 | int *budget) |
| 2524 | { |
| 2525 | struct bnxt_qplib_qp *qp; |
| 2526 | struct bnxt_qplib_q *rq; |
Devesh Sharma | 37cb11a | 2018-01-11 11:52:11 -0500 | [diff] [blame] | 2527 | struct bnxt_qplib_srq *srq; |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 2528 | struct bnxt_qplib_cqe *cqe; |
| 2529 | u32 wr_id_idx; |
| 2530 | int rc = 0; |
| 2531 | |
| 2532 | qp = (struct bnxt_qplib_qp *)((unsigned long) |
| 2533 | le64_to_cpu(hwcqe->qp_handle)); |
| 2534 | if (!qp) { |
| 2535 | dev_err(&cq->hwq.pdev->dev, |
| 2536 | "QPLIB: process_cq Raw/QP1 qp is NULL"); |
| 2537 | return -EINVAL; |
| 2538 | } |
Selvin Xavier | f218d67 | 2017-06-29 12:28:15 -0700 | [diff] [blame] | 2539 | if (qp->rq.flushed) { |
| 2540 | dev_dbg(&cq->hwq.pdev->dev, |
| 2541 | "%s: QPLIB: QP in Flush QP = %p\n", __func__, qp); |
| 2542 | goto done; |
| 2543 | } |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 2544 | cqe = *pcqe; |
| 2545 | cqe->opcode = hwcqe->cqe_type_toggle & CQ_BASE_CQE_TYPE_MASK; |
| 2546 | cqe->flags = le16_to_cpu(hwcqe->flags); |
| 2547 | cqe->qp_handle = (u64)(unsigned long)qp; |
| 2548 | |
| 2549 | wr_id_idx = |
| 2550 | le32_to_cpu(hwcqe->raweth_qp1_payload_offset_srq_or_rq_wr_id) |
| 2551 | & CQ_RES_RAWETH_QP1_SRQ_OR_RQ_WR_ID_MASK; |
| 2552 | cqe->src_qp = qp->id; |
| 2553 | if (qp->id == 1 && !cqe->length) { |
| 2554 | /* Add workaround for the length misdetection */ |
| 2555 | cqe->length = 296; |
| 2556 | } else { |
| 2557 | cqe->length = le16_to_cpu(hwcqe->length); |
| 2558 | } |
| 2559 | cqe->pkey_index = qp->pkey_index; |
| 2560 | memcpy(cqe->smac, qp->smac, 6); |
| 2561 | |
| 2562 | cqe->raweth_qp1_flags = le16_to_cpu(hwcqe->raweth_qp1_flags); |
| 2563 | cqe->raweth_qp1_flags2 = le32_to_cpu(hwcqe->raweth_qp1_flags2); |
Devesh Sharma | 8451145 | 2017-11-08 02:48:45 -0500 | [diff] [blame] | 2564 | cqe->raweth_qp1_metadata = le32_to_cpu(hwcqe->raweth_qp1_metadata); |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 2565 | |
Devesh Sharma | 37cb11a | 2018-01-11 11:52:11 -0500 | [diff] [blame] | 2566 | if (cqe->flags & CQ_RES_RAWETH_QP1_FLAGS_SRQ_SRQ) { |
| 2567 | srq = qp->srq; |
| 2568 | if (!srq) { |
| 2569 | dev_err(&cq->hwq.pdev->dev, |
| 2570 | "QPLIB: FP: SRQ used but not defined??"); |
| 2571 | return -EINVAL; |
| 2572 | } |
| 2573 | if (wr_id_idx > srq->hwq.max_elements) { |
| 2574 | dev_err(&cq->hwq.pdev->dev, |
| 2575 | "QPLIB: FP: CQ Process Raw/QP1 "); |
| 2576 | dev_err(&cq->hwq.pdev->dev, |
| 2577 | "QPLIB: wr_id idx 0x%x exceeded SRQ max 0x%x", |
| 2578 | wr_id_idx, srq->hwq.max_elements); |
| 2579 | return -EINVAL; |
| 2580 | } |
| 2581 | cqe->wr_id = srq->swq[wr_id_idx].wr_id; |
| 2582 | bnxt_qplib_release_srqe(srq, wr_id_idx); |
| 2583 | cqe++; |
| 2584 | (*budget)--; |
| 2585 | *pcqe = cqe; |
| 2586 | } else { |
| 2587 | rq = &qp->rq; |
| 2588 | if (wr_id_idx > rq->hwq.max_elements) { |
| 2589 | dev_err(&cq->hwq.pdev->dev, |
| 2590 | "QPLIB: FP: CQ Process Raw/QP1 RQ wr_id "); |
| 2591 | dev_err(&cq->hwq.pdev->dev, |
| 2592 | "QPLIB: ix 0x%x exceeded RQ max 0x%x", |
| 2593 | wr_id_idx, rq->hwq.max_elements); |
| 2594 | return -EINVAL; |
| 2595 | } |
| 2596 | cqe->wr_id = rq->swq[wr_id_idx].wr_id; |
| 2597 | cqe++; |
| 2598 | (*budget)--; |
| 2599 | rq->hwq.cons++; |
| 2600 | *pcqe = cqe; |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 2601 | |
Devesh Sharma | 37cb11a | 2018-01-11 11:52:11 -0500 | [diff] [blame] | 2602 | if (hwcqe->status != CQ_RES_RC_STATUS_OK) { |
| 2603 | qp->state = CMDQ_MODIFY_QP_NEW_STATE_ERR; |
| 2604 | /* Add qp to flush list of the CQ */ |
| 2605 | bnxt_qplib_lock_buddy_cq(qp, cq); |
| 2606 | __bnxt_qplib_add_flush_qp(qp); |
| 2607 | bnxt_qplib_unlock_buddy_cq(qp, cq); |
| 2608 | } |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 2609 | } |
Selvin Xavier | f218d67 | 2017-06-29 12:28:15 -0700 | [diff] [blame] | 2610 | |
| 2611 | done: |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 2612 | return rc; |
| 2613 | } |
| 2614 | |
| 2615 | static int bnxt_qplib_cq_process_terminal(struct bnxt_qplib_cq *cq, |
| 2616 | struct cq_terminal *hwcqe, |
| 2617 | struct bnxt_qplib_cqe **pcqe, |
| 2618 | int *budget) |
| 2619 | { |
| 2620 | struct bnxt_qplib_qp *qp; |
| 2621 | struct bnxt_qplib_q *sq, *rq; |
| 2622 | struct bnxt_qplib_cqe *cqe; |
| 2623 | u32 sw_cons = 0, cqe_cons; |
| 2624 | int rc = 0; |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 2625 | |
| 2626 | /* Check the Status */ |
| 2627 | if (hwcqe->status != CQ_TERMINAL_STATUS_OK) |
| 2628 | dev_warn(&cq->hwq.pdev->dev, |
| 2629 | "QPLIB: FP: CQ Process Terminal Error status = 0x%x", |
| 2630 | hwcqe->status); |
| 2631 | |
| 2632 | qp = (struct bnxt_qplib_qp *)((unsigned long) |
| 2633 | le64_to_cpu(hwcqe->qp_handle)); |
| 2634 | if (!qp) { |
| 2635 | dev_err(&cq->hwq.pdev->dev, |
| 2636 | "QPLIB: FP: CQ Process terminal qp is NULL"); |
| 2637 | return -EINVAL; |
| 2638 | } |
Selvin Xavier | f218d67 | 2017-06-29 12:28:15 -0700 | [diff] [blame] | 2639 | |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 2640 | /* Must block new posting of SQ and RQ */ |
| 2641 | qp->state = CMDQ_MODIFY_QP_NEW_STATE_ERR; |
| 2642 | |
| 2643 | sq = &qp->sq; |
| 2644 | rq = &qp->rq; |
| 2645 | |
| 2646 | cqe_cons = le16_to_cpu(hwcqe->sq_cons_idx); |
| 2647 | if (cqe_cons == 0xFFFF) |
| 2648 | goto do_rq; |
| 2649 | |
| 2650 | if (cqe_cons > sq->hwq.max_elements) { |
| 2651 | dev_err(&cq->hwq.pdev->dev, |
| 2652 | "QPLIB: FP: CQ Process terminal reported "); |
| 2653 | dev_err(&cq->hwq.pdev->dev, |
| 2654 | "QPLIB: sq_cons_idx 0x%x which exceeded max 0x%x", |
| 2655 | cqe_cons, sq->hwq.max_elements); |
| 2656 | goto do_rq; |
| 2657 | } |
Selvin Xavier | f218d67 | 2017-06-29 12:28:15 -0700 | [diff] [blame] | 2658 | |
| 2659 | if (qp->sq.flushed) { |
| 2660 | dev_dbg(&cq->hwq.pdev->dev, |
| 2661 | "%s: QPLIB: QP in Flush QP = %p\n", __func__, qp); |
| 2662 | goto sq_done; |
| 2663 | } |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 2664 | |
| 2665 | /* Terminal CQE can also include aggregated successful CQEs prior. |
| 2666 | * So we must complete all CQEs from the current sq's cons to the |
| 2667 | * cq_cons with status OK |
| 2668 | */ |
| 2669 | cqe = *pcqe; |
| 2670 | while (*budget) { |
| 2671 | sw_cons = HWQ_CMP(sq->hwq.cons, &sq->hwq); |
| 2672 | if (sw_cons == cqe_cons) |
| 2673 | break; |
| 2674 | if (sq->swq[sw_cons].flags & SQ_SEND_FLAGS_SIGNAL_COMP) { |
| 2675 | memset(cqe, 0, sizeof(*cqe)); |
| 2676 | cqe->status = CQ_REQ_STATUS_OK; |
| 2677 | cqe->opcode = CQ_BASE_CQE_TYPE_REQ; |
| 2678 | cqe->qp_handle = (u64)(unsigned long)qp; |
| 2679 | cqe->src_qp = qp->id; |
| 2680 | cqe->wr_id = sq->swq[sw_cons].wr_id; |
| 2681 | cqe->type = sq->swq[sw_cons].type; |
| 2682 | cqe++; |
| 2683 | (*budget)--; |
| 2684 | } |
| 2685 | sq->hwq.cons++; |
| 2686 | } |
| 2687 | *pcqe = cqe; |
| 2688 | if (!(*budget) && sw_cons != cqe_cons) { |
| 2689 | /* Out of budget */ |
| 2690 | rc = -EAGAIN; |
| 2691 | goto sq_done; |
| 2692 | } |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 2693 | sq_done: |
| 2694 | if (rc) |
| 2695 | return rc; |
| 2696 | do_rq: |
| 2697 | cqe_cons = le16_to_cpu(hwcqe->rq_cons_idx); |
| 2698 | if (cqe_cons == 0xFFFF) { |
| 2699 | goto done; |
| 2700 | } else if (cqe_cons > rq->hwq.max_elements) { |
| 2701 | dev_err(&cq->hwq.pdev->dev, |
| 2702 | "QPLIB: FP: CQ Processed terminal "); |
| 2703 | dev_err(&cq->hwq.pdev->dev, |
| 2704 | "QPLIB: reported rq_cons_idx 0x%x exceeds max 0x%x", |
| 2705 | cqe_cons, rq->hwq.max_elements); |
| 2706 | goto done; |
| 2707 | } |
Selvin Xavier | f218d67 | 2017-06-29 12:28:15 -0700 | [diff] [blame] | 2708 | |
| 2709 | if (qp->rq.flushed) { |
| 2710 | dev_dbg(&cq->hwq.pdev->dev, |
| 2711 | "%s: QPLIB: QP in Flush QP = %p\n", __func__, qp); |
| 2712 | rc = 0; |
| 2713 | goto done; |
| 2714 | } |
| 2715 | |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 2716 | /* Terminal CQE requires all posted RQEs to complete with FLUSHED_ERR |
| 2717 | * from the current rq->cons to the rq->prod regardless what the |
| 2718 | * rq->cons the terminal CQE indicates |
| 2719 | */ |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 2720 | |
Selvin Xavier | f218d67 | 2017-06-29 12:28:15 -0700 | [diff] [blame] | 2721 | /* Add qp to flush list of the CQ */ |
| 2722 | bnxt_qplib_lock_buddy_cq(qp, cq); |
| 2723 | __bnxt_qplib_add_flush_qp(qp); |
| 2724 | bnxt_qplib_unlock_buddy_cq(qp, cq); |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 2725 | done: |
| 2726 | return rc; |
| 2727 | } |
| 2728 | |
| 2729 | static int bnxt_qplib_cq_process_cutoff(struct bnxt_qplib_cq *cq, |
| 2730 | struct cq_cutoff *hwcqe) |
| 2731 | { |
| 2732 | /* Check the Status */ |
| 2733 | if (hwcqe->status != CQ_CUTOFF_STATUS_OK) { |
| 2734 | dev_err(&cq->hwq.pdev->dev, |
| 2735 | "QPLIB: FP: CQ Process Cutoff Error status = 0x%x", |
| 2736 | hwcqe->status); |
| 2737 | return -EINVAL; |
| 2738 | } |
| 2739 | clear_bit(CQ_FLAGS_RESIZE_IN_PROG, &cq->flags); |
| 2740 | wake_up_interruptible(&cq->waitq); |
| 2741 | |
| 2742 | return 0; |
| 2743 | } |
| 2744 | |
Selvin Xavier | f218d67 | 2017-06-29 12:28:15 -0700 | [diff] [blame] | 2745 | int bnxt_qplib_process_flush_list(struct bnxt_qplib_cq *cq, |
| 2746 | struct bnxt_qplib_cqe *cqe, |
| 2747 | int num_cqes) |
| 2748 | { |
| 2749 | struct bnxt_qplib_qp *qp = NULL; |
| 2750 | u32 budget = num_cqes; |
| 2751 | unsigned long flags; |
| 2752 | |
| 2753 | spin_lock_irqsave(&cq->hwq.lock, flags); |
| 2754 | list_for_each_entry(qp, &cq->sqf_head, sq_flush) { |
| 2755 | dev_dbg(&cq->hwq.pdev->dev, |
| 2756 | "QPLIB: FP: Flushing SQ QP= %p", |
| 2757 | qp); |
| 2758 | __flush_sq(&qp->sq, qp, &cqe, &budget); |
| 2759 | } |
| 2760 | |
| 2761 | list_for_each_entry(qp, &cq->rqf_head, rq_flush) { |
| 2762 | dev_dbg(&cq->hwq.pdev->dev, |
| 2763 | "QPLIB: FP: Flushing RQ QP= %p", |
| 2764 | qp); |
| 2765 | __flush_rq(&qp->rq, qp, &cqe, &budget); |
| 2766 | } |
| 2767 | spin_unlock_irqrestore(&cq->hwq.lock, flags); |
| 2768 | |
| 2769 | return num_cqes - budget; |
| 2770 | } |
| 2771 | |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 2772 | int bnxt_qplib_poll_cq(struct bnxt_qplib_cq *cq, struct bnxt_qplib_cqe *cqe, |
Eddie Wai | 9152e0b | 2017-06-14 03:26:23 -0700 | [diff] [blame] | 2773 | int num_cqes, struct bnxt_qplib_qp **lib_qp) |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 2774 | { |
| 2775 | struct cq_base *hw_cqe, **hw_cqe_ptr; |
| 2776 | unsigned long flags; |
| 2777 | u32 sw_cons, raw_cons; |
| 2778 | int budget, rc = 0; |
| 2779 | |
| 2780 | spin_lock_irqsave(&cq->hwq.lock, flags); |
| 2781 | raw_cons = cq->hwq.cons; |
| 2782 | budget = num_cqes; |
| 2783 | |
| 2784 | while (budget) { |
| 2785 | sw_cons = HWQ_CMP(raw_cons, &cq->hwq); |
| 2786 | hw_cqe_ptr = (struct cq_base **)cq->hwq.pbl_ptr; |
| 2787 | hw_cqe = &hw_cqe_ptr[CQE_PG(sw_cons)][CQE_IDX(sw_cons)]; |
| 2788 | |
| 2789 | /* Check for Valid bit */ |
| 2790 | if (!CQE_CMP_VALID(hw_cqe, raw_cons, cq->hwq.max_elements)) |
| 2791 | break; |
| 2792 | |
Somnath Kotur | 9b40183 | 2017-11-06 08:07:29 -0800 | [diff] [blame] | 2793 | /* |
| 2794 | * The valid test of the entry must be done first before |
| 2795 | * reading any further. |
| 2796 | */ |
| 2797 | dma_rmb(); |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 2798 | /* From the device's respective CQE format to qplib_wc*/ |
| 2799 | switch (hw_cqe->cqe_type_toggle & CQ_BASE_CQE_TYPE_MASK) { |
| 2800 | case CQ_BASE_CQE_TYPE_REQ: |
| 2801 | rc = bnxt_qplib_cq_process_req(cq, |
| 2802 | (struct cq_req *)hw_cqe, |
Eddie Wai | 9152e0b | 2017-06-14 03:26:23 -0700 | [diff] [blame] | 2803 | &cqe, &budget, |
| 2804 | sw_cons, lib_qp); |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 2805 | break; |
| 2806 | case CQ_BASE_CQE_TYPE_RES_RC: |
| 2807 | rc = bnxt_qplib_cq_process_res_rc(cq, |
| 2808 | (struct cq_res_rc *) |
| 2809 | hw_cqe, &cqe, |
| 2810 | &budget); |
| 2811 | break; |
| 2812 | case CQ_BASE_CQE_TYPE_RES_UD: |
| 2813 | rc = bnxt_qplib_cq_process_res_ud |
| 2814 | (cq, (struct cq_res_ud *)hw_cqe, &cqe, |
| 2815 | &budget); |
| 2816 | break; |
| 2817 | case CQ_BASE_CQE_TYPE_RES_RAWETH_QP1: |
| 2818 | rc = bnxt_qplib_cq_process_res_raweth_qp1 |
| 2819 | (cq, (struct cq_res_raweth_qp1 *) |
| 2820 | hw_cqe, &cqe, &budget); |
| 2821 | break; |
| 2822 | case CQ_BASE_CQE_TYPE_TERMINAL: |
| 2823 | rc = bnxt_qplib_cq_process_terminal |
| 2824 | (cq, (struct cq_terminal *)hw_cqe, |
| 2825 | &cqe, &budget); |
| 2826 | break; |
| 2827 | case CQ_BASE_CQE_TYPE_CUT_OFF: |
| 2828 | bnxt_qplib_cq_process_cutoff |
| 2829 | (cq, (struct cq_cutoff *)hw_cqe); |
| 2830 | /* Done processing this CQ */ |
| 2831 | goto exit; |
| 2832 | default: |
| 2833 | dev_err(&cq->hwq.pdev->dev, |
| 2834 | "QPLIB: process_cq unknown type 0x%lx", |
| 2835 | hw_cqe->cqe_type_toggle & |
| 2836 | CQ_BASE_CQE_TYPE_MASK); |
| 2837 | rc = -EINVAL; |
| 2838 | break; |
| 2839 | } |
| 2840 | if (rc < 0) { |
| 2841 | if (rc == -EAGAIN) |
| 2842 | break; |
| 2843 | /* Error while processing the CQE, just skip to the |
| 2844 | * next one |
| 2845 | */ |
| 2846 | dev_err(&cq->hwq.pdev->dev, |
| 2847 | "QPLIB: process_cqe error rc = 0x%x", rc); |
| 2848 | } |
| 2849 | raw_cons++; |
| 2850 | } |
| 2851 | if (cq->hwq.cons != raw_cons) { |
| 2852 | cq->hwq.cons = raw_cons; |
| 2853 | bnxt_qplib_arm_cq(cq, DBR_DBR_TYPE_CQ); |
| 2854 | } |
| 2855 | exit: |
| 2856 | spin_unlock_irqrestore(&cq->hwq.lock, flags); |
| 2857 | return num_cqes - budget; |
| 2858 | } |
| 2859 | |
| 2860 | void bnxt_qplib_req_notify_cq(struct bnxt_qplib_cq *cq, u32 arm_type) |
| 2861 | { |
| 2862 | unsigned long flags; |
| 2863 | |
| 2864 | spin_lock_irqsave(&cq->hwq.lock, flags); |
| 2865 | if (arm_type) |
| 2866 | bnxt_qplib_arm_cq(cq, arm_type); |
Selvin Xavier | f218d67 | 2017-06-29 12:28:15 -0700 | [diff] [blame] | 2867 | /* Using cq->arm_state variable to track whether to issue cq handler */ |
| 2868 | atomic_set(&cq->arm_state, 1); |
Selvin Xavier | 1ac5a40 | 2017-02-10 03:19:33 -0800 | [diff] [blame] | 2869 | spin_unlock_irqrestore(&cq->hwq.lock, flags); |
| 2870 | } |
Selvin Xavier | c88a785 | 2017-11-06 08:07:31 -0800 | [diff] [blame] | 2871 | |
| 2872 | void bnxt_qplib_flush_cqn_wq(struct bnxt_qplib_qp *qp) |
| 2873 | { |
| 2874 | flush_workqueue(qp->scq->nq->cqn_wq); |
| 2875 | if (qp->scq != qp->rcq) |
| 2876 | flush_workqueue(qp->rcq->nq->cqn_wq); |
| 2877 | } |